Active-discharge low-dropout regulator having rapid transient response characteristics

Abstract

This regulator comprises: an amplification part that receives a first reference voltage input to the regulator and the feedback voltage of an output voltage output from the regulator and outputs an operation signal controlling the output voltage; an output part that outputs the output voltage according to the operation signal; and a discharge part that compares a second reference voltage, in which an offset voltage has been added to the first reference voltage, with the feedback voltage of the output voltage and, if the feedback voltage is greater than the second reference voltage, lowers the output voltage of the output part.

Description

Active discharge low-voltage regulator with fast transient response characteristics

[0001] The present invention relates to a regulator, and more specifically, to an active discharge regulator having fast transient response characteristics.

[0002] FIG. 1 is a schematic diagram illustrating a regulator according to the prior art. Referring to FIG. 1, the regulator (RGT) according to the prior art includes an amplifier (AP), a transistor (TR), and output resistors (R01, R02).

[0003] A regulator (RGT) according to conventional technology receives a power supply voltage (VIN) as input and outputs an output voltage (VOUT) to the load. In this case, the output voltage (VOUT) is determined by the reference voltage (VREF) and gain (GAIN), as in “VOUT = VREF x Gain (= 1 + R01 / R02).”

[0004] The objective of the present invention is to provide an active discharge low voltage drop regulator having fast transient response characteristics.

[0005] A regulator according to a preferred embodiment of the present invention for achieving the purpose described above comprises: an amplifier that receives a first reference voltage input to the regulator and a feedback voltage of an output voltage output from the regulator, and outputs a driving signal that controls the output voltage; an output unit that outputs the output voltage according to the driving signal; and a discharge unit that compares a second reference voltage, obtained by adding an offset voltage to the first reference voltage, with the feedback voltage of the output voltage, and if the feedback voltage of the output voltage is greater than the second reference voltage, reduces the output voltage of the output unit.

[0006] The amplifier includes an error amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the output voltage, so that the output voltage is maintained equal to the first reference voltage, and a buffer amplifier that amplifies the output of the error amplifier and outputs a driving signal.

[0007] The output unit includes a power transistor that outputs the output voltage according to the driving signal, and an output capacitor connected to the output terminal of the power transistor.

[0008] The discharge unit includes a second reference voltage generator that outputs a second reference voltage by adding an offset voltage to the first reference voltage, a discharge comparator that compares the second reference voltage and the feedback voltage of the output voltage and outputs an open signal when the feedback voltage of the output voltage is greater than the second reference voltage, and a discharge transistor that forms a discharge path to lower the output voltage through discharge when the output of the discharge comparator is the open signal.

[0009] The second reference voltage generator comprises a second reference amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the second reference voltage output from the second reference voltage generator; a second reference voltage transistor that outputs the second reference voltage according to the output of the second reference amplifier; and a second reference voltage detector that divides the second reference voltage to form a feedback voltage of the second reference voltage so as to adjust the offset voltage added to the first reference voltage, and feeds the formed feedback voltage of the second reference voltage back to the second reference amplifier.

[0010] The discharge comparator compares the second reference voltage with the feedback voltage of the output voltage and outputs a closing signal when the feedback voltage of the output voltage is smaller than the second reference voltage, and the discharge transistor is turned off so that the discharge is terminated when the output of the discharge comparator is a closing signal.

[0011] The power supply of the error amplifier and the power transistor is the same, or each uses a separate power supply voltage.

[0012] The regulator further includes a charging unit that compares a third reference voltage, obtained by subtracting an offset voltage from the first reference voltage, with a feedback voltage of the output voltage, and if the feedback voltage of the output voltage is smaller than the third reference voltage, increases the output voltage of the output unit.

[0013] The charging unit includes a third reference voltage generator that outputs a third reference voltage by subtracting an offset voltage from the first reference voltage, a charging comparator that compares the third reference voltage with the feedback voltage of the output voltage and outputs an open signal when the feedback voltage of the output voltage is smaller than the third reference voltage, and a charging transistor that provides a charging path to increase the output voltage through charging by turning on when the output of the charging comparator is an open signal.

[0014] The third reference voltage generator comprises a third reference amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the third reference voltage output from the third reference voltage generator; a third reference voltage transistor that outputs the third reference voltage according to the output of the third reference amplifier; and a third reference voltage detector that divides the third reference voltage to configure the feedback voltage of the third reference voltage so as to adjust the offset voltage subtracted from the first reference voltage, and feeds the configured feedback voltage of the third reference voltage back to the third reference amplifier.

[0015] The charging comparator compares the feedback voltage of the third reference voltage and the output voltage, and outputs a closing signal when the feedback voltage of the output voltage is greater than the third reference voltage, and the charging transistor is turned off so that charging is terminated when the output of the charging comparator is a closing signal.

[0016] According to the present invention, the output voltage can be made to rapidly track the reference voltage in accordance with changes in the input reference voltage. Accordingly, the measurement time of measurement equipment capable of testing various applications requiring diverse output voltage changes, such as memory test equipment and various DUTs (Device Under Test), can be shortened, thereby reducing test costs. Furthermore, a reliable system can be provided by eliminating factors causing overcurrent.

[0017] FIG. 1 is a schematic diagram illustrating a regulator according to the prior art.

[0018] FIG. 2 is a drawing for explaining the configuration of a regulator according to one embodiment of the present invention.

[0019] FIG. 3 is a diagram illustrating the configuration of a second reference voltage generating unit of a regulator according to one embodiment of the present invention.

[0020] Figure 4 is a graph showing the change in output voltage (VOUT) according to the change in reference voltage of a typical regulator, and

[0021] Figure 5 is a graph showing the change in output voltage (VOUT) according to the change in the first reference voltage (VREF1) of the regulator of the present invention.

[0022] FIG. 6 is a drawing for explaining the configuration of a regulator according to an additional embodiment of the present invention.

[0023] FIG. 7 is a diagram illustrating the configuration of a third reference voltage generating unit of a regulator according to an additional embodiment of the present invention.

[0024] The present invention is capable of various modifications and may have various embodiments, and specific embodiments are illustrated and described in detail in the detailed description. However, this is not intended to limit the present invention to specific embodiments, and it should be understood that it includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention.

[0025] The terms used in this invention are used merely to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this invention, terms such as "comprising" or "having" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0026] In particular, the terms and words used in the specification and claims described below should not be interpreted as being limited to their ordinary or dictionary meanings, but should be interpreted in a meaning and concept consistent with the technical spirit of the invention, based on the principle that the inventor can appropriately define the concept of the terms to best describe his invention.

[0027] First, an active discharge regulator having fast transient characteristics according to one embodiment of the present invention will be described. FIG. 2 is a diagram illustrating the configuration of a regulator according to one embodiment of the present invention. FIG. 3 is a diagram illustrating the configuration of a second reference voltage generating unit of a regulator according to one embodiment of the present invention.

[0028] A regulator (RG) according to one embodiment of the present invention includes an amplification section (10), an output section (20), and a discharge section (30). Basically, the regulator (RG) receives an input voltage (VIN) and a first reference voltage (VREF1) and outputs an output voltage (VOUT) according to a change in the first reference voltage (VREF1).

[0029] The amplifier (10) receives a first reference voltage (VREF1) input to the regulator (RG) and a feedback voltage of the output voltage (VOUT) output from the regulator (RG), and outputs a driving signal to adjust the output voltage (VOUT) of the regulator (RG) according to the first reference voltage (VREF1) and the feedback voltage of the output voltage (VOUT). The amplifier (10) basically includes an error amplifier (100). The amplifier (10) may optionally further include a buffer amplifier (200). Both the error amplifier (100) and the buffer amplifier (200) may be configured as operational amplifiers.

[0030] The error amplifier (100) receives a differential input, which is the difference between the first reference voltage (VREF1) and the feedback voltage of the output voltage (VOUT) of the regulator (RG), and amplifies the differential input so that the output voltage (VOUT) of the regulator tracks the first reference voltage (VREF1) (VOUT=VREF1xGain, Gain=1). That is, the gain of the error amplifier (100) is 1.

[0031] The buffer amplifier (200) amplifies the output of the error amplifier (100) to output a driving signal in order to implement the fast response characteristics of the regulator according to an embodiment of the present invention. This driving signal is intended to drive the power transistor (300) of the output section (20). In particular, when the power transistor (300) has a high capacity, the buffer amplifier (200) provides a driving signal that amplifies the output of the error amplifier (100) to provide high bandwidth gain characteristics for the fast response of the power transistor (300).

[0032] The output section (20) is intended to output the output voltage (VOUT) of the regulator (RG) from the input voltage (VIN) according to the driving signal. This output section (20) includes a power transistor (300), an output capacitor (CL), and a detection resistor (R0).

[0033] The power transistor (300) is basically intended to control the output voltage (VOUT). The power transistor (300) can be a P-type or N-type MOS transistor. In particular, the power transistor (300) can output an output voltage (VOUT) from an input voltage (VIN) according to a driving signal. The power transistor (300) can have a first terminal (e.g., source) connected to the input voltage (VIN), a second terminal (e.g., drain) connected to the output voltage (VOUT), and a third terminal (e.g., gate) connected to the output of the amplifier (10). The power transistor (300) can control the output voltage (VOUT) by controlling the current flowing from the input terminal (IN) of the first reference voltage (VREF1) to the output terminal (OUT), controlling the voltage drop between the input voltage (VIN) and the output voltage (VOUT), or controlling the impedance inside the power transistor (300).

[0034] The output capacitor (CL) and the detection resistor (R0) are connected between the output of the power transistor (300) and ground (GND) in a path that feeds back from the output of the power transistor (300) to the error amplifier (100) of the amplifier (10).

[0035] The output capacitor (CL) can basically be charged or discharged depending on fluctuations in the output voltage (VOUT). One end of the output capacitor (CL) is connected to the output terminal (e.g., drain) of the power transistor (300), and the other end is grounded to ground (GND). One end of the detection resistor (R0) is connected to the output terminal (e.g., drain) of the power transistor (300), and the other end is grounded to ground (GND).

[0036] Meanwhile, although not shown, the power supply of the error amplifier (100) and the power transistor (300) may be the same or each may use a separate power supply.

[0037] The discharge unit (30) is intended to compare the feedback voltage of the output voltage (VOUT) with the second reference voltage (VREF2), which is obtained by adding an offset voltage (Voffset) to the first reference voltage (VREF1), and to lower the output voltage (VOUT) when the feedback voltage of the output voltage (VOUT) is greater than the second reference voltage (VREF2) (VOUT > VREF2). To this end, if the feedback voltage is greater than the second reference voltage (VREF2), the discharge unit (30) discharges the charge stored in the output capacitor (CL) of the output unit (20). This discharge unit (30) includes a second reference voltage generator (400), a discharge comparator (500), and a discharge transistor (600).

[0038] The second reference voltage generator (400) is intended to output a second reference voltage (VREF2) by adding an offset voltage (Voffset) to the first reference voltage (VREF1).

[0039] Meanwhile, referring to FIG. 3, the second reference voltage generating unit (400) includes a second reference amplifier (410), a second reference voltage transistor (420), and a second reference voltage detection unit (430). Here, the second reference amplifier (410) may be configured as an operational amplifier. Additionally, the second reference voltage transistor (420) may be an N-type MOS transistor. The second reference voltage detection unit (430) includes a first detection resistor (R1) and a second detection resistor (R2).

[0040] The second reference amplifier (410) receives the feedback voltage of the first reference voltage (VREF1) and the second reference voltage (VREF2) as inputs, and amplifies and outputs the differential input, which is the difference between the feedback voltages of the first reference voltage (VREF1) and the second reference voltage (VREF2). Here, the feedback voltage of the second reference voltage (VREF2) may be a voltage divided by the second reference voltage detection unit (430).

[0041] The second reference voltage transistor (420) outputs a second reference voltage (VREF2) from a bias voltage (VBIAS) according to the output of the second reference amplifier (410). The second reference voltage transistor (420) may have the first terminal (e.g., source) connected to the bias voltage (VBIAS), the second terminal (e.g., drain) connected to the output second reference voltage (VREF2), and the third terminal (e.g., gate) connected to the output of the second reference amplifier (410).

[0042] The second reference voltage detection unit (430) divides the output second reference voltage (VREF2) to form a feedback voltage of the second reference voltage (VREF2) so that the offset voltage (Voffset) added to the first reference voltage (VREF1) is adjusted, and feeds the formed feedback voltage of the second reference voltage to the second reference amplifier (410). Accordingly, the offset voltage (Voffset) is adjusted, and the second reference voltage (VREF2) is adjusted. The second reference voltage detection unit (430) includes a first detection resistor (R1) and a second detection resistor (R2). The first detection resistor (R1) and the second detection resistor (R2) of the second reference voltage detection unit (430) can adjust the second reference voltage (VREF2) by adjusting the offset voltage (Voffset) according to the following mathematical formula 1.

[0043] [Mathematical Formula 1]

[0044] VREF2=VREF1x{1+(R1 / R2)}=VREF1+{(R1 / R2)xVREF1}

[0045] Voffset={(R1 / R2)xVREF1}

[0046] Here, VREF1 is the first reference voltage and VREF2 is the second reference voltage. Also, R1 is the first detection resistor and R2 is the second detection resistor. And Voffset is the offset voltage determined by the first detection resistor and the second detection resistor.

[0047] The first detection resistor (R1) and the second detection resistor (R2) are connected between the output of the second reference voltage transistor (420) and the input of the second reference amplifier (410) in a feedback path where the output of the second reference voltage transistor (420), i.e., the second reference voltage (VREF2), is fed back to the input of the second reference amplifier (410).

[0048] The first detection resistor (R1) is a variable resistor. Accordingly, the first detection resistor (R1) is connected to the output terminal of the second reference voltage transistor (420) and varied so that the magnitude of the offset voltage (VOffset) added to the first reference voltage (VREF1) can be variably adjusted.

[0049] One end of the second detection resistor (R2) is connected to the first detection resistor (R1) and the other end is connected to ground (GND), so that the magnitude of the offset voltage (Voffset) added to the first reference voltage (VREF1) can be adjusted.

[0050] Referring again to FIG. 2, the discharge comparator (500) is intended to compare the second reference voltage (VREF2) with the feedback voltage, which is the output voltage (VOUT). The discharge comparator (500) may be configured as an operational amplifier. The second reference voltage (VREF2) is input to the negative (-) terminal of the discharge comparator (500), and the feedback voltage of the output voltage (VOUT) is input to the positive (+) terminal of the discharge comparator (500). Then, the discharge comparator (500) compares the feedback voltage of the second reference voltage (VREF2) with the feedback voltage of the output voltage (VOUT), and if the feedback voltage of the output voltage (VOUT) is greater than the second reference voltage (VREF2), it outputs an open signal (e.g., HIGH if the discharge transistor is an N-type MOS transistor). This open signal (e.g., HIGH) is a signal to turn on the discharge transistor (600).

[0051] The discharge transistor (600) may be composed of an N-type MOS transistor. In this discharge transistor (600), the first terminal (e.g., source) may be connected to the output voltage (VOUT), the second terminal (e.g., drain) may be grounded to the ground (GND), and the third terminal (e.g., gate) may be connected to the output of the discharge comparator (500). Accordingly, when the output of the discharge comparator (500) is an open signal (e.g., HIGH), the discharge transistor (600) is turned on to rapidly lower the output voltage (VOUT) of the output section (20).

[0052] Specifically, when the discharge transistor (600) is turned on, it provides a discharge path (DP) that causes the output voltage (VOUT) to drop through discharge. In other words, the discharge transistor (600) is turned on when the output of the discharge comparator (500) is an open signal (e.g., HIGH), and a discharge path (DP) is formed by the discharge transistor (600), and the charge charged in the output capacitor (CL) of the output section (20) is rapidly discharged to ground (GND) along the discharge path (DP).

[0053] Additionally, the discharge comparator (500) can compare the feedback voltage of the second reference voltage (VREF2) and the output voltage (VOUT), and output a closing signal (e.g., LOW if the discharge transistor is an N-type MOS transistor) when the feedback voltage of the output voltage (VOUT) is smaller than the second reference voltage (VREF2). Then, the discharge transistor (600) is turned off when the output of the discharge comparator (500) is a closing signal (e.g., LOW). Accordingly, the discharge is terminated.

[0054] Next, the effect of the discharge by the discharge unit (30) according to the present invention will be explained in more detail. FIG. 4 is a graph showing the change in output voltage (VOUT) according to the change in reference voltage of a general regulator, and FIG. 5 is a graph showing the change in output voltage (VOUT) according to the change in the first reference voltage (VREF1) of the regulator of the present invention.

[0055] Referring to FIGS. 2 to 5, a situation is assumed in which a Device Under Test (DUT) is connected to the regulator of the present invention to perform a test. For this test, a first reference voltage (VREF1) can be adjusted and input. First, it is assumed that the first reference voltage (VREF1) is in a state where it is the first voltage (V1).

[0056] The second reference voltage generator (400) adds an offset voltage (Voffset) to the first reference voltage (VREF1) to output the second reference voltage (VREF2). Then, the second reference voltage (VREF2) is input to the negative (-) terminal of the discharge comparator (500), and the feedback voltage, which is the feedback output voltage (VOUT), is input to the positive (+) terminal of the discharge comparator (500). Accordingly, the discharge comparator (500) compares the feedback voltage, that is, the output voltage (VOUT), with the second reference voltage (VREF2). Accordingly, in a normal state where the first reference voltage (VREF1) is unchanged, the output voltage (VOUT) is smaller than the second reference voltage (VREF2), so the discharge comparator (500) outputs a closed signal (e.g., LOW if the discharge transistor is an N-type MOS transistor). Accordingly, the discharge transistor (600) is in a turned-off state.

[0057] It is assumed that, for example, in the turn-off state, the first reference voltage (VREF1) is adjusted from the first voltage (V1) to a second voltage (V2) that is lower than the first voltage (V1) by an offset voltage (Voffset) or more (V1-V2>Voffset).

[0058] In this case, the output voltage (VOUT) does not undergo rapid fluctuation due to the output capacitance. That is, the decrease in the output voltage (VOUT) occurs slowly due to the current charged in the output capacitor (CL). Accordingly, even in the case of the second reference voltage (VREF2) to which the offset voltage (Voffset) is added to the first reference voltage (VREF1) by the second reference voltage generator (400), the second reference voltage (VREF2) can be smaller than the output voltage (VOUT) as shown in the following mathematical formula 2.

[0059] [Mathematical Formula 2]

[0060] VOUT>VREF2(=VREF1+Voffset)

[0061] Here, VOUT is the output voltage and Voffset is the offset voltage. Also, VREF1 is the first reference voltage and VREF2 is the second reference voltage.

[0062] If the second reference voltage (VREF2) is smaller than the output voltage (VOUT), the discharge comparator (500) outputs an open signal (e.g., HIGH if the discharge transistor is an N-type MOS transistor). Accordingly, the discharge transistor (600) is turned on. A discharge path (DP) is formed by the turned-on discharge transistor (600) to cause the output voltage (VOUT) to drop. Specifically, by discharging the charge stored in the output capacitor (CL) along the discharge path (DP), the output voltage (VOUT) rapidly drops.

[0063] Comparing these situations through FIGS. 4 and FIGS. 5, in the case of the general regulator shown in FIGS. 4, it takes a first time (T1) for the output voltage (VOUT) to reach the first reference voltage (VREF1) V2, and in the case of the regulator of the present invention shown in FIGS. 5, by discharging the charge stored in the output capacitor (CL) through the discharge unit (30), it takes a second time (T2) for the output voltage (VOUT) to reach the first reference voltage (VREF1) V2, which is much shorter than the first time (T1). If the first reference voltage (VREF1) is lowered by a voltage difference greater than the offset voltage (Voffset) when there is almost no current consumption at the load, the output voltage (VOUT) will not stabilize for a very large delay time of RC(R0 × CL) (e.g., during T1). However, the present invention can rapidly stabilize the output voltage (VOUT) by discharging the charge stored in the output capacitor (CL) through the discharge unit (30) (e.g., T1 > T2). Due to this fast response speed, cost reduction effects are provided in various fields. In addition, the output voltage eliminates the cause of overcurrent generation due to the long discharge time, thereby providing a reliable system.

[0064] When the output voltage (VOUT) drops below the second reference voltage (VREF2) due to the voltage drop caused by the discharge as described above, the discharge comparator (500) outputs a closing signal again (e.g., LOW if the discharge transistor is an N-type MOS transistor), and the discharge transistor (600) turns off again. Then, the difference between the first reference voltage (VREF1) and the output voltage (VOUT) is narrowed to below the offset voltage (Voffset). Accordingly, the negative feedback system in a normal state operates, and the output voltage (VOUT) tracks the first reference voltage (VREF1) without a large delay.

[0065] Next, a regulator according to an additional embodiment of the present invention will be described. FIG. 6 is a diagram illustrating the configuration of a regulator according to an additional embodiment of the present invention. FIG. 7 is a diagram illustrating the configuration of a third reference voltage generating unit of a regulator according to an additional embodiment of the present invention.

[0066] A regulator according to one embodiment of the present invention includes an amplification unit (10), an output unit (20), and a discharge unit (30) as described above through FIGS. 2 and 3, and additionally includes a charging unit (40).

[0067] As described above, the regulator (RG) of the present invention basically receives an input voltage (VIN) and a first reference voltage (VREF1) and outputs an output voltage (VOUT) to a load.

[0068] The charging unit (40) compares the feedback voltage of the output voltage (VOUT) with the third reference voltage (VREF3), which is obtained by subtracting the offset voltage (Voffset) from the first reference voltage (VREF1), and if the feedback voltage of the output voltage (VOUT) is smaller than the third reference voltage (VREF3) (VOUT <VREF2, 출력전압(VOUT)을 상승시키기 위한 것이다. 이를 위하여, 충전부(40)는 출력전압(VOUT)의 피드백 전압이 제3기준전압(VREF3) 보다 작으면, 출력부(20)의 출력캐패시터(CL)에 전하를 충전시킨다. 이러한 충전부(40)는 제3기준전압발생부(700), 충전비교기(800) 및 충전트랜지스터(900)를 포함한다.

[0069] The third reference voltage generator (700) is intended to output a third reference voltage (VREF3) by subtracting an offset voltage (Voffset) from a first reference voltage (VREF1).

[0070] Meanwhile, referring to FIG. 7, the third reference voltage generation unit (700) includes a third reference amplifier (710), a third reference voltage transistor (720), and a third reference voltage detection unit (730). The third reference amplifier (710) may be configured as an operational amplifier. Additionally, the third reference voltage transistor (720) may be an N-type MOS transistor. Furthermore, the third reference voltage detection unit (730) includes a third detection resistor (R3) and a fourth detection resistor (R4).

[0071] The third reference amplifier (710) receives the feedback voltage of the first reference voltage (VREF1) and the third reference voltage (VREF3) as inputs, and amplifies and outputs the differential input, which is the difference between the feedback voltages of the first reference voltage (VREF1) and the third reference voltage (VREF3). Here, the feedback voltage of the third reference voltage (VREF3) may be a voltage divided by the third reference voltage detection unit (730).

[0072] The third reference voltage transistor (720) outputs a third reference voltage (VREF3) from a bias voltage (VBIAS) according to the output of the third reference amplifier (710). The first terminal (e.g., source) of the third reference voltage transistor (720) may be connected to the bias voltage (VBIAS), the second terminal (e.g., drain) may be connected to the third reference voltage (VREF3) which is the output through the third detection resistor (R3), and the third terminal (e.g., gate) may be connected to the output of the third reference amplifier (710).

[0073] The third reference voltage detection unit (730) divides the output third reference voltage (VREF3) to form a feedback voltage of the third reference voltage (VREF3) so that the offset voltage (Voffset) subtracted from the first reference voltage (VREF1) is adjusted, and feeds the formed feedback voltage of the third reference voltage (VREF3) to the third reference amplifier (710). Through this, the offset voltage (Voffset) is adjusted to control the third reference voltage (VREF3). The third reference voltage detection unit (730) includes a third detection resistor (R3) and a fourth detection resistor (R4). The third reference voltage (VREF3) can be controlled by adjusting the offset voltage (Voffset) according to the third detection resistor (R3) and the fourth detection resistor (R4) of the third reference voltage detection unit (730). Accordingly, the third reference voltage (VREF3) is output as shown in the following mathematical formula 3.

[0074] [Mathematical Formula 3]

[0075] VREF3=VREF1-Voffset

[0076] Here, VREF1 is the first reference voltage, VREF3 is the third reference voltage, and Voffset is the offset voltage.

[0077] The third detection resistor (R3) and the fourth detection resistor (R4) are connected between the output of the third reference voltage transistor (720) and the input of the third reference amplifier (710) in a feedback path where the output of the third reference voltage transistor (720), i.e., the third reference voltage (VREF3), is fed back to the input of the second reference amplifier (410).

[0078] The third detection resistor (R3) is a variable resistor. Accordingly, the third detection resistor (R3) is connected to the output terminal of the third reference voltage transistor (720) so that the magnitude of the offset voltage (VOffset) for subtracting the first reference voltage (VREF1) can be variably adjusted.

[0079] One end of the fourth detection resistor (R4) is connected to the third detection resistor (R3) and the other end is connected to ground (GND) to adjust the magnitude of the offset voltage (Voffset) that is subtracted from the first reference voltage.

[0080] Referring again to FIG. 6, the charging comparator (800) is intended to compare the feedback voltage of the third reference voltage (VREF3) and the output voltage (VOUT). This charging comparator (800) may be configured as an operational amplifier. The third reference voltage (VREF3) is input to the negative (-) terminal of the charging comparator (800), and the feedback voltage, which is the feedback output voltage (VOUT), is input to the positive (+) terminal of the charging comparator (800). The charging comparator (800) compares the feedback voltage of the third reference voltage (VREF3) and the output voltage (VOUT), and outputs an open signal (e.g., LOW if the charging transistor is a P-type MOS transistor) when the feedback voltage of the output voltage (VOUT) is smaller than the third reference voltage (VREF2). This open signal (e.g., LOW) is a signal to turn on the charging transistor (900).

[0081] The charging transistor (900) may be composed of a P-type MOS transistor. The charging transistor (900) may have a first terminal (e.g., drain) connected to a bias (VBIAS), a second terminal (e.g., source) connected to the output terminal of an amplifier (10), and a third terminal (e.g., gate) connected to the output of a charging comparator (800). Accordingly, the charging transistor (900) is turned on when the output of the charging comparator (800) is an open signal (e.g., LOW). Accordingly, the output voltage (VOUT) can be rapidly increased based on the bias voltage (VBIAS) and the input voltage (VIN). In other words, as shown in the charging path (CP), the charging transistor (900) is turned on to quickly turn on the power transistor (300) through the bias voltage (VBIAS), and can quickly charge the output capacitor (CL) through the bias voltage (VBIAS) and the input voltage (VIN).

[0082] Additionally, the charging comparator (800) can compare the third reference voltage (VREF3) with the feedback voltage, which is the output voltage (VOUT), and output a closing signal (e.g., HIGH if the charging transistor is a PMOS TR) if the feedback voltage is greater than the third reference voltage (VREF3). If the output of the charging comparator (800) is a closing signal (e.g., HIGH), the charging transistor (900) is turned off. Accordingly, charging is terminated.

[0083] The embodiment with reference to FIGS. 6 and 7 provides not only improved falling characteristics of the power voltage (VOUT) but also fast rising characteristics. For example, when the first reference voltage (VREF1) rises significantly above the previous voltage, the third reference voltage generator (700) outputs a third reference voltage (VREF3) obtained by subtracting the offset voltage (Voffset) from the first reference voltage (VREF1). Accordingly, the third reference voltage (VREF3) is input to the negative (-) terminal of the charging comparator (800), and the feedback voltage, which is the feedback output voltage (VOUT), is input to the positive (+) terminal of the charging comparator (800). At this time, since the state in which the output voltage (VOUT) is a voltage smaller than the third reference voltage (VREF3 = VREF1 - Voffset) is maintained, the charging comparator (800) outputs an open signal (e.g., LOW), and the charging transistor (900) is turned on. Accordingly, the charging transistor (900) provides a charging path (CP) so that the output voltage (VOUT) of the output section (20) is increased. Specifically, the charging transistor (900) is turned on and rapidly charges the gate of the power transistor (300) through the bias voltage (VBIAS) to turn on. Accordingly, the output voltage (VOUT) is rapidly increased by two sources including the bias voltage (VBIAS) and the input voltage (VIN). In other words, the output capacitor (CL) can be rapidly charged based on the bias voltage (VBIAS) and the input voltage (VIN).

[0084] Subsequently, when the output voltage (VOUT) raised according to the aforementioned charging becomes greater than the third reference voltage (VREF3), the power of the charging comparator (800) outputs a closing signal (e.g., HIGH if the charging transistor is a P-type MOS transistor), and the charging transistor (900) is turned off. Accordingly, charging is terminated.

[0085] As described above, the gain of the error amplifier (100) of the amplifier section (100) of the present invention is 1. Accordingly, the present invention is usefully applied in applications using a regulator in which the output voltage (VOUT) tracks the first reference voltage (VREF1). For example, to verify whether the device under test (DUT) operates according to the original product specifications during manufacturing or during the subsequent lifecycle, the device under test (DUT) can be connected to the regulator (1) of the present invention to perform tests such as functional testing and calibration inspection. At this time, the test can be conducted while changing the first reference voltage (VREF1) to meet the test requirements. In such cases, the present invention can significantly reduce test costs by ensuring that the output voltage (VOUT) tracks the first reference voltage (VREF1) at a fast response speed through the discharge section (30) and the charging section (40). Specifically, the present invention provides fast response characteristics even when the load current is large in the ampere range. Therefore, the output capacitor (CL) It provides a fast response even in the case of high-capacity capacitors with a capacitance of several uF to tens of uF.

[0086] Although an embodiment of the present invention has been described above, those skilled in the art may modify and change the present invention in various ways by adding, changing, deleting, or adding components, etc., without departing from the spirit of the present invention as described in the claims, and such modifications and changes are also to be included within the scope of the rights of the present invention.

Claims

1. An amplifier that receives a first reference voltage input to a regulator and a feedback voltage of an output voltage output from the regulator, and outputs a driving signal that regulates the output voltage; An output unit that outputs the output voltage according to the above driving signal; A discharge unit that compares a second reference voltage, obtained by adding an offset voltage to the first reference voltage, with a feedback voltage of the output voltage, and if the feedback voltage of the output voltage is greater than the second reference voltage, lowers the output voltage of the output unit; Characterized by including Regulator.

2. In Paragraph 1, The above amplification unit An error amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the output voltage, so that the output voltage is maintained equal to the first reference voltage; and A buffer amplifier that amplifies the output of the above error amplifier and outputs a driving signal; Characterized by including Regulator.

3. In Paragraph 2, The above output unit A power transistor that outputs the output voltage according to the above driving signal; and An output capacitor connected to the output terminal of the above power transistor; Characterized by including Regulator.

4. In Paragraph 3, The above discharge part A second reference voltage generator that outputs a second reference voltage by adding an offset voltage to the first reference voltage; A discharge comparator that compares the feedback voltage of the second reference voltage and the output voltage and outputs an open signal when the feedback voltage of the output voltage is greater than the second reference voltage; and A discharge transistor that is turned on when the output of the discharge comparator is the open signal, forming a discharge path to lower the output voltage through discharge; Characterized by including Regulator.

5. In Paragraph 4, The above second reference voltage generator A second reference amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the second reference voltage output from the second reference voltage generator; A second reference voltage transistor that outputs a second reference voltage according to the output of the second reference amplifier; A second reference voltage detection unit that divides the second reference voltage to form a feedback voltage of the second reference voltage so as to adjust the offset voltage added to the first reference voltage, and feeds the formed feedback voltage of the second reference voltage to the second reference amplifier; Characterized by including Regulator.

6. In Paragraph 4, The above discharge comparator The feedback voltage of the output voltage is compared with the second reference voltage, and if the feedback voltage of the output voltage is smaller than the second reference voltage, a closing signal is output. The above discharge transistor is Characterized by being turned off to terminate the discharge when the output of the discharge comparator is a closed signal. Regulator.

7. In Paragraph 3, The power supply of the error amplifier and the power transistor is the same, or each uses a separate power supply voltage. Regulator.

8. In Paragraph 1, A charging unit that compares the feedback voltage of the output voltage with the third reference voltage obtained by subtracting the offset voltage from the first reference voltage, and if the feedback voltage of the output voltage is smaller than the third reference voltage, increases the output voltage of the output unit; Characterized by further including Regulator.

9. In Paragraph 8, The above charging part A third reference voltage generator that outputs a third reference voltage by subtracting an offset voltage from the first reference voltage; A charging comparator that compares the feedback voltage of the third reference voltage and the output voltage and outputs an open signal when the feedback voltage of the output voltage is smaller than the third reference voltage; and A charging transistor that is turned on when the output of the charging comparator is an open signal, and provides a charging path so that the output voltage is raised through charging; Characterized by including Regulator.

10. In Paragraph 9, The above third reference voltage generator A third reference amplifier that amplifies and outputs a differential input, which is the difference between the first reference voltage and the feedback voltage of the third reference voltage output from the third reference voltage generator; A third reference voltage transistor that outputs a third reference voltage according to the output of the third reference amplifier; and A third reference voltage detection unit that divides the third reference voltage to form a feedback voltage of the third reference voltage so as to adjust the offset voltage subtracted from the first reference voltage, and feeds the formed feedback voltage of the third reference voltage back to the third reference amplifier; Characterized by including Regulator.

11. In Paragraph 9, The above charging comparator When comparing the feedback voltage of the third reference voltage and the output voltage, if the feedback voltage of the output voltage is greater than the third reference voltage, a closing signal is output. The above charging transistor is Characterized by the fact that the charging comparator is turned off to terminate charging when the output of the above charging comparator is a closed signal. Regulator.

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