A photonic chip for an ion trap system

Abstract

A photonic chip for an ion trap system including a conductive window structure configured to transmit electromagnetic radiation within a first wavelength range. The photonic chip further including aluminium doped zinc oxide (AZO) and a photonics layer configured to: i) permit the propagation of electromagnetic radiation through the photonic chip ii) emit electromagnetic radiation from the photonic chip via the conductive window structure and / or receive electromagnetic radiation via the conductive window structure.

Description

[0001] A PHOTONIC CHIP FOR AN ION TRAP SYSTEM

[0002] TECHNICAL FIELD

[0003] The present disclosure relates to a photonic chip for an ion trap system; in particular, a photonic chip for an ion trap system and a method of fabricating the photonic chip for an ion trap system.

[0004] BACKGROUND

[0005] Ion trap technology, which uses electrostatic fields and lasers to trap individual atomic ions in space, was initially developed in the field of fundamental physics, and is now widely used in the implementation of quantum information processing technologies. A qubit is a unit of quantum information, analogous to a classical bit but capable of existing between superposition of states. As the number of qubits required for quantum information processing increases, more scalable implementation methods are needed, and technologies such as microfabrication and photonics integration have been sequentially introduced. Ion trap technology has emerged as a cornerstone in the development of quantum information processing systems. This technology involves trapping and manipulating atomic ions using electromagnetic fields, enabling precise control and manipulation of qubits for quantum computing and related applications. As quantum systems scale to accommodate a larger number of qubits, the integration of photonic and microfabrication technologies has become essential for enhancing scalability, precision, and efficiency.

[0006] Traditional ion-trap systems incorporate photonics layers to deliver and manipulate electromagnetic radiation necessary for ion trapping and qubit operations. These systems often require transparent conductive windows to ensure effective propagation of electromagnetic radiation while simultaneously addressing challenges such as stray charge accumulation on dielectric surfaces. Stray charges can induce ion shifts, compromising the accuracy and reliability of quantum operations.

[0007] Conventional materials such as indium tin oxide (ITO) and tantalum oxide (Ta2O5) have been used for transparent conductive windows. However, these materials have limitations in their transmission range and optical properties. For instance, ITO performs well within the visible spectrum (380 nm to 780 nm) but exhibits significant attenuation in the infrared spectrum (beyond 780 nm). This restricts its suitability for systems requiring broader wavelength ranges, such as those using 137Ba+qubits, which operate across a wide range of wavelengths.

[0008] SUMMARY

[0009] According to a first aspect of the disclosure, there is provided a photonic chip for an ion trap system comprising: a conductive window structure configured to transmit electromagnetic radiation within a first wavelength range further comprising: aluminium doped zinc oxide (AZO); a photonics layer configured to: i) permit the propagation of electromagnetic radiation through the photonic chip; and ii) emit electromagnetic radiation from the photonic chip via the conductive window structure and / or receive electromagnetic radiation via the conductive window structure.

[0010] Optionally, the ion trap system comprises a plurality of ion traps each for trapping one or more ion.

[0011] Optionally, at least one of the plurality of ion traps is for trapping 40Ca+ ions or 137Ba+ ions.

[0012] Optionally, the ion trap system is for quantum information processing.

[0013] Optionally, the photonics layer is configured to receive electromagnetic radiation from a laser source. Optionally, the first wavelength range comprises 280nm to 2,000nm;

[0014] Optionally, the conductive window structure comprises: a first conductive window configured to transmit the at least one infrared wavelength within the first wavelength range.

[0015] Optionally, the first wavelength range comprises 280nm to 2,000nm.

[0016] Optionally, the first wavelength range comprises 750nm to 2,000nm.

[0017] Optionally, the conductive window structure has an electrical conductivity of at least 0.000001 Sieman / meters.

[0018] Optionally, the first conductive window has: an extinction coefficient approximately equal to or less than 0.10 at the at least one infrared wavelength within the first wavelength range

[0019] Optionally, the first conductive window has: a refractive index within a range of 1.80 to 2.00 over the first wavelength range.

[0020] Optionally, the first conductive window has an extinction coefficient approximately equal to zero at the at least one infrared wavelength within the first wavelength range; and / or

[0021] Optionally, the first conductive window has an extinction coefficient approximately equal to zero over the first wavelength range; and / or

[0022] Optionally, the photonic layer comprises: a grating coupler configured to: i] permit the propagation of electromagnetic radiation through the photonic chip; and if) emit electromagnetic radiation from the photonic chip via the conductive window structure and / or receive electromagnetic radiation via the conductive window structure; and a thin-film stack comprising one or more conductive electrodes configured to provide electrical control of an electromagnetic field.

[0023] Optionally, the photonic layer comprises a bottom cladding layer; a core layer integral arranged to comprise: an optical waveguide; a grating coupler; and a top cladding layer.

[0024] Optionally, the thin-film stack comprises: a top electrode layer incorporating one or more apertures; and / or one or more embedded conductive layers incorporating one or more apertures, wherein at least one or more apertures house the conductive window and / or one or more insulating layers to electrically isolate the top electrode layer and the embedded conductive layers.

[0025] Optionally, at least one of the following is true: the top electrode layer provides a top electrode layer thickness between 0.1-10 um; the embedded conductive layer provides a conductive layer thickness between 0.1-10 um; the insulation layer provides a insulation layer thickness between 0.2-4 um.

[0026] Optionally, the first conductive window has first conductive window thickness of between l-200nm.

[0027] Optionally, the photonic chip of claim 18 or 19 comprising a substrate.

[0028] Optionally, the photonic chip of claim 21, wherein: the grating coupler comprises silicon nitride and / or aluminum nitride and / or lithium niobate and / or aluminum oxide and / or tantalum oxide and / or hafnium oxide.

[0029] Optionally, the photonic chip of claim 21 or 22, wherein: the substrate comprises at least one of: silicon; and / or the first conductive material comprises aluminum; and / or the first insulating material comprises silicon dioxide. Optionally, the quantum information processing system comprising: an ion trap system; and the photonic chip of any preceding claim.

[0030] Optionally, the conductive window structure comprises a first conductive layer; and a second conductive window configured to transmit the at least one visible wavelength within a second wavelength range.

[0031] According to a first aspect of the disclosure, there is provided a method of fabricating the photonic chip comprising: depositing the photonics layer on a substrate; patterning and / or etching the photonics layer and / or conductive window structure by an electron beam lithography process; forming the conductive window structure on the photonics layer.

[0032] BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 illustrates a schematic of known Ion trap chip.

[0034] Figure 2 is a schematic of a photonic chip 200 for an ion trap system in accordance with a first embodiment of the present disclosure.

[0035] Figure 3 is a schematic of a photonic chip 300 for an ion trap system, the photonic chip including a substate 310 in accordance with a second embodiment of the present disclosure.

[0036] Figure 4 is a graph of an ellipsometry plot 400 of AZO in accordance with first and second embodiment of the present disclosure.

[0037] Figure 5 is a graph of an ellipsometry plot 500 of ITO in accordance with first and second embodiment of the present disclosure. Figure 6 is a schematic of a photonic chip 600 for an ion trap system, the photonic chip 600 including a second conductive window in accordance with a third embodiment of the present disclosure.

[0038] DETAILED DESCRIPTION

[0039] Figure 1 illustrates a schematic of known Ion trap chip 100. The Ion trap chip 100 typically includes a silicon substate 102. The ion trap chip 100 typically includes a photonics layer 120 which may be arranged as a thin-film stack. In this example, photonics layer 120 is composed of a silicon nitride core 108 sandwiched between a cladding layer 104 composed of silicon oxide. The silicon nitride core 108 guides laser light 130 within the ion trap chip 100. The laser light 130 is coupled into the photonic layer from an external laser source and subsequently emitted through a grating coupler 110. The grating coupler 110 is precisely aligned to direct the laser light 130 where required. The photonics layer 120 may include an electrode supporting layer 114 composed of aluminium. The photonics layer 120 may also include an insulation layer 150 composed of silicon oxide.

[0040] The ion trap chip 100 may include a window structure 140. The window structure 140 has a metal layer 124 and a window 106 to enable light 108 propagation from the photonic layer 120 to the external environment, such as to a trapped ion. The window structure 140 can be created by depositing an overlying metal layer (not shown), which are otherwise required for electrode structures in the iron trap chip 100. However, exposing the underlying dielectric surfaces through these windows 106 introduces a potential challenge: the dielectric surfaces can accumulate stray charges, leading to parasitic electric fields that cause unwanted ion shifts. Such shifts can degrade the performance and precision of the ion-trap.

[0041] To mitigate this issue, the exposed windows (106) are coated with a transparent conductive film (not shown). This transparent coating maintains the optical transparency required for laser propagation while providing electrical conductivity to dissipate stray charges. The window 106 may be made from materials such as indium tin oxide (ITO) and tantalum oxide (Ta2O5). However, these materials exhibit wavelength-dependent transparency, limiting their effectiveness for systems requiring a broad range of laser wavelengths, such as those operating with different qubit types.

[0042] To enable light propagation from the photonic layer 120 to an external trapping zone (not shown), windows 106 must be created in the overlying metal layers, which are otherwise required for electrode structures in the iron trap chip 100. The windows 106 allow the laser beams to exit the iron trap chip 100 without obstruction.

[0043] Figure 2 is a schematic of a photonic chip 200 for an ion trap system in accordance with a first embodiment of the present disclosure. The photonic chip 200 for an ion trap system facilitates the transmission and propagation of electromagnetic radiation. The photonic chip 200 includes a conductive window structure 206 made of aluminium-doped zinc oxide (AZO), which is configured to transmit electromagnetic radiation within a first wavelength range. The AZO conductive window structure 206 possesses the optical and electrical conductivity properties of AZO, enabling efficient light transmission while mitigating stray charge accumulation on dielectric surfaces. The conductive window structure 206 may have an electrical conductivity of at least 0.000001 Sieman / meters.

[0044] The photonic chip 200 includes a photonics layer 204 that may be mounted below the conductive window structure 206. The photonic chip 200 may permit the propagation of electromagnetic radiation within the photonic chip 200, such as light delivered from a laser source 208.

[0045] An ion trap system is a device or apparatus designed to confine and manipulate charged particles (ions) using electromagnetic fields. An iron trap system typically employs static electric fields, dynamic electric fields (radio frequency or RF), and / or magnetic fields to create a potential well where ions can be held in a defined spatial region. Ion trap systems are widely used in various applications, including quantum information processing, precision spectroscopy, and mass spectrometry. In the context of quantum information processing, an ion trap system enables the control and manipulation of individual ions or groups of ions, which serve as qubits for performing quantum computations.

[0046] An ion trap system may include a trap structure including electrodes or microfabricated chip structures that generate the required electric or magnetic fields to confine ions. An ion trap system may include cooling mechanisms, such as laser cooling, to reduce the motion of ions to near their ground state for precise control. An ion trap system may include detection Systems: Optical or electronic systems for observing and measuring the states or transitions of the ions.

[0047] One such example of an Ion trap system is an ion trap system using barium ions is a specialized quantum device that confines and manipulates ions of barium (137Ba+, 138Ba+ or other isotopes) using electromagnetic fields for applications, such as quantum information processing, precision measurement, and quantum simulations. In this system, barium ions act as qubits or as the target ions for experimentation, leveraging their favourable optical and quantum properties.

[0048] Aluminium-doped zinc oxide (AZO) is a transparent conductive oxide (TCO) material composed of zinc oxide (ZnO) as the base material, doped with a small percentage of aluminium, typically falling within the range of 1% to 5% by weight of aluminium relative to zinc. The aluminium doping introduces free carriers (electrons) into the ZnO lattice, enhancing its electrical conductivity while maintaining excellent optical transparency over a broad range of wavelengths.

[0049] AZO has been observed to exhibit high optical transmittance in both the visible and infrared regions of the electromagnetic spectrum, making it suitable for applications requiring minimal light attenuation.

[0050] The aluminium doping significantly reduces the electrical resistivity of ZnO by increasing the carrier concentration, enabling its use as an electrode material. The photonic chip 200 may be manufactured by

[0051] 1) depositing the photonics layer on a substrate.

[0052] 2) patterning and / or etching the photonics layer 200 and / or conductive window structure 206 by an electron beam lithography process;

[0053] 3) forming the conductive window structure 206 on the photonics layer 200.

[0054] Figure 3 is a schematic of a photonic chip 300 for an ion trap system, the photonic chip 300 including a substate 310 in accordance with a second embodiment of the present disclosure.

[0055] The photonic chip 300 may share all the components previously described for photonic chip 200 and where possible reference numerals have remained the same.

[0056] The substrate 310 refers to the foundational layer upon which all other components of the photonic chip 300 are built. It provides mechanical support, thermal stability, and a platform for the deposition, patterning, and integration of photonics and electronic layers. For the proposed ion trap chip 300, the substrate 310 may be composed of silicon (Si) due to its excellent compatibility with microfabrication processes.

[0057] The conductive window structure 206 may include a first window 320 made from AZO and a first conductive layer 302. The first conductive layer 302 may be composed of aluminium.

[0058] The photonic chip 300 may include a grating coupler 330, which is a microfabricated optical structure embedded within the photonics layer 204, designed to direct the light 208 into or out of the photonic chip 300. The grating coupler 330 provide efficient delivery of laser light 208 to ion positions or the collection of light emitted by ions, enabling precise optical interaction. The grating coupler 330 in one example may be composed of silicon nitride. Figure 4 is a graph of an ellipsometry plot of AZO 400 in accordance with first and second embodiment of the present disclosure.

[0059] The ellipsometry plot of AZO 400 includes a first axis 402 representing n a refraction index. The ellipsometry plot of AZO 400 includes a second axis 404 representing, wavelength in nanometres (nm). The ellipsometry plot of AZO 400 includes a third axis 406 representing k an extinction coefficient.

[0060] The ellipsometry plot of AZO 400 includes a first line plot 408 representing annealed AZO plotted against the k extinction coefficient. The ellipsometry plot of AZO 400 includes a second line plot 410 representing non- annealed AZO plotted against the k extinction coefficient. The ellipsometry plot of AZO 400 includes a third line plot 412 representing annealed AZO plotted against the n refraction index. The ellipsometry plot of AZO 400 includes a third line plot 414 representing nonannealed AZO plotted against the n refraction index.

[0061] Figure 5 is a graph of an ellipsometry plot of ITO 500 for comparison in accordance with first and second embodiment of the present disclosure.

[0062] The ellipsometry plot of ITO 500 includes a fourth axis 502 representing the n refraction index. The ellipsometry plot of ITO 500 includes a fifth axis 504 representing, wavelength in nanometres (nm). The ellipsometry plot of ITO 500 includes a sixth axis 514 representing the k extinction coefficient.

[0063] The ellipsometry plot of ITO 500 includes a fifth line plot 506 representing annealed ITO plotted against the k extinction coefficient. The ellipsometry plot of ITO 500 includes a sixth line plot 508 representing non-annealed ITO plotted against the k extinction coefficient. The ellipsometry plot of ITO 500 includes a seventh line plot 510 representing annealed ITO plotted against the n refraction index. The ellipsometry plot of ITO 500 includes a eighth line plot 512 representing nonannealed ITO plotted against the n refraction index. Figures 4 and 5 depict the ellipsometry measurement data of AZO of ITO films empirically measured, illustrating how the extinction coefficient, roughly proportional to the light loss rate, varies with wavelength.

[0064] Annealing refers to the manufacturing heat treatment process during fabrication at approximately 300 degrees Celsius. AZO exhibits excellent optical transparency and minimal optical loss in the infrared range. ITO exhibits excellent optical transparency and low optical attenuation in the visible range but is unsuitable in the near infrared range.

[0065] Figure 6 is a schematic of a photonic chip 600 for an ion trap system, the photonic chip 600 including a second conductive window 320 in accordance with a third embodiment of the present disclosure.

[0066] The photonic chip 600 may share all the components previously described for photonic chip 200, 300 and where possible reference numerals have remained the same.

[0067] The photonic chip 600 for an ion trap system includes the second conductive window 620. The second conductive window 620 may be made from the same material AZO as previously described, or it may be made from an alternative material, thereby broadening the wavelength. The material used for second conductive window 620 is selected based on the operational wavelength of the application. For example, the second conductive window 620 may be made ITO thereby extending the permissible wavelength range of conductive window structure to 280nm to 2000nm.

[0068] The photonic layer 204 may be arranged as a stack of films (not shown) including a bottom cladding layer; a core layer integral and a top cladding layer composed of SiO2, Si3N4, and SiO2. The thin film stack may also include an electrode layer 114 of conductive material such as aluminium. The electrode layer 114 may include one or more apertures 650, wherein at least one or more apertures house the first conductive window 320 embedded within the electrode layer 114, and at least one or more insulating layer 104 to electrically isolate the electrode layer 114. The electrode layer 114 provides an electrode layer 114 thickness between 0.1-10 um. The first conductive layer may provide a conductive layer thickness between 0.1-10 um. The insulation later 150 provides an insulation layer thickness between 0.2-4 um.

[0069] By integrating the transparent first conductive window 320 and second conductive windows 620, the photonic chip 600 effectively combines optical transparency with electrical conductivity, supporting efficient laser transmission across a wide range of wavelengths while maintaining robust ion trapping performance.

Claims

CLAIMS1. A photonic chip for an ion trap system comprising: a conductive window structure configured to transmit electromagnetic radiation within a first wavelength range; and a photonics layer configured to: i) permit the propagation of electromagnetic radiation through the photonic chip; and ii) emit electromagnetic radiation from the photonic chip via the conductive window structure and / or receive electromagnetic radiation via the conductive window structure and wherein the conductive window structure comprises: aluminium doped zinc oxide (AZO).

2. The photonic chip of claim 1, wherein the ion trap system comprises a plurality of ion traps each for trapping one or more ion.

3. The photonic chip of claim 2, wherein at least one of the plurality of ion traps is for trapping 40Ca+ ions or 137Ba+ ions.

4. The photonic chip of any preceding claim, wherein the ion trap system is for quantum information processing.

5. The photonic chip of any preceding claim wherein the photonics layer is configured to receive electromagnetic radiation from a laser source.

6. The photonic chip of any preceding claim, wherein: the first wavelength range comprises 280nm to 2,000nm;7. The photonic chip of any preceding claim, wherein the conductive window structure comprises: a first conductive window configured to transmit the at least one infrared wavelength within the first wavelength range.

8. The photonic chip of claim 7, wherein the first wavelength range comprises 280nm to 2,000nm.

9. The photonic chip of claim 7, wherein the first wavelength range comprises 750nm to 2,000nm.

10. The photonic chip of any preceding claim, wherein the conductive window structure has an electrical conductivity of at least 0.000001 Sieman / meters.

11. The photonic chip of claim 10, wherein: the first conductive window has: an extinction coefficient approximately equal to or less than 0.10 at the at least one infrared wavelength within the first wavelength range12. The photonic chip of claim 11, wherein: the first conductive window has: a refractive index within a range of 1.80 to 2.00 over the first wavelength range;13. The photonic chip of claim 11 or 12, wherein: the first conductive window has an extinction coefficient approximately equal to zero at the at least one infrared wavelength within the first wavelength range; and / or14. The photonic chip of claim 13, wherein: the first conductive window has an extinction coefficient approximately equal to zero over the first wavelength range; and / or15. The photonic chip of claims 10 to 14 wherein: the photonic layer comprises: a grating coupler configured to: i] permit the propagation of electromagnetic radiation through the photonic chip; and if) emit electromagnetic radiation from the photonic chip via the conductive window structure and / or receive electromagnetic radiation via the conductive window structure; and a thin-film stack comprising one or more conductive electrodes configured to provide electrical control of an electromagnetic field.

16. The photonic chip of claim 15 wherein the photonic layer comprises a bottom cladding layer; a core layer integral arranged to comprise: an optical waveguide; a grating coupler; and a top cladding layer17. The photonic chip of claim 16, wherein the thin-film stack comprises: a top electrode layer incorporating one or more apertures; and / or one or more embedded conductive layers incorporating one or more apertures, wherein at least one or more apertures house the conductive window and / or one or more insulating layers to electrically isolate the top electrode layer and the embedded conductive layers.

18. The photonic chip of claim 17, wherein at least one of the following is true: the top electrode layer provides a top electrode layer thickness between 0.1-10 um; the embedded conductive layer provides a conductive layer thickness between 0.1-10 um; the insulation layer provides a insulation layer thickness between 0.2-4 um.

19. The photonic chip of claim 18, wherein the first conductive window has first conductive window thickness of between l-200nm.

20. The photonic chip of claim 18 or 19 comprising a substrate.

21. The photonic chip of claim 20, wherein: the grating coupler comprises silicon nitride and / or aluminum nitride and / or lithium niobate and / or aluminum oxide and / or tantalum oxide and / or hafnium oxide.

22. The photonic chip of claim 20 or 21, wherein: the substrate comprises at least one of: silicon;; and / or the first conductive material comprises aluminum; and / or the first insulating material comprises silicon dioxide.

23. A quantum information processing system comprising: an ion trap system; and the photonic chip of any preceding claim.

24. A method of fabricating the photonic chip of any of claims 1 to 23 comprising: depositing the photonics layer on a substrate; patterning and / or etching the photonics layer and / or conductive window structure by an electron beam lithography process; forming the conductive window structure on the photonics layer.

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