Display device

Abstract

The purpose of the present embodiment is to suppress any deterioration in reliability.　According to one embodiment, a display device comprises: a display element disposed above a substrate; a partition wall surrounding the display element; a transparent electrode disposed on the partition wall and the display element, the transparent electrode being electrically connected to the display element; a transparent organic insulating layer disposed on the transparent electrode, the organic insulating layer having an opening overlapping the display element; and a lens disposed in the opening, the lens being in contact with the organic insulating layer and having a convex surface protruding from the upper surface of the organic insulating layer.

Description

Display device

[0001] Embodiments of the present invention relate to a display device.

[0002] In recent years, in a display device using an organic electroluminescence (EL) element as a display element, a technique of combining a lens array has been proposed. The lens has a function of refracting light emitted from the light emitting layer of the display element at various angles toward the front of the display device. In such a display device, there is a high demand for high definition, and accordingly, miniaturization of the display element and the lens is required. In particular, when miniaturizing the lens, a technique for suppressing a decrease in reliability is required.

[0003] Japanese Patent Application Laid-Open No. 2012-38631

[0004] One of the objectives of the embodiments is to provide a display device capable of suppressing a decrease in reliability.

[0005] Generally, according to one embodiment, a display device includes: a display element disposed above a substrate; a partition wall surrounding the display element; a transparent electrode disposed on the partition wall and the display element and electrically connected to the display element; a transparent organic insulating layer disposed on the transparent electrode and having an opening overlapping the display element; and a lens disposed in the opening, contacting the organic insulating layer, and having a convex surface protruding from the upper surface of the organic insulating layer.

[0006] According to another embodiment, a display device includes: a display element disposed above a substrate; a partition wall surrounding the display element; a transparent organic insulating layer disposed above the partition wall and having an opening overlapping the display element; and a lens disposed in the opening, contacting the organic insulating layer, and having a convex surface protruding from the upper surface of the organic insulating layer.

[0007] Figure 1 is a diagram showing an example of a display device DSP. Figure 2 is a diagram showing an example configuration of a pixel circuit 4 for driving a display element LE. Figure 3 is a cross-sectional view showing an example configuration of a display device DSP including one of the display elements LE. Figure 4 is an enlarged plan view of a single pixel PX. Figure 5 is a cross-sectional view illustrating a comparative example of a display device DSP. Figure 6 is a diagram illustrating some of the effects of this embodiment. Figure 7A is a diagram illustrating a method for manufacturing a display device DSP. Figure 7B is a diagram illustrating a method for manufacturing a display device DSP. Figure 7C is a diagram illustrating a method for manufacturing a display device DSP. Figure 7D is a diagram illustrating a method for manufacturing a display device DSP. Figure 7E is a diagram illustrating a method for manufacturing a display device DSP. Figure 7F is a diagram illustrating a method for manufacturing a display device DSP. Figure 7G is a diagram illustrating a method for manufacturing a display device DSP. Figure 8 is a cross-sectional view showing another example configuration of a display device DSP.

[0008] Embodiments will be described with reference to the drawings. The disclosure is merely an example, and modifications that can be easily conceived by those skilled in the art while maintaining the spirit of the invention are naturally included within the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each drawing, components that perform the same or similar functions as those described above with respect to previously shown drawings are denoted by the same reference numerals, and redundant detailed explanations may be omitted as appropriate.

[0009] Furthermore, the drawings will include mutually orthogonal X, Y, and Z axes as needed to facilitate understanding. The direction along the X-axis will be referred to as the first direction X, the direction along the Y-axis as the second direction Y, and the direction along the Z-axis as the third direction Z. Viewing various elements parallel to the third direction Z is called a plan view. In addition, terms such as "up," "above," "between," and "opposite" refer to the positional relationship between two or more constituent elements, and include not only cases where the two or more constituent elements of an object are in direct contact, but also cases where they are separated from each other by gaps or other constituent elements. The positive direction of the Z-axis will be referred to as "up" or "above."

[0010] Figure 1 shows an example of a display device (DSP).

[0011] The display device DSP according to this embodiment includes an inorganic light-emitting diode as a display element LE and can be mounted in various electronic devices such as televisions, personal computers, in-vehicle equipment, tablet terminals, smartphones, mobile phone terminals, and wearable terminals. In particular, in this embodiment, a micro light-emitting diode (hereinafter sometimes referred to as a micro LED (Light Emitting Diode)) is used as the display element LE. A micro LED is, for example, a light-emitting element having a minute size with a side length of 100 μm or less. Alternatively, a mini LED having a side length of 100 μm to 300 μm may be used as the display element LE.

[0012] The display device DSP comprises a display panel PNL, a drive IC (Integrated Circuit) 1, a drive circuit 2, and a cathode wiring 3.

[0013] The display panel PNL has a display area DA for displaying an image and a peripheral area SA surrounding the display area DA, on an insulating substrate 10. The substrate 10 may be a glass substrate or a flexible resin substrate. In the illustrated example, the shape of the display area DA in plan view is a rectangle. However, the shape of the display area DA in plan view is not limited to the illustrated example and may be a polygon other than a rectangle, a circle, an ellipse, etc.

[0014] The display area DA comprises a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y. The first direction X and the second direction Y are parallel to the main surface of the substrate 10. As described above, the first direction X and the second direction Y are orthogonal to each other, but they may intersect at angles other than 90°. The third direction Z corresponds to the normal direction of the substrate 10 or the thickness direction of the display device DSP.

[0015] Each of the multiple pixels PX includes multiple display elements LE that emit light in different colors. Each of the multiple display elements LE is controlled by a pixel circuit, which will be described later. In one example, the pixel PX includes a display element LE1 configured to emit light in a first color, a display element LE2 configured to emit light in a second color, and a display element LE3 configured to emit light in a third color. The first, second, and third colors are all different colors. For example, the first color is blue, the second color is green, and the third color is red, but each of the first, second, and third colors may be other colors. The pixel PX may also include display elements LE of other colors together with, or in place of, any one of the display elements LE1, LE2, and LE3.

[0016] In the illustrated example, in pixel PX, display elements LE1 and LE2 are aligned in the second direction Y, and display elements LE2 and LE3 are aligned in the first direction X. Note that the layout of display elements LE1, LE2, and LE3 is not limited to the illustrated example.

[0017] The driver IC 1 includes a circuit configured to control the display device DSP. The driver IC 1 is mounted, for example, in the peripheral region SA of the substrate 10. Alternatively, the driver IC 1 may be mounted on a wiring board connected to the substrate 10.

[0018] The drive circuit 2 is located in the peripheral region SA of the substrate 10. The drive circuit 2 is configured to drive multiple gate lines (for example, the light emission control scan line BG, reset control scan line RG, initialization control scan line IG, and write control scan line SG, which will be described later) based on various control signals from the drive IC 1. The drive circuit 2 is configured to sequentially or simultaneously select multiple gate lines and supply gate drive signals to the selected gate lines.

[0019] The cathode wiring 3 is provided in the peripheral region SA of the substrate 10. In the illustrated example, the cathode wiring 3 is connected to the drive IC 1 and is provided so as to surround the display region DA and the drive circuit 2. The cathode wiring 3 is electrically connected to the cathodes of multiple display elements LE and is set to a fixed potential (for example, ground potential).

[0020] Figure 2 shows an example configuration of a pixel circuit 4 for driving the display element LE.

[0021] Each of the display elements LE1, LE2, and LE3 shown in Figure 1 is driven by, for example, the pixel circuit 4 shown in Figure 2.

[0022] In the illustrated example, the pixel circuit 4 comprises five transistors and two capacitors. Specifically, the pixel circuit 4 includes, as transistors, a light emission control transistor BCT, an initialization transistor IST, a write transistor SST, a reset transistor RST, and a drive transistor DRT. Each of these transistors is, for example, an n-type TFT (Thin Film Transistor). At least one of the five transistors shown may be a p-type TFT.

[0023] The light emission control scan line BG is connected to the gate of the light emission control transistor BCT. The initialization control scan line IG is connected to the gate of the initialization transistor IST. The write control scan line SG is connected to the gate of the write transistor SST. The reset control scan line RG is connected to the gate of the reset transistor RST.

[0024] Each of the light emission control scan line BG, initialization control scan line IG, write control scan line SG, and reset control scan line RG is connected to the drive circuit 2 shown in Figure 1. The drive circuit 2 supplies the light emission control signal Vbg, initialization control signal Vig, write control signal Vsg, and reset control signal Vrg to the light emission control scan line BG, initialization control scan line IG, write control scan line SG, and reset control scan line RG, respectively.

[0025] The driver IC 1 shown in Figure 1 supplies the video signal Vsig to the pixel circuit 4. The video signal Vsig is supplied to the writing transistor SST via the video signal line L2. The driver IC 1 also supplies the reset power supply potential Vrst to the reset transistor RST via the reset signal line L3. Furthermore, the driver IC 1 supplies the initialization potential Vini to the initialization transistor IST via the initialization signal line L4.

[0026] The light emission control transistor BCT, initialization transistor IST, writing transistor SST, and reset transistor RST function as switching elements that select conduction and non-conductivity between two nodes. The drive transistor DRT functions as a current control element that controls the current flowing through the display element LE according to the voltage between its gate and drain.

[0027] The cathode of the display element LE is connected to the cathode power supply line L10, which includes the cathode wiring 3 shown in Figure 1. The cathode power supply potential PVSS is supplied to the cathode power supply line L10.

[0028] Furthermore, the anode of the display element LE is connected to the anode power supply line L1 via the drive transistor DRT and the light emission control transistor BCT. The anode power supply potential PVDD is supplied to the anode power supply line L1. The anode power supply potential PVDD is higher than the cathode power supply potential PVSS.

[0029] Furthermore, the pixel circuit 4 includes capacitances Cs1 and Cs2. Capacitor Cs1 is a retaining capacitance formed between the gate and source of the drive transistor DRT. Capacitor Cs2 is an additional capacitance formed between the source of the drive transistor DRT, the anode of the display element LE, and the cathode power supply line L10.

[0030] Here, we will explain an example of controlling the display element LE using the pixel circuit 4 shown in the diagram.

[0031] During the reset period of one frame in which an image is displayed in the display area DA, the light emission control transistor BCT turns off (non-conductive) and the reset transistor RST turns on (conductive) depending on the potentials of the light emission control scan line BG and the reset control scan line RG, respectively. As a result, the source of the drive transistor DRT is fixed to the reset power supply potential Vrst.

[0032] Subsequently, the initialization transistor IST is turned on in accordance with the potential of the initialization control scan line IG. The gate of the drive transistor DRT is fixed to the initialization potential Vini via the initialization transistor IST. Also, the emission control transistor BCT is turned on and the reset transistor RST is turned off in accordance with the potentials of the emission control scan line BG and the reset control scan line RG, respectively. The drive transistor DRT is turned off when the source potential becomes (Vini - Vth), and the variation in the threshold voltage Vth of the drive transistor DRT is offset.

[0033] Subsequently, during the video signal writing operation period, the light emission control transistor BCT is turned off, the initialization transistor IST is turned off, and the write transistor SST is turned on, depending on the potentials of the light emission control scan line BG, the initialization control scan line IG, and the write control scan line SG, respectively. The video signal Vsig is input to the gate of the drive transistor DRT via the write transistor SST.

[0034] Subsequently, during the light emission operation period, the light emission control transistor BCT is turned on and the write transistor SST is turned off according to the potentials of the light emission control scan line BG and the write control scan line SG, respectively. The anode power supply potential PVDD is supplied from the anode power supply line L1 to the drive transistor DRT via the light emission control transistor BCT. The drive transistor DRT supplies a current to the display element LE according to the gate-source voltage. The display element LE emits light with a brightness corresponding to the supplied current.

[0035] Note that the configuration of the pixel circuit 4 shown in the diagram is merely an example and can be modified as appropriate.

[0036] Figure 3 is a cross-sectional view showing an example configuration of a display device DSP including one of the display elements LE.

[0037] The substrate 10 is an insulating substrate, and is, for example, a glass substrate, a quartz substrate, or a flexible substrate made of resin.

[0038] The circuit layer 11 is located on the main surface 10A of the substrate 10. The circuit layer 11 includes various circuits such as the pixel circuit 4 shown in Figure 2, various wirings such as gate lines, and various insulating layers. The insulating layer 12 is located on top of the circuit layer 11. The insulating layer 12 is, for example, an organic insulating layer formed to flatten the irregularities caused by the circuit layer 11.

[0039] The anode 20 is placed on the insulating layer 12 and is electrically connected to the drive transistor DRT shown in Figure 2. In the illustrated example, the anode 20 is formed as a laminate in which a plurality of conductive layers are stacked. That is, the anode 20 comprises a first conductive layer 21, a second conductive layer 22, a third conductive layer 23, and a fourth conductive layer 24.

[0040] The first conductive layer 21 is placed on the insulating layer 12 and is made of a titanium-based material such as titanium or a titanium compound. The second conductive layer 22 is placed on the first conductive layer 21 and is made of an aluminum-based material such as aluminum or an aluminum compound. The third conductive layer 23 is placed on the second conductive layer 22 and is made of a titanium-based material such as titanium or a titanium compound.

[0041] The insulating layer 13 is placed on top of the insulating layer 12 and covers the peripheral edge of the laminate of the first conductive layer 21, the second conductive layer 22, and the third conductive layer 23. The insulating layer 13 is an inorganic insulating layer formed, for example, from silicon nitride.

[0042] The fourth conductive layer 24 is positioned on top of the third conductive layer 23 at the opening 13A of the insulating layer 13. The peripheral edge of the fourth conductive layer 24 is positioned on top of the insulating layer 13. The fourth conductive layer 24 is a transparent conductive layer formed of an oxide conductive material such as indium tin oxide (ITO).

[0043] The materials used to form each conductive layer of the anode 20 are not limited to the examples described above.

[0044] The display element LE is disposed above the substrate 10. The illustrated display element LE may correspond to any of the display elements LE1, LE2, and LE3 shown in FIG. 1. The anode 20 is located between the substrate 10 and the display element LE in the third direction Z.

[0045] The display element LE includes an anode layer AD, a cathode layer CD, and a semiconductor layer SL. The cathode layer CD faces the anode layer AD in the third direction Z. The semiconductor layer SL is located between the anode layer AD and the cathode layer CD.

[0046] In one example, the semiconductor layer SL is a laminate formed by laminating a p-type cladding layer PL, a light-emitting layer EL, and an n-type cladding layer NL in this order along the third direction Z. The p-type cladding layer PL is in contact with the anode layer AD. The n-type cladding layer NL is in contact with the cathode layer CD. The p-type cladding layer PL and the n-type cladding layer NL are formed of, for example, gallium nitride (GaN). The light-emitting layer EL is formed of, for example, indium gallium nitride (InGaN). Note that the materials for forming each layer of the semiconductor layer SL are not limited to the above examples.

[0047] The anode layer AD faces the anode 20 in the third direction Z and is electrically connected to the anode 20 via a connection member CN. The connection member CN is interposed between the fourth conductive layer 24 and the anode layer AD. The connection member CN is formed of, for example, a black photosensitive conductive material.

[0048] The partition wall 14 is disposed on the insulating layer 13 and surrounds the display element LE. The cathode layer CD of the display element LE is exposed at the opening 14A of the partition wall 14. The partition wall 14 is a transparent organic insulating layer.

[0049] The transparent electrode 30 is disposed on the partition wall 14 and also on the display element LE at the opening 14A. The transparent electrode 30 is in contact with the cathode layer CD and is electrically connected to the display element LE. Also, the transparent electrode 30 is electrically connected to the cathode wiring 3 shown in FIG. 1. The transparent electrode 30 functions as a cathode and is formed of, for example, ITO.

[0050] The organic insulating layer 15 is transparent and is placed on the transparent electrode 30, and has an opening 15A that overlaps the display element LE. The opening 15A is a through hole located directly above the opening 14A. The transparent electrode 30 is exposed at the opening 15A. The organic insulating layer 15 has a side surface 15S facing the opening 15A and an upper surface 15U opposite to the surface in contact with the transparent electrode 30.

[0051] The lens LS is a so-called microlens, having an extremely small size. The lens LS is positioned in the aperture 15A and is in contact with the side surface 15S and the top surface 15U of the organic insulating layer 15. The lens LS also has a convex surface protruding from the top surface 15U. In the illustrated example, the lens LS is in contact with the transparent electrode 30. Such a lens LS is formed from a transparent photosensitive resin material such as epoxy resin, acrylic resin, fluororesin, or silicone resin. The refractive index of the transparent material used to form the lens LS is higher than the refractive index of the material used to form the organic insulating layer 15.

[0052] The thickness 15T of the organic insulating layer 15 along the third direction Z is equivalent to the thickness 14T of the partition wall 14 along the third direction Z. For example, the thickness 15T is 2 to 3 μm. The thickness T of the lens LS protruding from the upper surface 15U along the third direction Z is greater than the thickness 15T (T > 15T). For example, the thickness T is 7 μm. The lens LS is formed in a circular shape in plan view, as will be described later. The diameter D of the lens LS is, for example, 20 μm or less.

[0053] Figure 4 is a plan view of a single pixel (PX) magnified.

[0054] Each of the display elements LE1, LE2, and LE3 overlaps the opening 15A of the organic insulating layer 15. The opening 15A is formed in a circular shape. In a plan view, the opening 15A and the lens LS are formed, for example, in a concentric manner. The diameter D of the lens LS is greater than the diameter 15D of the opening 15A (D > 15D). The lens LS aligned in the first direction X are spaced apart from each other, and the lens LS aligned in the second direction Y are also spaced apart from each other.

[0055] Figure 5 is a cross-sectional view illustrating a comparative example of a display device DSP.

[0056] The comparative example shown in Figure 5 differs from the display device DSP according to the embodiment shown in Figure 3 in that the organic insulating layer 15 is omitted and the lens LS is placed on the transparent electrode 30. The diameter D and thickness T of the lens LS are the same as those of the lens LS of the display device DSP shown in Figure 3.

[0057] As described above, the lens LS is a microlens with a minute size. As the size (diameter D) of the lens LS decreases, the contact area between the lens LS and its base layer (in this case, the transparent electrode 30) decreases. Therefore, a minutely sized lens LS may detach from the display device DSP.

[0058] The light LT emitted from the display element LE is divergent. By positioning the lens LS directly above the display element LE, the amount of light LT trapped inside is reduced, improving the light extraction efficiency.

[0059] Figure 6 is a diagram illustrating some of the effects of this embodiment.

[0060] The lens LS is positioned at the opening 15A of the organic insulating layer 15 and is in contact with the relatively thick side surface 15S and top surface 15U of the organic insulating layer 15. In other words, the lens LS is fitted into the opening 15A and fixed to the organic insulating layer 15. As a result, the contact area between the lens LS and its base layer (in this case, the organic insulating layer 15) is increased compared to the comparative example shown in Figure 5. This suppresses detachment from the display device DSP even for lens LS with a diameter D of 20 μm or less, and even 10 μm or less. Therefore, a decrease in reliability can be suppressed.

[0061] Of the light LT emitted from the display element LE, the light LT emitted at a large angle with respect to the normal N of the display element LE propagates toward the side surface 15S of the organic insulating layer 15. The normal N is parallel to the third direction Z. As described above, the refractive index of the lens LS is higher than that of the organic insulating layer 15. Therefore, of the light LT that reaches the interface between the lens LS and the organic insulating layer 15, the light incident at an angle greater than or equal to the critical angle is totally internalized at the interface (or side surface 15S). The totally internalized light LT passes through the aperture 15A at a relatively small angle with respect to the normal N, is refracted by the lens LS, and contributes to the display. Therefore, the brightness of the image displayed in the display area DA can be improved at the observation position in front of the display device DSP.

[0062] Next, an example of a manufacturing method for a display device DSP will be described with reference to Figures 7A to 7G. Note that in Figures 7A to 7G, elements below the insulating layer 12 are omitted from the illustration.

[0063] First, as shown in Figure 7A, the first conductive layer 21, the second conductive layer 22, and the third conductive layer 23 of the anode 20 are formed on the insulating layer 12, and then the insulating layer 13 is formed. After that, the fourth conductive layer 24 is formed. Then, the anode layer AD of the display element LE is connected to the anode 20 via the connecting member CN. After that, a partition wall 14 surrounding the display element LE is formed. An opening 14A is formed in the partition wall 14 directly above the display element LE. Then, a transparent electrode 30 is formed on the partition wall 14 and the display element LE1. After that, an organic insulating layer 15 is formed on the transparent electrode 30. The organic insulating layer 15 is made of a positive-type photosensitive resin.

[0064] Next, as shown in Figure 7B, the organic insulating layer 15 is exposed through the mask MK1. At this time, the mask MK1 is positioned so that its opening OP1 overlaps the display element LE and the opening 14A. The exposed portion of the organic insulating layer 15 becomes soluble in the developer.

[0065] Next, as shown in Figure 7C, the organic insulating layer 15 is developed and then dried. This removes the exposed portion of the organic insulating layer 15, forming an opening 15A in a position overlapping with the opening 14A. The transparent electrode 30 is exposed at the opening 15A. The unexposed portion of the organic insulating layer 15 remains on top of the transparent electrode 30.

[0066] Next, as shown in Figure 7D, a transparent resin layer RS ​​is formed on the organic insulating layer 15. The resin layer RS ​​fills the openings 14A and 15A and is in contact with the transparent electrode 30. The resin layer RS ​​is made of a negative-type photosensitive resin.

[0067] Next, as shown in Figure 7E, the resin layer RS ​​is exposed through the mask MK2. At this time, the mask MK2 is positioned so that its opening OP2 overlaps the display element LE and the opening 15A. The exposed portion of the resin layer RS ​​becomes insoluble in the developer.

[0068] Next, as shown in Figure 7F, the resin layer RS ​​is developed and then dried. This removes the exposed portion of the resin layer RS, while the unexposed portion remains. The remaining resin layer RS ​​fits into the opening 15A.

[0069] Next, as shown in Figure 7G, the remaining resin layer RS ​​is fired, and a convex lens LS is formed by reflowing the resin layer RS.

[0070] The DSP display device is manufactured through the above process.

[0071] Next, other configuration examples will be described. Note that components similar to those in the above configuration examples will be given the same reference numerals, and redundant explanations may be omitted.

[0072] Figure 8 is a cross-sectional view showing another example of the configuration of a display device DSP.

[0073] The configuration example shown in Figure 8 differs from the configuration example shown in Figure 3 in that the anode 20 and cathode C are positioned between the substrate 10 and the display element LE. The anode 20 is electrically connected to the drive transistor included in the circuit layer 11. The cathode C is electrically connected to the cathode wiring.

[0074] The display element LE comprises an anode layer AD, a cathode layer CD, and a semiconductor layer SL. The semiconductor layer SL, although not described in detail here, has a p-type cladding layer, an emissive layer, and an n-type cladding layer, as shown in Figure 3. The p-type cladding layer PL is in contact with the anode layer AD. The n-type cladding layer NL is in contact with the cathode layer CD.

[0075] The anode layer AD faces the anode 20 in the third direction Z and is electrically connected to the anode 20 via the connecting member CN. The cathode layer CD faces the cathode C in the third direction Z and is electrically connected to the cathode C via the connecting member CN.

[0076] The partition wall 14 surrounds the display element LE. The semiconductor layer SL of the display element LE is exposed at the opening 14A of the partition wall 14. The partition wall 14 is a transparent organic insulating layer.

[0077] The organic insulating layer 15 is transparent, positioned on the partition wall 14, and has an opening 15A that overlaps the display element LE. The opening 15A is a through-hole located directly above the opening 14A. The display element LE is exposed at the opening 15A.

[0078] The lens LS is positioned in the opening 15A and is in contact with the organic insulating layer 15. In the illustrated example, the lens LS is in contact with the display element LE.

[0079] Even in this configuration example, the same effects as in the above configuration example can be obtained. In the above embodiment, the case in which an inorganic light-emitting diode is used as the display element LE was described, but it is not limited to this. For example, other display elements such as liquid crystal elements and organic light-emitting diodes, or even display elements combining quantum dots, may be used as the display element LE.

[0080] As described above, according to this embodiment, it is possible to provide a display device that can suppress a decrease in reliability.

[0081] All display devices that a person skilled in the art can implement by appropriately modifying the design based on the display devices disclosed in the above embodiments also fall within the scope of the present invention insofar as they encompass the gist of the present invention.

[0082] Within the scope of the spirit of the present invention, a person skilled in the art can conceive of various modifications, and such modifications are also understood to fall within the scope of the present invention. For example, modifications made by a person skilled in the art to the above-described embodiments, such as adding, deleting, or changing the design of components, or adding, omitting, or changing the conditions of processes, are also included within the scope of the present invention, as long as they retain the gist of the present invention.

[0083] Furthermore, any other effects and benefits brought about by the embodiments described above that are obvious from the description herein or that can be appropriately conceived by those skilled in the art are naturally considered to be brought about by the present invention.

[0084] DSP...Display device DA...Display area LE1, LE2, LE3...Display elements 10...Substrate 14...Partition 15...Organic insulating layer 15A...Aperture 20...Anode 30...Transparent electrode (cathode) LS...Lens

Claims

1. A display device comprising: a display element disposed above a substrate; a partition wall surrounding the display element; a transparent electrode disposed on the partition wall and the display element and electrically connected to the display element; a transparent organic insulating layer disposed on the transparent electrode and having an opening that overlaps the display element; and a lens disposed in the opening, in contact with the organic insulating layer, and having a convex surface protruding from the upper surface of the organic insulating layer.

2. The display device according to claim 1, wherein the lens is in contact with the transparent electrode.

3. The display device according to claim 1, wherein the thickness of the lens protruding from the upper surface is greater than the thickness of the organic insulating layer.

4. The display device according to claim 1, wherein the aperture and the lens are circular in plan view, and the diameter of the lens is greater than the diameter of the aperture.

5. The display device according to claim 4, wherein the diameter of the lens is 20 μm or less.

6. The display device according to claim 1, wherein the lens is formed of a transparent material having a refractive index higher than that of the organic insulating layer.

7. The display device according to claim 1, further comprising an anode disposed between the substrate and the display element.

8. The display device according to claim 7, wherein the display element comprises an anode layer, a cathode layer facing the anode layer, and a semiconductor layer located between the anode layer and the cathode layer and including a light-emitting layer, the anode layer is electrically connected to the anode via a connecting member, and the cathode layer is in contact with the transparent electrode.

9. The display device according to claim 8, wherein the anode comprises a first conductive layer made of a titanium-based material, a second conductive layer made of an aluminum-based material disposed on the first conductive layer, a third conductive layer made of a titanium-based material disposed on the second conductive layer, and a fourth conductive layer made of an oxide conductive material disposed on the third conductive layer, and the connecting member is interposed between the anode layer and the fourth conductive layer.

10. A display device comprising: a display element disposed above a substrate; a partition wall surrounding the display element; a transparent organic insulating layer disposed above the partition wall and having an opening that overlaps the display element; and a lens disposed in the opening, in contact with the organic insulating layer, and having a convex surface protruding from the upper surface of the organic insulating layer.

11. The display device according to claim 10, wherein the lens is in contact with the display element.

12. The display device according to claim 10, further comprising an anode and a cathode disposed between the substrate and the display element.

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