Graphics processing unit, graphics drawing method, chip and electronic device

By designing a geometry processing pipeline that combines the first and second task generation pipelines, the problem of serial processing of the VTG rendering pipeline and the mesh shading rendering pipeline was solved, achieving hardware natural alignment and high-efficiency rendering performance.

WO2026145456A1PCT designated stage Publication Date: 2026-07-09MOORE THREADS TECHNOLOGY (CHENGDU) CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
MOORE THREADS TECHNOLOGY (CHENGDU) CO LTD
Filing Date
2025-12-29
Publication Date
2026-07-09

AI Technical Summary

Technical Problem

The geometry processing pipelines of the VTG rendering pipeline and the mesh shading rendering pipeline in existing graphics processors are serial, which limits the efficiency of parallel computing and leads to performance bottlenecks.

Method used

A geometry processing pipeline is designed, which combines a first task generation pipeline, a task control unit, and a second task generation pipeline. It can process the first shader task in single-pipeline mode and process the first and second shader tasks simultaneously in dual-pipeline mode. The task control unit achieves natural hardware alignment.

Benefits of technology

This allows the geometry processing parts of different rendering pipelines to be combined in the same data stream, avoiding additional synchronization and alignment operations and improving the performance and efficiency of the graphics processor.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application belongs to the field of chips. Disclosed are a graphics processing unit, a graphics drawing method, a chip and an electronic device. The graphics processing unit comprises a geometry processing pipeline, wherein the geometry processing pipeline comprises a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit. The task control unit is configured to: in a single-pipeline mode, acquire a first shading result, and output the first shading result to a pipeline following the geometry processing pipeline; and in a dual-pipeline mode, acquire a first shading result, control the first shading result to enter the second task generation pipeline, acquire a second shading result, and output the second shading result to a pipeline following the geometry processing pipeline. The geometry processing pipeline in the present application can combine geometry processing parts of different rendering pipelines into the same data stream.
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Description

Graphics processors, graphics rendering methods, chips and electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202411997324.7, filed on December 31, 2024, entitled "Graphics Processor, Graphics Drawing Method, Chip and Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of chips, and in particular to a graphics processor, a graphics drawing method, a chip, and an electronic device. Background Technology

[0003] The Graphics Processing Unit (GPU) provides the VTG rendering pipeline. The geometry processing pipeline in the VTG pipeline consists of vertex shaders, tessellation shaders (including shell shaders, tessellation stages, and domain shaders), and geometry shaders. In the VTG rendering pipeline, vertex shaders and geometry shaders are processed serially, which limits the efficiency of parallel computation and can easily lead to performance bottlenecks.

[0004] The graphics processors in the related technologies also provide a mesh shading rendering pipeline, in which the geometry processing pipeline includes an amplification shader and a mesh shader. The mesh shader can process multiple vertices and fragments in parallel, improving the performance of the graphics processor.

[0005] Among the related technologies, a solution is provided to simultaneously set up independent VTG rendering pipelines and mesh shading rendering pipelines on a graphics processor, so that VTG rendering pipelines and mesh shading rendering pipelines can be used in combination. Summary of the Invention

[0006] This application provides a graphics processor, a graphics rendering method, a chip, and an electronic device. The geometry processing pipeline provided in this application can combine the geometry processing parts of different rendering pipelines into a single data stream.

[0007] According to one aspect of this application, a graphics processor is provided, the graphics processor including a geometry processing pipeline, the geometry processing pipeline including a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit, the first task generation pipeline being used to generate a first shader task corresponding to a first shader, and the second task generation pipeline being used to generate a second shader task corresponding to a second shader.

[0008] The task execution unit is configured to receive and execute a first shader task in a single-pipeline mode to obtain a first shader result; and to receive and execute a first shader task and a second shader task in a dual-pipeline mode to obtain a first shader result and a second shader result, respectively.

[0009] The task control unit is used to acquire the first shading result in single pipeline mode and output the first shading result to the pipeline after the geometry processing pipeline.

[0010] In addition, in dual-pipeline mode, the first shading result is obtained and the first shading result is controlled to enter the second task generation pipeline; and the second shading result is obtained and the second shading result is output to the pipeline after the geometry processing pipeline.

[0011] According to one aspect of this application, a graphics rendering method is provided, the method being applied to a graphics processor, the graphics processor including a geometry processing pipeline, the geometry processing pipeline including a first task generation pipeline, a task control unit, a second task generation pipeline, and a task execution unit; the method includes:

[0012] The first task generation pipeline generates the first shader task corresponding to the first shader;

[0013] The first task generation pipeline sends the first shader task to the task execution unit; the task execution unit executes the first shader task and obtains the first shader result;

[0014] In single-pipeline mode, the task control unit acquires the first shading result and outputs the first shading result to the pipeline after the geometry processing pipeline;

[0015] In dual-pipeline mode, the task control unit obtains the first shading result and outputs it to the second task generation pipeline. The second task generation pipeline generates a second shader task corresponding to the second shader based on the first shading result. The second task generation pipeline sends the second shader task to the task execution unit. The task execution unit executes the second shader task and obtains the second shading result. The task control unit obtains the second shading result and outputs it to the pipeline after the geometry processing pipeline.

[0016] According to one aspect of this application, a chip is provided, the chip including the above-described graphics processor.

[0017] According to one aspect of this application, a server is provided, the server including the above-described graphics processor.

[0018] According to one aspect of this application, an electronic device is provided, which includes the aforementioned graphics processor.

[0019] The beneficial effects of the technical solutions provided in this application include at least the following:

[0020] By designing a first task generation pipeline, a second task generation pipeline, and a task control unit, the geometry processing pipeline provided in this application can combine the geometry processing parts in different rendering pipelines into a single data stream. At this time, the first task generation pipeline can be configured to generate shader tasks for different rendering pipelines, and the second task generation pipeline can also be configured to generate shader tasks for different rendering pipelines. Compared with related technologies, this application does not set up two geometry processing pipelines for the VTG rendering pipeline and the mesh shading rendering pipeline respectively, but uses only one geometry processing pipeline.

[0021] Furthermore, in dual-pipeline mode, the first and second shader tasks can be generated by the first task generation pipeline and the second task generation pipeline, respectively. This means that for shader applications that use both the VTG rendering pipeline and the mesh shading rendering pipeline, no additional synchronization alignment is required; the hardware naturally aligns the tasks. The first shader tasks generated by the first task generation pipeline in both the VTG and mesh shading rendering pipelines are aligned, and the second shader tasks generated by the second task generation pipeline are aligned as well. Moreover, regardless of whether it's the VTG or mesh shading rendering pipeline, the rendering order of the second shader tasks generated by the second task generation pipeline is naturally after the rendering order of the first shader tasks generated by the first task generation pipeline; the rendering order is inherently guaranteed by the hardware. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 is a schematic diagram of a geometry processing pipeline provided in one embodiment of this application.

[0024] Figure 2 is a schematic diagram of an allocation scheme for different shader combinations provided in one embodiment of this application.

[0025] Figure 3 is a schematic diagram of a geometry processing pipeline provided in one embodiment of this application.

[0026] Figure 4 is a schematic diagram of a geometry processing pipeline provided in one embodiment of this application.

[0027] Figure 5 is a schematic diagram of a task control unit provided in one embodiment of this application.

[0028] Figure 6 is a schematic diagram of a task control unit provided in one embodiment of this application.

[0029] Figure 7 is a schematic diagram of a task control unit provided in one embodiment of this application.

[0030] Figure 8 is a structural block diagram of an electronic device provided in one embodiment of this application.

[0031] Figure 9 is a schematic diagram of the structure of a server provided in one embodiment of this application. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0033] First, some terms used in the embodiments of this application will be introduced:

[0034] The geometry processing pipeline consists of two main parts: the geometry processing pipeline and the pixel processing pipeline. The geometry processing pipeline primarily processes the geometric coordinates and shape of the graphics, while the pixel processing pipeline mainly performs pixel operations on the graphics. In the VTG rendering pipeline proposed in DX11.3, the geometry processing pipeline includes vertex shaders, tessellation shaders (including hull shaders, tessellation stages, and domain shaders), and geometry shaders. In the mesh shading rendering pipeline proposed in DX12, the geometry processing pipeline includes amplification shaders and mesh shaders.

[0035] In the geometry processing pipeline of the VTG rendering pipeline, after receiving a drawing command, the initial drawing data first enters the vertex shader. The vertex shader performs coordinate transformations of the vertices. The vertex shader processes data on a vertex-by-vertex basis. After processing by the vertex shader, the data enters the tessellation shader, which is an optional shader. In the tessellation shader, the shell shader performs the pre-calculation process for tessellation. The tessellation parameters output by the shell shader enter the tessellation stage, which calculates the new vertices after tessellation based on the tessellation parameters. The domain shader adjusts and calculates the coordinates of the new vertices. The domain shader inputs all vertices into the geometry shader, which performs addition, deletion, and modification operations on the vertices. The geometry shader is also an optional shader.

[0036] In the geometry processing pipeline of the mesh shading rendering pipeline, the magnifying shader amplifies the received rendering data to generate more rendering data. The magnifying shader is an optional shader. After obtaining all the rendering data, the mesh shader processes the rendering data of the entire mesh. The mesh shader can process the entire mesh data at once, thereby achieving large-scale geometry data generation and processing.

[0037] Figure 1 is a schematic diagram of a geometry processing pipeline provided in an exemplary embodiment of this application. The geometry processing pipeline 100 includes a first task generation pipeline 110, a task control unit 120, a second task generation pipeline 130, and a task execution unit 140. The first task generation pipeline 110 is used to generate a first shader task corresponding to a first shader. The first shader task refers to a task used to implement the function of the first shader. The second task generation pipeline 130 is used to generate a second shader task corresponding to a second shader. The second shader task refers to a task used to implement the function of the second shader. The second task information is related information of the second shader task. The task execution unit 140 is connected to both the first task generation pipeline 110 and the second task generation pipeline 130.

[0038] In single-pipeline mode, the first task generation pipeline 110 generates a first shader task and sends it to the task execution unit 140. The task execution unit 140 receives the first shader task, executes it, and obtains a first shading result. The task control unit 120 acquires the first shading result and outputs it to the pipeline following the geometry processing pipeline. Single-pipeline mode refers to the mode where only the first shader processing pipeline is activated. The first shader processing pipeline includes the first task generation pipeline 110 and the task execution unit 140, and is used to implement the functionality of the first shader.

[0039] In this application, the type of the first shader is configurable in single-pipeline mode. In one embodiment, in single-pipeline mode, the first shader can be at least one shader in the geometry processing section of the VTG rendering pipeline; that is, the first shader can be at least one of a vertex shader, geometry shader, shell shader, and domain shader. Alternatively, the first shader can be a mesh shader in the geometry processing section of the mesh shading rendering pipeline. In single-pipeline mode, only the functionality of the first shader is implemented.

[0040] In dual-pipeline mode, the first task generation pipeline 110 generates a first shader task and sends it to the task execution unit 140. The task execution unit 140 executes the first shader task and obtains a first shader result; the task control unit 120 obtains the first shader result and controls it to enter the second task generation pipeline 130.

[0041] The second task generation pipeline 130 passes the second shader task generated based on the first shading result to the task execution unit 140; the task execution unit 140 executes the second shader task to obtain the second shading result; the task control unit 120 obtains the second shading result and controls the output of the second shading result to the pipeline after the geometry processing pipeline 100. The dual-pipeline mode refers to the mode of activating both the first and second shader processing pipelines. The first shader processing pipeline includes the first task generation pipeline 110 and the task execution unit 140, and the second shader processing pipeline includes the second task generation pipeline 130 and the task execution unit 140. The first shader processing pipeline is used to implement the function of the first shader, and the second shader processing pipeline is used to implement the function of the second shader.

[0042] In one embodiment, the first task generation pipeline 110 is further configured to generate first task information corresponding to the first shader task, wherein the first task information is related information of the first shader task; optionally, the second task generation pipeline 130 is further configured to generate second task information corresponding to the second shader task, wherein the second task information is related information of the second shader task; optionally, the task control unit 120 is connected to the first task generation pipeline 110 and the second task generation pipeline 130 respectively.

[0043] For example, as shown in Figure 1, in single-pipeline mode, the first task generation pipeline 110 generates first task information for the first shader task; the first task information is sent to the task control unit 120; the task control unit 120 obtains the first shading result based on the received first task information. Optionally, the first task information includes the storage location and storage format of the first shading result.

[0044] In dual-pipeline mode, the first task generation pipeline 110 generates first task information for a first shader task and sends the first task information to the task control unit 120; the task control unit 120 then obtains a first shading result based on the received first task information. Similarly, the second task generation pipeline 130 generates second task information for a second shader task and sends the second task information to the task control unit 120; the task control unit 120 then obtains a second shading result based on the received second task information. Optionally, the second task information includes the storage location and storage format of the second shading result.

[0045] In this application, the types of the first and second shaders are configurable in the dual-pipeline mode. In one embodiment, in the dual-pipeline mode, the first shader can be at least one shader in the geometry processing section of the VTG rendering pipeline, and the second shader can be at least one shader in the geometry processing section of the VTG rendering pipeline that is different from the first shader; that is, the first and second shaders include at least two of vertex shaders, geometry shaders, shell shaders, and domain shaders. Alternatively, in the dual-pipeline mode, the first shader is an amplification shader in the geometry processing section of the mesh shading rendering pipeline, and the second shader is a mesh shader in the geometry processing section of the mesh shading rendering pipeline.

[0046] In one embodiment, the hardware units on the first task generation pipeline 110 and the second task generation pipeline 130 are different, meaning the two pipelines are completely independent. In another embodiment, the hardware units on the first task generation pipeline 110 and the second task generation pipeline 130 are partially the same, meaning the two processing pipelines share some hardware units.

[0047] In one embodiment, the first or second shading result output from the geometry processing pipeline enters the pixel processing pipeline. The pixel processing pipeline includes a rasterization stage, a pixel shader, and an output blending section. Optionally, the pixel processing pipeline can be a pixel processing pipeline using tile rendering, a tile-based pixel processing pipeline with deferred rendering, etc. That is, the geometry processing pipeline provided in this application is applicable to any type of pixel processing pipeline, meaning it has broad applicability.

[0048] In summary, this application provides a geometry processing pipeline that can mix geometry processing sections from different rendering pipelines. The geometry processing pipeline provided by this application can combine the geometry processing sections from different rendering pipelines into a single data stream. In single-pipeline mode or dual-pipeline mode, the relevant shaders in this application can be shaders in the VTG rendering pipeline or shaders in the mesh shading rendering pipeline. In this case, this application does not set up two geometry processing pipelines for the VTG rendering pipeline and the mesh shading rendering pipeline respectively, but rather one geometry processing pipeline simultaneously supports the geometry processing sections of both the VTG rendering pipeline and the mesh shading rendering pipeline.

[0049] Furthermore, in dual-pipeline mode, the first shader task and the second shader task can be generated by the first task generation pipeline and the second task generation pipeline, respectively. In this way, for shader applications that use both the VTG rendering pipeline and the mesh shading rendering pipeline, no additional synchronization alignment operation is required, and the hardware distribution can be naturally aligned. The first shader tasks generated by the first task generation pipeline in both the VTG rendering pipeline and the mesh shading rendering pipeline are aligned, and the second shader tasks generated by the second task generation pipeline in both the VTG rendering pipeline and the mesh shading rendering pipeline are aligned.

[0050] Figure 2 illustrates how the first and second task generation pipelines are responsible for generating shader tasks when the graphics processor uses various shader combinations. As can be seen from Figure 2, when the graphics processor is configured to use only the vertex shader, or the vertex shader plus the geometry shader, or the mesh shader, a single pipeline mode is activated, and the first task generation pipeline generates all the shader tasks.

[0051] When the graphics processor is configured to use vertex shaders, shell shaders, and domain shaders, a dual-pipeline mode is initiated. The first task generation pipeline generates shader tasks for the vertex and shell shaders, while the second task generation pipeline generates shader tasks for the domain shader. When the graphics processor is configured to use vertex shaders, shell shaders, domain shaders, and geometry shaders, a dual-pipeline mode is initiated. The first task generation pipeline generates shader tasks for the vertex and shell shaders, while the second task generation pipeline generates shader tasks for the domain and geometry shaders. When the graphics processor is configured to use magnification shaders and mesh shaders, a dual-pipeline mode is initiated. The first task generation pipeline generates shader tasks for the magnification shader, while the second task generation pipeline generates shader tasks for the mesh shader.

[0052] In actual processing by a graphics processor, vertex shaders and domain shaders have similar functions, as do shell shaders and geometry shaders. That is, in the shader allocation method shown in Figure 2, the shader tasks generated by the first task generation pipeline and the second task generation pipeline are similar. Therefore, the first task generation pipeline and the second task generation pipeline can be instantiated from the same pipeline. In this case, even if two task generation pipelines are used, this application does not need to spend a lot of cost on pipeline development, as two task generation pipelines can be instantiated from the same task generation pipeline.

[0053] In one embodiment, the first task generation pipeline 110 includes at least one of a first task generation unit, a first shader engine, and a shader task construction unit. The first task generation unit processes initially received drawing instructions to generate a first shader task. The first shader engine adds resource requirement information to the shader task to generate the first shader task. The shader task construction unit adds resources to the shader task to generate the first shader task. The first task generation pipeline 110 is formed based on at least one of the first task generation unit, the first shader engine, and the shader task construction unit. Optionally, the first task generation pipeline 110 may also include other possible hardware units.

[0054] In one embodiment, the second task generation pipeline 130 includes at least one of a first mixing unit, a second shader engine, and a shader task building unit. The first mixing unit performs operations such as surface tessellation or deriving mesh shader thread groups to generate second shader tasks. The second shader engine adds resource requirement information to the shader tasks to generate the second shader tasks. The shader task building unit adds resources to the shader tasks to generate the second shader tasks. The second task generation pipeline 130 is formed based on at least one of the first mixing unit, the first shader engine, and the shader task building unit; optionally, the second task generation pipeline 130 also includes other possible hardware units.

[0055] The following description will focus on the case where the first task generation pipeline 110 includes a first task generation unit, a first shader engine, and a shader task construction unit, and the second task generation pipeline 130 includes a first blending unit, a second shader engine, and a shader task construction unit.

[0056] Figure 3 illustrates a schematic diagram of a geometry processing pipeline provided in an exemplary embodiment of this application. The geometry processing pipeline 100 includes a first task generation pipeline 110, a task control unit 120, a second task generation pipeline 130, and a task execution unit 140. The first task generation pipeline 110 includes a first task generation unit 101, a first shader engine 102, and a shader task construction unit 103. The second task generation pipeline 130 includes a first blending unit 104, a second shader engine 105, and a shader task construction unit 103. In single-pipeline mode, the task execution unit 140 receives a first shader task generated by the first task generation pipeline 110, executes the first shader task to obtain a first shading result, the task control unit 120 receives first task information corresponding to the first shader task, obtains the first shading result based on the first task information, and outputs the first shading result to the pipeline following the geometry processing pipeline.

[0057] In dual-pipeline mode, task execution unit 140 receives a first shader task generated by first task generation pipeline 110, executes the first shader task to obtain a first shading result, task control unit 120 receives first task information corresponding to the first shader task, obtains the first shading result based on the first task information, and controls the first shading result to enter second task generation pipeline 130. Second task generation pipeline 130 generates a second shader task and second task information corresponding to the second shader task based on the first shading result, sends the second shader task to task execution unit 140 and sends the second task information to task control unit 120, task execution unit 140 executes the second shader task to obtain a second shading result, task control unit 120 obtains the second shading result based on the second task information, and outputs the second shading result to the pipeline after the geometry processing pipeline.

[0058] For the first task generation pipeline 110

[0059] The first task generation unit 101, based on the received drawing instructions, splits the drawing instructions into multiple first task packages and sends the multiple first task packages to the first shader engine 102. The drawing instructions include at least one of the Draw instructions and the Dispatchmesh instructions. The Draw instructions are drawing instructions for the VTG rendering pipeline, and the Dispatchmesh instructions are drawing instructions for the mesh shading rendering pipeline.

[0060] In one embodiment, the drawing instruction instructs the drawing of a first number of triangles, and each of the plurality of first task packages contains at least one first task, each first task instructing the drawing of one triangle. Illustratively, the drawing instruction instructs the drawing of 100 triangles, divided into 50 first task packages, each first task package containing 2 first tasks, each first task instructing the drawing of one triangle.

[0061] The first shader engine 102 generates a first shader task corresponding to a first shader and sends the first shader task to the shader task construction unit 103. After receiving multiple first task packages, the first shader engine 102 assembles these packages to generate the first shader task corresponding to the first shader. For example, if the first task generation pipeline 110 generates a vertex shader task, the first shader engine 102 will assemble the vertex shader task from the multiple first task packages. The first shader engine 102 adds first resource requirement information to the generated first shader task. This first resource requirement information indicates the resources required to implement the first shader task, such as the address of the result storage unit, the address of the temporary storage unit, the storage location of the first shader result, the storage format, etc.

[0062] The shader task construction unit 103 is used to allocate resources for the first shader task generated by the first shader engine 102. For example, based on the first resource requirement information, the shader task construction unit 103 allocates address information for a temporary storage unit and address information for a result storage unit for the first shader task. The temporary storage unit is used to temporarily store data read and written during the execution of the first shader task, and the result storage unit is used to store the execution result of the first shader task. The shader task construction unit 103 then sends the resource-allocated first shader task to the task execution unit 140.

[0063] The shader task construction unit 103 is also used to generate first task information corresponding to the first shader task, which is information about the resources allocated to the first shader task.

[0064] For the second task generation pipeline 130

[0065] The first blending unit 104, based on the first shading result generated by the task execution unit 140, performs tessellation or derives a mesh shader thread group to obtain first output data, and sends the first output data to the second shader engine 105. If the first shading result is the shading result of a shell shader, the first blending unit 104 will perform tessellation to obtain the first output data. The shading result of the shell shader contains tessellation parameters, and the first blending unit 104 will perform tessellation based on the tessellation parameters. If the first shading result is the shading result of an amplification shader, the shading result of the amplification shader contains dispatchmesh parameters, and the first blending unit 104 will generate a mesh shader thread group based on the dispatchmesh parameters. The dispatchmesh parameters are used to indicate the number of mesh shader thread groups generated.

[0066] The second shader engine 105 generates second shader tasks corresponding to the second shader and sends these tasks to the shader task construction unit 103. After receiving the first output data, the second shader engine 105 generates the corresponding second shader tasks. For example, the second task generation pipeline 130 generates domain shader tasks based on the results of surface subdivision; similarly, the second task generation pipeline generates mesh shader tasks based on mesh shader thread groups. The second shader engine 105 adds second resource requirement information to the generated second shader tasks. This second resource requirement information indicates the resources required to implement the second shader task, such as the address information of the result storage unit, the address information of the temporary storage unit, the storage location of the second shader result, and the storage format of the second shader result.

[0067] The shader task construction unit 103 is used to allocate resources for the second shader task generated by the second shader engine 105. For example, based on the second resource requirement information, the shader task construction unit 103 allocates address information for a temporary storage unit and address information for a result storage unit for the second shader task. The temporary storage unit is used to temporarily store data read and written during the execution of the second shader task, and the result storage unit is used to store the execution result of the second shader task. The shader task construction unit 103 then sends the resource-allocated second shader task to the task execution unit 140.

[0068] The shader task construction unit 103 is also used to generate second task information corresponding to the second shader task, which is information about the resources allocated to the second shader task.

[0069] In the above embodiments, the first task generation pipeline 110 and the second task generation pipeline 130 have their own shader engines and share a shader task building unit. Sharing the shader task building unit can save hardware usage and reduce the hardware density on the graphics processor. When the shader task allocation method shown in FIG2 is adopted, the shader tasks to be generated by the first shader engine 102 and the second shader engine 105 are quite similar. Therefore, the first shader engine 102 and the second shader engine 105 can be instantiated from the same hardware, which can save hardware development costs.

[0070] In some embodiments, the graphics processor further includes at least one of a temporary storage unit and a result storage unit, wherein the temporary storage unit is used to temporarily store data read and written during the execution of shader tasks, and the result storage unit is used to store shader results obtained from the execution of shader tasks.

[0071] The following will use a graphics processor, which includes temporary storage units and result storage units, as an example.

[0072] Figure 4 illustrates a schematic diagram of a geometry processing pipeline provided in another exemplary embodiment of this application. The geometry processing pipeline 100 includes a first shader processing pipeline, a task control unit 120, and a second shader processing pipeline. The first shader processing pipeline includes a first task generation pipeline 110, a task execution unit 140, a temporary storage unit 150, and a result storage unit 160. The first task generation pipeline 110 includes a first task generation unit 101, a first shader engine 102, and a shader task construction unit 103.

[0073] The second shader processing pipeline includes a second task generation pipeline 130, a task execution unit 140, a temporary storage unit 150, and a result storage unit 160. The second task generation pipeline 130 includes a first mixing unit 104, a second shader engine 105, and a shader task construction unit 103.

[0074] In single-pipeline mode, the task control unit 120 receives first task information generated by the first shader processing pipeline. Based on the first task information, the task control unit 120 obtains the first shading result generated by the first shader processing pipeline and outputs the first shading result to the pipeline following the geometry processing pipeline. In dual-pipeline mode, the task control unit 120 receives first task information generated by the first shader processing pipeline. Based on the first task information, the task control unit 120 obtains the first shading result generated by the first shader processing pipeline and controls the first shading result to enter the second shader processing pipeline. The second shader processing pipeline generates a second shader task and second task information based on the first shading result. The second shader processing pipeline runs the second shader task to generate the second shading result. The second shader processing pipeline transmits the second task information to the task control unit 120. The task control unit 120 obtains the second shading result based on the second task information and outputs the second shading result to the pipeline following the geometry processing pipeline.

[0075] For the first shader processing pipeline

[0076] The relevant descriptions of the first task generation pipeline 110 and the task execution unit 140 can be found above, and will not be repeated here.

[0077] When executing the first shader task, the task execution unit 140 retrieves the data to be read and written from the temporary storage unit 150. Optionally, the temporary storage unit 150 is the on-chip storage space of the graphics processor. Optionally, the temporary storage unit 150 is the off-chip storage space of the graphics processor.

[0078] The task execution unit 140 sends the execution result of the first shader task, i.e., the first shading result, to the result storage unit 160. Optionally, the result storage unit 160 is a vertex buffer space. The task control unit 120 is connected to the result storage unit 160. When in dual-pipeline mode, the task control unit 120 retrieves the first shading result from the result storage unit 160 and sends the first shading result to the first blending unit 104. When in single-pipeline mode, the task control unit 120 retrieves the first shading result from the result storage unit 160 and sends the first shading result to the pipeline after the geometry processing pipeline 100.

[0079] For the second shader processing pipeline

[0080] The relevant descriptions of the second task generation pipeline 130 and the task execution unit 140 can be found above, and will not be repeated here.

[0081] When executing the second shader task, the task execution unit 140 retrieves the necessary read / write data from the temporary storage unit 150 and sends the execution result of the second shader task to the result storage unit 160. Optionally, the temporary storage unit 150 is the on-chip memory space of the graphics processor. Optionally, the temporary storage unit 150 is the off-chip memory space of the graphics processor. When in dual-pipeline mode, after the second shader task is completed, the task control unit 120 can send the execution result of the second shader task, i.e., the second shading result, to the pipeline after the geometry processing pipeline 100.

[0082] In this embodiment, the first shader processing pipeline and the second shader processing pipeline will share the result storage unit and the temporary storage unit. Sharing the result storage unit and the temporary storage unit can save hardware usage and reduce the hardware density on the graphics processor.

[0083] In one embodiment, in single-pipeline mode, the first task generation pipeline also sends the first shader task to the task control unit. The task control unit receives the first shader task and controls the output of the first shader task to the pipeline following the geometry processing pipeline. The first shader task is used to indicate the shader task corresponding to the first shading result in the pipeline following the geometry processing pipeline. Optionally, the task control unit sends the first shader task and the first shading result to the pipeline following the geometry processing pipeline simultaneously. Optionally, the shader task construction unit sends the first shader task to the task control unit.

[0084] Furthermore, in the dual-pipeline mode, the first task generation pipeline also sends the first shader task to the task control unit. The task control unit receives the first shader task and controls it to enter the second task generation pipeline. The first shader task is used to instruct the second task generation pipeline on the shader task corresponding to the first shading result. Optionally, the task control unit sends the first shader task and the first shading result to the second task generation pipeline simultaneously. Optionally, the shader task construction unit sends the first shader task to the task control unit. It is understood that, based on the first shader task, the second task generation pipeline can know the shader task corresponding to the received first shading result. Therefore, the second task generation pipeline can know the type of shader task to be generated, avoiding conflicts between the generated second shader task and the first shader task.

[0085] The second task generation pipeline also sends the second shader task to the task control unit. The task control unit receives the second shader task and controls its output to the pipeline following the geometry processing pipeline. The second shader task is used to indicate the shader task corresponding to the second shading result in the pipeline following the geometry processing pipeline. Optionally, the task control unit sends the second shader task and the second shading result to the pipeline following the geometry processing pipeline simultaneously. Optionally, the shader task construction unit sends the second shader task to the task control unit.

[0086] The task control unit controls the flow of the two shader tasks. The first shader task generated by the first task generation pipeline can be sent to the pipeline after the geometry processing pipeline, or it can be sent to the second task generation pipeline. The second shader task generated by the second task generation pipeline can only be sent to the pipeline after the geometry processing pipeline.

[0087] As shown in Figure 5, the task control unit contains two First-In-First-Out (FIFO) queues. The first FIFO queue 510 stores the first shader task, and the second FIFO queue 520 stores the second shader task. The first FIFO queue 510 stores the first shader task sent by the first task generation pipeline in both single-pipeline and dual-pipeline modes. The second FIFO queue 520 stores the second shader task sent by the second task generation pipeline in dual-pipeline mode. In single-pipeline mode, the task control unit directly sends the first shader task from the first FIFO queue 510 to the pipeline following the geometry processing pipeline. In dual-pipeline mode, the task control unit sends the first shader task from the first FIFO queue 510 to the second task generation pipeline and the second shader task from the second FIFO queue 520 to the pipeline following the geometry processing pipeline.

[0088] In the above embodiments, the task control unit will also route the first shader task and the second shader task. The geometry processing pipeline provided by this application can support the geometry processing part of the VTG rendering pipeline as well as the geometry processing part of the mesh shading rendering pipeline. When supporting the geometry processing part of the VTG rendering pipeline, it may be necessary to implement the functions of up to four serial shaders (vertex shader, shell shader, domain shader and geometry shader) at the same time. At this time, the functions supported by the geometry processing pipeline are more complex. This application will route shader tasks so that the next processing flow can know the specific task corresponding to the previous processing action. In complex processing scenarios, the stable and accurate operation of each part of the geometry processing pipeline can also be achieved.

[0089] In one embodiment, the user can configure the shaders used by the graphics processor in the shader application, such as using only the vertex shader, the vertex shader plus the geometry shader, etc. When the graphics processor switches from a dual-pipeline mode to a single-pipeline mode, a control flag will be inserted after the first shader task in the dual-pipeline mode, as shown in Figure 6. A first control flag 610 is inserted between the first shader task 1 and the first shader task 2. The first shader task 1 is the first shader task in the dual-pipeline mode, and the first shader task 2 is the first shader task in the single-pipeline mode.

[0090] When the task control unit detects the first control flag 610 after the first shader task 1 in dual-pipeline mode, it blocks the first shader task 2 following the first control flag 610. The first shader task 1 and the first control flag 610 are sent to the second task generation pipeline. In the second task generation pipeline, the first control flag 610 is passed through and returned to the task control unit, transforming into the second control flag 620. The second control flag 620 is a control flag obtained based on the pass-through of the first control flag 610, and the first shader task 1 is transformed into the second shader task and enters the task control unit. As shown in Figure 6, when the task control unit detects the second control flag 620 after the second shader task, it unblocks the first shader task 2 following the first control flag 610 and outputs the first shader task 2 following the first control flag 610 to the pipeline after the geometry processing pipeline.

[0091] Optionally, referring to Figure 3, the first control tag after the first shader task 1 is inserted by the first task generation unit 101. The first control tag 610 will be passed through in the first shader engine 102 and the shader task construction unit 103, and the first control tag 610 will enter the task control unit 120.

[0092] In the above embodiments, when switching from dual-pipeline mode to single-pipeline mode, when the task control unit detects the first control flag, it will first block the first shader task 2 in single-pipeline mode. When the second shader task in dual-pipeline mode returns to the task control unit, the first shader task 2 in single-pipeline mode will be routed. At this time, the shader tasks in dual-pipeline mode have been correctly routed before the shader tasks in single-pipeline mode are routed. That is, the alignment and synchronization of dual-pipeline mode and single-pipeline mode can be achieved through the control flag. The task control unit will not route shader tasks in dual-pipeline mode and single-pipeline mode at the same time, which can ensure the correctness of the rendering result.

[0093] In one embodiment, when the graphics processor switches from a single-pipeline mode to a dual-pipeline mode, the task control unit only needs to continue routing the shader tasks sequentially without additional synchronization operations. As shown in Figure 7, the first shader task 1 is the first shader task in the single-pipeline mode, and the first shader task 2 is the first shader task in the dual-pipeline mode. The task control unit sends the first shader task 1 to the pipeline after the geometry processing pipeline. Then, the task control unit sends the first shader task 2 to the second task generation pipeline. The second task generation pipeline generates the second shader task based on the first shader task 2. The second task generation pipeline sends the second shader task to the task control unit, and the task control unit sends the second shader task to the pipeline after the geometry processing pipeline.

[0094] At this point, when switching from single-pipeline mode to dual-pipeline mode, the task control unit does not need to perform additional waiting and synchronization. It only needs to route the first shader task and the second shader task in sequence. The hardware naturally ensures that the routing operations in single-pipeline mode and dual-pipeline mode are separate. The routing operation in dual-pipeline mode is executed only after the routing operation in single-pipeline mode is completed. This ensures that the shader tasks sent to the pipelines after the geometry processing pipeline meet the user's expectations.

[0095] Figure 8 shows a structural block diagram of an electronic device 800 provided in an exemplary embodiment of this application. Optionally, the electronic device 800 includes a graphics processor provided in an embodiment of this application.

[0096] Optionally, the electronic device can be a portable mobile terminal, such as a smartphone, tablet, MP3 player (Moving Picture Experts Group Audio Layer III), MP4 player (Moving Picture Experts Group Audio Layer IV), laptop, or desktop computer. The electronic device 800 may also be referred to as a user device, portable terminal, laptop terminal, desktop terminal, or other names. Typically, the electronic device 800 includes a processor 801 and a memory 802.

[0097] Processor 801 may include one or more processing cores, such as a quad-core processor or an octa-core processor. Processor 801 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 801 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 801 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 801 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0098] The memory 802 may include one or more computer-readable storage media, which may be non-transitory. The memory 802 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices.

[0099] In some embodiments, the electronic device 800 may also optionally include a peripheral device interface 803 and at least one peripheral device. Those skilled in the art will understand that the structure shown in FIG8 does not constitute a limitation on the electronic device 800, and may include more or fewer components than illustrated, or combine certain components, or employ different component arrangements.

[0100] This application also provides a chip that includes a graphics processor as described in the embodiments above.

[0101] This application also provides a graphics card that includes a graphics processor as described in the embodiments above.

[0102] This application also provides a server that includes a graphics processor as described in the embodiments above.

[0103] Figure 9 shows a schematic diagram of the structure of a server provided in an exemplary embodiment of this application. The server 900 includes a plurality of graphics processors 901, and at least one of the graphics processors 901 includes the graphics processor described in the above embodiments of this application.

[0104] This application also provides a computing cluster, which includes multiple servers, at least one of which includes a graphics processor as described in the above embodiments.

Claims

1. A graphics processor, the graphics processor comprising a geometry processing pipeline, the geometry processing pipeline comprising a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit, wherein the first task generation pipeline is used to generate a first shader task corresponding to a first shader, and the second task generation pipeline is used to generate a second shader task corresponding to a second shader. The task execution unit is used to receive and execute the first shader task in single pipeline mode to obtain the first shader result. In addition, in dual-pipeline mode, the first shader task and the second shader task are received and executed to obtain the first shader result and the second shader result, respectively. The task control unit is used to acquire the first shading result in the single pipeline mode and output the first shading result to the pipeline after the geometry processing pipeline. In addition, in the dual-pipeline mode, the first shading result is acquired, and the first shading result is controlled to enter the second task generation pipeline; and the second shading result is acquired, and the second shading result is output to the pipeline after the geometry processing pipeline.

2. The graphics processor according to claim 1, wherein, The first task generation pipeline is used to generate the first task information for the first shader task. The second task generation pipeline is used to generate the second task information for the second shader task; The task control unit is used to obtain the first coloring result based on the received first task information in the single pipeline mode; In the dual pipeline mode, the first coloring result is obtained based on the received first task information, and the second coloring result is obtained based on the received second task information.

3. The graphics processor according to claim 1, wherein, The first task generation pipeline includes a first shader engine, and the second task generation pipeline includes a second shader engine. The first shader engine and the second shader engine are independent hardware units. The first shader engine is used to generate the first shader task in the single-pipeline mode or the dual-pipeline mode. The second shader engine is used to generate the second shader task in the dual-pipeline mode.

4. The graphics processor according to claim 3, wherein, The first task generation pipeline also includes a first task generation unit; The first task generation unit is configured to split the received drawing instructions into multiple first task packages in the single pipeline mode or the dual pipeline mode, and send the multiple first task packages to the first shader engine.

5. The graphics processor according to claim 3, wherein, The second task generation pipeline also includes a first mixing unit; The first hybrid unit is configured to, in the dual pipeline mode, perform surface subdivision or derive mesh shader thread group operations based on the first shading result, obtain first output data, and send the first output data to the second shader engine.

6. The graphics processor according to claim 3, wherein, The first task generation pipeline and the second task generation pipeline share the same shader task construction unit; The shader task construction unit is used to allocate resources to the first shader task in the single pipeline mode and send the first shader task after resource allocation to the task execution unit. In the dual-pipeline mode, resources are allocated to the first shader task, and the first shader task with allocated resources is sent to the task control unit. Resources are also allocated to the second shader task, and the second shader task with allocated resources is sent to the task execution unit.

7. The graphics processor according to any one of claims 1 to 6, wherein, The geometry processing pipeline also includes a result storage unit; The result storage unit is used to store the execution result of the first shader task in the single-pipeline mode; and to store the execution result of the first shader task and the execution result of the second shader task in the dual-pipeline mode.

8. The graphics processor according to any one of claims 1 to 6, wherein, The geometry processing pipeline also includes a temporary storage unit; The temporary storage unit is used to temporarily store data read and written when executing the first shader task in the single-pipeline mode; and to temporarily store data read and written when executing the first shader task and data read and written when executing the second shader task in the dual-pipeline mode.

9. The graphics processor according to any one of claims 1 to 6, wherein, The single pipeline mode is activated under any of the following conditions: The graphics processor is configured to use a vertex shader; The graphics processor is configured to use the vertex shader and geometry shader; The graphics processor is configured to use a mesh shader.

10. The graphics processor according to any one of claims 1 to 6, wherein, The dual pipeline mode is activated under any of the following conditions: The graphics processor is configured to use a vertex shader, a shell shader, and a domain shader. The graphics processor is configured to use the vertex shader, the shell shader, the domain shader, and the geometry shader; The graphics processor is configured to use an amplification shader and a mesh shader.

11. The graphics processor of claim 10, wherein, When the graphics processor is configured to use the vertex shader, the shell shader, and the domain shader, the first shader includes the vertex shader and the shell shader, and the second shader includes the domain shader.

12. The graphics processor according to claim 10, wherein, When the graphics processor is configured to use the vertex shader, the shell shader, the domain shader, and the geometry shader, the first shader includes the vertex shader and the shell shader, and the second shader includes the domain shader and the geometry shader.

13. The graphics processor according to claim 10, wherein, When the graphics processor is configured to use the magnifying shader and the mesh shader, the first shader includes the magnifying shader and the second shader includes the mesh shader.

14. The graphics processor according to any one of claims 1 to 6, wherein, The task control unit includes a first first-in-first-out queue and a second first-in-first-out queue; The first first-in-first-out queue is used to store the first shader task sent by the first task generation pipeline in the single pipeline mode and the dual pipeline mode. The second first-in-first-out queue is used to store the second shader task sent by the second task generation pipeline in the dual pipeline mode.

15. The graphics processor according to any one of claims 1 to 6, wherein, The task control unit is further configured to receive the first shader task in the single pipeline mode and control the output of the first shader task to the pipeline after the geometry processing pipeline.

16. The graphics processor according to any one of claims 1 to 6, wherein, The task control unit is further configured to, in the dual-pipeline mode, receive the first shader task, control the first shader task to enter the second task generation pipeline, the first shader task being used to instruct the second task generation pipeline, and the shader task corresponding to the first shader result; receive the second shader task, and control the second shader task to output to the pipeline after the geometry processing pipeline.

17. The graphics processor according to any one of claims 1 to 6, wherein, The task control unit is further configured to, when switching from the dual-pipeline mode to the single-pipeline mode, block the first shader task after the first control flag when a first control flag is detected, wherein the first shader task after the first control flag is the first shader task in the single-pipeline mode, and the first shader task before the first control flag is the first shader task in the dual-pipeline mode. When the second control flag is detected, the first shader task following the first control flag is unblocked, and the first shader task following the first control flag is output to the pipeline after the geometry processing pipeline. The second control flag is located after the second shader task.

18. A graphics rendering method, the method being applied to a graphics processor, the graphics processor including a geometry processing pipeline, the geometry processing pipeline including a first task generation pipeline, a task control unit, a second task generation pipeline, and a task execution unit; the method comprising: The first task generation pipeline generates the first shader task corresponding to the first shader; The first task generation pipeline sends the first shader task to the task execution unit; The task execution unit executes the first shader task and obtains the first shader result; In single-pipeline mode, the task control unit acquires the first shading result and outputs the first shading result to the pipeline after the geometry processing pipeline; In dual-pipeline mode, the task control unit obtains the first shading result and outputs the first shading result to the second task generation pipeline, which generates the second shader task corresponding to the second shader based on the first shading result. The second task generation pipeline sends the second shader task to the task execution unit; The task execution unit executes the second shader task to obtain the second shader result; the task control unit obtains the second shader result and outputs the second shader result to the pipeline after the geometry processing pipeline.

19. A chip comprising a graphics processor as described in any one of claims 1 to 17.

20. A server comprising a graphics processor as described in any one of claims 1 to 17.

21. An electronic device comprising a graphics processor as described in any one of claims 1 to 17.