How To Optimize RF Parameters In Electrostatic Chucks For Etching Processes
MAY 14, 20269 MIN READ
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RF Parameter Optimization in ESC Technology Background
Electrostatic chucks (ESCs) have emerged as critical components in semiconductor manufacturing processes, particularly in plasma etching applications where precise wafer positioning and temperature control are essential. The integration of radio frequency (RF) systems within ESC technology represents a significant advancement in addressing the complex challenges of modern semiconductor fabrication, where feature sizes continue to shrink and process requirements become increasingly stringent.
The fundamental principle of ESC operation relies on electrostatic forces generated by applying DC voltage to create attractive forces between the chuck and wafer. However, the introduction of RF parameters adds a sophisticated layer of control that enables dynamic adjustment of electrostatic forces, temperature distribution, and plasma coupling characteristics during etching processes. This dual-mode operation allows for real-time optimization of wafer clamping forces while maintaining optimal thermal and electrical conditions.
Historical development of ESC technology began in the 1980s with basic monopolar designs, evolving through bipolar configurations in the 1990s to today's advanced RF-integrated systems. The incorporation of RF parameter control emerged from the need to address plasma non-uniformities, improve etch rate consistency, and enhance process repeatability across different wafer materials and device structures.
The primary technical objectives driving RF parameter optimization in ESCs include achieving uniform temperature distribution across the wafer surface, minimizing wafer bow and stress-induced defects, optimizing plasma density distribution for consistent etch profiles, and maintaining stable electrostatic clamping forces throughout varying process conditions. These objectives are particularly critical in advanced node manufacturing where even minor variations can result in significant yield losses.
Current technological trends indicate a shift toward intelligent ESC systems capable of adaptive RF parameter adjustment based on real-time process feedback. This evolution addresses the growing complexity of multi-step etching processes and the need for precise control over plasma-surface interactions. The integration of advanced sensing technologies and machine learning algorithms represents the next frontier in ESC development, promising unprecedented levels of process control and optimization capability.
The fundamental principle of ESC operation relies on electrostatic forces generated by applying DC voltage to create attractive forces between the chuck and wafer. However, the introduction of RF parameters adds a sophisticated layer of control that enables dynamic adjustment of electrostatic forces, temperature distribution, and plasma coupling characteristics during etching processes. This dual-mode operation allows for real-time optimization of wafer clamping forces while maintaining optimal thermal and electrical conditions.
Historical development of ESC technology began in the 1980s with basic monopolar designs, evolving through bipolar configurations in the 1990s to today's advanced RF-integrated systems. The incorporation of RF parameter control emerged from the need to address plasma non-uniformities, improve etch rate consistency, and enhance process repeatability across different wafer materials and device structures.
The primary technical objectives driving RF parameter optimization in ESCs include achieving uniform temperature distribution across the wafer surface, minimizing wafer bow and stress-induced defects, optimizing plasma density distribution for consistent etch profiles, and maintaining stable electrostatic clamping forces throughout varying process conditions. These objectives are particularly critical in advanced node manufacturing where even minor variations can result in significant yield losses.
Current technological trends indicate a shift toward intelligent ESC systems capable of adaptive RF parameter adjustment based on real-time process feedback. This evolution addresses the growing complexity of multi-step etching processes and the need for precise control over plasma-surface interactions. The integration of advanced sensing technologies and machine learning algorithms represents the next frontier in ESC development, promising unprecedented levels of process control and optimization capability.
Market Demand for Advanced Etching Process Control
The semiconductor manufacturing industry is experiencing unprecedented demand for advanced etching process control technologies, driven by the relentless pursuit of smaller node geometries and higher device performance. As chip manufacturers transition to sub-5nm processes, the precision requirements for plasma etching have intensified dramatically, creating substantial market opportunities for optimized electrostatic chuck solutions with enhanced RF parameter control capabilities.
Market growth is primarily fueled by the expansion of artificial intelligence, 5G communications, and high-performance computing applications. These sectors demand increasingly sophisticated semiconductor devices with tighter dimensional tolerances and improved electrical characteristics. The complexity of modern device architectures, including FinFET and gate-all-around structures, necessitates precise control over plasma uniformity and substrate temperature during etching processes.
Leading foundries and memory manufacturers are investing heavily in next-generation etching equipment to maintain competitive advantages in advanced node production. The transition from traditional capacitively coupled plasma systems to more sophisticated reactor designs has created urgent demand for electrostatic chucks capable of delivering superior RF parameter optimization. This includes enhanced impedance matching, reduced plasma non-uniformities, and improved substrate temperature control across wafer surfaces.
The automotive semiconductor segment represents another significant growth driver, particularly with the proliferation of electric vehicles and autonomous driving technologies. These applications require power semiconductors and advanced sensors manufactured using precise etching processes, further expanding the addressable market for optimized electrostatic chuck solutions.
Regional demand patterns show concentrated growth in Asia-Pacific markets, where major semiconductor manufacturing facilities are expanding production capacity. However, geopolitical considerations and supply chain diversification strategies are also driving investments in North American and European manufacturing capabilities, creating additional market opportunities for advanced process control technologies.
The increasing complexity of multi-patterning techniques and selective etching processes has elevated the importance of real-time RF parameter optimization. Manufacturers seek solutions that can dynamically adjust electrical characteristics to maintain process stability across varying wafer conditions and recipe requirements, representing a substantial market opportunity for innovative electrostatic chuck technologies.
Market growth is primarily fueled by the expansion of artificial intelligence, 5G communications, and high-performance computing applications. These sectors demand increasingly sophisticated semiconductor devices with tighter dimensional tolerances and improved electrical characteristics. The complexity of modern device architectures, including FinFET and gate-all-around structures, necessitates precise control over plasma uniformity and substrate temperature during etching processes.
Leading foundries and memory manufacturers are investing heavily in next-generation etching equipment to maintain competitive advantages in advanced node production. The transition from traditional capacitively coupled plasma systems to more sophisticated reactor designs has created urgent demand for electrostatic chucks capable of delivering superior RF parameter optimization. This includes enhanced impedance matching, reduced plasma non-uniformities, and improved substrate temperature control across wafer surfaces.
The automotive semiconductor segment represents another significant growth driver, particularly with the proliferation of electric vehicles and autonomous driving technologies. These applications require power semiconductors and advanced sensors manufactured using precise etching processes, further expanding the addressable market for optimized electrostatic chuck solutions.
Regional demand patterns show concentrated growth in Asia-Pacific markets, where major semiconductor manufacturing facilities are expanding production capacity. However, geopolitical considerations and supply chain diversification strategies are also driving investments in North American and European manufacturing capabilities, creating additional market opportunities for advanced process control technologies.
The increasing complexity of multi-patterning techniques and selective etching processes has elevated the importance of real-time RF parameter optimization. Manufacturers seek solutions that can dynamically adjust electrical characteristics to maintain process stability across varying wafer conditions and recipe requirements, representing a substantial market opportunity for innovative electrostatic chuck technologies.
Current ESC RF Parameter Challenges and Limitations
Electrostatic chucks (ESCs) in semiconductor etching processes face significant RF parameter optimization challenges that directly impact process uniformity, wafer yield, and equipment reliability. The complex interplay between RF frequency, power distribution, and electrostatic clamping forces creates a multifaceted optimization problem that current industry solutions struggle to address comprehensively.
One of the primary challenges lies in achieving uniform RF power distribution across the wafer surface while maintaining adequate electrostatic clamping force. Traditional ESC designs often exhibit non-uniform electric field distribution, leading to variations in plasma density and etching rates across different wafer regions. This non-uniformity becomes particularly pronounced at wafer edges, where field fringing effects and impedance mismatches create process variations that can exceed acceptable tolerances for advanced semiconductor nodes.
Temperature-dependent RF parameter drift represents another critical limitation in current ESC systems. As wafer processing temperatures fluctuate during etching cycles, the dielectric properties of ESC materials change, altering the optimal RF matching conditions. Existing compensation mechanisms often rely on static lookup tables or simple feedback loops that cannot adequately respond to the dynamic nature of these thermal variations, resulting in suboptimal process control.
The frequency-dependent behavior of ESC systems introduces additional complexity, particularly when operating across multiple RF frequencies simultaneously. Modern etching processes frequently employ dual or triple-frequency RF systems to independently control ion energy and plasma density. However, the coupling between different frequency components through the ESC structure creates cross-talk effects that are difficult to predict and compensate for using conventional control strategies.
Impedance matching limitations pose significant constraints on RF parameter optimization. Current matching networks are typically designed for specific operating conditions and struggle to maintain optimal performance across the wide range of process parameters encountered in production environments. The reactive nature of ESC loads, combined with process-dependent plasma impedance variations, creates matching challenges that existing hardware solutions cannot fully address.
Dielectric breakdown and arcing phenomena represent critical safety and reliability limitations that constrain RF parameter optimization space. The high electric fields required for effective electrostatic clamping, combined with RF power delivery, create conditions conducive to dielectric failure. Current protection systems often employ conservative operating margins that limit the achievable performance envelope, preventing full utilization of ESC capabilities.
Process-to-process repeatability challenges arise from the cumulative effects of polymer deposition, surface conditioning, and gradual material property changes in ESC components. These factors cause drift in optimal RF parameters over time, requiring frequent recalibration and maintenance procedures that impact manufacturing throughput and cost-effectiveness.
One of the primary challenges lies in achieving uniform RF power distribution across the wafer surface while maintaining adequate electrostatic clamping force. Traditional ESC designs often exhibit non-uniform electric field distribution, leading to variations in plasma density and etching rates across different wafer regions. This non-uniformity becomes particularly pronounced at wafer edges, where field fringing effects and impedance mismatches create process variations that can exceed acceptable tolerances for advanced semiconductor nodes.
Temperature-dependent RF parameter drift represents another critical limitation in current ESC systems. As wafer processing temperatures fluctuate during etching cycles, the dielectric properties of ESC materials change, altering the optimal RF matching conditions. Existing compensation mechanisms often rely on static lookup tables or simple feedback loops that cannot adequately respond to the dynamic nature of these thermal variations, resulting in suboptimal process control.
The frequency-dependent behavior of ESC systems introduces additional complexity, particularly when operating across multiple RF frequencies simultaneously. Modern etching processes frequently employ dual or triple-frequency RF systems to independently control ion energy and plasma density. However, the coupling between different frequency components through the ESC structure creates cross-talk effects that are difficult to predict and compensate for using conventional control strategies.
Impedance matching limitations pose significant constraints on RF parameter optimization. Current matching networks are typically designed for specific operating conditions and struggle to maintain optimal performance across the wide range of process parameters encountered in production environments. The reactive nature of ESC loads, combined with process-dependent plasma impedance variations, creates matching challenges that existing hardware solutions cannot fully address.
Dielectric breakdown and arcing phenomena represent critical safety and reliability limitations that constrain RF parameter optimization space. The high electric fields required for effective electrostatic clamping, combined with RF power delivery, create conditions conducive to dielectric failure. Current protection systems often employ conservative operating margins that limit the achievable performance envelope, preventing full utilization of ESC capabilities.
Process-to-process repeatability challenges arise from the cumulative effects of polymer deposition, surface conditioning, and gradual material property changes in ESC components. These factors cause drift in optimal RF parameters over time, requiring frequent recalibration and maintenance procedures that impact manufacturing throughput and cost-effectiveness.
Existing RF Parameter Optimization Solutions
01 RF frequency control and impedance matching in electrostatic chucks
Electrostatic chucks require precise RF frequency control and impedance matching to ensure optimal performance during semiconductor processing. The RF parameters must be carefully tuned to maintain proper electrostatic force while minimizing interference with plasma processes. Impedance matching circuits help optimize power transfer and reduce reflections in the RF system.- RF impedance matching and frequency control in electrostatic chucks: Electrostatic chucks require precise RF impedance matching to ensure efficient power transfer and minimize reflections. The frequency control mechanisms help maintain stable plasma conditions and prevent arcing. Proper impedance matching reduces power losses and improves the overall performance of the electrostatic chuck system during semiconductor processing operations.
- RF power distribution and electrode configuration: The design of electrode configurations and RF power distribution systems is critical for uniform substrate holding and processing. Multi-zone electrode arrangements allow for independent control of different regions, enabling better process uniformity. The power distribution network must be optimized to handle high-frequency signals while maintaining electrostatic clamping force across the entire substrate surface.
- RF filtering and isolation techniques: Effective RF filtering and isolation are essential to prevent interference between the electrostatic clamping system and RF processing equipment. Filter circuits and isolation components help maintain signal integrity and prevent unwanted coupling. These techniques ensure that the electrostatic chuck operates reliably without affecting the quality of plasma processing or causing electromagnetic interference.
- Temperature compensation and RF parameter stability: Temperature variations during processing can significantly affect RF parameters and electrostatic chuck performance. Compensation mechanisms and thermal management systems help maintain stable RF characteristics across different operating temperatures. This ensures consistent clamping force and prevents thermal-induced parameter drift that could compromise process reliability and substrate handling.
- RF monitoring and feedback control systems: Advanced monitoring and feedback control systems continuously track RF parameters to optimize electrostatic chuck performance. Real-time parameter adjustment capabilities allow for dynamic optimization based on process conditions and substrate characteristics. These systems help maintain optimal RF conditions throughout the processing cycle and provide diagnostic information for preventive maintenance.
02 RF power distribution and electrode configuration
The distribution of RF power across electrostatic chuck electrodes is critical for uniform wafer clamping and temperature control. Multi-zone electrode configurations allow for independent control of different wafer regions, enabling better process uniformity. The electrode design must balance electrostatic clamping force with RF transmission characteristics.Expand Specific Solutions03 RF filtering and isolation techniques
Effective RF filtering and isolation are essential to prevent interference between the electrostatic chuck control circuits and the plasma generation system. Filter circuits help maintain signal integrity while allowing proper DC bias control. Isolation techniques ensure that RF energy does not interfere with chuck operation or cause arcing.Expand Specific Solutions04 Temperature compensation and RF parameter adjustment
Electrostatic chuck performance varies with temperature, requiring dynamic adjustment of RF parameters to maintain consistent operation. Temperature compensation algorithms adjust RF characteristics based on thermal feedback to ensure stable wafer clamping throughout the process cycle. This includes compensation for dielectric property changes with temperature.Expand Specific Solutions05 RF monitoring and feedback control systems
Real-time monitoring of RF parameters enables closed-loop control of electrostatic chuck performance. Feedback systems continuously adjust RF characteristics based on measured parameters such as voltage, current, and phase relationships. Advanced monitoring systems can detect anomalies and automatically compensate for variations in chuck performance.Expand Specific Solutions
Key Players in ESC and Semiconductor Equipment Industry
The RF parameter optimization in electrostatic chucks for etching processes represents a mature yet evolving market segment within the semiconductor equipment industry. The market is dominated by established players including Applied Materials, Lam Research, Tokyo Electron, and NAURA Microelectronics, who collectively control significant market share in the multi-billion dollar semiconductor processing equipment sector. Technology maturity varies across companies, with Applied Materials and Lam Research leading in advanced plasma control and RF matching technologies, while Tokyo Electron and Samsung Electronics demonstrate strong capabilities in integrated chuck design. Emerging players like Plasma-Therm and ULVAC are developing specialized solutions for niche applications. The industry is currently in a growth phase driven by increasing demand for advanced semiconductor nodes, requiring more precise RF parameter control for improved etch uniformity and reduced wafer damage.
Tokyo Electron Ltd.
Technical Solution: Tokyo Electron has developed advanced RF parameter optimization techniques for electrostatic chucks in their etching systems. Their approach focuses on dynamic RF frequency tuning between 13.56 MHz and 27.12 MHz to minimize plasma non-uniformity and reduce particle generation during etching processes. The company implements real-time impedance matching algorithms that automatically adjust RF power delivery based on wafer loading conditions and process requirements. Their electrostatic chuck designs incorporate multi-zone temperature control with RF decoupling networks to prevent interference between heating elements and RF fields. TEL's systems also feature advanced plasma monitoring capabilities that provide feedback for continuous RF parameter adjustment, ensuring optimal etch uniformity across 300mm wafers while maintaining low defect rates.
Strengths: Market-leading position in etch equipment with proven RF optimization algorithms and comprehensive process control. Weaknesses: High system complexity and cost, requiring specialized maintenance expertise.
Beijing NAURA Microelectronics Equipment Co., Ltd.
Technical Solution: NAURA has developed RF parameter optimization solutions for their Primo series etch systems, focusing on cost-effective approaches suitable for emerging semiconductor markets. Their electrostatic chuck technology employs single-frequency 13.56 MHz RF systems with advanced matching network designs that achieve stable plasma conditions across various process gases. The company implements temperature-compensated RF delivery systems that adjust power levels based on chuck temperature variations to maintain consistent plasma characteristics. NAURA's approach includes automated recipe optimization software that determines optimal RF parameters through design of experiments methodology, reducing process development time. Their systems feature modular RF generator designs that allow for easy scaling and maintenance, with built-in diagnostic capabilities for troubleshooting RF-related issues during production.
Strengths: Cost-effective solutions with good reliability and simplified maintenance procedures suitable for high-volume manufacturing. Weaknesses: Limited advanced features compared to leading competitors and narrower process capability window.
Core Innovations in ESC RF Parameter Control
Ceramic electrostatic chuck including embedded faraday cage for RF delivery and associated method for operation, monitoring, and control
PatentActiveJP2024026298A
Innovation
- An electrostatic chuck design incorporating a primary RF powered electrode positioned horizontally within the ceramic assembly, a lower support structure, and RF power supply connection modules forming a Faraday cage to uniformly distribute RF power around the chuck, eliminating the need for internal signal transmission and protecting internal components.
High power electrostatic chuck design with radio frequency coupling
PatentActiveUS20230072594A1
Innovation
- The design incorporates a dual mesh electrode structure within the electrostatic chuck, with a lower mesh connected to the upper mesh via pegs, forming a Faraday cage that reduces electric field gradients and prevents helium ignition, while maintaining thermal uniformity and enhancing RF power conduction.
Semiconductor Manufacturing Standards and Regulations
The semiconductor manufacturing industry operates under a comprehensive framework of standards and regulations that directly impact RF parameter optimization in electrostatic chucks for etching processes. International standards organizations such as SEMI (Semiconductor Equipment and Materials International) have established critical guidelines including SEMI E10 for safety requirements and SEMI F47 for specification formats that govern electrostatic chuck operations and RF system implementations.
Regulatory compliance in semiconductor fabrication facilities requires adherence to electromagnetic compatibility (EMC) standards, particularly IEC 61000 series, which defines acceptable RF emission levels and immunity requirements. These standards ensure that RF parameter adjustments in electrostatic chucks do not interfere with adjacent equipment or facility operations. Additionally, FCC Part 15 regulations in the United States and similar CE marking requirements in Europe establish mandatory RF emission limits that must be considered during parameter optimization.
Safety standards play a crucial role in RF parameter selection, with OSHA regulations and international IEC 62311 standards defining human exposure limits to electromagnetic fields. These requirements directly influence the maximum allowable RF power levels and frequency ranges that can be employed in electrostatic chuck systems, creating operational boundaries for optimization efforts.
Quality management systems governed by ISO 9001 and semiconductor-specific standards like IATF 16949 mandate documented procedures for RF parameter validation and control. These standards require statistical process control methods, measurement system analysis, and continuous monitoring protocols that ensure optimized RF parameters maintain consistent performance over time.
Environmental regulations including RoHS (Restriction of Hazardous Substances) and REACH (Registration, Evaluation, Authorization of Chemicals) impact material selection for RF components in electrostatic chucks, indirectly affecting parameter optimization strategies. Cleanroom standards such as ISO 14644 establish contamination control requirements that influence RF system design and parameter selection to minimize particle generation during etching processes.
Metrology standards including NIST traceability requirements and ISO 17025 laboratory accreditation standards govern the calibration and measurement of RF parameters, ensuring accurate optimization results. These standards mandate regular calibration schedules, measurement uncertainty analysis, and documentation protocols that support reliable parameter optimization processes in production environments.
Regulatory compliance in semiconductor fabrication facilities requires adherence to electromagnetic compatibility (EMC) standards, particularly IEC 61000 series, which defines acceptable RF emission levels and immunity requirements. These standards ensure that RF parameter adjustments in electrostatic chucks do not interfere with adjacent equipment or facility operations. Additionally, FCC Part 15 regulations in the United States and similar CE marking requirements in Europe establish mandatory RF emission limits that must be considered during parameter optimization.
Safety standards play a crucial role in RF parameter selection, with OSHA regulations and international IEC 62311 standards defining human exposure limits to electromagnetic fields. These requirements directly influence the maximum allowable RF power levels and frequency ranges that can be employed in electrostatic chuck systems, creating operational boundaries for optimization efforts.
Quality management systems governed by ISO 9001 and semiconductor-specific standards like IATF 16949 mandate documented procedures for RF parameter validation and control. These standards require statistical process control methods, measurement system analysis, and continuous monitoring protocols that ensure optimized RF parameters maintain consistent performance over time.
Environmental regulations including RoHS (Restriction of Hazardous Substances) and REACH (Registration, Evaluation, Authorization of Chemicals) impact material selection for RF components in electrostatic chucks, indirectly affecting parameter optimization strategies. Cleanroom standards such as ISO 14644 establish contamination control requirements that influence RF system design and parameter selection to minimize particle generation during etching processes.
Metrology standards including NIST traceability requirements and ISO 17025 laboratory accreditation standards govern the calibration and measurement of RF parameters, ensuring accurate optimization results. These standards mandate regular calibration schedules, measurement uncertainty analysis, and documentation protocols that support reliable parameter optimization processes in production environments.
Process Uniformity and Yield Impact Assessment
Process uniformity and yield impact represent critical performance metrics directly influenced by RF parameter optimization in electrostatic chuck systems. The relationship between RF power delivery, frequency modulation, and wafer-level uniformity creates a complex interdependency that significantly affects manufacturing outcomes in advanced etching processes.
RF parameter variations across the chuck surface directly translate to non-uniform plasma density distribution, resulting in etch rate disparities that can exceed acceptable tolerances. Studies indicate that RF power imbalances of merely 2-3% can generate radial non-uniformity patterns exceeding 5%, particularly problematic for sub-10nm technology nodes where critical dimension control requirements demand uniformity specifications below 2%.
Temperature gradients induced by suboptimal RF parameter settings create thermal stress patterns that compromise wafer flatness and introduce systematic variations in etch characteristics. These thermal effects become particularly pronounced during extended processing cycles, where cumulative heat buildup can shift the optimal RF operating window and degrade process stability over time.
Yield impact assessment reveals that RF parameter optimization can improve die-level yield by 8-15% through enhanced process control. Defect density reduction occurs primarily through minimized micro-masking effects and improved sidewall profile control, both directly linked to uniform RF field distribution across the chuck surface.
Statistical process control data demonstrates strong correlation between RF parameter stability and yield performance, with coefficient of variation improvements in RF delivery translating to proportional yield gains. Advanced process monitoring systems now incorporate real-time RF parameter feedback to maintain optimal uniformity conditions throughout production runs.
The economic impact of RF optimization extends beyond immediate yield improvements to include reduced rework rates, enhanced equipment utilization, and improved process capability indices. Manufacturing facilities report 12-20% reduction in process-related excursions when implementing comprehensive RF parameter optimization protocols, directly contributing to overall fab productivity and profitability metrics.
RF parameter variations across the chuck surface directly translate to non-uniform plasma density distribution, resulting in etch rate disparities that can exceed acceptable tolerances. Studies indicate that RF power imbalances of merely 2-3% can generate radial non-uniformity patterns exceeding 5%, particularly problematic for sub-10nm technology nodes where critical dimension control requirements demand uniformity specifications below 2%.
Temperature gradients induced by suboptimal RF parameter settings create thermal stress patterns that compromise wafer flatness and introduce systematic variations in etch characteristics. These thermal effects become particularly pronounced during extended processing cycles, where cumulative heat buildup can shift the optimal RF operating window and degrade process stability over time.
Yield impact assessment reveals that RF parameter optimization can improve die-level yield by 8-15% through enhanced process control. Defect density reduction occurs primarily through minimized micro-masking effects and improved sidewall profile control, both directly linked to uniform RF field distribution across the chuck surface.
Statistical process control data demonstrates strong correlation between RF parameter stability and yield performance, with coefficient of variation improvements in RF delivery translating to proportional yield gains. Advanced process monitoring systems now incorporate real-time RF parameter feedback to maintain optimal uniformity conditions throughout production runs.
The economic impact of RF optimization extends beyond immediate yield improvements to include reduced rework rates, enhanced equipment utilization, and improved process capability indices. Manufacturing facilities report 12-20% reduction in process-related excursions when implementing comprehensive RF parameter optimization protocols, directly contributing to overall fab productivity and profitability metrics.
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