A buffered duty cycle corrector isolates MOS amplifier stages to preserve gain, speed, and frequency characteristics at lower voltages.
A separate compensation circuit holds output transistor power nearly constant to curb thermal tail distortion and preserve transient fidelity.
Multiple series resonance circuits at FET gate fingers create low-impedance harmonic loads, reducing distortion across a wide RF band.
Switchable dual amplifiers and matching networks cut idling-current losses and improve linearity in low-power transmitting output stages.
Body-source cross coupling boosts common-gate differential amplifier gain while easing transistor breakdown voltage loss in low-power analog and RF circuits.
Asymmetric power drive overcomes load modulation in Doherty amplifiers by supplying higher input power to the peaking amplifier, enabling maximum output.
Expanded waveguide uses multilateral pillars to form binary tree channels that distribute electromagnetic waves uniformly across the E-plane.
A differential transmission line forms a Mobius loop to amplify forward traveling waves while attenuating backward signals in high-frequency circuits.
A core amplifier with a bandwidth peaking network extends frequency response across DC to over 20 GHz.
Parallel sub-amplifier modules with identical electrical paths distribute input signals and combine output power for high performance.