Stacked phase-shifting layers and a tunable dielectric enable continuous, precise phase control with wider range and less wiring complexity.
Dynamic LDO bias control tracks DTC input changes to cut settling-time supply disturbances and reduce RF phase modulation errors.
A single-VCO 4FSK architecture uses parallel bit streams and non-coherent reception to reach multi-Gb/s links with lower power and complexity.
One delay line serves both modulation and demodulation as a ring oscillator, removing PLL lock time while cutting transceiver area and power.
Current injection sets UWB pulse startup phase in a switched LC oscillator, enabling BPSK and tighter spectral control at multi-GHz frequencies.
A sign-based scaling controller uses PLL error feedback to calibrate oscillator gain during operation without frequency-dependent tuning.
A tunable monitor inside the QAM modulator measures RF channel power and drives gain adjustment without external spectrum analyzers.
A digital monitor detects inductive voltage droops and briefly skips clock cycles to stabilize supply voltage, preserve speed, and cut power.
A switched LC tank and PLL architecture enables direct FM across modes while balancing modulation accuracy and phase noise.
Two QPSK modulators with constant weights and fixed DTX bits generate 16QAM constellation points while reducing processing and bus load.
Series coil-resistor peaking and common-mode biasing extend a differential active mixer's bandwidth while holding gain steady from DC to 20 GHz.
Pilot tones and pseudo-noise sequences enable rapid carrier and clock frequency synchronization in quadrature amplitude modulated signals.
Segmenting the frequency band into sub-bands allows dynamic phase error tracking, correcting gain and phase imbalance variations across wide bandwidths.
A single monitor photodiode sequentially detects dither tones injected into I-arm, Q-arm, and phase modulators to adjust bias points.
A carrier suppression ratio measurement eliminates parasitic loading and calibration drift in electro-optic phase modulators.
Parallel circuit architecture upsamples digital data streams via polyphase Nyquist filters to overcome FPGA clock speed limits.