An integrated current reference loop improves multiphase current accuracy while preserving fast over-current limiting despite phase inductance variation.
Interconnected windings and synchronous rectification cut winding loss and PCB cost while maintaining DC-DC voltage regulation.
When isolation feedback fails, the control circuit limits open-loop pulse duration or duty cycle to prevent output overvoltage.
During load transients, turning secondary-side switches OFF cuts output voltage spikes in resonant LLC converters and protects components.
Phase-shift operation limits secondary-switch parasitic resonance, stabilizing light-load gain control and improving converter efficiency.
Secondary-side current feedback lets the PFC stage react quickly to load swings, stabilizing output voltage and limiting AC inrush currents.
A single-cable display link uses non-isolated power transfer and separate grounds to cut cable thickness, cost, and display volume.
An asymmetric resonant tank uses transformer ratio tuning and a secondary-side capacitor to match bidirectional gain while reducing parts.
A hybrid switched-capacitor and regulated converter cuts 48V-to-12V losses while maintaining output regulation, power density, and fast response.
When isolated feedback fails, this control circuit limits open-loop pulse duration or duty cycle to prevent output overvoltage without extra parts.
Dual-loop frequency and phase-shift control enables bidirectional resonant DC-DC conversion with ZVS, lower ripple, and fewer components.
Precharging the output filter in an RSCC limits startup current surges, protects switching transistors, and preserves soft-switching efficiency.
Controlling ion implantation angle forms a self-aligned lateral channel in SiC MOSFETs, improving channel precision and lowering on-resistance.
Mode switching by output voltage prevents peak current buildup during SMPS start-up or short circuit while avoiding oversized components.
Adaptive slew-rate gate drive switches between fast and slow turn-on to maintain soft-switching and reduce voltage stress in resonant converters.
Leakage inductance spikes are redirected to charge a capacitor that powers the control unit, protecting switches while cutting snubber loss and cost.
Adjusting bridge rectifier switch firing angles suppresses even-order supply harmonics, cutting DC bus capacitor stress and line-current THD.
Phase-synchronized thyristor soft start limits inrush current without bulky precharge relays, even on highly distorted AC supplies.
Integrated bidirectional current sensing enables same-cycle overcurrent shutdown and SR mode detection in totem-pole PFC circuits.
By tying the lowest-voltage phase to a common node, this isolated three-phase PFC converter stabilizes neutral potential and cuts switching losses.
Direct three-phase AC-to-DC resonant conversion removes the intermediate storage stage to cut converter size while maintaining efficient power transfer.
Input-power-based valley selection times flyback switch turn-on to cut switching loss, EMI, and audible noise in compact converters.
A controller targets the harmonic nearest DC-link resonance to compensate switching control and reduce distorted input current.
Variable-frequency resonance parameter selection minimizes inductor current ripple, expands ZVS range, and cuts switching loss and circuit size.
A closed-loop current sampling and gate-voltage control scheme lets an LDO limit overloads precisely without hard shutoff or transistor burnout.
A low-side switch that blocks current in both directions helps transfer remaining magnetizing energy efficiently without adjustable capacitors.
Frequency-based phase-shift switching in interleaved PFC converters suppresses differential mode EMI across varying operating ranges.
Variable-frequency control and matched resonant tanks keep HFAC power stable and safe across changing loads and cable lengths.
A universal power stage with signal selection switches between capacitor and inductor conversion to save chip area and handle varied loads.
Discrete voltage levels and PWM-based selection enable soft switching, cutting converter losses, dissipation, and output filter size.
Dynamic inductance and transformer turns-ratio switching help a dual active bridge maintain soft switching and higher DC-DC conversion efficiency.
An RC filter and voltage-threshold control align secondary switch timing despite parasitic inductance, cutting power loss in converters.
A controlled snubber switch captures resonant energy in a capacitor to suppress rectifier ringing and spikes with lower power loss.
Controlled JFET and shielding-region doping helps depletion layers merge at gate intersections, reducing leakage and raising VDMOS breakdown voltage.
Dynamic half-bridge timing adjusts MOSFET dead time from HB voltage transitions to maintain zero-voltage switching across varying conditions.
Emulated inductor current is corrected against sampled current to avoid ringing-related delay and preserve accurate detection in short switch on-times.
Time-division control selectively engages a drive acceleration path to speed switching while limiting stress and voltage spikes.
A closed-loop current sampling scheme lets an LDO limit overload current precisely, avoid hard shutoff, and protect the power transistor.
Variable transistor turn-off timing based on demagnetization and current signals maintains zero-voltage switching and cuts conduction losses.
Programmable phase-to-controller coupling lets one converter reconfigure power stages to match changing loads and improve delivery efficiency.
Real-time voltage and current feedback adjusts switching to harvest input waveform portions more efficiently while keeping output stable.
Adjusting flyback turn-off time by peak current stabilizes CCM entry, limits ripple, and improves average output current calculation.
Controlled input switching and precharge circuits block capacitor inrush, cutting heat and losses in wide-input power conversion.
Variable inverter pulse timing limits magnetizing current during full-bridge to half-bridge transitions, preventing transformer core saturation.
An energy-storing parallel support circuit sustains zero-voltage switching in inductive power transfer despite resonance mismatch, cutting losses and EMI.
Phase-based PFM adjustment keeps an LLC resonant tank at resonance across input-voltage changes, reducing conversion losses.
A split-winding magnetic core creates leakage inductance without extra poles, cutting winding loss and shrinking resonant converter size.
A parallel resonant module and isolation capacitors cut component count, reduce inverter energy loss, and deliver pure sine wave AC output.
Independent center and edge pulsers shape wafer bias fields to cut edge defects and improve plasma deposition uniformity.
Multiple resonant branches keep filter resonance stable when inverter switching frequency drops under overload, improving grid-tied stability.