Lateral GaN HEMT structures utilize specific drain electrode configurations to manage electric fields and prevent full depletion of the two-dimensional electron gas channel.
Flow resistive blocks in the supply duct prevent air skewing and void diffusion, ensuring uniform temperature distribution during semiconductor burn-in testing.
A variable resistor adjusts control electrode resistance to optimize voltage change rates during switching device turn-off tests.
A method measures FDSOI transistor capacitances to determine interface defect densities without complex modeling.
A GaN device testing system controls junction temperature to measure intermittent operating life with high precision.
Integrating current sources and environmental chambers replicates combined self-heating and ambient fatigue for accurate lifetime prediction.