In-memory computing device for parallel vector multiplier-adder and electronic device
By utilizing the in-memory computing device with a parallel vector multiplier-accumulator and employing parallel processing and weight shifting and accumulation techniques, the problem of slow computation speed in in-memory computing architectures with large data volumes is solved, achieving a rapid improvement in computation speed.
CN115629734BActive Publication Date: 2026-05-29杭州智芯科微电子科技有限公司
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Patent Information
- Application Number
- CN202211329832.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-27
- Publication Date
- 2026-05-29
- Estimated Expiration
- 2042-10-27
AI Technical Summary
Technical Problem
Existing in-memory computing architectures are slow when processing large amounts of data, and cannot effectively improve computing efficiency.
Method used
An in-memory computing device employing a parallel vector multiply-accumulator achieves single-bit multiplication and addition operations by processing multiple multiplication units and adders in parallel and combining them with a shift accumulator. It also improves computation speed by using weight values for shift accumulation.
Benefits of technology
All multiplication operations are completed within one clock cycle, and shift accumulation is completed within two clock cycles, which significantly improves the calculation speed.
✦ Generated by Eureka AI based on patent content.
Abstract
The embodiment of the application provides a kind of in-memory computing device of parallel vector multiplier-accumulator and electronic equipment, it is related to in-memory computing technical field, can improve the computing speed.The in-memory computing device of parallel vector multiplier-accumulator, comprising: L multiplication module, each multiplication module includes q multiplication unit and an adder, q>1, L>1;Multiplication unit includes memory and multiplication circuit;The adder includes q addition input, the output of the a multiplication unit is electrically connected to the a addition input, a is 1, 2, …, q;Shift accumulator, shift accumulator includes L accumulation input, the output of the b multiplication module is electrically connected to the b accumulation input, b is 1, 2, …, L;Each accumulation input has corresponding weight value, and shift accumulator is used for carrying out shift accumulation calculation based on the weight value corresponding to each accumulation input value of L accumulation input.
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