Command processing circuit and data processing circuit

By using a target flip-flop in the command processing circuit of the memory chip to reset the start and end positions of the internal write command, the problem of low data write accuracy is solved, and higher data write accuracy is achieved.

CN117095711BActive Publication Date: 2026-07-03CHANGXIN MEMORY TECH INC
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202210521967.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-13
Publication Date
2026-07-03
Estimated Expiration
2042-05-13

AI Technical Summary

Technical Problem

In the existing technology, memory chips have the problem of low data writing accuracy during the data writing process, especially when the pulse width of the internal write command is 2 clock cycles, which may lead to repeated sampling and data writing errors.

Method used

A command processing circuit is employed, comprising multiple flip-flops arranged in sequence. The start and/or end positions of the internal write command are reset by the target flip-flop. The overlap between the effective level of the target flip-flop and the target time is utilized to avoid repeated sampling caused by changes in the rising or falling edge.

Benefits of technology

This improves the accuracy of data writing, avoids repeated sampling caused by pulse width variations, and ensures the accuracy of data writing.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117095711B_ABST
    Figure CN117095711B_ABST
Patent Text Reader

Abstract

This application provides a command processing circuit and a data processing circuit, including: multiple flip-flops, the output of one flip-flop being connected to the input of the next flip-flop, used to sample internal write commands input to the command processing circuit according to the switching of a data strobe signal to obtain a sampling command for data sampling processing. The output of a target flip-flop is connected to the target terminal of the first flip-flop. The target flip-flop is a flip-flop whose output effective level overlaps with the target time, where the target time is the start and end time of the internal write command pulse. The target flip-flop is used to reset the internal write command in the first flip-flop by outputting an effective level. This application uses the target flip-flop to reset the start and / or end position of the internal write command in the first flip-flop, which can avoid repeated sampling of the internal write command due to rising edge or falling edge variations, thus improving the accuracy of data writing.
Need to check novelty before this filing date? Find Prior Art

Citation Information

Patent Citations

  • Data input circuit

    CN102281051A

  • an input / output circuit and a memory device supporting a multi-input shift register function

    CN109584944A