Method for multi-path rendering of software computing GPU based on PSOC

Abstract

The PSOC-based software computing GPU multi-path drawing method of the present application is suitable for image display of a multi-path airborne display system, and character images of any path are processed by a character picture generation module at the PS end and a video generation module at the PL end, and are output and displayed on a display of the airborne display system, greatly improving the integration of the system.

Description

Technical Field

[0001] This invention belongs to the technical field of character video image processing and display in display devices, and particularly relates to a method for software computing GPU multi-path rendering based on PSOC. Background Technology

[0002] Airborne display systems serve as the window through which pilots obtain flight attitude parameters and maintain flight control. Helmet-mounted displays, head-up displays, and downward-facing displays, as important human-machine interface devices, transform flight parameter information into displayed information, providing pilots with intuitive flight guidance.

[0003] Airborne display systems are characterized by customized video formats, diverse video interface types, and high integration requirements. The video resolutions, timing sequences, and output interfaces supported by hardware GPU platforms are typically not directly usable to drive airborne display devices; instead, video processing must be performed via FPGAs, increasing hardware overhead. PSOC chips integrate the PS side of a multi-core ARM processor and the PL side of programmable logic. Processing video displays using PSOC chips offers significant advantages, resulting in high hardware integration and a larger footprint for the display system. Summary of the Invention

[0004] In view of this, the present invention provides a software-based GPU multi-processing method for rendering multiple character images using a PSOC. The PS end simulates the GPU to generate multiple character images through software calculation, and the PL end converts the multiple character images into video streams for output, which greatly improves the system integration and has high practical value.

[0005] This paper provides a method for multi-channel rendering using a software computing GPU based on a PSOC, which is suitable for image display in multi-channel airborne display systems. The character image of any channel is processed by the character image generation module on the PS end and the video generation module on the PL end, and then output and displayed on the monitor of the airborne display system.

[0006] The beneficial effects of the present invention are as follows:

[0007] Leveraging the high integration and flexibility of the PSOC chip, the multi-core ARM on the PS side is used to generate multiple character images, while the logic resources on the PL side are used to generate and encode multiple character video images. The hardware architecture of a single PSOC chip is used to draw and output multiple character video images, and can drive display devices with different interfaces. This reduces the size of the video processing circuit and improves the integration of the airborne display device. Attached Figure Description

[0008] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a schematic diagram of the software computing GPU multi-path rendering structure based on PSOC implemented in this invention;

[0010] Figure 2 This is a specific embodiment of the software computing GPU multi-path rendering based on PSOC implemented in this invention. Detailed Implementation

[0011] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0012] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. This disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0013] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionalities besides one or more of the aspects set forth herein.

[0014] like Figures 1 to 2The software computing GPU multi-processing method based on PSOC shown is applicable to image display in multi-channel airborne display systems. The character image of any channel (e.g., head-up display character image, lower display character image) is processed by the character image generation module on the PS end and the video generation module on the PL end, and then output to the display on the airborne display system. That is, a typical circuit board drives two displays, thereby improving integration.

[0015] As a specific implementation method provided in this case, the character image generation module includes a software computing GPU character drawing unit, a video frame buffer unit, and a video frame scheduling unit, wherein...

[0016] The software computing GPU character drawing unit is used to draw character images from any channel of character image data using the software computing GPU, and the pixel format of the character image is Mono 8 or RGB565; generally, the software computing GPU simulation program can be selected to run in single-core single-thread or dual-core dual-thread.

[0017] The video frame buffer unit is used to store the character image data generated by the GPU character drawing unit, and is virtually divided into three frame buffer areas, such as a segment of uncache space allocated in memory;

[0018] The video frame scheduling unit is used to write the character image data drawn by the software computing GPU character drawing unit into the video frame buffer unit. The three frame buffer areas are stored in a cyclical overlay sequential manner using a three-frame buffer round-robin scheduling algorithm. For example, each storage area of ​​the three frame buffer areas in the video frame buffer unit is numbered 1, 2, and 3, and the character image is repeatedly written into the corresponding frame buffer area of ​​the video buffer unit in the order of 1-2-3-1.

[0019] As a specific implementation method provided in this case, the video generation module includes a video frame storage reading unit, a pixel format conversion unit, a video timing generation unit, an RGB video stream output unit, and a video encoding unit, wherein...

[0020] The video frame buffer reading unit is used to read data from the three frame buffer areas through direct memory access (e.g., direct access using DMA), and convert the read character frame data into video stream data;

[0021] The pixel format conversion unit is used for format conversion of video stream data, and converts it to RGB888 pixel format;

[0022] The video timing generation unit is used to generate the pixel clock and timing information required for the video from the format-converted data;

[0023] The RGB video stream output unit is used to generate parallel video in RGB888 format from the pixel clock and timing information and the video stream data from the video frame buffer read unit;

[0024] The video encoding unit is used to convert parallel video into serial video and output it.

[0025] Furthermore, the serial data includes video in LVDS, DVI, or ARI NC818 format, and the maximum number of channels supported for multi-draw is the number of ARM cores of the selected PSOC.

[0026] For example

[0027] like Figure 2 As shown, this is used to drive a green head-up display with one DVI interface and a color downward-facing display with one LVDS interface. In this embodiment, the PSOC chip is the FMQL45T900. Both character display channels consist of a character display generation module on the PS side and a video generation module on the PL side. The character display generation module comprises a software-based GPU character drawing unit, a video frame buffer unit, and a video frame scheduling unit. The video generation module comprises a video frame buffer reading unit, a pixel format conversion unit, a video timing generation unit, an RGB video stream output unit, and a video encoding unit. Specifically...

[0028] 1) The software computing GPU character drawing unit completes the character drawing by performing symbol drawing and other processing steps through the software GPU. In this embodiment, the software computing GPU character drawing unit driving the head-up display is selected to run in dual threads, and the pixel format of the character image is Mono 8; in this embodiment, the software computing GPU character drawing unit driving the downward display is selected to run in single threads, and the pixel format of the character image is RGB565; the video frame buffer unit is a segment of uncache space allocated in memory, which is virtualized into three frame buffer areas.

[0029] 2) The video frame scheduling unit writes the character image data drawn by the GPU character drawing unit into the video frame buffer unit. The writing process adopts a three-frame buffer round-robin scheduling algorithm. The three-frame buffer round-robin scheduling algorithm numbers the three frame buffer areas in the video frame buffer unit as 1, 2, and 3, and writes the character image into the corresponding frame buffer area of ​​the video buffer unit in the order of 1-2-3-1.

[0030] 3) The video frame buffer reading unit reads data from the frame buffer area via direct memory access (DMA) and converts it into video stream data. The pixel format conversion unit receives the video stream data from the video frame buffer reading unit and concatenates the video stream data into RGB888 pixel format;

[0031] 4) The video timing generation unit generates the pixel clock required for the video and generates the timing information of the video. The RGB video stream output unit receives the video stream data from the pixel format conversion unit and the video timing information from the video timing generation unit, and generates parallel video in RGB888 format;

[0032] 5) The video encoding unit outputs parallel video in RGB888 format. In this embodiment, the video encoding unit driving the head-up display encodes it into DVI format video output; in this embodiment, the video encoding unit driving the downward display encodes it into LVDS format video output.

[0033] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method for multi-channel rendering using a software-based GPU implemented with a PSOC, applicable to image display in multi-channel airborne display systems, characterized in that, Each character image is processed by one of the multiple character image generation modules on the PS end and one of the multiple video generation modules on the PL end. Any two character images are processed using different character image generation modules and different video generation modules, and then output to the onboard display system's monitor. The maximum number of supported multi-channel rendering channels is equal to the number of ARM cores in the selected PSOC. The character image generation module includes a software computing GPU character rendering unit, a video frame buffer unit, and a video frame scheduling unit. The software computing GPU character drawing unit is used to complete the symbol drawing of the character image from any channel of character image data through the software computing GPU, and the pixel format of the character image is Mono 8 or RGB565. The video frame buffer unit is used to store character image data generated by the software-calculated GPU character rendering unit, and is virtually divided into three frame buffer areas; The video frame scheduling unit is used to write the character image data drawn by the software computing GPU character drawing unit into the video frame buffer unit. The three frame buffer areas are used for cyclic covering sequential storage using a three-frame buffer round-robin scheduling algorithm. The video generation module includes a video frame buffer reading unit, a pixel format conversion unit, a video timing generation unit, an RGB video stream output unit, and a video encoding unit. The video frame buffer reading unit reads data from three frame buffer areas via direct memory access and converts the read character image data into video stream data. The pixel format conversion unit converts the video stream data into RGB888 pixel format. The video timing generation unit generates pixel clocks and timing information required for the video based on the converted data. The RGB video stream output unit generates parallel RGB888 format video from the pixel clocks, timing information, and video stream data from the video frame buffer reading unit. The video encoding unit converts the parallel video into serial video and outputs it.

2. The method according to claim 1, characterized in that, The serial video includes videos in LVDS, DVI, or ARINC818 formats.

3. The method according to claim 1, characterized in that, The software-based GPU simulation program can be run in single-core single-thread or dual-core dual-thread mode.

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