Online upgrading method for non-reset single-chip microcomputer with code running in RAM (random access memory)

Abstract

The invention discloses an online upgrading method for a single-chip microcomputer with codes running in an RAM (random access memory) without resetting, and relates to the technical field of embedded software, a flash memory is divided into two storage areas, and the RAM is divided into a variable area, two interrupt vector table areas and two code areas. When the single-chip microcomputer is powered on, codes run in the first flash memory storage area and the first RAM code area. And after receiving the upgrade package, writing the upgrade package into the second flash memory storage area. After upgrading is finished, the RAM area of the second flash memory storage area is processed and migrated to the second RAM code area, meanwhile, the interrupt vector table is processed and migrated to the second RAM interrupt vector table area, and new firmware codes are stored in the second flash memory storage area, the second RAM code area and the second RAM interrupt vector table area. And then exchanging codes of the first flash memory area and the second flash memory area, and pointing an interrupt vector table pointer to a second RAM interrupt vector table area, thereby realizing real-time updating of firmware of the flash memory area and the RAM area of the single-chip microcomputer without resetting.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded software, and particularly to an online upgrade method for code running in RAM without resetting a single-chip microcomputer. Background Art

[0002] As the advantages of digital power products become more and more obvious, more and more power supply solutions use single-chip microcomputers. Due to the continuous technological innovation of major power supply manufacturers and the continuous introduction of new products, the online upgrade function has become a standard feature of digital power supplies. Driven by customers, power supplies with the ability to update firmware without resetting have gradually become a requirement for customers to purchase.

[0003] There are still many pain points in the online upgrade of single-chip microcomputers without resetting. For example, it only supports updating code in the flash memory area. In order to improve the program running speed, code in RAM can either be given up or placed in the flash memory area to reduce the running speed. This kind of problem limits the development of power supplies adopting the online upgrade scheme without resetting towards high power and high response directions. Therefore, it is particularly important to invent an online upgrade method for code running in RAM without resetting a single-chip microcomputer.

[0004] The prior art also has the following disadvantages, specifically manifested as:

[0005] 1. In the prior art, usually only the code in the flash memory area can be updated. For the code stored in RAM, online upgrade cannot be achieved. Some codes with high performance requirements are stored in RAM, and the inability to update these codes will make the system difficult to adapt to new functional requirements or performance optimization, resulting in limited upgrade capabilities of the system, restricting the flexibility of the system, affecting the running speed of the program, and being unable to meet the requirements for high performance and high real-time performance.

[0006] 2. In the prior art, when upgrading the firmware of a single-chip microcomputer, it is necessary to reset the single-chip microcomputer, resulting in the interruption of user code during the upgrade process, leading to data loss, short-term system out-of-control or interruption of the work process, affecting the stability and reliability of the entire system. Moreover, different devices require different programming tools and processes, lacking a unified and automated upgrade process, resulting in tight system resources and even resource conflicts, affecting the execution of other tasks. Summary of the Invention

[0007] The purpose of the present invention is to provide an online upgrade method for code running in RAM without resetting a single-chip microcomputer, which solves the problems in the background art.

[0008] To solve the above technical problems, the present invention adopts the following technical solutions: The present invention provides an online upgrade method for code running in RAM without resetting a single-chip microcomputer, including: Step 1, receiving and storing a new firmware package.

[0009] Step 2, update the entry address of the interrupt vector table.

[0010] Step 3, modify the entry address of the firmware.

[0011] Step 4, perform the first mapping swap and interrupt vector table redirection.

[0012] Step 5, update the first flash memory storage area.

[0013] Step 6, copy relevant information to the first RAM area.

[0014] Step 7, perform the final mapping swap and interrupt vector table redirection.

[0015] Preferably, the method for receiving and storing the new firmware package is as follows: While the single-chip microcomputer runs the functional code in bank1 of the first flash memory storage area, it receives the new firmware package transmitted from the host computer and writes it into bank2 of the second flash memory storage area. During the entire upgrade process, the user code can run uninterruptedly in the flash memory and the RAM area.

[0016] Preferably, the method for updating the entry address of the interrupt vector table is as follows: Put the changed entry address of the bank2 interrupt vector table in bank2 of the second flash memory storage area after updating the new firmware into the second RAM interrupt vector table area in the RAM.

[0017] Preferably, the method for modifying the entry address of the firmware is as follows: Use the program to change the entry address in the bank2 transfer RAM code area pointing to the first RAM code area to point to the second RAM code area, and change the entry address of the first RAM code area in the bank2 interrupt vector table to point to the second RAM code area to ensure that when running in bank2 of the second flash memory storage area, the code in the second RAM code area can be run.

[0018] Preferably, the method for mapping swap and interrupt vector table redirection is as follows: Map and swap bank1 of the first flash memory storage area and bank2 of the second flash memory storage area, and point the interrupt vector table pointer to the starting address of the second RAM interrupt vector table area.

[0019] The mapping swap refers to swapping the code addresses of bank1 of the first storage area and bank2 of the second memory.

[0020] Preferably, the method for updating the first flash memory storage area is as follows: After part of the initialization is run, write the new firmware in bank2 of the second flash memory storage area into bank1 of the first flash memory storage area.

[0021] Preferably, the method for copying the relevant information to the first RAM area is as follows: copy the bank1 interrupt vector table to the first RAM interrupt vector table area, and copy the bank1 transfer RAM code area to the first RAM code area.

[0022] Preferably, the method for the final mapping swap and interrupt vector table redirection is as follows: map and swap the first flash memory bank1 and the second flash memory bank2, and point the interrupt vector table pointer to the start address of the first RAM interrupt vector table area.

[0023] The beneficial effects of the present invention are as follows: 1. In the present invention, it supports the update of the flash memory area, and also cleverly realizes the update of the code stored in the RAM through a series of steps. The code stored in the RAM can be updated without affecting the normal operation of the system. By dividing the flash memory into bank1 and bank2 and reasonably partitioning the RAM, the flexible use and update of the storage area are realized. There is no need for manual intervention to transfer the code in the RAM to the flash memory, which improves the efficiency and accuracy of code update, and at the same time does not affect the system performance, the upgradeability and adaptability of the system, enabling the system to be more convenient for function expansion and performance optimization.

[0024] 2. In the present invention, the entire upgrade process is relatively automated. Through a series of clear steps, the complexity of manual operation and the possibility of errors are reduced. Only need the host computer to provide an upgrade package to complete the online upgrade, reducing the dependence on professional personnel. Through reasonable storage area management and operation, the overoccupation of system resources during the upgrade process is avoided, improving the utilization efficiency of system resources, ensuring the stability of system performance, enabling the system to perform other tasks normally while upgrading, and meeting the requirements of multitasking. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0026] Figure 1 It is a schematic flow chart of the implementation steps of the method of the present invention.

[0027] Figure 2 It is a schematic diagram of the RAM and flash memory partitions and addresses provided by the embodiment of the present invention.

[0028] Figure 3This is a complete flowchart diagram of an online upgrade method for code to run in RAM without resetting the microcontroller provided by an embodiment of the present invention.

[0029] Figure 4 This is a data flowchart diagram of an online upgrade method for code to run in RAM without resetting the microcontroller provided by an embodiment of the present invention. Detailed implementation manners

[0030] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0031] Refer to Figure 1 As shown, the present invention provides an online upgrade method for code to run in RAM without resetting the microcontroller, including: Step 1, receiving and storing a new firmware package.

[0032] Online upgrade without resetting the microcontroller means receiving, writing upgrade data, and switching from the old firmware to the new firmware while running the power functional code, and the power output and response ability are maintained throughout the process.

[0033] In a specific embodiment, the method for receiving and storing the new firmware package is specifically implemented as follows: While the microcontroller runs the functional code in the first flash memory storage area bank1, it receives the new firmware package transmitted from the host computer and writes it into the second flash memory storage area bank2. During the entire upgrade process, the user code can run uninterruptedly in the flash memory and the RAM area.

[0034] Refer to Figure 3 , after the microcontroller is powered on for the first time, it will determine that it is in the first storage area, which is the first initialization, and global initialization will be performed. After receiving the upgrade package, while running the functional application code in the first flash memory storage area, it is updated into the second flash memory storage area.

[0035] The microcontroller flash memory is divided into two parts: the first flash memory storage area bank1 and the second flash memory storage area bank2, and both operating areas can run code independently. Among them, the first flash memory storage area bank1 is the default startup operating area, and the microcontroller will default to start from the first flash memory storage area bank1 when powered on. During the operation of the code in the first flash memory storage area bank1, the upgrade firmware can be erased and written into the second flash memory storage area bank2 without interference. Each flash memory storage area has an interrupt vector table and a transfer RAM code area is divided to store the code to be run in the RAM.

[0036] The single-chip microcomputer RAM is divided into five parts, namely: the variable area for storing the stack and variables, the first RAM code area for storing the code of the first flash memory storage area, the second RAM code area for storing the code of the second flash memory storage area, the first RAM interrupt vector table area for storing the interrupt vector table of the first flash memory storage area, and the second RAM interrupt vector table area for storing the interrupt vector table of the second flash memory storage area.

[0037] Reference Figure 2 , the flash memory area addresses range from 0x08000000 to 0x0807FFFF, where the first flash memory storage area addresses range from 0x8000000 to 0x0803FFFF, where the transfer RAM code area addresses range from 0x08011000 to 0x08016000, the second storage area ranges from 0x8040000 to 0x0807FFFF, where the transfer RAM code area addresses range from 0x08051000 to 0x08056000. The RAM area ranges from 0x20000000 to 0x20020000, where the variable area ranges from 0x20000000 to 0x20010000, the first interrupt vector table area ranges from 0x20010000 to 0x200107FF, the second interrupt vector table area ranges from 0x20010800 to 0x20010FFF, the first RAM code area ranges from 0x20011000 to 0x20015FFF, and the second RAM code area ranges from 0x20016000 to 0x2001AFFF. The sizes of the transfer RAM code areas of the above-mentioned first flash memory storage area and second flash memory storage area are the same as those of the first RAM code area and second RAM code area in the RAM because they are corresponding.

[0038] The single-chip microcomputer has the function of writing firmware to the flash memory and runs in the first flash memory storage area. When erasing and writing code to the second storage area, it can be carried out simultaneously with the power operation functional code. At the same time, the single-chip microcomputer has the function of reading the flash memory firmware and writing it to the RAM, and when writing to the RAM, it does not need to be erased and can be written directly.

[0039] Step 2, update the entry address of the interrupt vector table.

[0040] In a specific embodiment, the method for updating the entry address of the interrupt vector table is specifically implemented as follows: The changed entry address of the bank2 interrupt vector table of bank2 in the second flash memory storage area after updating the new firmware is placed in the second RAM interrupt vector table area in the RAM.

[0041] In the present invention, the update of the flash memory storage area is supported, and the update of the code stored in the RAM is ingeniously realized through a series of steps. The code stored in the RAM can be updated without affecting the normal operation of the system. By dividing the flash memory into bank1 and bank2 and reasonably partitioning the RAM, the flexible use and update of the storage area are achieved. There is no need for manual intervention to transfer the code in the RAM to the flash memory, which improves the efficiency and accuracy of code update, and at the same time does not affect the system performance, upgradeability and adaptability of the system, enabling the system to be more conveniently extended in function and optimized in performance.

[0042] Reference Figure 4 , after the update and check are completed, the interrupt vector table needs to be copied from the second flash memory storage area to the second RAM interrupt vector table area, and when copying, the function address in the interrupt vector table pointing to the RAM1 code area needs to be changed to the function address pointing to the RAM2 code area, so that the interrupt function can run from the new firmware RAM2 code area after the interrupt is triggered.

[0043] Step three, modify the firmware entry address.

[0044] In a specific embodiment, the method for modifying the firmware entry address is specifically implemented as follows: Use a program to change the entry address in the RAM code area of bank2 pointing to the first RAM code area to the entry address pointing to the second RAM code area, and change the entry address of the first RAM code area in the bank2 interrupt vector table to the entry address pointing to the second RAM code area to ensure that when running in the second flash memory storage area bank2, the code in the second RAM code area can be run.

[0045] Reference Figure 4 , after changing the address code in the transfer RAM code area of the second flash memory storage area pointing to the first RAM code area to the address code pointing to the second RAM code area, copy it into the second RAM code area.

[0046] The burn-in file and upgrade package compiled by the compilation software are only applicable to the case of running code in the first flash memory storage area and the first RAM code area. Therefore, after refreshing the firmware to the second flash memory storage area, the code needs to be migrated from the transfer RAM code area in the flash memory storage area to the RAM code area and the code address needs to be changed, so that the original address pointing to the RAM1 code area becomes the address pointing to the RAM2 code area. The program will change the function address in the RAM1 code area pointing to the RAM1 code area to the function address pointing to the RAM2 code area, so that the function can run from the new firmware RAM2 code area after the code switches to the second flash memory storage area.

[0047] Step four, first mapping swap and interrupt vector table redirection.

[0048] In a specific embodiment, the mapping interchange and interrupt vector table redirection are specifically implemented as follows: interchange the first flash memory storage area bank1 and the second flash memory storage area bank2, and point the interrupt vector table pointer to the starting address of the second RAM interrupt vector table area.

[0049] After the copying process is completed, the first flash memory storage area will be interchanged with the second flash memory storage area. The microcontroller core will obtain the code from the second flash memory storage area. After swapping to the second storage area, immediately modify the interrupt vector table pointer register to change the interrupt vector table address to the second RAM interrupt vector table area address, which is 0x20010800 in the example. After an interrupt occurs, the interrupt address will be obtained from the interrupt vector table in the second RAM interrupt vector table area, and then the interrupt function new firmware code in the second RAM code area will be run.

[0050] The mapping interchange refers to swapping the code addresses of the first storage area bank1 and the second memory bank2. The addresses originally from 0x08000000 to 0x0803FFFF are swapped with the addresses from 0x08040000 to 0x0807FFFF, and the switching time is very short, without affecting the normal operation of the microcontroller program.

[0051] Interchange the first flash memory storage area and the second flash memory storage area so that the microcontroller core obtains the code from the second flash memory storage area. Point the interrupt vector table pointer register to the second RAM interrupt vector table area so that the interrupt address is obtained from the second RAM interrupt vector table area after an interrupt is triggered. The above steps cause the firmware running area to be transferred to the second flash memory storage area, the second RAM code area, and the second RAM interrupt vector table area after the microcontroller updates the firmware.

[0052] When the system starts to run the new firmware in the second flash memory storage area, it will determine that it is in the second storage area and perform partial initialization of peripherals and variables.

[0053] Step five, update the first flash memory storage area.

[0054] In a specific embodiment, the update of the first flash memory storage area is specifically implemented as follows: after running partial initialization, write the new firmware of the second flash memory storage area bank2 into the first flash memory storage area bank1.

[0055] Step six, copy relevant information to the first RAM area.

[0056] In a specific embodiment, the copying of relevant information to the first RAM area is specifically implemented as follows: copy the bank1 interrupt vector table to the first RAM interrupt vector table area, and copy the bank1 transfer RAM code area to the first RAM code area.

[0057] Copy the new firmware of the second flash storage area to the first flash storage area. After the copy verification is completed, copy the converted RAM area code of the first storage area directly into the first RAM area, and copy the interrupt vector table of the first flash storage area to the first RAM interrupt vector table area. Since the upgrade needs to be restored to the original state, the new firmware of the second flash storage area needs to be copied to the first flash storage area. Since the address in the upgrade firmware defaults to the address of the first flash storage area and the address of the first RAM code area, there is no need to change the address code when copying the transfer RAM code area of ​​the first flash storage area to the first RAM code area and the interrupt vector table of the first flash storage area to the first RAM interrupt vector table area. After the copying is completed, the second flash storage area is ready to switch to the first flash storage area.

[0058] Step seven, final mapping swap and interrupt vector table redirection.

[0059] In a specific embodiment, the final mapping swap and interrupt vector table redirection are specifically implemented by mapping and swapping the first flash memory storage area bank1 and the second flash memory storage area bank2, and pointing the interrupt vector table pointer to the first address of the first RAM interrupt vector table area.

[0060] When the switch is ready, the second flash storage area and the first flash storage area will be mapped and swapped, and the interrupt vector table pointer register will store the address of the first RAM interrupt vector table area. When an interrupt occurs, the interrupt address will be obtained from the first RAM interrupt vector table area, and the interrupt program of the first flash storage area and the first RAM code area will be run. When the system determines that it is in the first storage area and it is not the first initialization, it will perform partial initialization of peripherals and variables and run normal functional code. At this point, the upgrade is completed, and the microcontroller exits the upgrade mode and waits for the next upgrade instruction to be issued.

[0061] In the present invention, the entire upgrade process is relatively automated, and through a series of clear steps, the complexity of manual operation and the possibility of error are reduced. Only an upgrade package is required from the host computer to complete the online upgrade, which reduces the dependence on professionals. Through reasonable storage area management and operation, excessive occupation of system resources during the upgrade process is avoided, the utilization efficiency of system resources is improved, and the stability of system performance is ensured, so that the system can perform other tasks normally while upgrading, meeting the needs of multi-tasking.

[0062] The above contents are merely examples and explanations of the concept of the present invention. Those skilled in the art may make various modifications or additions to the specific embodiments described or replace them in a similar manner. As long as they do not deviate from the concept of the invention or exceed the scope defined by the present invention, they shall all fall within the protection scope of the present invention.

Claims

1. An online upgrade method for a single-chip microcomputer in which the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The following steps are involved: Step 1: Receive and store the new firmware package; Step 2: Update the interrupt vector table entry address; Step 3: Modify the firmware entry address; Step 4: first mapping swap and interrupt vector table redirection; Step 5, updating the first flash memory storage area; Step 6, copy the relevant information to the first RAM area; Step seven, final mapping swap and interrupt vector table redirection.

2. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the microcontroller, characterized in that: The receiving and storing of the new firmware package is specifically implemented as follows: While the MCU is running the functional code in the first flash storage area bank1, it receives the new firmware package from the host computer and writes it into the second flash storage area bank2. During the entire upgrade process, the user code can run uninterruptedly in the flash and RAM areas.

3. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The updating interrupt vector table entry address is specifically implemented as follows: The bank2 interrupt vector table of the second flash memory bank2 after updating the new firmware is changed into the second RAM interrupt vector table area in the RAM.

4. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The specific implementation method of modifying the firmware entry address is as follows: Use a program to change the entry address pointing to the first RAM code area in the bank2 transfer RAM code area to the entry address pointing to the second RAM code area, and change the entry address of the first RAM code area in the bank2 interrupt vector table to the entry address pointing to the second RAM code area to ensure that the code of the second RAM code area can be executed when running in the second flash storage area bank2.

5. The online upgrade method of claim 3 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The mapping exchange and interrupt vector table redirection are specifically implemented as follows: Map and swap the first flash memory storage area bank1 and the second flash memory storage area bank2, and point the interrupt vector table pointer to the first address of the second RAM interrupt vector table area; The mapping exchange refers to exchanging the code addresses of the first storage area bank1 and the second storage area bank2.

6. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The updating of the first flash memory storage area is specifically implemented as follows: After the running part is initialized, the new firmware of the second flash memory storage area bank2 is written into the first flash memory storage area bank1.

7. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The specific implementation method of copying the relevant information to the first RAM area is as follows: The interrupt vector table of bank1 is copied to the first RAM interrupt vector table area, and the transfer RAM code area of ​​bank1 is copied to the first RAM code area.

8. The online upgrade method of claim 1 wherein the code runs in RAM without resetting the single-chip microcomputer, characterized in that: The final mapping swap and interrupt vector table redirection are specifically implemented as follows: The first flash memory storage area bank1 and the second flash memory storage area bank2 are mapped and swapped, and the interrupt vector table pointer points to the first address of the first RAM interrupt vector table area.

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