Design rule checking method and system and readable storage medium
By translating the marking graphics coordinate information of the DRC file into polygon parameters and performing logical operations, the problem of difficult to determine the changes in the design layout is solved, design efficiency and quality are improved, and the success rate of chip manufacturing is ensured.
Patent Information
- Application Number
- CN202510559428.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-29
- Publication Date
- 2025-08-12
AI Technical Summary
In the prior art, it is difficult for design engineers to quickly and accurately judge the changes in the design layout, resulting in inefficient design processes and easy to miss rule checks, which affects the success rate of chip manufacturing.
By converting the coordinate information of the marking graphic in the DRC file into polygon parameters and performing logical operations, the comparison results between design layouts are obtained to determine whether the design rules meet expectations.
It improves the efficiency of design layout inspection, reduces the error rate of engineers, ensures design quality, and ensures the success rate of subsequent chip manufacturing.
Smart Images
Figure CN120471009A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a design rule checking method, system and readable storage medium. Background Art
[0002] In chip design, the primary function of DRC (Design Rule Check) is to verify that the various physical designs within the chip layout comply with the process constraints of the manufacturing process. Chip manufacturing involves tiny dimensions and precise manufacturing processes. If the design does not comply with these rules, the chip may not be manufactured correctly during production, or even malfunction. DRC checks every physical element in the chip design (such as circuits, components, and contacts) to ensure that their size, spacing, and layout meet the requirements.
[0003] If the layout design violates any rules, the DRC tool generates a file that identifies the problem and provides solutions. Through DRC checking, design engineers can identify and fix design issues, ensuring the layout can successfully pass manufacturing. This not only prevents production errors but also improves chip reliability and performance.
[0004] When design engineers check the Design Rule of the Layout, they usually perform DRC on the design layout before and after the modification, such as Figure 1 and Figure 2 It is the file output by DRC of the design layout. First, the number of rules is compared through the report file, such as Figure 2 The report file is used to obtain the changes in the quantity before and after the design layout is modified, and then the results of the ASCII format file are imported with the help of the layout tool to show it, as shown in the following example: Figure 1 The ASCII format file shown is used to determine changes in the position of rule markers. By combining the two, design engineers can determine the changes in the design layout and then evaluate whether the changes comply with the design rules. This evaluation method involves a large number of rules, is time-consuming and inefficient, and is extremely easy to miss rule checks. It is also impossible to quickly locate the changed layout areas for verification, which increases the risk in subsequent processes, affecting the tapeout schedule at the least, and even causing mask loss at the worst.
[0005] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art. Summary of the Invention
[0006] The object of the present invention is to provide a design rule checking method, system and readable storage medium to solve the problem of difficulty in determining changes in design layout.
[0007] To solve the above technical problems, the present invention provides a design rule checking method, comprising:
[0008] Provide at least two design layouts, and output corresponding DRC files of the design layouts after DRC;
[0009] Translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, and performing logical operations to obtain comparison results between the DRC files;
[0010] The differences between the design layouts are read according to the comparison results to determine whether the design rules of the design layouts meet expectations.
[0011] Preferably, providing two design layouts includes: providing a first design layout, and modifying the first design layout to obtain a second design layout.
[0012] Preferably, when the design rules of the design layout do not meet expectations, the design layout is modified, and the design layouts before and after the modification are used as the first design layout and the second design layout respectively, and logical operations are performed again to obtain the comparison results between the corresponding DRC files, and the differences between the design layouts are read until the design rules of the modified design layout meet expectations.
[0013] Preferably, the DRC files are all in ASCII format.
[0014] Preferably, an XOR gate or a NOT gate is used to perform logical operations on the polygon parameters.
[0015] Preferably, the comparison results are also compiled into a report file and / or ASCII format for reading the differences between the design layouts.
[0016] Preferably, after the marker graphic coordinate information recorded in the DRC file is translated into polygon parameters respectively, the corresponding relationship between the design rule name and the level is also output for compiling the comparison result.
[0017] A design rule checking system, comprising:
[0018] A DRC processing module, used for performing DRC processing on at least two design layouts and outputting corresponding DRC files;
[0019] A translation module, configured to receive the DRC file and translate the marker graphic coordinate information recorded in the DRC file into polygon parameters;
[0020] A logic operation module, configured to perform logic operations on the polygon parameters and output a comparison result between the DRC files;
[0021] The review module is configured to read the differences between the design layouts according to the comparison results to determine whether the design rules of the design layouts meet expectations.
[0022] Preferably, the DRC file is in ASCII format, and the design rule checking system further includes a compilation module for compiling the comparison results into ASCII format and / or report files, and outputting them to the review module to read the differences between the design layouts.
[0023] Preferably, after translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, the translation module further outputs the corresponding relationship between the design rule name and the hierarchy for compiling the comparison result.
[0024] A readable storage medium stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor is enabled to execute the above-mentioned design rule checking method.
[0025] In the design rule checking method provided by the present invention, the DRC files output by the two design layouts are compared, the marked graphic coordinate information is translated into polygon parameters (polygon), and logical operations are performed on the polygon parameters. This can quickly obtain changes in the design layout, more intuitively reflect the changes in DRC caused by Layout changes, reduce the error rate of engineers in the design process, improve design efficiency, ensure the quality of the design, and provide technical guarantees for subsequent successful mass production, thereby solving the problem.
[0026] The design rule checking system provided by the present invention and the design rule checking method provided by the present invention belong to the same inventive concept. Therefore, the design rule checking system provided by the present invention has at least all the advantages of the design rule checking method provided by the present invention, which will not be repeated here.
[0027] The readable storage medium provided by the present invention and the design rule checking method provided by the present invention belong to the same inventive concept. Therefore, the readable storage medium provided by the present invention has at least all the advantages of the design rule checking method provided by the present invention, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.
[0029] Figure 1 This is a schematic diagram of the ASCII format file output by the existing layout DRC;
[0030] Figure 2 This is a diagram of the report file output by the existing layout DRC;
[0031] Figure 3 This is a code architecture diagram of the ASCII format file output by the layout design DRC;
[0032] Figure 4 This is a schematic diagram of a layout design for converting an ASCII format file into a Polygon according to an embodiment of the present invention;
[0033] Figure 5 is a table of correspondence between ASCII and Polygon according to an embodiment of the present invention;
[0034] Figure 6 is a chart of input information required to be read according to an embodiment of the present invention;
[0035] Figure 7 It is a method of an embodiment of the present invention and its operating results;
[0036] Figure 8 This is a schematic diagram of a report file output by an embodiment of the present invention;
[0037] Figure 9 This is a schematic diagram of an ASCII format file output by an embodiment of the present invention;
[0038] Figure 10 is a schematic diagram of execution steps of an embodiment of the present invention;
[0039] Figure 11 This is a specific implementation flow chart of an embodiment of the present invention;
[0040] Figure 12 FIG. 4 is a schematic diagram of a system architecture according to another embodiment of the present invention. DETAILED DESCRIPTION
[0041] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.
[0042] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of such features. The term "proximal end" generally refers to the end closest to the operator, and the term "distal end" generally refers to the end closest to the patient. "One end" and "the other end" as well as "proximal end" and "distal end" generally refer to two corresponding parts, which include not only endpoints. The terms "mounted", "connected", and "connected" should be understood in a broad sense. For example, they can be fixedly connected, detachably connected, or integrated; they can be mechanically connected or electrically connected; they can be directly connected or indirectly connected through an intermediate medium; they can be internal communication between two elements or an interactive relationship between two elements. In addition, as used in the present invention, "one element is arranged on another element" generally only means that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element, and it should not be understood to indicate or imply a spatial positional relationship between the two elements, that is, one element can be in any position such as inside, outside, above, below, or to the side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0043] Research has found that when design engineers check the rules of the design layout, they often compare the design layout before and after the modification, and extract the relevant rule change information based on the DRC output results. Figure 1 and Figure 2 Under current circumstances, it is the DRC result file that the DRC tool can generate. It is also the conventional file used by engineers to judge DRC. One is the report file, such as Figure 2 As shown, the other is an ASCII format file, which is imported and shown by the layout tool, as shown Figure 1 As shown, for ASCII format files, layout tools can only highlight and cannot directly compare.
[0044] In addition, both output DRC files are text, and there is no readable data type, so effective comparison cannot be performed. For the DRC output results of the two design layouts, there is a lack of comparable data types. Design engineers can only compare the number of design rules through the report file first, then determine the changes in the mark position of the design rules, and then comprehensively judge whether the modified design layout meets the modification expectations.
[0045] Further research found that Figure 3 As shown in the figure, the structure of the ASCII format file output by DRC is roughly composed of the beginning (data topcell and data precision), the name of the rule, the time, the description of the rule, and the information used to mark specific graphic coordinate points. Among them, during the process of modifying the design layout, the marked graphic coordinate points can well represent the area where the design rule changes.
[0046] Based on this, the core idea of the present invention is that by translating the marked graphic coordinate information into polygon parameters (polygon) and performing logical operations on the polygon parameters, the changes in the design layout can be quickly obtained, and the changes in DRC caused by Layout changes can be more intuitively reflected, thereby reducing the error rate of engineers in the design process, improving design efficiency, ensuring design quality, and providing technical guarantees for subsequent successful mass production.
[0047] For details, please refer to Figure 4-12 , which is a schematic diagram of an embodiment of the present invention. Figure 10 As shown, a design rule checking method includes:
[0048] S1, providing at least two design layouts, wherein the design layouts are subjected to DRC and output corresponding DRC files.
[0049] S2, translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, and performing logical operations to obtain the comparison results between the DRC files.
[0050] S3, reading the differences between the design layouts according to the comparison result to determine whether the design rules of the design layouts meet expectations.
[0051] like Figure 3As shown, analysis of the DRC output results shows that it records information such as the name of the Rule, the description of the Rule, and the coordinate points of the marked graphics. The coordinate points as text cannot be directly compared. In this case, the coordinate information is translated into polygons (polygon parameters), and logical operations can be performed between graphics. The comparison results of the logical operations can relatively intuitively characterize the modifications to the design layout, thereby obtaining the DRC comparison results, which more intuitively reflect the changes in DRC caused by Layout changes, reduce the error rate of engineers in the design process, improve design efficiency, ensure the quality of the design, and provide technical guarantees for subsequent successful mass production. Among them, when design engineers perform Design Rule checks, they can spend only 1 / 4 of the original time, reduce the error rate when comparing DRC to 0, and ensure the efficiency and rigor of the design process.
[0052] In one embodiment, using the comparison of two design layouts as an example, providing two design layouts includes providing a first design layout and modifying the first design layout to obtain a second design layout. The first design layout can be a layout that generally complies with design rules and is suitable for mass production. Comparing the two layouts and analyzing the design layouts provides a good reference for subsequent modification and adjustment of design rules, and also provides technical assurance for subsequent successful mass production.
[0053] When the design rules of the design layout do not meet expectations, the design layout is modified, and the design layouts before and after the modification are respectively used as the first design layout and the second design layout. A logical operation is performed again to obtain the comparison results between the corresponding DRC files, and the differences between the design layouts are read until the design rules of the modified design layout meet expectations. Figure 11 As shown, after the logical operation is performed, the difference between the design layouts is read according to the comparison result to determine whether the design rules of the design layouts meet expectations, and when the design rules of the design layouts do not meet the expected required effects, the design layouts are modified again, and the DRC results are compared again using the method provided by the present invention until the required design layout is obtained.
[0054] The DRC files are all in ASCII format. The marker graphic coordinate information is filtered out from the ASCII format DRC file, and the marker graphic coordinate information recorded in the DRC file is translated into polygon parameters, such as Figure 4 As shown, it provides the basis for subsequent logical operations.
[0055] For example, an XOR gate or a NOT gate is used to perform logical operations on polygon parameters. Obviously, other similar logical operations can be introduced according to the modification of the design layout, or the designer's preset comparison logic can be introduced. No specific limitation is made here.
[0056] like Figure 5 As shown in the ASCII to Polygon correspondence diagram, after translating ASCII to Polygon, it is necessary to output the correspondence between the design rule name (rule name) and the layer (layer) to provide it to the subsequent program for compiling the logical operation results.
[0057] Specifically, after the marker graphic coordinate information recorded in the DRC file is translated into polygon parameters, the corresponding relationship between the design rule name and the layer is output for compiling the comparison result.
[0058] Furthermore, in the process of transferring the coordinate information of the marked graphics, it is also necessary to execute the program to read the corresponding information, such as the DRC files of the design layout before and after modification, the operation logic (XOR / NOT), and the file path of the output comparison result, such as Figure 6 The input information chart shown in the figure is as follows: Figure 7 shown.
[0059] It is understandable that the comparison results are also compiled into a report file and / or ASCII format for reading the differences between the design layouts. After completing the comparison of the two files, the design rule related information after the comparison is recompiled into ASCII format to facilitate the design engineer to view and judge. Similarly, it can also be translated into a corresponding report file, such as Figure 8 The diagram below shows how the program outputs logical operations and translates them into a report file. Figure 9 As shown in the figure, the output result of the program after performing DRC logic operation is translated into an ASCII format file.
[0060] In another embodiment provided by the present invention, a design rule checking system, such as Figure 12 Shown, including:
[0061] A DRC processing module, used for performing DRC processing on at least two design layouts and outputting corresponding DRC files;
[0062] A translation module, configured to receive the DRC file and translate the marker graphic coordinate information recorded in the DRC file into polygon parameters;
[0063] A logic operation module, configured to perform logic operations on the polygon parameters and output a comparison result between the DRC files;
[0064] The review module is configured to read the differences between the design layouts according to the comparison results to determine whether the design rules of the design layouts meet expectations.
[0065] The coordinate information is translated into a Polygon using the translation module. Logical operations such as NOT / XOR can be performed between the graphics. After the Polygon comparison is completed, the rule-related information after the comparison can be recompiled for viewing. Based on the comparison results, the differences between the design layouts are read to determine whether the design rules of the design layouts meet expectations. The entire process uses the translation-comparison-compilation method to obtain the final DRC comparison results, reducing the time spent by design engineers and the error rate during verification, improving design efficiency, ensuring design quality, providing a good reference for the modification and adjustment of design rules, and providing technical guarantees for subsequent successful mass production.
[0066] Specifically, the DRC file is in ASCII format. The design rule checking system further includes a compilation module for compiling the comparison result into an ASCII format and / or a report file, and outputting the result to the review module for reading the differences between the design layouts.
[0067] Specifically, after translating the marker graphic coordinate information recorded in the DRC file into polygon parameters, the translation module further outputs the corresponding relationship between the design rule name and the hierarchy for compiling the comparison result.
[0068] After performing the logical operation, the review module reads the differences between the design layouts according to the comparison results to determine whether the design rules of the design layouts meet expectations. When the design rules of the design layouts do not meet the expected effects, the design layouts are modified again and the DRC results are compared again using the method provided by the present invention until the required design layout is obtained.
[0069] In another embodiment of the present invention, a readable storage medium stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor is enabled to execute the above-mentioned design rule checking method.
[0070] Correspondingly, when relying on a readable storage medium to execute the above-mentioned design rule checking method, the design layout before and after the modification is DRCed separately through program settings, and an ASCII format DRC file is output; the necessary information such as the ASCII format DRC file to be compared, the logical operation method (NOT / XOR) and the file output path are input into the program; the program will automatically perform ASCII translation-operation-compilation, and output the final ASCII format file and report file. The design engineer will review the results and judge whether the LAYOUT design meets expectations based on the DRC comparison results. If it still does not meet the requirements, the engineer will continue to modify the LAYOUT and repeat the above steps.
[0071] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).
[0072] In the design rule checking method, system, and readable storage medium provided by the present invention, the DRC results of the Layout are compared through the translation-comparison-compilation method, which more intuitively reflects the changes in DRC caused by Layout changes, reduces the error rate of engineers in the design process, improves design efficiency, ensures design quality, and also provides technical guarantees for subsequent successful mass production.
[0073] The above description is only a description of the preferred embodiment of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the technical solution of the present invention.
Claims
1. A design rule checking method, characterized in that: include: Provide at least two design layouts, and output corresponding DRC files of the design layouts after DRC; Translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, and performing logical operations to obtain comparison results between the DRC files; The differences between the design layouts are read according to the comparison results to determine whether the design rules of the design layouts meet expectations.
2. The design rule checking method according to claim 1, wherein: Providing two design layouts includes: providing a first design layout, and modifying the first design layout to obtain a second design layout.
3. The design rule checking method according to claim 1, wherein: When the design rules of the design layout do not meet expectations, the design layout is modified, and the design layouts before and after the modification are respectively used as the first design layout and the second design layout. Logical operations are performed again to obtain comparison results between the corresponding DRC files, and the differences between the design layouts are read until the design rules of the modified design layout meet expectations.
4. The design rule checking method according to claim 1, wherein: The DRC files are all in ASCII format.
5. The design rule checking method according to claim 1, wherein: The comparison results are also compiled into a report file and / or ASCII format for reading the differences between the design layouts.
6. The design rule checking method according to claim 5, wherein: After translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, the corresponding relationship between the design rule name and the level is also output for compiling the comparison result.
7. A design rule checking system, characterized in that: include: A DRC processing module, used for performing DRC processing on at least two design layouts and outputting corresponding DRC files; A translation module, configured to receive the DRC file and translate the marker graphic coordinate information recorded in the DRC file into polygon parameters; A logic operation module, configured to perform logic operations on the polygon parameters and output a comparison result between the DRC files; The review module is configured to read the differences between the design layouts according to the comparison results to determine whether the design rules of the design layouts meet expectations.
8. The design rule checking system according to claim 7, wherein: The DRC file is in ASCII format. The design rule checking system further includes a compilation module for compiling the comparison results into ASCII format and / or a report file, and outputting the result to the review module to read the differences between the design layouts.
9. The design rule checking system according to claim 8, wherein: After translating the marker graphic coordinate information recorded in the DRC file into polygon parameters respectively, the translation module further outputs the corresponding relationship between the design rule name and the hierarchy for compiling the comparison result.
10. A readable storage medium, characterized in that: The readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the processor is enabled to execute the design rule checking method according to any one of claims 1 to 6.