Interpolation type time-to-digital converter based on pre-decision partial activation

By using an interpolation-type time-to-digital converter activated by a pre-decision part, the activation of the TDC is dynamically controlled, and the channel is activated only when necessary. This solves the problem of power waste in traditional TDC in low-power scenarios and achieves high-speed, low-power analog-to-digital conversion.

CN121864097AActive Publication Date: 2026-04-14SHANGHAI JIAOTONG UNIV
4 Cites 0 Cited by

Patent Information

Application Number
CN202512047257.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-04-14
Estimated Expiration
2045-12-31

AI Technical Summary

Technical Problem

Traditional high-speed time-domain analog-to-digital converters (ADCs) activate unnecessary time-domain conversion (TDC) when there is a large difference between the input voltage and the reference voltage, resulting in wasted power consumption and limiting their application in low-power scenarios. Existing multi-stage TDC ADC technology cannot predict the necessity of conversion, leading to wasted power consumption due to ineffective conversion.

Method used

An interpolation-type time-to-digital converter (TDC) based on pre-decision activation is adopted. The TDC is dynamically activated through a pre-decision mechanism, and the corresponding channel is activated only when the input voltage is within the range of the reference voltage. When the difference is large, the relevant channel is shut down to avoid unnecessary energy consumption.

Benefits of technology

It significantly reduces dynamic power consumption, balances high speed and low power consumption, has a simple structure that does not introduce additional delay, and is suitable for high-speed, low-power time-domain ADC systems.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

An interpolation type time-to-digital converter based on pre-judgment partial activation comprises a reference voltage generating circuit, a parallel converter array, a parallel pre-judgment circuit array, an interpolation TDC, a one-hot code encoder and a binary encoder which are connected in sequence, and a pre-judgment auxiliary converter which is connected with the parallel converter array and the parallel pre-judgment circuit array respectively, dynamic partial activation is achieved through a pre-judgment mechanism, and the method is suitable for any VTC structure and has wider applicability and lower dynamic power consumption. Meanwhile, the decoding logic structure is simple, extra delay is not introduced, and the method is suitable for a high-speed low-power-consumption time domain ADC system.
Need to check novelty before this filing date? Find Prior Art