Methods, systems, media, program products, and terminals for adaptive construction and allocation of distributed computing tasks in a distributed computing landscape.

By optimizing the distributed computing framework of EDA software through adaptive construction and allocation methods, the problems of memory overrun and resource waste in computing units are solved, and efficient and stable computing task allocation and execution are achieved, thereby improving the efficiency and success rate of chip manufacturing.

CN122086575APending Publication Date: 2026-05-26HUAXINCHENG (HANGZHOU) TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HUAXINCHENG (HANGZHOU) TECH CO LTD
Filing Date
2026-04-23
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

Existing distributed computing frameworks for EDA software suffer from problems such as memory overruns in computing units, unreasonable task partitioning granularity, unbalanced load, waste of computing resources, and poor system fault tolerance during chip manufacturing, resulting in low computing efficiency.

Method used

An adaptive construction and allocation method is adopted, and the full-size layout is divided through a distributed architecture. The division or merging operation is performed based on the feedback information of the computing units to ensure that the computing tasks are executed smoothly in the server. The task allocation and resource utilization are optimized by using preset rules.

Benefits of technology

It effectively avoids task interruptions caused by memory overruns, improves the utilization of computing resources, reduces idle and overloaded computing units, and enhances overall computing speed and success rate.

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Abstract

This application provides a method, system, medium, program product, and terminal for adaptive construction and allocation of distributed computing tasks in a computing layout. The method involves dividing a full-size computing layout to obtain several computing layouts and corresponding computing tasks. For computing tasks that fail to execute, the method divides them into several sub-tasks corresponding to several sub-layouts, and re-executes these sub-tasks until all sub-tasks are successfully executed. For successfully executed computing tasks, the method collects their execution information and pre-divides or merges unexecuted computing tasks. Finally, after all computing tasks have been completed, the several computing layouts are merged and output. This avoids the problem of program termination due to excessive memory consumption and automatically adjusts to the most suitable partition size, thereby optimizing computational efficiency.
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Description

Technical Field

[0001] This application relates to the field of distributed computing technology for EDA software, and in particular to a method, system, medium, program product and terminal for adaptive construction and allocation of distributed computing tasks in a layout. Background Technology

[0002] As semiconductor process nodes continue to shrink to nanometer and even more advanced scales, modern chip design exhibits unprecedented scale, structural complexity, and significant physical effects. Correspondingly, electronic design automation (EDA) software, such as Optical Proximity Correction (OPC), Design Rule Check (DRC), circuit simulation, and parasitic parameter extraction tools, faces extremely severe computational complexity challenges when handling advanced designs. The computational load of a single task can reach trillions of operations per second (CPU hours), with extremely high memory requirements, far exceeding the capacity limits of a single server or workstation.

[0003] Against this backdrop, distributed computing technology has become an indispensable cornerstone supporting the practical application of EDA software in chip manufacturing. Its core value lies in breaking down massive computational tasks into numerous parallelizable subtasks and scheduling them to work collaboratively on clusters consisting of hundreds or even thousands of computing nodes. This compresses computation cycles that originally took weeks or even months into days or hours. This model not only significantly accelerates the "design-verification-manufacturing" cycle of chip design iteration, greatly improving R&D efficiency, but also makes it possible to perform high-precision physical verification and manufacturing feasibility analysis on the entire chip, fundamentally ensuring the success rate of tape-out and the performance and reliability of the final chip.

[0004] However, while distributed computing has brought significant speed improvements, it has also introduced a series of new technical challenges. Currently, the distributed architecture of chip manufacturing EDA software primarily relies on design layout partitioning for subtask construction and allocation. This involves dividing the full-size design layout into a fixed number and size of partitions with fixed dimensions. Furthermore, due to hardware limitations on the memory available to individual computing units, exceeding 8GB of memory per unit can easily trigger forced termination by the user system or IT department, further restricting the overall size of the design layout. The granularity of task partitioning, load balancing between computing nodes, communication overhead and synchronization management of massive amounts of intermediate data, and system fault tolerance issues such as task restarts or failures due to single node failures all directly constrain further improvements in distributed computing efficiency. Therefore, existing distributed computing frameworks for chip manufacturing EDA software still have room for optimization, and a more efficient, stable, and resource-utilizing distributed computing architecture and method are urgently needed.

[0005] The existing methods still have the following drawbacks:

[0006] 1. Since the computing scale and function of a computing unit are often determined by user needs, its large number of control scripts and commands, combined with functional and layout complexity, often make it difficult to predict the memory required by a single computing unit manually or through algorithms.

[0007] 2. Distributed computing in common EDA layouts, such as optical proximity effect correction, often requires a computing scale of several hours to several days. If the memory of some subtasks becomes too large during the computing process, the entire computing task will be terminated, which will greatly reduce the work efficiency.

[0008] 3. When the layout is divided too finely and the horizontal and vertical lengths of the subtasks are small, plus the additional outer area layout, multiple calculations will be performed on the intersecting areas, which will affect the overall production line efficiency and lead to the waste of some computing resources. Summary of the Invention

[0009] In view of the shortcomings of the prior art described above, the purpose of this application is to provide a method, system, medium, program product and terminal for adaptive construction and allocation of distributed computing tasks in a layout, so as to solve at least one of the technical problems in the prior art.

[0010] To achieve the above and other related objectives, a first aspect of this application provides a method for adaptive construction and allocation of distributed computing tasks in a computing landscape. The method includes: obtaining a full-size computing landscape; performing a segmentation operation on the full-size computing landscape using a distributed architecture to obtain several computing landscapes and corresponding computing tasks; constructing a task queue based on the several computing tasks; sequentially executing the computing tasks corresponding to several computing landscapes within several computing units of a server based on the order of the task queue; and performing segmentation or merging operations on the computing landscapes corresponding to other unexecuted computing tasks based on execution information fed back by the computing units, until all several computing tasks are successfully executed; wherein, when a current computing task is detected to have failed, segmenting the computing landscape corresponding to the failed current computing task based on a preset segmentation rule to obtain several sub-landscapes and corresponding sub-tasks, and sequentially executing the sub-tasks corresponding to the several sub-landscapes; obtaining the execution results corresponding to the successful execution of several computing tasks; and merging and outputting the several computing results to obtain the computing result of the full-size computing landscape.

[0011] In some embodiments of the first aspect of this application, the process of dividing the computing landscape corresponding to the current computing task that has failed to execute based on a preset division rule includes: when the memory consumption of the current computing task in any computing unit exceeds a preset upper limit threshold, the current computing task is determined to have failed to execute; the computing landscape corresponding to the current computing task that has failed to execute is divided into several sub-landscapes and corresponding sub-tasks according to a preset ratio.

[0012] In some embodiments of the first aspect of this application, the process of dividing the computational landscape corresponding to other unexecuted computational tasks based on the execution information fed back by the computing unit includes: when the proportion of the divided tasks in the execution information fed back by the computing unit is greater than or equal to a preset division threshold, the computational landscape corresponding to other unexecuted computational tasks in the task queue is divided based on the preset division rule.

[0013] In some embodiments of the first aspect of this application, the process of merging the computational layout corresponding to other unexecuted computational tasks based on the execution information fed back by the computing unit includes: when the average memory percentage in the execution information fed back by the computing unit is less than or equal to a preset merging threshold, merging the computational layout corresponding to other unexecuted computational tasks in the task queue based on a preset merging rule.

[0014] In some embodiments of the first aspect of this application, the process of merging the computing layouts corresponding to other computing tasks that have not been executed in the task queue based on a preset merging rule includes: when the average memory percentage is less than or equal to a preset merging ratio, the number of computing layouts selected for merging is calculated by combining the number of computing units with the preset merging ratio.

[0015] In some embodiments of the first aspect of this application, the method further includes: when performing a partitioning operation on the computing layout corresponding to other unexecuted computing tasks, the number of computing layouts selected for partitioning is equal to the number of computing units.

[0016] To achieve the above and other related objectives, a second aspect of this application provides a distributed computing task adaptive construction and allocation system for a computing layout. The system includes: a task segmentation module, used to acquire a full-size computing layout, and segment the full-size computing layout using a distributed architecture to obtain several computing layouts and corresponding computing tasks; an adaptive computing module, used to construct a task queue based on the several computing tasks, and sequentially execute the computing tasks corresponding to several computing layouts within several computing units of a server based on the order of the task queues, and perform segmentation or merging operations on the computing layouts corresponding to other unexecuted computing tasks based on the execution information fed back by the computing units, until all several computing tasks are successfully executed; wherein, when a current computing task is detected to have failed, the computing layout corresponding to the failed current computing task is segmented based on a preset segmentation rule to obtain several sub-layouts and corresponding sub-tasks, and the sub-tasks corresponding to the several sub-layouts are executed sequentially; and a merging and output module, used to acquire the execution results corresponding to the successful execution of several computing tasks, merge the several calculation results, and output the calculation result of the full-size computing layout.

[0017] To achieve the above and other related objectives, a third aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the aforementioned method for adaptive construction and allocation of distributed computing tasks in a layout.

[0018] To achieve the above and other related objectives, a fourth aspect of this application provides a computer program product comprising computer program code, which, when executed on a computer, enables the computer to implement the aforementioned method for adaptive construction and allocation of distributed computing tasks in a layout.

[0019] To achieve the above and other related objectives, a fifth aspect of this application provides an electronic terminal, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program to implement the aforementioned method for adaptive construction and allocation of distributed computing tasks in a layout.

[0020] As described above, the distributed computing task adaptive construction and allocation method, system, medium, program product, and terminal of this application have the following beneficial effects:

[0021] (1) By automatically performing fine-grained segmentation when a task fails, the interruption of the entire task due to excessively large single computational layout and excessive memory consumption is effectively avoided, ensuring the final completion of large-scale layout computation jobs.

[0022] (2) Adjust unexecuted tasks in advance based on feedback information such as the "splitting task ratio" or "average memory ratio" of completed tasks. When frequent splitting is found, large tasks are split into smaller ones in advance; when memory is sufficient, small tasks are merged to maximize the use of the server's computing units and avoid idle or overloaded computing units.

[0023] (3) Through the pre-adjustment mechanism, the repeated scheduling and waiting time caused by the failure of a large number of tasks and the subsequent re-splitting are avoided, making the task allocation more in line with the actual hardware capabilities, thereby speeding up the overall processing flow. Attached Figure Description

[0024] Figure 1 The diagram shown is a flowchart illustrating an adaptive construction and allocation method for distributed computing tasks in one embodiment of this application.

[0025] Figure 2 The diagram shown is a schematic representation of the computational layout in one embodiment of this application.

[0026] Figure 3 The diagram shown is a flowchart illustrating the execution of a task queue in one embodiment of this application.

[0027] Figure 4 The diagram shown is a specific embodiment of obtaining a sub-layout through a segmentation operation in one of the embodiments of this application.

[0028] Figure 5 The diagram shown is a schematic representation of a distributed computing task adaptive construction and allocation system according to an embodiment of this application.

[0029] Figure 6 The diagram shown is a structural schematic of an electronic terminal according to an embodiment of this application. Detailed Implementation

[0030] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0031] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "fixing," and "holding" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0032] It should be noted that, in the embodiments of this application, the words "exemplary" or "for example" refer to examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0033] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0034] In the embodiments of this application, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that the terms "first" and "second" do not necessarily imply that they are different.

[0035] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the invention.

[0036] To facilitate understanding of the embodiments of this application, firstly, in conjunction with Figure 1 Detailed explanation. Figure 1 This document illustrates a flowchart of an adaptive construction and allocation method for distributed computing tasks in a layout according to an embodiment of the present invention. The method mainly includes the following steps:

[0037] Step S11: Obtain the full-size layout, and use a distributed architecture to perform a segmentation operation on the full-size layout to obtain several computing layouts and corresponding computing tasks.

[0038] It should be noted that the method described in this application is applied to chip manufacturing EDA software, which refers to chip manufacturing electronic design automation (EDA) software. This software is a specialized electronic design automation tool used in the integrated circuit design and manufacturing process, covering a series of complex steps from system-level design, logic simulation, physical placement and routing, parameter extraction, design rule checking to final photolithography mask data preparation. It serves as a bridge connecting chip design concepts and physical process implementation. It can accurately model and verify the circuit functions, power consumption, and timing of billions of transistors, while deeply adapting to the specific process rules of wafer fabs, ensuring that the design can be successfully transformed into a full-size layout suitable for tape-out production. It is an indispensable core support in the modern VLSI industry chain.

[0039] Further, the full-size layout is obtained, and it is divided into N equal parts according to its length and width as a computational layout. A corresponding computational task is created for each computational layout. For example, for a 10... For a 10mm chip design layout, dividing it into 100µm segments (length and width) will generate 10,000 computational layouts and their corresponding computational tasks. These computational tasks refer to the process of converting the corresponding computational layout from a geometric shape into a physical field mapping based on computational units.

[0040] It needs to be emphasized that, in combination Figure 2 This application describes a layout segmentation operation based on the distributed architecture of traditional manufacturing EDA software. The full-size layout is divided into N equal computational layouts, each comprising two regions: a segmented layout region divided according to the layout size, and an edge extension region extending outwards from the segmented layout region with equal widths. The width of the edge extension region in the computational layout is only related to the computational task and can be set as needed; no specific limitation is made here.

[0041] The above segmentation process can solve the problem of insufficient receptive field at the segmentation edge and ensure the correctness of the calculation results near the boundary, such as... Figure 2 As shown, if the edges of the segmented layout area are not extended, some information of the key area of ​​the layout in the lower right corner will be missed. The key area of ​​the layout refers to the layout area with high complexity and important function in the layout. If the key area of ​​the layout is calculated incorrectly, the calculation result of the entire full-size layout will not match the actual result.

[0042] Step S12: Construct a task queue based on several computing tasks. Execute the computing tasks corresponding to several computing layouts sequentially within several computing units of the server based on the order of the task queue. Based on the execution information fed back by the computing units, perform splitting or merging operations on the computing layouts corresponding to other unexecuted computing tasks until all computing tasks are successfully executed. When a current computing task fails to execute, the computing layout corresponding to the failed current computing task is split according to a preset splitting rule to obtain several sub-layouts and corresponding sub-tasks. Execute the sub-tasks corresponding to the several sub-layouts sequentially.

[0043] Specifically, a task queue is constructed based on the aforementioned computational tasks. The order of computational tasks in the task queue can be determined according to the adjacency relationship between the computational layouts corresponding to the computational tasks, without specific limitations here. The task queue is sent to the EDA software server, which contains several computational units, each of which independently computes a different computational task. The number of computational units is usually much smaller than the number of computational tasks. All computational units execute the computational tasks sequentially according to the order of computational tasks in the task queue. For example, there are N computational tasks (computational task 1, computational task 2, computational task 3, ..., computational task M, ..., computational task N), and the number of computational units is M, where M is much smaller than N. When a computational unit executes a computational task, it executes the first M computational tasks within the M computational units according to the order of computational tasks. Each computational unit corresponds to one computational task (e.g., computational unit 1 executes computational task 1, computational unit 2 executes computational task 2, ..., computational unit M executes computational task M).

[0044] It should be noted that, since the total memory of the EDA software server has an upper limit, the memory consumption of each computing unit is usually limited to a fixed size, such as 8G.

[0045] Furthermore, such as Figure 3As shown, the EDA software server periodically queries the status of each computing unit based on a heartbeat mechanism. When a computing unit completes its ongoing computing task without consuming more than the preset upper limit threshold, the task is determined to be successfully executed, and its corresponding execution information is collected and returned to the server. Furthermore, when a computing unit's computing layout is divided into several sub-layouts, the computing task corresponding to the current sub-layout is determined to be successfully executed when all sub-tasks corresponding to those sub-layouts are completed. The EDA software server obtains the execution information corresponding to the currently successfully executed computing tasks. The preset upper limit threshold is typically the memory limit of the computing unit. However, since system processes may also occupy memory within the computing unit, the preset upper limit threshold can be set according to actual needs.

[0046] In one embodiment of this application, the process of dividing the computing landscape corresponding to the current computing task that has failed to execute based on a preset division rule includes: when the memory consumption of the current computing task in any computing unit exceeds a preset upper limit threshold, the current computing task is determined to have failed to execute; the computing landscape corresponding to the current computing task that has failed to execute is divided into several sub-landscapes and corresponding sub-tasks according to a preset ratio.

[0047] Furthermore, when the EDA software server periodically queries the status of each computing unit based on a heartbeat mechanism, if a computing unit fails to consume memory exceeding a preset upper limit threshold while executing a computing task, the computing task being executed by the current computing unit is determined to be a failed computing task. The preset upper limit threshold is typically the memory limit of the computing unit. In addition, since the computing unit may also have system processes occupying memory, the preset upper limit threshold can be set according to actual needs.

[0048] Furthermore, the computational layout corresponding to the failed computational tasks is divided according to a preset ratio (the division method is as follows). Figure 4 As shown, a number of sub-maps are obtained, and corresponding sub-tasks are generated. The preset ratio preferably divides a computational map into four equal parts, but the specific division method and number of parts are not limited.

[0049] It should be noted that, as Figure 4As shown, after dividing the computational landscape into sub-landscapes, the sub-landscapes will generate more overlapping computational areas due to the existence of edge extension regions. Meanwhile, the width of the edge extension regions in the sub-landscapes is only related to the computational task; therefore, the horizontal and vertical lengths of the sub-landscapes should be increased as much as possible to reduce the area ratio of overlapping computations, making the overall computation more efficient. Assuming the divided landscape region is a square with length and width W, and the width of the edge extension region on one side is R, then the corresponding computational area of ​​the computational landscape is... Assuming this computational area is divided into four parts with the same extension length, the total computational area is... The difference between the two is Taking W as 50 micrometers and R as 2 micrometers as an example, the computation time for dividing the work into four parts will increase by 15%, and this percentage will increase as the value of R increases. Since R is a constant, the side length W of the dividing blocks should be increased as much as possible during task construction. The specific value can be set according to needs, and no specific restrictions are imposed here.

[0050] After proportionally dividing the failed computation task into several sub-layouts and corresponding sub-tasks, the sub-tasks are inserted at the head of the task queue to take priority over other unexecuted computation tasks in the task queue. If the computation unit still fails to execute the sub-task, it can select to divide its corresponding sub-layout again within a predetermined number of divisions until it succeeds or the predetermined number of divisions is exceeded and execution stops.

[0051] Specifically, when a computation task is determined to have failed and is divided into several sub-layouts and corresponding sub-tasks, in order to improve the real-time performance of the execution information fed back by the computation unit, the several sub-tasks obtained from the division are added to the head of the task queue for priority computation. That is, the computation priority of the sub-tasks is higher than that of other computation tasks that have not been executed in the task queue.

[0052] In one embodiment of this application, the process of dividing the computational landscape corresponding to other unexecuted computational tasks based on the execution information fed back by the computing unit includes: when the proportion of the divided tasks in the execution information fed back by the computing unit is greater than or equal to a preset division threshold, the computational landscape corresponding to other unexecuted computational tasks in the task queue is divided based on the preset division rule.

[0053] Specifically, the EDA software server analyzes the number of segmented computing tasks and the number of unsegmented computing tasks in the execution information to further obtain the proportion of segmented computing tasks among the currently successfully executed computing tasks.

[0054] In one embodiment of this application, when performing a partitioning operation on the computing layout corresponding to other unexecuted computing tasks, the number of computing layouts selected for partitioning is equal to the number of computing units.

[0055] It's important to note that when splitting unexecuted computational tasks, the number of tasks split is equal to the number of computational units. Specifically, if the number of tasks is less than the number of units, some units will be idle, wasting computational resources. If the number of tasks is greater than the number of units, the EDA software server will experience frequent task scheduling and context switching, reducing computation speed. By maintaining an equal number of tasks to computational units, each split operation generates an equal number of tasks for all units. This approach mitigates memory risks through fine-grained granularity while avoiding scheduling overhead from excessive splitting. This precise mapping of "one computational task to one computational unit" keeps server resources at full capacity with low overhead, maximizing overall throughput while ensuring task success rate.

[0056] Furthermore, when the proportion of the segmented tasks is greater than or equal to the preset segmentation threshold, several computing tasks with the same number of computing units as the server are selected from the unexecuted computing tasks in the task queue. Based on the preset segmentation rules, the computing layout corresponding to the several computing tasks is segmented, and corresponding subtasks are generated.

[0057] It should be noted that the preset segmentation threshold is used to measure whether the several computing layouts are frequently segmented into subtasks during the execution of the computing unit, affecting execution efficiency. By statistically analyzing past execution processes, computing tasks can be segmented in advance, effectively avoiding the memory consumption caused by the traditional method of checking for memory overflow before segmenting computing tasks, thus increasing overall operating efficiency. The method of segmenting the computing layouts corresponding to several computing tasks based on the preset segmentation rule is similar to the above. Figure 4 The same applies here, so I will not go into details.

[0058] In one embodiment of this application, the process of merging the computing layouts corresponding to other computing tasks that have not been executed in the task queue based on a preset merging rule includes: when the average memory percentage is less than or equal to a preset merging ratio, the number of computing layouts selected for merging is calculated by combining the number of computing units with the preset merging ratio.

[0059] Specifically, the EDA software server analyzes the execution information to obtain the memory consumption ratio of each of the currently executed and undivided computing tasks, and further calculates the average memory consumption ratio to obtain the average memory ratio.

[0060] Furthermore, when the average memory ratio is less than the preset merging ratio, several computing tasks are selected from the unexecuted computing tasks in the task queue, and the number of these computing tasks is equal to the preset merging ratio of the number of computing units on the server. Based on the preset merging rules, the computing layouts corresponding to these computing tasks are merged, and corresponding computing tasks are generated.

[0061] During the merging operation of the computing layout, there is a risk that the required computing memory in the computing unit after merging may exceed the memory limit of the computing unit, resulting in it being split again. Therefore, the preset merging rule setting is related to the preset merging ratio.

[0062] For example, if the preset merging ratio is 50%, when the average memory usage is less than 50%, then from the unexecuted computing tasks in the task queue, several computing tasks with the same number of computing units as the server are merged in a manner where every two are merged into one. If the preset merging ratio is 25%, when the average memory usage is less than 25%, then from the unexecuted computing tasks in the task queue, several computing tasks with the same number of computing units as the server are merged in a manner where every four are merged into one. The specific settings can be determined according to the actual number of computing units and other factors, and no specific restrictions are imposed here.

[0063] Step S13: Obtain the execution results corresponding to the successful execution of several calculation tasks, merge the several calculation results and output them to obtain the calculation result of the full-size layout.

[0064] When a computation task is executed successfully, a corresponding execution result will be returned, which is the physical field mapping corresponding to the processed computation layout.

[0065] Furthermore, after all computation tasks and subtasks have been successfully computed and the task queue has been cleared, the boundary coordinates of each processed computation layout within the full-size layout are first parsed. The corresponding region of the full-size layout is located using a quadtree spatial index. Then, the data of the processed computation layouts is merged into a temporary master layout file in shared storage using a "copy-on-write" method. To avoid repeatedly merging the same region, the main process records a unique identifier for each original partition unit during task distribution and verifies whether this identifier has already been processed during merging.

[0066] Furthermore, a final validity check is performed on the complete merged result of the temporary master layout file. This final validity check includes repairing graphical connectivity across layout boundaries, smoothing grid-like splicing marks, and checking global design rules. Once all final validity checks pass, the temporary master layout file is converted to the standard GDS-II stream format and output to obtain the calculation result of the full-size layout.

[0067] like Figure 5 The diagram illustrates a schematic representation of a distributed computing task adaptive construction and allocation system according to an embodiment of the present invention. The system 500 in this embodiment includes the following modules: a task splitting module 501, an adaptive computing module 502, and a merging and output module 503.

[0068] The task segmentation module 501 is used to obtain a full-size layout, segment the full-size layout, and obtain several computing layouts and corresponding computing tasks.

[0069] The adaptive computing module 502 is used to construct a task queue based on the plurality of computing tasks and execute the plurality of computing tasks sequentially, wherein: for computing tasks that fail to execute, the corresponding computing landscape is further divided into several sub-landscapes based on a preset splitting rule, and several corresponding sub-tasks are generated, and the plurality of computing sub-tasks are re-executed until all the plurality of sub-tasks are executed successfully; for the computing tasks that are executed successfully, the corresponding execution information is collected to obtain the current execution result, and the unexecuted computing tasks are pre-splitting or merging based on the current execution result;

[0070] The merged output module 503 is used to merge and output the several computing layouts after all the computing tasks have been executed.

[0071] It should be understood that the specific process of each module performing the above-mentioned corresponding steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0072] It should also be understood that the module division in the embodiments of this application is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods. Furthermore, the functional modules in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0073] Figure 6 This is a schematic block diagram of the electronic terminal provided in an embodiment of this application. Figure 6As shown, the electronic terminal includes at least one processor 601, a memory 602, at least one network interface 603, and a user interface 605. The various components in the device are coupled together via a bus system 604. It is understood that the bus system 604 is used to implement communication between these components. In addition to a data bus, the bus system 604 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in… Figure 6 The general will label all buses as bus systems.

[0074] The user interface 605 may include a monitor, keyboard, mouse, trackball, clicker, button, touchpad, or touch screen.

[0075] It is understood that memory 602 can be volatile memory or non-volatile memory, or both. Non-volatile memory can be read-only memory (ROM) or programmable read-only memory (PROM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM) and synchronous static random access memory (SSRAM). The memories described in the embodiments of this invention are intended to include, but are not limited to, these and any other suitable categories of memory.

[0076] In this embodiment of the invention, the memory 602 is used to store various types of data to support the operation of the electronic terminal 600. Examples of this data include: any executable program for operation on the electronic terminal 600, such as the operating system 6021 and application programs 6022; the operating system 6021 includes various system programs, such as the framework layer, core library layer, driver layer, etc., for implementing various basic services and processing hardware-based tasks. The application program 6022 may include various applications, such as a media player, browser, etc., for implementing various application services. The distributed computing task adaptive construction and allocation method for the layout provided in this embodiment of the invention can be included in the application program 6022.

[0077] The methods disclosed in the above embodiments of the present invention can be applied to processor 601, or implemented by processor 601. Processor 601 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in processor 601 or by instructions in the form of software. The processor 601 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 601 can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. General-purpose processor 601 may be a microprocessor or any conventional processor, etc. The steps of the accessory optimization method provided in the embodiments of the present invention can be directly reflected as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium, which is located in a memory. The processor reads the information in the memory and combines it with its hardware to complete the steps of the aforementioned method.

[0078] In an exemplary embodiment, the electronic terminal 600 may be used to execute the aforementioned method by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), or complex programmable logic devices (CPLDs).

[0079] According to the method provided in the embodiments of this application, this application also provides a computer program product, which includes: computer program code, which, when run on a computer, causes the computer to execute a distributed computing task adaptive construction and allocation method of a layout in any of the embodiments shown.

[0080] According to the method provided in the embodiments of this application, this application also provides a computer-readable storage medium storing program code, which, when run on a computer, causes the computer to execute a distributed computing task adaptive construction and allocation method for a layout according to any of the embodiments shown.

[0081] As used in this specification, the terms "component," "module," "system," etc., are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0082] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this application.

[0083] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0084] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0085] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0086] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0087] In the above embodiments, the functions of each functional unit can be implemented entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., high-density digital video discs, DVDs), or semiconductor media (e.g., solid-state disks, SSDs, etc.).

[0088] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0089] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0090] In summary, this application provides a method, system, medium, program product, and terminal for adaptive construction and allocation of distributed computing tasks in a computing layout. It obtains several computing layouts and corresponding computing tasks by dividing a full-size computing layout. For computing tasks that fail to execute, they are divided into several sub-tasks corresponding to several sub-layouts, and these sub-tasks are re-executed until all sub-tasks are successfully executed. For successfully executed computing tasks, their corresponding execution information is collected, and unexecuted computing tasks are pre-divided or merged. Finally, after all computing tasks have been completed, the several computing layouts are merged and output. This avoids forced program termination due to excessive memory consumption and automatically adjusts the optimal partition size to optimize computational efficiency. Therefore, this application effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0091] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A method for adaptive construction and allocation of distributed computing tasks in a layout, applied to a server of EDA software, characterized in that, include: Obtain the full-size layout, and use a distributed architecture to divide the full-size layout into several computing layouts and corresponding computing tasks; A task queue is constructed based on several computing tasks. Based on the order of the task queue, several computing tasks corresponding to several computing layouts are executed sequentially in several computing units of the server. Based on the execution information fed back by the computing units, the computing layouts corresponding to other unexecuted computing tasks are split or merged until all computing tasks are executed successfully. When a current computing task is detected to have failed, the computing layout corresponding to the failed computing task is split according to a preset splitting rule to obtain several sub-layouts and corresponding sub-tasks. The sub-tasks corresponding to several sub-layouts are executed sequentially. The execution results of several calculation tasks are obtained after they are successfully executed. The calculation results of the several calculation results are merged and output to obtain the calculation result of the full-size layout.

2. The method for adaptive construction and allocation of distributed computing tasks in a layout according to claim 1, characterized in that, The process of partitioning the computational landscape corresponding to the currently failed computational task based on preset partitioning rules includes: When the memory consumption of the current computing task in any computing unit exceeds the preset upper limit threshold, the current computing task is determined to have failed. The computational landscape corresponding to the currently failed computation task is divided into several sub-landscapes and corresponding sub-tasks according to a preset ratio.

3. The method for adaptive construction and allocation of distributed computing tasks in a layout according to claim 1, characterized in that, The process of partitioning the computational layout corresponding to other unexecuted computational tasks based on the execution information fed back by the computational units includes: When the proportion of the segmented tasks in the execution information fed back by the computing unit is greater than or equal to the preset segmentation threshold, the computing layout corresponding to other unexecuted computing tasks in the task queue is segmented based on the preset segmentation rule.

4. The method for adaptive construction and allocation of distributed computing tasks in a layout according to claim 3, characterized in that, The process of merging the computational layouts corresponding to other unexecuted computational tasks based on the execution information fed back by the computational units includes: When the average memory percentage in the execution information returned by the computing unit is less than or equal to a preset merging threshold, the computing layout corresponding to other unexecuted computing tasks in the task queue is merged based on the preset merging rules.

5. The method for adaptive construction and allocation of distributed computing tasks in a layout according to claim 3, characterized in that, The process of merging the computational landscape corresponding to other unexecuted computational tasks in the task queue based on preset merging rules includes: When the average memory usage is less than or equal to the preset merging ratio, the number of computing layouts selected for merging is calculated by combining the number of computing units with the preset merging ratio.

6. The method for adaptive construction and allocation of distributed computing tasks in a layout according to claim 1, characterized in that, The method further includes: when performing a partitioning operation on the computing layout corresponding to other unexecuted computing tasks, the number of computing layouts selected for partitioning is equal to the number of computing units.

7. A distributed computing task adaptive construction and allocation system for a layout, characterized in that, The system includes: The task partitioning module is used to obtain a full-size layout and perform partitioning operations on the full-size layout using a distributed architecture to obtain several computing layouts and corresponding computing tasks. The adaptive computing module is used to construct a task queue based on several computing tasks. Based on the order of the task queue, it sequentially executes several computing tasks corresponding to several computing layouts within several computing units of the server. Based on the execution information fed back by the computing units, it performs splitting or merging operations on the computing layouts corresponding to other unexecuted computing tasks until all computing tasks are executed successfully. When a current computing task is detected to have failed, the computing layout corresponding to the failed computing task is split according to a preset splitting rule to obtain several sub-layouts and corresponding sub-tasks, and the sub-tasks corresponding to several sub-layouts are executed sequentially. The merge output module is used to obtain the execution results corresponding to the successful execution of several calculation tasks, merge the several calculation results and output them to obtain the calculation result of the full-size layout.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the layout-based distributed computing task adaptive construction and allocation method according to any one of claims 1 to 6.

9. A computer program product, characterized in that, The computer program product includes computer program code, which, when run on a computer, enables the computer to implement the distributed computing task adaptive construction and allocation method of the layout as described in any one of claims 1 to 6.

10. An electronic terminal, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the method for adaptive construction and allocation of distributed computing tasks for the layout described in any one of claims 1 to 6.

Citation Information

Patent Citations

  • Data processing method and device, equipment and storage medium

    CN114860449A

  • Layout design rule checking method, system, equipment, medium and product

    CN120803676A

  • Distributed layout information reading method and system, storage medium and electronic equipment

    CN121257459A

  • Task processing method and task processing apparatus for heterogeneous chip and electronic device

    WO2021097962A1