Data stream adaptive online learning processor and method based on memristor neuromorphic computing
The data flow adaptive online learning processor using memristor neuromorphic computing solves the problems of high power consumption, high latency, and poor adaptability of online learning processors on edge devices, achieving low power consumption, high real-time performance, and adaptability, and is suitable for scenarios such as IoT edge nodes and industrial sensors.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TAI ZHOU LI FAN KE JI YOU XIAN GONG SI
- Filing Date
- 2026-02-04
- Publication Date
- 2026-05-29
AI Technical Summary
Existing online learning processors suffer from high power consumption, high latency, poor adaptability, and insufficient scene adaptability on edge devices, making it difficult to meet the processing needs of continuous non-stationary data streams.
An adaptive online learning processor based on memristor neuromorphic computing is adopted, which integrates computation, storage and update through memristor cross array. Combined with on-chip learning engine and feature encoding module, it supports customized encoding methods, has time difference error calculation and weight update in analog domain, and realizes adaptive learning.
It achieves low power consumption, high real-time performance, and adaptive capabilities, improving energy efficiency by 1-2 orders of magnitude, reducing latency by hundreds of times, adapting to various data stream types, reducing operation and maintenance costs, and is suitable for resource-constrained scenarios such as IoT edge nodes and industrial sensors.
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Figure CN122114030A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of memristor applications and online learning technology, specifically to a dataflow adaptive online learning processor and method based on memristor neuromorphic computing. Background Technology
[0002] With the rapid development of technologies such as the Internet of Things (IoT), the Industrial Internet, and mobile terminals, the real-time data streams generated by edge devices are characterized by continuity, non-stationarity, and massive data volumes, placing extremely high demands on the real-time performance, low power consumption, and adaptive capabilities of online learning processors. Currently, online learning processors are mainly divided into two categories: one based on traditional digital processor architectures and the other based on neuromorphic computing architectures. However, both have significant technical shortcomings and cannot meet the practical application needs in resource-constrained scenarios.
[0003] Online learning solutions based on traditional digital processors rely on digital chips such as CPUs and GPUs to complete operations such as feature extraction, model calculation, and weight updates. The core problem lies in the separation of computation and storage. That is, weight data is stored in external memory, and data needs to be moved to the processor during computation. This results in a serious memory wall problem, leading to high data transmission latency and high energy consumption, making it difficult to adapt to the low power consumption and real-time response requirements of edge devices. At the same time, the serial computing mode of traditional digital processors cannot efficiently handle continuous non-stationary data streams. When faced with data distribution drift, manual intervention is required to retrain the model. The adaptive capability is poor, and the hardware cost is high, making it unsuitable for large-scale deployment.
[0004] Existing online learning solutions based on neuromorphic computing, while attempting to use novel devices such as memristors to build the computing core to address the memory wall problem, still suffer from several shortcomings: most solutions only use memristors for weight storage and inference computation, with weight updates still relying on external digital processors, failing to achieve integrated computation-storage-update processing, and energy consumption and latency still not meeting the stringent requirements of edge devices; some solutions support in-memory updates, but lack adaptive adjustment mechanisms, failing to dynamically optimize learning parameters based on changes in the statistical characteristics of the data stream, and learning accuracy is prone to decline when facing non-stationary data streams; furthermore, existing solutions use fixed feature encoding methods with poor adaptability, unable to meet the processing needs of different types of data streams such as time-series data and image data, thus limiting their applicability.
[0005] To address the shortcomings of the existing technologies, there is an urgent need for an online learning processor and method that can achieve low power consumption, real-time response, adaptive adjustment, and adaptability to various data stream types. This would solve the online learning challenge of continuous non-stationary data streams in resource-constrained scenarios such as edge devices, and promote the large-scale application of online learning technology in fields such as IoT edge nodes and industrial sensors. Summary of the Invention
[0006] The purpose of this invention is to provide a dataflow adaptive online learning processor and method based on memristor neuromorphic computing, overcoming the shortcomings of existing online learning solutions such as high energy consumption, large latency, poor adaptability, and insufficient scenario adaptability.
[0007] This invention provides a dataflow adaptive online learning processor based on memristor neuromorphic computing, comprising: a dataflow input interface, a feature encoding module, a memristor neuromorphic computing core, and an output decision module;
[0008] The memristor neuromorphic computing core is a key component, including at least one cross array composed of analog memristors, an on-chip learning engine, an in-memory update computing and execution unit, and a pulse generator.
[0009] The memristors in the cross array simultaneously and uniquely serve three roles: storage units for storing learned weights, computation units for performing vector-matrix multiplication to generate prediction or evaluation signals, and update computation units for directly calculating their own weight update amounts based on the learned signals.
[0010] The on-chip learning engine is integrated within or tightly coupled to the memristor neuromorphic computing core. The learning engine includes a time difference error calculation circuit, used to generate a global, scalar-form time difference error signal based on the difference between the processor output and the actual data, combined with the state value estimate from the evaluation network output. ;
[0011] The time difference error signal Combined with the local activation signal from the feature encoding module, the specific update value required for each memristor weight is calculated directly within the analog domain of the memristor cross array through a preset circuit connection. The online update is then completed by applying a conductance adjustment pulse through the pulse generator, and the entire process does not require reading the weight value to an external digital processor.
[0012] Preferably, the encoding method of the feature encoding module can be customized according to the task; for time-series data, a sliding time window plus radial basis function encoding is used, and the radial basis function is a Gaussian function:
[0013] ;
[0014] in This is a statistical feature vector of the data within the window. For the first The center of each basis function The width parameter is used, and the activation degree of each basis function is calculated using this formula. For image data streams, a small fixed convolutional kernel group is used for primary feature extraction, and the convolution operation formula is:
[0015] ;
[0016] in For the input image features, For convolution kernel, The kernel size is the convolution kernel size. The output feature map is generated; the feature encoding module can be a digital circuit or an analog circuit.
[0017] Preferably, each row of the memristor cross array is connected to a component input voltage of an eigenvector, and each column is connected to an output neuron. The total current on the column lines is the sum of the products of all input voltages and the corresponding memristor conductances, thereby completing the simulation calculation of vector-matrix multiplication.
[0018] Preferably, the evaluation network in the on-chip learning engine is implemented using another part of the memristor array, which is used to output the value signal corresponding to the current data state. .
[0019] Preferably, the output decision module samples and quantizes the analog current output by the memristor cross array, converting it into a final result; in the prediction task, the conversion relationship between the output current and the predicted value satisfies:
[0020] ;
[0021] in For the feature vector dimension, For the input characteristic voltage, The memristor conductance; in classification tasks, the output class probability is calculated by simulating a softmax circuit or subsequent digital calculation. The softmax calculation formula is: ,in For the first The original output of each category, The total number of categories; the output decision module can also trigger anomaly alarms based on the magnitude of the prediction error.
[0022] On the other hand, the present invention also provides a processing method for a data stream adaptive online learning processor based on memristor neuromorphic computing as described above, comprising the following steps:
[0023] S1: Receive real-time data sequences through the data stream input interface, and encode the current data window into a feature vector using the feature encoding module;
[0024] S2: The feature vector is used as an input voltage and applied to the row lines of the memristor cross array of the memristor neuromorphic computing core. Through simulation calculation, the output current is directly obtained on the column lines. This current represents the predicted value of the data at the next time step or the classification probability of the current data.
[0025] S3: When the actual next-time data or label arrives, compare it with the output of step S2 and calculate the prediction error. ;
[0026] S4: The on-chip learning engine will calculate the prediction error. Combined with a state value estimate of the evaluation network output, the time difference error is calculated. ,in As a discount factor, Value of the current state. For the next state value estimation, this error As the global third factor driving learning;
[0027] S5: Calculate the update in memory: using the aforementioned time difference error Given the current input feature vector, the updated conductance of each memristor in the array is directly calculated using analog circuitry within the array. ,in For learning rate, For the first The characteristic voltage of the input circuit;
[0028] S6: Perform the update in memory: calculate the update amount The voltage pulse sequence is converted into a specific number, amplitude, and width and applied to the target memristor to change its conductance, thereby completing one online learning iteration.
[0029] S7: Repeat steps S1-S6 to enable the processor to continuously track changes in the statistical characteristics of the data stream and achieve adaptive learning.
[0030] Preferably, the data stream input interface in step S1 preprocesses the received real-time data sequence. The preprocessing operations include data format conversion, filtering, and normalization to ensure that the input data is within the range that the feature encoding module can process. The normalization formula is as follows: ,in For the first One statistical characteristic value, This is the minimum value of the feature. The maximum value of this feature is given; the normalized feature value is then converted into an analog voltage signal.
[0031] Preferably, in step S3, the prediction error The calculation method is determined based on the task scenario. In the power load forecasting scenario, ,in This represents the actual load value. This is the predicted value for the output current conversion of the memristor array.
[0032] Preferably, in step S4, the complete formula for calculating the time difference error is as follows: In a simplified prediction task scenario, when the state value estimate of the evaluation network satisfies... In this case, the state value estimation of the evaluation network can be ignored, and the prediction error can be directly applied. As time difference error .
[0033] Preferably, in step S6, when When positive, the pulse generator generates an amplitude of A short positive pulse increases the conductance of the target memristor; when When it is negative, the generated amplitude is The pulse reduces the conductance of the target memristor, and the update error caused by the memristor's nonlinearity and noise. This error will be included in the error calculation for the next time step and compensated and corrected in subsequent updates.
[0034] The technical effects and advantages provided by the present invention in the above technical solution are as follows:
[0035] 1. This invention breaks through the bottleneck of traditional architecture's separation of computation and storage. Through the integrated computation-storage-update design of the memristor neuromorphic computing core, it completely eliminates the memory wall problem in traditional architectures. The memristor simultaneously acts as a storage unit, a computation unit, and an update computation unit. Weighted data does not need to be moved between the processor and memory. Combined with the parallel computing characteristics of the analog domain, compared with traditional digital solutions, energy efficiency is improved by 1-2 orders of magnitude, and latency is reduced by hundreds of times. It is highly adaptable to the low power consumption and high real-time requirements of resource-constrained scenarios such as IoT edge devices and industrial sensor nodes.
[0036] 2. This invention possesses strong scene adaptability and robustness, enabling adaptive online learning of continuous non-stationary data streams. The feature encoding module supports customized encoding methods, flexibly adapting to the processing needs of different types of data streams such as time-series data and image data. The on-chip learning engine integrates a time difference error calculation circuit, mimicking the brain's dopamine-driven reward learning mechanism. Combined with the error compensation function of the pulse generator, it can automatically correct update errors caused by memristor nonlinearity and noise, reducing hardware manufacturing precision requirements, improving system fault tolerance, and maintaining stable operation without the need for additional calibration circuits.
[0037] 3. This invention simplifies the learning process, reduces operation and maintenance costs, and demonstrates outstanding practicality and intelligence. The online learning method eliminates the need for service interruptions during model retraining. It automatically tracks changes in the statistical characteristics of the data stream through continuous iteration, adapting to conceptual shifts in data distribution and maintaining model effectiveness throughout its entire lifecycle without manual intervention. Furthermore, each module supports efficient hardware implementation, such as simulating softmax circuits and in-memory weight update calculations, without requiring complex digital computing power. This not only meets the needs of practical scenarios such as industrial equipment anomaly detection and power load forecasting but also significantly reduces equipment operation and maintenance costs. Attached Figure Description
[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.
[0039] Figure 1 This is a flowchart of the online learning method of the present invention;
[0040] Figure 2 This is a detailed diagram of the core of the memristor neuromorphic computing of the present invention;
[0041] Figure 3 This is a flowchart of the processor system architecture of the present invention;
[0042] Figure 4 This is an example diagram illustrating the anomaly detection application of the present invention. Detailed Implementation
[0043] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be described in more detail below with reference to the accompanying drawings.
[0044] Throughout the accompanying drawings, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The described embodiments are only a part of the embodiments of this application, not all of them. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application. The embodiments of this application will be described in detail below with reference to the accompanying drawings.
[0045] This invention is applicable to resource-constrained scenarios such as IoT edge devices, industrial sensor nodes, and mobile terminals. It can achieve real-time, low-power adaptive learning of continuous non-stationary data streams. Compared with traditional digital solutions, it improves energy efficiency by 1-2 orders of magnitude and reduces latency by hundreds of times.
[0046] like Figure 1 As shown, the dataflow adaptive online learning processor based on memristor neuromorphic computing of the present invention consists of four parts: a dataflow input interface 101, a feature encoding module 102, a memristor neuromorphic computing core 103, and an output decision module 104. The functions, internal structure, and beneficial effects of each part are as follows:
[0047] Data input interface 101 is responsible for connecting to external data sources and receiving continuous real-time data sequences. This interface has a built-in preprocessing unit that can perform data format conversion, filtering, and normalization operations. The normalization formula is as follows: The preprocessing stage filters out noise interference in the data, maps feature values to a uniform range, effectively improves the accuracy and stability of subsequent feature encoding, and avoids model training bias caused by excessive differences in data amplitude. The preprocessed feature values are converted into analog voltage signals and sent to the feature encoding module 102, laying the foundation for analog domain calculations.
[0048] The encoding method of the feature encoding module 102 can be customized according to the task type, supports digital circuit or analog circuit implementation, has strong scene adaptability, and can meet the processing needs of different types of data streams such as time series data and image data.
[0049] When processing time-series data, a sliding time window combined with radial basis function (RBF) encoding is used, with the RBF being a Gaussian function. This function calculates the activation degree of each basis function to generate a feature vector. This encoding method can accurately capture the local statistical characteristics of time series data, improving the model's ability to perceive time series trends.
[0050] When processing image data streams, a small fixed set of convolutional kernels is used for primary feature extraction. The convolution operation formula is as follows: The final output is the voltage signal corresponding to the image feature map. This method can efficiently complete the convolution operation at the hardware level, avoiding the high computational cost of software convolution and adapting to the resource limitations of edge devices.
[0051] like Figure 2 As shown, the memristor neuromorphic computing core 103 is a key component of the present invention, including a memristor cross array 201, a memristor 202, an on-chip learning engine 203, a time difference error calculation circuit 204, an in-memory update calculation and execution unit 205, and a pulse generator 206. Its integrated computing-storage-update design is the core to achieving extreme energy efficiency and ultra-low latency.
[0052] Each row of the memristor cross array 201 is connected to a component input voltage of a feature vector, and each column is connected to an output neuron. Memristors 202 are located at the intersection of rows and columns of the memristor cross array 201, simultaneously serving as a storage unit, a computation unit, and an update computation unit; their conductance represents the connection weights of the neural network. This design completely eliminates the memory wall problem in traditional architectures, eliminating the need to move weight data between the processor and memory, significantly reducing data transmission power consumption and latency.
[0053] The on-chip learning engine 203 integrates a time difference error calculation circuit 204, which can receive the difference between the processor output value and the actual data, combine it with the state value estimate output by the evaluation network, and generate a time difference error signal in the form of a global scalar. The evaluation network is implemented using another part of the memristor array. This architecture mimics the brain's dopamine-driven reward learning mechanism, which is biologically plausible and improves the algorithm's fault tolerance and robustness.
[0054] The memory-updated computation and execution unit 205 can update the time difference error signal Combined with local activation signals, the weight update of each memristor 202 is directly calculated in the analog domain. The entire calculation process is completed at the physical location where the weights are stored, eliminating the need to read the weights out to an external digital processor, thus further shortening the learning iteration cycle.
[0055] Pulse generator 206 updates the amount according to the weight. The sign and magnitude of the voltage pulses are used to generate a voltage pulse sequence with corresponding amplitude and width, which is then applied to the target memristor 202 to update the conductance value. This addresses the update error caused by nonlinearity and noise in the memristor 202. This module can incorporate errors into the calculation of the next time step and compensate for and correct them, thereby improving the system's tolerance to hardware defects and reducing the requirements for hardware manufacturing precision.
[0056] The output decision module 104 samples and quantizes the analog current output by the memristor cross array 201, converting it into the final result, balancing computational accuracy and real-time performance.
[0057] In the prediction task, the conversion relationship between the output current and the predicted value satisfies This conversion method is directly based on Ohm's law and Kirchhoff's current law, without complex calculations, ensuring the rapid output of prediction results.
[0058] In classification tasks, the output class probability is determined by simulating a softmax circuit or by subsequent digital calculation. The softmax operation formula is as follows: Analog softmax circuits can perform probability normalization at the hardware level, avoiding the power consumption overhead of digital computation.
[0059] This module can also trigger anomaly alarms based on the magnitude of prediction errors, and can identify sudden changes or abnormal patterns in data streams in real time. It is suitable for scenarios such as industrial equipment fault detection and power system anomaly early warning, thereby enhancing the practical value of the system.
[0060] like Figure 3 and Figure 4 As shown, the dataflow adaptive online learning method based on the above processor includes the following steps, and the execution details and beneficial effects of each step are as follows:
[0061] S1 Data Reception and Feature Encoding
[0062] The data stream input interface 101 receives real-time data sequences and performs preprocessing. The feature encoding module 102 encodes the preprocessed data into fixed-dimensional feature vectors according to task requirements and converts them into analog voltage signals. The preprocessing stage ensures the quality and consistency of the input data and avoids interference from noise and outliers on model training. Customized encoding can accurately extract key features of the data, improving the model's learning efficiency and prediction accuracy.
[0063] S2 forward simulation calculation
[0064] The analog voltage signal corresponding to the feature vector is applied to the row lines of the memristor cross array 201. According to Ohm's law and Kirchhoff's current law, the total current on the column lines is the sum of the products of the input voltage and the corresponding memristor 202 conductance. This current represents the predicted value of the data at the next time step or the classification probability of the current data. The parallel computing method in the analog domain can simultaneously complete the multiplication and accumulation operations of all input features and weights. Compared with the serial computing of digital processors, the latency is reduced by hundreds of times, and the energy consumption is significantly reduced.
[0065] S3 Prediction Error Calculation
[0066] Once the actual data or labels arrive, the actual values are compared with the output values of S2 to calculate the prediction error. The error calculation method is determined based on the task scenario. For example, in a power load forecasting scenario, This task-customized error calculation method can adapt to the needs of different scenarios and improve the prediction accuracy of the model in specific fields.
[0067] S4 Time Difference Error Generation
[0068] The on-chip learning engine 203 will reduce prediction errors. Combined with the state value estimate of the evaluation network output, the time difference error is calculated. To simplify the prediction task, the state value estimation term that can be ignored can be directly set... The introduction of temporal difference error enables the model to predict future states, enhancing the forward-looking nature of learning; the simplified mode reduces hardware complexity and adapts to edge devices with extremely limited resources.
[0069] S5 In-Memory Weight Update Calculation
[0070] In-memory update computation and execution unit 205 utilizes time difference error Based on the current input characteristic voltage, the conductance update of each memristor 202 is calculated in parallel within the analog domain. This step completes the calculation at the physical location of the weight storage, eliminating the need to read the weight data to an external processor, thus completely eliminating the energy consumption and latency of data transfer and achieving efficient learning through in-store computation.
[0071] S6 In-Memory Weight Update Execution
[0072] Pulse generator 206 will update the quantity Converted into a voltage pulse sequence, The amplitude generated at positive time is The short positive pulse increases the conductance of memristor 202; When it is negative, the generated amplitude is The pulse reduces the conductance of memristor 202. The update error caused by the nonlinearity and noise of memristor 202... The error will be incorporated into the error calculation and compensation in the next time step. This mechanism enables the system to have an inherent error correction capability, eliminating the need for additional calibration circuits, improving the fault tolerance and robustness of the hardware, and reducing maintenance costs.
[0073] S7 Iterative Learning
[0074] Repeat steps S1-S6 to allow the processor to continuously track changes in the statistical characteristics of the data stream, enabling adaptive learning. This iterative process does not require service interruption for model retraining and can automatically adapt to conceptual shifts in data distribution, such as seasonal variations in power load data or wear drift in industrial equipment vibration signals, ensuring the model's effectiveness throughout its entire lifecycle.
[0075] The following detailed description is based on two specific embodiments for different application scenarios. The two embodiments correspond to time-series data streams and image data streams, respectively, fully demonstrating the versatility and adaptability of the present invention. All parameters are practically achievable engineering parameters, ensuring that those skilled in the art can reproduce the present invention based on the embodiments.
[0076] Example 1: Online Prediction of Power Load Time Series Data
[0077] This embodiment verifies the online prediction effect and core advantages of the present invention based on the time-series data stream of power load from a substation in a certain area of an urban power grid. The specific steps are as follows:
[0078] S1 Data Reception and Feature Encoding: The data stream input interface 101 receives the load power data collected by the substation every minute, performs filtering and normalization on the data, and filters out noise interference caused by instantaneous fluctuations in the power grid. The feature encoding module 102 selects the load data of the most recent 60 minutes as a sliding time window, calculates five statistical features of the data within the window, including the mean, variance, and trend slope, and converts these five statistical features into five analog voltage signals. ~ The features extracted in this step can accurately reflect the short-term changing trends of load data, providing a reliable basis for subsequent forecasting.
[0079] S2 Forward Analog Calculation: Converts 5 analog voltage signals ~ The current applied to the row lines of the memristor cross array 201, which comprises 5 rows and 1 column, with memristors 202 positioned at the row and column intersections, satisfies the formula. The total output current on the column lines satisfies the formula... This current is the raw signal for the load forecast value, which is sent to the output decision module 104. The simulated parallel computing method makes the latency of a single forward prediction only 40μs, far lower than the 80μs of the GPU software solution.
[0080] S3 Prediction Error Calculation: Obtain Actual Load Value After One Minute The output decision module 104 will output the actual load value. With predicted current Compare the converted numerical predictions and calculate the prediction error. .
[0081] S4 Time Difference Error Generation: On-chip learning engine 203 calls the evaluation network output to determine the current load state value. and next state value estimation Set discount factor According to the formula Calculate time difference error This embodiment adopts a simplified mode, directly setting... This reduces hardware computational complexity and adapts to the resource constraints of substation edge terminals.
[0082] S5 In-Memory Weight Update Calculation: In-Memory Update Calculation and Execution Unit 205 Setting the Learning Rate According to the formula Parallel calculation of the conductance update of 5 memristors 202 ~ This step is completed within the analog domain, without the need for an external digital processor, and the computational power consumption for a single update is only 30 nJ, which is one-thousandth of that of a GPU software solution.
[0083] S6 In-Memory Weight Update Execution: Pulse Generator 206 Based on ~ The sign and magnitude of the signal are used to generate a corresponding voltage pulse sequence, which is then applied to the corresponding memristor 202 to update the conductance value. The error generated in this update... The error is incorporated into the next round of error calculation and compensated for, ensuring the long-term prediction accuracy of the model.
[0084] S7 Iterative Learning: Repeat steps S1-S6. When load data distribution shifts due to seasonal changes or holidays, the processor continuously iteratively updates the weights of memristor 202 to refit new load data patterns and maintain prediction accuracy. Compared to traditional solutions that require manual model retraining, this invention achieves fully automatic adaptive learning, significantly reducing operation and maintenance costs.
[0085] In this embodiment, the energy consumption of a single learning iteration is about 30 nJ and the latency is about 40 μs. Compared with the GPU software learning scheme, the energy consumption is reduced by more than 1,000 times, and the latency is reduced by 750 times compared with the memristor inference plus CPU learning scheme. This fully demonstrates the overwhelming advantages of the present invention in terms of energy efficiency and real-time performance.
[0086] Example 2: Abnormal Vibration Signal Detection in Industrial Equipment
[0087] This embodiment verifies the anomaly detection and adaptive learning capabilities of the present invention based on the vibration signal data stream of industrial rotating machinery. The specific steps are as follows:
[0088] S1 Data Reception and Feature Encoding: The data stream input interface 101 receives real-time vibration spectrum data collected by industrial rotating machinery sensors, performs data format conversion and normalization processing, and eliminates amplitude differences between different sensors. The feature encoding module 102 uses a sliding time window to extract eight statistical features of the vibration signal, including frequency peak value, spectral variance, and harmonic components, and converts them into eight analog voltage signals. ~ This feature extraction method can accurately capture subtle changes in the operating status of equipment, providing sensitive indicators for anomaly detection.
[0089] S2 Forward Analog Calculation: Converts 8 channels of analog voltage signals ~ The current applied to the row lines of the memristor cross array 201, which comprises 8 rows and 2 columns, corresponds to the classification outputs for normal and abnormal states, respectively. The total current output on the column lines is calculated by the analog softmax circuit of the output decision module 104 to obtain the class probabilities of normal and abnormal states. The use of the analog softmax circuit avoids the high power consumption of digital calculations, enabling the classification results to be output in real time.
[0090] S3 Prediction Error Calculation: During the initial normal operation phase, the output decision module 104 compares the actual state label with the classification result to calculate the prediction error. At this point, the error remains at a low baseline, proving that the model has learned the spectral pattern of normal vibration signals.
[0091] S4 Time Difference Error Generation: The on-chip learning engine 203 combines the state value signal output by the evaluation network to calculate the time difference error. This drives the memristor 202 weight update, enabling the model to continuously optimize the recognition accuracy of normal patterns.
[0092] S5 In-Memory Weight Update: The in-memory update calculation and execution unit 205 and pulse generator 206 work together to complete the real-time update of the conductance value of memristor 202, optimizing the classification model parameters. Hardware errors generated during the update process... Automatic compensation ensures the stability of the model.
[0093] S6 Anomaly Detection and Adaptive Learning:
[0094] Phase 1 is operating normally: the processor learns the normal vibration spectrum pattern, the prediction error remains at a low baseline, and the output decision module 104 does not trigger an alarm. The false alarm rate of the model in this phase is less than 0.1%, which is far superior to traditional threshold detection schemes.
[0095] Phase 2 Instantaneous Abnormal Impact: The equipment experiences an instantaneous fault impact, generating an abnormal vibration signal. This signal differs significantly from the learned normal pattern, causing a sharp increase in prediction error. The output decision module 104 triggers an abnormal alarm within 10μs, buying time for fault diagnosis.
[0096] Phase 3 Equipment Wear Drift: As the equipment enters the wear phase, the vibration spectrum slowly undergoes conceptual drift. Initially, the prediction error increases slightly. Through continuous iterations in steps S1-S6, the processor fine-tunes the weights of memristor 202, gradually converging the prediction error to a new normal level and avoiding continuous false alarms. This adaptive process requires no manual intervention, making it suitable for unattended operation in industrial settings.
[0097] In this embodiment, the processor can realize real-time anomaly detection at the hardware level without interrupting the operation of the equipment for model retraining, adapting to the continuous monitoring needs of industrial sites and greatly improving the level of intelligence in the operation and maintenance of industrial equipment.
[0098] The dataflow adaptive online learning processor based on memristor neuromorphic computing provided by this invention has the following key beneficial effects:
[0099] This invention breaks through the bottleneck of traditional architecture's separate computation and storage. Through the integrated computation-storage-update design of the memristor neuromorphic computing core 103, it completely eliminates the memory wall problem in traditional architectures. The memristor 202 simultaneously acts as a storage unit, a computation unit, and an update computation unit. Weighted data does not need to be moved between the processor and memory. Combined with the parallel computing characteristics of the analog domain, compared with traditional digital solutions, energy efficiency is improved by 1-2 orders of magnitude, and latency is reduced by hundreds of times. It is highly adaptable to the low power consumption and high real-time requirements of resource-constrained scenarios such as IoT edge devices and industrial sensor nodes.
[0100] This invention possesses strong scene adaptability and robustness, enabling adaptive online learning for continuous non-stationary data streams. The feature encoding module 102 supports customized encoding methods, flexibly adapting to the processing needs of different types of data streams such as time-series data and image data. The on-chip learning engine 203 integrates a time difference error calculation circuit 204, mimicking the brain's dopamine-driven reward learning mechanism. Combined with the error compensation function of the pulse generator 206, it can automatically correct update errors caused by nonlinearity and noise in the memristor 202, reducing hardware manufacturing precision requirements, improving system fault tolerance, and maintaining stable operation without the need for additional calibration circuits.
[0101] This invention simplifies the learning process, reduces operation and maintenance costs, and boasts outstanding practicality and intelligence. The online learning method eliminates the need for service interruptions during model retraining. It automatically tracks changes in the statistical characteristics of the data stream through continuous iteration, adapting to conceptual shifts in data distribution and maintaining model effectiveness throughout its entire lifecycle without manual intervention. Furthermore, each module supports efficient hardware implementation, such as simulating softmax circuits and in-memory weight update calculations, without requiring complex digital computing power. This not only meets the needs of practical scenarios such as industrial equipment anomaly detection and power load forecasting but also significantly reduces equipment operation and deployment costs.
[0102] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A dataflow adaptive online learning processor based on memristor neuromorphic computing, characterized in that, include: The system includes a data stream input interface (101), a feature encoding module (102), a memristor neuromorphic computing core (103), and an output decision module (104). The memristor neuromorphic computing core (103) is a key component, including at least one cross array (201) composed of analog memristors (202), an on-chip learning engine (203), an in-memory update computing and execution unit (205), and a pulse generator (206). The memristor (202) in the cross array (201) simultaneously and uniquely plays three roles: a storage unit for storing learning weights, a computation unit for performing vector-matrix multiplication to generate prediction or evaluation signals, and an update computation unit for directly calculating its own weight update based on the learning signals. The on-chip learning engine (203) is integrated within or tightly coupled to the memristor neuromorphic computing core (103). The on-chip learning engine (203) includes a time difference error calculation circuit (204) for generating a global, scalar-form time difference error signal based on the difference between the processor output and the real data, combined with the state value estimation of the evaluation network output. ; The time difference error signal Combined with the local activation signal from the feature encoding module (102), the specific update value required for each memristor weight is calculated directly in the analog domain of the memristor cross array (201) through a preset circuit connection. The online update is then completed by applying a conductance adjustment pulse through the pulse generator (206), and the weight value does not need to be read out to an external digital processor during the entire process.
2. The dataflow adaptive online learning processor based on memristor neuromorphic computing according to claim 1, characterized in that, The encoding method of the feature encoding module can be customized according to the task; for time-series data, a sliding time window plus radial basis function encoding is used, and the radial basis function adopts a Gaussian function: ； in This is a statistical feature vector of the data within the window. For the first The center of each basis function The width parameter is used, and the activation degree of each basis function is calculated using this formula. For image data streams, a small fixed convolutional kernel group is used for primary feature extraction, and the convolution operation formula is: ； in For the input image features, For convolution kernel, The kernel size is the convolution kernel size. The output feature map is generated; the feature encoding module can be a digital circuit or an analog circuit.
3. The dataflow adaptive online learning processor based on memristor neuromorphic computing according to claim 1, characterized in that, Each row of the memristor cross array (201) is connected to a component input voltage of an eigenvector, and each column is connected to an output neuron. The total current on the column line is the sum of the products of all input voltages and the corresponding memristor conductances, thereby completing the simulation calculation of vector-matrix multiplication.
4. The dataflow adaptive online learning processor based on memristor neuromorphic computing according to claim 1, characterized in that, The evaluation network in the on-chip learning engine (203) is implemented by another part of the memristor array and is used to output the value signal corresponding to the current data state. .
5. The dataflow adaptive online learning processor based on memristor neuromorphic computing according to claim 1, characterized in that, The output decision module (104) samples and quantizes the analog current output by the memristor cross array (201) and converts it into the final result; in the prediction task, the conversion relationship between the output current and the predicted value satisfies: ； in For the feature vector dimension, For the input characteristic voltage, The memristor conductance; in classification tasks, the output class probability is calculated by simulating a softmax circuit or subsequent digital calculation. The softmax calculation formula is: ,in For the first The original output of each category, The total number of categories; the output decision module can also trigger anomaly alarms based on the magnitude of the prediction error.
6. The processing method of the data stream adaptive online learning processor based on memristor neuromorphic computing as described in any one of claims 1-5, characterized in that, Includes the following steps: S1: Receive real-time data sequences through the data stream input interface (101) and encode the current data window into a feature vector using the feature encoding module (102); S2: The feature vector is used as an input voltage and applied to the row lines of the memristor cross array (201) of the memristor neuromorphic computing core (103). Through simulation calculation, the output current is directly obtained on the column lines. This current represents the predicted value of the data at the next moment or the classification probability of the current data. S3: When the actual next-time data or label arrives, compare it with the output of step S2 and calculate the prediction error. ; S4: The on-chip learning engine (203) will use the prediction error Combined with a state value estimate of the evaluation network output, the time difference error is calculated. ,in As a discount factor, Value of the current state. For the next state value estimation, this error As the global third factor driving learning; S5: Calculate the update in memory: using the aforementioned time difference error Given the current input feature vector, the updated conductance of each memristor in the memristor array (201) is directly calculated using analog circuitry. ,in For learning rate, For the first The characteristic voltage of the input circuit; S6: Perform the update in memory: calculate the update amount The voltage pulse sequence is converted into a specific number, amplitude, and width and applied to the target memristor to change its conductance, thereby completing one online learning iteration. S7: Repeat steps S1-S6 to enable the processor to continuously track changes in the statistical characteristics of the data stream and achieve adaptive learning.
7. The data stream adaptive online learning processing method based on memristor neuromorphic computing according to claim 6, characterized in that, The data stream input interface (101) in step S1 preprocesses the received real-time data sequence. The preprocessing operations include data format conversion, filtering, and normalization to ensure that the input data is within the range that the feature encoding module (102) can process. The normalization formula is as follows: ,in For the first One statistical characteristic value, This is the minimum value of the feature. The maximum value of this feature is given; the normalized feature value is then converted into an analog voltage signal.
8. The data stream adaptive online learning processing method based on memristor neuromorphic computing according to claim 6, characterized in that, In step S3, the prediction error The calculation method is determined based on the task scenario. In the power load forecasting scenario, ,in This represents the actual load value. This is the predicted value for the output current conversion of the memristor array.
9. The data stream adaptive online learning processing method based on memristor neuromorphic computing according to claim 6, characterized in that, In step S4, the complete formula for calculating the time difference error is as follows: In a simplified prediction task scenario, when the state value estimate of the evaluation network satisfies... In this case, the state value estimation of the evaluation network can be ignored, and the prediction error can be directly applied. As time difference error .
10. The data stream adaptive online learning processing method based on memristor neuromorphic computing according to claim 6, characterized in that, In step S6, when When positive, the pulse generator (206) generates an amplitude of A short positive pulse increases the conductance of the target memristor; when When it is negative, the generated amplitude is The pulse reduces the conductance of the target memristor, and the update error caused by the nonlinearity and noise of the memristor (202) is reduced. This error will be included in the error calculation for the next time step and compensated and corrected in subsequent updates.