A low-voltage power line communication deviation correction master selection method, device, equipment and storage medium

Abstract

The application discloses a low-voltage power line communication deviation correction and master selection method and device, equipment and a storage medium, and is used for solving the technical problem of low low-voltage power line communication deviation correction and master selection efficiency. The method comprises the following steps: after a node group is powered on and is in silence for the same time, nodes occupying a low-voltage power line channel are taken as master nodes, and nodes other than the master nodes are determined as child nodes; a master node broadcasts a master selection beacon frame, and the number of broadcastings of the master selection beacon frame is counted; a preamble sequence is used to correct the frequency offset of the child nodes, and a corrected frequency is obtained; whether the child nodes after the correction of the frequency offset can correctly analyze frame control information is judged according to the corrected frequency; if yes, the child nodes after the correction of the frequency offset are exited from a frequency offset correction process; whether the number of broadcastings reaches an expected number is judged; if no, the step of taking the nodes occupying the low-voltage power line channel as the master nodes and determining the nodes other than the master nodes as the child nodes is returned; and if yes, the current master node is determined as an in-network master node.

Description

Technical Field

[0001] This invention relates to the field of communication correction and master selection technology, and in particular to a method, apparatus, equipment and storage medium for low-voltage power line communication correction and master selection. Background Technology

[0002] As a key focus of power grid development, the ubiquitous power internet of things (IoT) relies heavily on low-voltage distribution networks. Communication technology in low-voltage distribution networks is a crucial technology for building the ubiquitous power IoT and a vital support for distribution business applications. Compared to other communication technologies in low-voltage distribution communication networks, low-voltage PLCs eliminate the need for specialized communication cables and equipment, achieving integrated information and power transmission, making them highly competitive in the ubiquitous power IoT. However, using low-voltage power lines as communication channels presents numerous challenges due to the complex channel environment, such as prolonged network master node selection leading to longer network setup times and poor network stability and robustness. A prolonged master node selection time can negatively impact the performance of the PLC network. Therefore, researching effective and reliable methods for automatically correcting frequency offsets and selecting master nodes will be a key focus in the development of low-voltage PLC (Power Line Communication) self-organizing networks. Furthermore, in-depth research into this method has significant theoretical and practical engineering application value for exploring low-voltage PLC self-organizing network methods.

[0003] Research on the automatic correction of frequency offset (referred to as offset correction) and master node selection (referred to as master selection) of nodes is still in its early stages. However, in general, the use of designated master nodes is more common in clock-synchronized node groups at present, while there is less research on automatic master selection methods for stage groups in low-voltage PLC systems with asynchronous clocks (i.e., frequency offset).

[0004] The logic of the existing automatic master selection method for stage groups in low-voltage PLC systems with asynchronous clocks (i.e., frequency offset) is as follows: After all nodes power on, they remain silent for a period of time. If they do not receive frequency offset correction frames from other nodes within this silent period, they preempt the channel using the CSMA / CA mechanism. The node that preempts the channel sends frequency offset correction frames. If the number of frequency offset correction frames sent by this node is equal to the expected set number, then this node becomes the master node. After receiving the frequency offset correction frames, other nodes dynamically adjust their own frequencies and then determine whether they can correctly parse the FC (Frame Control) information. If a node can correctly parse the FC, it exits the master election process. If it cannot correctly parse the FC, such nodes adjust their frequencies and then preempt the channel again using the CSMA / CA mechanism. Through multiple frequency adjustments, the frequency deviation between nodes can be corrected.

[0005] However, the above solution has the following problems: 1. When the number of power line carrier communication modules (hereinafter referred to as nodes) is large, the above scheme will result in a slow overall system convergence speed and low optimization accuracy, leading to a long master selection time, which will seriously affect the timeliness of low voltage PLC self-organizing network and indirectly affect the actual engineering application of self-organizing network technology.

[0006] 2. When the number of nodes is large, some nodes may receive multiple frequency offset correction frames, causing conflicts and resulting in low frequency offset correction efficiency between nodes, which affects the leader selection efficiency.

[0007] 3. Under conditions where the channel environment suddenly deteriorates or the frequency deviation between some nodes is too large, adopting the above scheme will reduce the success rate of communication between nodes and directly prolong the frequency deviation correction time of the node group.

[0008] 4. The insufficient precision of the crystal oscillators used in the nodes causes frequency deviations between nodes after power-on, resulting in communication failures. However, using high-precision crystal oscillators would be extremely expensive, impacting the economic viability of practical use. Furthermore, with a large number of nodes, the above solution exhibits low efficiency in correcting frequency offsets. Summary of the Invention

[0009] This invention provides a method, apparatus, device, and storage medium for low-voltage power line communication correction and master selection, which solves the technical problems of low correction efficiency and master selection efficiency in low-voltage power line communication.

[0010] This invention provides a low-voltage power line communication correction and master selection method, comprising: When the node group powers on and remains silent for the same amount of time, the node that preempts the low-voltage power line channel will be designated as the master node, and the nodes other than the master node will be designated as child nodes. The master node broadcasts a master selection beacon frame and counts the number of times the master selection beacon frame is broadcast. The master selection beacon frame includes a preamble sequence and frame control information. The frequency offset of the child node is corrected using the preamble sequence to obtain the corrected frequency; Based on the corrected frequency, determine whether the child node after correcting the frequency offset can correctly parse the frame control information; If so, remove the child node after correcting the frequency offset from the frequency offset correction process; Determine whether the number of broadcasts has reached the expected number; If not, return to the steps of designating the node that preempts the low-voltage power line channel as the master node and determining the nodes other than the master node as child nodes; If so, designate the current master node as the master node within the network.

[0011] Optionally, the step of designating the node that preempts the low-voltage power line channel as the master node and the nodes other than the master node as child nodes after the node group is powered on and silent for the same period of time includes: After the node group is powered on and silenced for the same period of time, the nodes in the node group will randomly delay within a set time interval. The node with the shortest delay will be determined as the master node and will preempt the low-voltage power line channel. The nodes other than the master node will be determined as child nodes.

[0012] Optionally, the step of correcting the frequency shift of the child node using the preamble sequence to obtain the corrected frequency includes: The target frequency is determined based on the preamble sequence; Obtain the current frequency, historical frequency deviation, and initial step size of the child node, wherein the historical frequency deviation includes the previous corrected frequency deviation; Determine the current frequency deviation based on the current frequency and the target frequency; The weighting factor and dynamic adjustment factor are determined based on the current frequency deviation. Calculate the adaptive frequency adjustment factor based on the historical frequency deviation; The correction step size is calculated based on the previous corrected frequency deviation, the initial step size, the weighting factor, the dynamic adjustment factor, and the adaptive frequency adjustment factor; The corrected frequency is calculated based on the corrected step size and the current frequency.

[0013] Optionally, it also includes: If the child node after frequency offset correction cannot correctly parse the selected master beacon frame, return to the step of designating the node that preempts the low-voltage power line channel as the master node, and determining the nodes other than the master node as child nodes.

[0014] Optionally, the step of determining whether the child node after correcting the frequency offset can correctly parse the frame control information based on the corrected frequency includes: The selected master beacon frame is demodulated using the corrected frequency to obtain the frame control information; Determine whether the frame control information meets the format constraints and passes the cyclic redundancy check; If the frame control information does not meet the format constraints or fails the cyclic redundancy check, it is determined that the child node after correcting the frequency offset cannot correctly parse the frame control information. If the frame control information satisfies the format constraints and passes the cyclic redundancy check, it is determined that the child node after correcting the frequency offset can correctly parse the frame control information.

[0015] The present invention also provides a low-voltage power line communication correction and selection master device, comprising: The node determination module is used to determine the node that preempts the low-voltage power line channel as the master node after the node group is powered on and silent for the same period of time, and the nodes other than the master node are determined as child nodes. The broadcast module is used to broadcast the master selection beacon frame through the master node and count the number of times the master selection beacon frame is broadcast. The master selection beacon frame includes a preamble sequence and frame control information. A frequency correction module is used to correct the frequency offset of the child node using the preamble sequence to obtain the corrected frequency. The parsing and judgment module is used to determine whether the child node after the frequency offset correction can correctly parse the frame control information based on the correction frequency. The exit module is used to exit the frequency offset correction process if the frequency offset is corrected. The broadcast count determination module is used to determine whether the broadcast count has reached the expected number of times; The return module is used to return the steps of designating the node that preempts the low-voltage power line channel as the master node and other nodes as child nodes if no. The network master node determination module is used to determine the current master node as the network master node if the condition is met.

[0016] Optionally, the node determination module includes: The node determination submodule is used to determine the master node when the node group is powered on and silent for the same period of time. The nodes in the node group are randomly delayed within a set time interval. The node with the shortest delay is determined and preempts the low-voltage power line channel. The nodes other than the master node are determined as child nodes.

[0017] Optionally, the frequency correction module includes: The target frequency determination submodule is used to determine the target frequency based on the preamble sequence; The data acquisition submodule is used to acquire the current frequency, historical frequency deviation and initial step size of the sub-node, wherein the historical frequency deviation includes the previous corrected frequency deviation; The current frequency deviation determination submodule is used to determine the current frequency deviation based on the current frequency and the target frequency; The weighting factor and dynamic adjustment factor determination submodule is used to determine the weighting factor and dynamic adjustment factor based on the current frequency deviation; An adaptive frequency adjustment factor calculation submodule is used to calculate the adaptive frequency adjustment factor based on the historical frequency deviation. The step size calculation submodule is used to calculate the correction step size based on the previous correction frequency deviation, the initial step size, the weighting factor, the dynamic adjustment factor, and the adaptive frequency adjustment factor. The frequency correction calculation submodule is used to calculate the correction frequency based on the correction step size and the current frequency.

[0018] The present invention also provides an electronic device, the device comprising a processor and a memory: The memory is used to store program code and transmit the program code to the processor; The processor is configured to execute the low-voltage power line communication correction and master selection method as described above, according to the instructions in the program code.

[0019] The present invention also provides a computer-readable storage medium for storing program code for executing the low-voltage power line communication correction and master selection method as described in any of the preceding claims.

[0020] As can be seen from the above technical solutions, the present invention has the following advantages: The present invention discloses a low-voltage power line communication correction and master selection method, specifically disclosing: when the node group is powered on uniformly and remains silent for the same period of time, the node that preempts the low-voltage power line channel is designated as the master node, and the nodes other than the master node are designated as child nodes; the master node broadcasts a master selection beacon frame, and the number of broadcasts of the master selection beacon frame is counted. The master selection beacon frame includes a preamble sequence and frame control information; the preamble sequence is used to correct the frequency offset of the child nodes to obtain the corrected frequency; based on the corrected frequency, it is determined whether the child nodes after the frequency offset correction can correctly parse the frame control information; if so, the child nodes after the frequency offset correction are removed from the frequency offset correction process; it is determined whether the number of broadcasts has reached the expected number; if not, the step of designating the node that preempts the low-voltage power line channel as the master node and the nodes other than the master node as child nodes is returned; if so, the current master node is designated as the master node in the network.

[0021] This invention, in the process of frequency correction, relies not only on the frequency offset information of the node itself, but also on the correction information of neighboring nodes, and optimizes the process through a feedback loop mechanism and a parallel correction mechanism. Nodes can share frequency offset information with surrounding nodes and adjust simultaneously, thereby accelerating the frequency offset correction process of the entire network. In other words, this mechanism can improve the efficiency of frequency offset correction, especially in cases of sudden network changes or large node frequency offsets, better adapting to changes in the channel environment, accelerating synchronization between nodes, and improving the success rate of inter-node communication. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a directed graph of a low-voltage PLC network. Figure 2 A flowchart illustrating the steps of a low-voltage power line communication correction and master selection method provided in this embodiment of the invention; Figure 3 This is a diagram of a node state machine model; Figure 4 A flowchart illustrating the steps of a low-voltage power line communication correction and master selection method according to another embodiment of the present invention; Figure 5 A flowchart of a low-voltage power line communication correction and master selection method provided in an embodiment of the present invention; Figure 6 This is a structural block diagram of a low-voltage power line communication correction and selection device provided in an embodiment of the present invention. Detailed Implementation

[0024] This invention provides a method, apparatus, device, and storage medium for low-voltage power line communication correction and master selection, which solves the technical problems of low correction efficiency and master selection efficiency in low-voltage power line communication.

[0025] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0026] Please see Figure 1 , Figure 1 This represents a directed graph of a low-voltage PLC network. Specifically, in this embodiment of the invention, the logical topology of the low-voltage PLC network can be abstracted as a directed graph G(V,E), where V is the vertex set of the directed graph G, and an element v∈V is called any vertex of the directed graph G. E is the edge set of graph G, and elements... Represents a sub-node v i to v j The edges. During the master election process, other nodes adjust their own frequency offset parameters based on the frequency offset information of the node that preempted the channel. Therefore, the element e of set E. ij The direction is dynamic.

[0027] Low-voltage PLC (Power Line Communication) networks are network technologies that use existing low-voltage power lines (220V / 380V transmission lines) in homes or buildings as communication media to transmit data signals.

[0028] The frequency offset selection problem can be described as: correcting the frequency offset of any two nodes to within a certain range. Internal error rate Approaching zero, the corresponding objective function is: ; ; in, Represents the frequency of any two nodes and Difference, This indicates that the frequency offset will be converged to within the tolerance range; This represents the bit error rate at which a node parses frame control information and payload information when it selects a master node for the kth time. The bit error rate (BER) is a measure of the error rate per bit and depends on factors such as channel conditions and modulation scheme. This indicates the total number of bits in the frame, including the total number of bits for frame control information and payload.

[0029] In other words, the process of correcting the bias and selecting the master node needs to do two things: one is to correct the frequency of the child node so that its frequency offset from that of the master node as the reference is within the tolerance range, and the other is to make the bit error rate of the decoded payload close to 0.

[0030] In view of this, based on Figure 1 For the directed graph of the low-voltage PLC network, please refer to [link / reference]. Figure 2 , Figure 2 A flowchart illustrating the steps of a low-voltage power line communication correction and master selection method provided in an embodiment of the present invention.

[0031] The present invention provides a low-voltage power line communication correction and master selection method, which may specifically include the following steps: Step 201: After the node group is powered on and silent for the same period of time, the node that preempts the low-voltage power line channel is designated as the master node, and the nodes other than the master node are designated as child nodes. Low-voltage power line channel refers to the entire physical environment for signal transmission between the transmitting and receiving ends when 220V / 380V power lines are used as the communication medium.

[0032] In this embodiment of the invention, the low-voltage PLC network has a node group consisting of several nodes. After the node group is powered on, it remains silent for the same time t. When the silent time is up, the node group is randomly delayed within a set time. The node with the shortest delay preempts the low-voltage power line channel using the CSMA / CA mechanism. The node that successfully preempts the channel becomes the master node, and the remaining nodes become child nodes.

[0033] Step 202: Broadcast the master beacon selection frame through the master node and count the number of broadcasts of the master beacon selection frame. The master beacon selection frame includes a preamble sequence and frame control information. The node that wins the signal can send a frequency offset correction master beacon frame to other nodes within its communication radius. The master beacon frame includes a preamble sequence and frame control information.

[0034] The preamble contains the following: a known deterministic training symbol sequence (pre-agreed upon by the transmitter and receiver, often using periodic OFDM symbols); the preamble is usually composed of multiple identical or quasi-identical subsequences; a fixed modulation scheme and fixed subcarrier mapping rules (the preamble does not carry service information, and its modulation scheme, subcarrier positions, and power distribution are known); and a high signal-to-noise ratio design (compared to the payload, the preamble has higher transmission power or stronger spectral concentration).

[0035] Frame control information is used to indicate key information such as beacon frame type, sending node identifier, and correction and master election parameters. The receiving node uses the frame control information to determine whether the beacon frame should participate in the current correction and master election process, and extracts the necessary parameters for subsequent calculations.

[0036] Step 203: Use a leader sequence to correct the frequency shift of the child nodes to obtain the corrected frequency; After obtaining the preamble sequence, the frequency offset of the child nodes can be corrected using the preamble sequence to obtain the corrected frequency.

[0037] In low-voltage power line communication, nodes themselves have inherent deviations, and the power grid environment introduces additional frequency shifts, resulting in carrier frequency offset (CFO) in the received signal. The preamble sequence is able to correct this frequency offset because: 1) Frequency offset in the preamble sequence manifests as "observable phase rotation," that is, when the preamble sequence at the transmitting end is a known signal. s(n) Frequency offset exists At that time, the received signal can be represented as: ; in, The sampling period; Let n be noise and n be the nth sampling point.

[0038] Frequency offset introduces a stable, predictable phase difference between adjacent repeating preamble symbols.

[0039] 2) The repetitive structure allows frequency offset to be estimated "without demodulating data." Assuming the leader sequence consists of two identical subsequences, then: ; To receive signals The complex conjugate of the signal is used to eliminate the influence of the modulated signal and can extract the phase difference caused by the frequency offset, thus realizing frequency offset estimation.

[0040] The frequency offset can be estimated as follows: ; Where N is the number of sampling point intervals (i.e., the repetition period length) between the repeated leader sequences of the two correlation operations, that is, N is the number of sample points between two identical subsequences in the leader sequence.

[0041] Based on the estimated frequency offset, after receiving the preamble sequence, the child node can adjust its frequency according to the frequency offset amount, so that the frequency offset amount falls within the acceptable frequency offset threshold range of the communication system, thereby ensuring the reliable parsing of the subsequent frame structure.

[0042] Step 204: Determine whether the child nodes after correcting the frequency offset can correctly parse the frame control information based on the corrected frequency. Step 205: If yes, exit the frequency offset correction process for the child node after the frequency offset correction. After obtaining the corrected frequency of the child node, it can be determined whether the corrected child node can correctly parse the frame control information. If it can, the frequency offset correction adjustment process is exited. If the node cannot correctly parse the frame control information, the adjustment process is repeated until the frequency offset adjustment is successful.

[0043] Step 206: Determine whether the number of broadcasts has reached the expected number; Step 207: If not, return to the step of designating the node that preempts the low-voltage power line channel as the master node and the nodes other than the master node as child nodes. Step 208: If yes, determine the current master node as the master node within the network.

[0044] Each time the master node sends a frequency offset correction master election beacon frame, it counts the number of times. When the number of times it sends the frame reaches the expected maximum, the current node becomes the final master node in the network, and the master election process ends.

[0045] In one example, the node state machine model is as follows: Figure 3As shown. The initial state refers to the state of each node at the beginning of the network. After initializing and resetting the state machine of each node to the initial state and silencing for 5 seconds, if a node preempts the low-voltage power line channel using the CSMA / CA mechanism, its state will switch to master node; otherwise, it will switch to child node. If a child node does not join the network within 30 seconds or the master node has no child node registering with it within 60 seconds, such nodes will be directly initialized and then continue to listen to the current state of the channel. When the correction and master selection process is completed, the state machine of each node will be fixed in the final state. In the process, some practical engineering experience can be combined to ensure the stability of state machine switching.

[0046] This invention, in the process of frequency correction, relies not only on the frequency offset information of the node itself, but also on the correction information of neighboring nodes, and optimizes the process through a feedback loop mechanism and a parallel correction mechanism. Nodes can share frequency offset information with surrounding nodes and adjust simultaneously, thereby accelerating the frequency offset correction process of the entire network. In other words, this mechanism can improve the efficiency of frequency offset correction, especially in cases of sudden network changes or large node frequency offsets, better adapting to changes in the channel environment, accelerating synchronization between nodes, and improving the success rate of inter-node communication.

[0047] Please see Figure 4 , Figure 4 The flowchart illustrates the steps of a low-voltage power line communication correction and master selection method according to another embodiment of the present invention.

[0048] Step 401: After the node group is powered on and silent for the same period of time, the nodes in the node group are randomly delayed within a set time interval. The node with the shortest delay is determined as the master node and preempts the low-voltage power line channel. The nodes other than the master node are determined as child nodes. In this embodiment of the invention, the low-voltage PLC network has a node group consisting of several nodes. After the node group is powered on, it remains silent for the same time t. When the silent time is up, the node group is randomly delayed within a set time. The node with the shortest delay preempts the low-voltage power line channel using the CSMA / CA mechanism. The node that successfully preempts the channel becomes the master node, and the remaining nodes become child nodes.

[0049] Step 402: Broadcast the master beacon frame through the master node and count the number of times the master beacon frame is broadcast. The master beacon frame includes a preamble sequence and frame control information. The node that wins the signal can send a frequency offset correction master beacon frame to other nodes within its communication radius. The master beacon frame includes a preamble sequence and frame control information.

[0050] The preamble contains the following: a known deterministic training symbol sequence (pre-agreed upon by the transmitter and receiver, often using periodic OFDM symbols); the preamble is usually composed of multiple identical or quasi-identical subsequences; a fixed modulation scheme and fixed subcarrier mapping rules (the preamble does not carry service information, and its modulation scheme, subcarrier positions, and power distribution are known); and a high signal-to-noise ratio design (compared to the payload, the preamble has higher transmission power or stronger spectral concentration).

[0051] Frame control information is used to indicate key information such as beacon frame type, sending node identifier, and correction and master election parameters. The receiving node uses the frame control information to determine whether the beacon frame should participate in the current correction and master election process, and extracts the necessary parameters for subsequent calculations.

[0052] Finally, the master selection beacon frame also includes a payload. The receiving node decodes the payload after correctly parsing the frame control information. The payload carries state information, measurement information, or weight parameters for node correction and master selection. By combining its own measured frequency offset information with the received payload content, the receiving node can construct a correction and master selection objective function among nodes. Through comparison or optimization of the objective function, the network-wide node correction and master selection decision is completed.

[0053] Step 403: Use a leader sequence to correct the frequency offset of the child nodes to obtain the corrected frequency; After obtaining the preamble sequence, the frequency offset of the child nodes can be corrected using the preamble sequence to obtain the corrected frequency.

[0054] In one example, step 403 may include the following sub-steps: S31, Determine the target frequency based on the preamble sequence; S32, obtain the current frequency, historical frequency deviation and initial step size of the child node. The historical frequency deviation includes the previous corrected frequency deviation. S33, determine the current frequency deviation based on the current frequency and the target frequency; S34, determine the weighting factor and dynamic adjustment factor based on the current frequency deviation; S35, calculate the adaptive frequency adjustment factor based on historical frequency deviation; S36, calculate the correction step size based on the previous corrected frequency deviation, initial step size, weighting factor, dynamic adjustment factor and adaptive frequency adjustment factor; S37, calculate the corrected frequency based on the correction step size and the current frequency.

[0055] In this embodiment of the invention, the frequency offset can be initially estimated based on the preamble sequence, and then the target frequency that the child node needs to be adjusted can be determined based on the frequency offset. Then, based on the current frequency, historical frequency offset, and initial step size of the child node, a weighting factor, a dynamic adjustment factor, and an adaptive frequency adjustment factor are calculated. Thus, based on the previous corrected frequency offset, the initial step size, the weighting factor, the dynamic adjustment factor, and the adaptive frequency adjustment factor, the correction step size is calculated, and then the corrected frequency is calculated based on the correction step size.

[0056] In the specific implementation, an adaptive frequency adjustment and multiple error correction mechanism are adopted to dynamically adjust the correction strategy based on the node's frequency offset correction history and network congestion. The improvement process mainly includes the following three points: Adaptive adjustment factor: Based on the node adjustment history, an adaptive frequency adjustment factor is used to adjust the step size of frequency correction, making the frequency adjustment more refined, avoiding excessive or insufficient adjustment, and achieving a more accurate synchronization effect.

[0057] Dynamic correction strategy: Based on the channel congestion level and the effect of frequency adjustment, a correction strategy (such as accelerated correction or delayed correction) is dynamically selected. This optimizes the use of channel resources, reduces network congestion, and improves the efficiency of frequency offset correction.

[0058] Weighted frequency offset correction mechanism: For nodes with large frequency offsets, a weighted mechanism is used to provide more frequency offset correction. This weighted mechanism allows for faster correction of large frequency offsets, thus accelerating the synchronization process, which is especially important when there are nodes with large frequency offsets in the network.

[0059] Adaptive frequency adjustment factor: Each node dynamically adjusts the frequency correction step size based on the historical data of the current frequency deviation. Set the adjustment step size for each step as follows: ; in, It is a fixed constant representing the initial step size for the correction. It is an adaptive frequency adjustment factor that is gradually adjusted based on the historical correction process of node frequency offset. . It is the frequency deviation of node i after the kth correction.

[0060] Weighted correction strategy: If the node frequency offset is large (the frequency offset difference between two nodes reaches or exceeds 25ppm), the adjustment can be made by using a weighting factor W. k To increase the correction range, the correction formula is: ; in, , It is a constant that controls the sensitivity of the weighted strategy.

[0061] Dynamic correction strategy: The frequency adjustment strategy is dynamically selected based on the magnitude of the frequency deviation (Δf). When the frequency deviation (Δf) is large, the adjustment rate is accelerated; conversely, the adjustment is slowed down. Strategy selection. It depends on Δf.

[0062] ; To quantitatively represent accelerated and delayed adjustments in the formula, this patent designs a dynamic correction step size control model. This model can adjust the correction step size and correction rate based on the node frequency deviation, historical correction data, and network status. The following is a quantitative representation of accelerated and delayed adjustments: Frequency deviation (Δf): The frequency deviation of a node is set to Δf, which represents the difference between the node's current frequency and the desired frequency.

[0063] Case 1: If Δf is large, it means that the deviation between the node and the desired frequency is large, and the gap can be quickly narrowed by accelerating the adjustment.

[0064] Case 2: If Δf is small, it means that the node is close to the desired frequency. In this case, it is necessary to delay the adjustment and slow down the correction step size for fine adjustment.

[0065] The correction step size is the amount of change in the node frequency deviation. The correction step size increases during accelerated adjustment and decreases during decelerated adjustment. The correction step size can be dynamically determined using an adjustment factor A(Δf).

[0066] Case 1: Accelerated adjustment. When Δf is large, the dynamic adjustment factor A(Δf) increases, the correction step size becomes larger, indicating rapid correction.

[0067] Case 2: Delayed adjustment. When Δf is small, the dynamic adjustment factor A(Δf) decreases, the correction step size becomes smaller, indicating fine correction.

[0068] To incorporate both accelerated and delayed adjustments into the formula, a function A(Δf) that modifies the dynamic adjustment of the step size can be designed to characterize the adjustment behavior of the frequency deviation.

[0069] Frequency correction formula: ; in, This represents the frequency correction value of the node at the current time. It is a dynamic adjustment factor, representing the adjustment magnitude of the correction step size, which depends on the current frequency deviation. . It is the current frequency deviation of the node. = ,in Indicates the current frequency. Indicates the target frequency.

[0070] Adjustment factor Mathematical formula: Scenario 1: Accelerate the adjustment.

[0071] When frequency deviation When it is large, the dynamic adjustment factor Increase (in and (These are constants that are all greater than 0).

[0072] Scenario 2: Delay the adjustment.

[0073] When frequency deviation When it is small, the dynamic adjustment factor Decrease (in , and (These are all constants greater than 0).

[0074] Based on the above research, accelerated adjustment rapidly increases the correction step size when the frequency deviation is large, thereby speeding up the correction process; while delayed adjustment gradually decreases the correction step size when the frequency deviation is small, in order to improve accuracy and avoid overcorrection.

[0075] Combining scenarios 1 and 2, the formula for the comprehensive dynamic correction strategy is: when When it is large, Specifically, when the frequency deviation Δ is large, this embodiment of the invention uses accelerated adjustment, i.e. β>1 will cause the correction step size to increase rapidly as the deviation increases, thus quickly approaching the target frequency.

[0076] when When smaller, Specifically, when the frequency deviation Δf is small, this patent uses a delayed adjustment, that is... At this point, the correction step size decreases as the frequency deviation decreases, allowing for fine-tuning to avoid overcorrection.

[0077] In summary, the mathematical formula for frequency offset correction, taking into account the adaptive factor, weighted correction, and dynamic strategy, is as follows: ; in, To correct the power, f i For the current frequency, The variable represents the node's parsing result for the FC (Frequency Correction) from the previous frequency correction process. If the previous sub-node can correctly parse the primary beacon frame after receiving it, then the variable... This part is represented by 0, otherwise it is represented by 1.

[0078] Step 404: Determine whether the child nodes after correcting the frequency offset can correctly parse the frame control information based on the corrected frequency. After obtaining the correction frequency of the child node, it can be determined whether the corrected child node can correctly parse the frame control information.

[0079] In one example, step 404 may include the following sub-steps: S41, the selected master beacon frame is demodulated using the corrected frequency to obtain frame control information; S42, determine whether the frame control information meets the format constraints and passes the cyclic redundancy check; S43. If the frame control information does not meet the format constraints or fails the cyclic redundancy check, it is determined that the child node after correcting the frequency offset cannot correctly parse the frame control information. S44. If the frame control information meets the format constraints and passes the cyclic redundancy check, it is determined that the child node after correcting the frequency offset can correctly parse the frame control information.

[0080] In the specific implementation, after completing the frequency correction, the child node can demodulate the selected primary beacon frame using the corrected frequency to obtain the frame control information (FC). Then, it is determined whether the frame control information meets the format constraints and passes the cyclic redundancy check (CRC). If the frame control information meets the format constraints and passes the cyclic redundancy check, it is determined that the child node after correcting the frequency offset can correctly parse the frame control information.

[0081] Determining whether the frame control information (FC) meets format constraints is equivalent to checking the structural legality of the FC. These constraints include: whether the field length conforms to the protocol specifications; whether each bit or subfield within the field is within a valid value range; and whether it includes a valid frame type identifier or master selection flag. If the FC field structure does not conform to the expected format, it is determined that the FC has failed to be parsed correctly.

[0082] CRC is a hash function that generates a short, fixed-length checksum based on data such as network packets or computer files. It is primarily used to detect or verify errors that may occur during data transmission or storage. The generated number is calculated before transmission or storage and appended to the data; the receiver then checks it to determine if the data has been altered.

[0083] The child node performs a CRC check on the demodulated FC field: if the CRC check passes, it means that the FC field is reliably received under the current frequency correction state, indicating that the bit error rate is close to 0; if the CRC check fails, it is determined that the current frequency deviation has not yet been corrected to the effective communication range. The CRC check result is the core criterion for determining "whether the FC is correctly parsed".

[0084] If the frame control information does not meet the format constraints or fails the cyclic redundancy check, it is determined that the child node after correcting the frequency offset cannot correctly parse the frame control information.

[0085] Based on the above judgment results, the child node can generate a parsed state flag, for example: ; The flag is used in subsequent frequency correction formulas or strategy adjustment processes.

[0086] Step 405: If so, exit the frequency offset correction process for the child node after frequency offset correction. If the child node can correctly parse the frame control information, the child node exits the frequency offset correction process and returns to step 401.

[0087] Step 406: If the child node after frequency offset correction cannot correctly parse the selected primary beacon frame, return to the step of designating the node that preempts the low-voltage power line channel as the primary node and determining the nodes other than the primary node as child nodes.

[0088] If the child node after frequency offset correction cannot correctly parse the selected primary beacon frame, then return to the step of designating the node that preempts the low-voltage power line channel as the primary node and determining the nodes other than the primary node as child nodes.

[0089] Step 407: Determine whether the number of broadcasts has reached the expected number; Step 408: If not, return to the step of designating the node that preempts the low-voltage power line channel as the master node and the nodes other than the master node as child nodes. Step 409: If yes, determine the current master node as the master node within the network.

[0090] During each iteration, the number of times the master node sends the master selection beacon frame is counted. If the number reaches the expected number, the current node is determined as the final intra-network master node, and the entire correction and master selection process ends.

[0091] Compared with the prior art, the embodiments of the present invention have the following four advantages: 1. Improve frequency synchronization accuracy and shorten master election time by utilizing a multi-stage frequency correction mechanism to accelerate frequency synchronization and reduce master election time. By adopting a multi-stage frequency correction mechanism, nodes can dynamically adjust the correction step size based on historical data when adjusting frequencies, making each frequency correction more accurate and efficient. This mechanism not only better synchronizes node frequencies but also significantly improves convergence speed. Compared to traditional methods, this invention can achieve high-precision frequency synchronization in a short time, effectively shortening the master election process and improving the timeliness of low-voltage power line communication ad hoc networks.

[0092] 2. Reduce node conflicts and improve frequency offset correction efficiency: A dynamic adjustment strategy based on historical feedback reduces inter-node conflicts and improves frequency offset correction efficiency. This invention employs an adaptive adjustment strategy based on historical feedback. Nodes dynamically adjust their correction strategies according to their own correction history and results, avoiding excessive competition and conflicts. This adaptive mechanism ensures that frequency corrections between nodes do not interfere with each other, improving the efficiency of frequency offset correction and reducing conflicts.

[0093] 3. To improve the success rate of inter-node communication and adapt to changes in the channel environment, a parallel correction and feedback mechanism is introduced to ensure efficient synchronization under changing channel conditions. This invention introduces a feedback loop adjustment and parallel correction mechanism, enabling nodes to adjust their frequencies not only based on their own frequency offset information but also through interaction and collaborative adjustment with the frequency offset information of neighboring nodes. This mechanism improves the synchronization accuracy between nodes, enabling timely responses to changes in the channel environment, such as noise or signal attenuation, ensuring the stability of frequency correction and the success rate of communication.

[0094] 4. Reduce system costs and enhance economic efficiency: By employing a low-cost frequency offset correction algorithm, the reliance on high-precision crystal oscillators is reduced, thus lowering the overall system cost. This invention utilizes a low-cost, high-efficiency frequency offset correction algorithm. Even when using low-precision crystal oscillators, it can effectively eliminate frequency deviations between nodes through intelligent adjustment correction strategies, avoiding the high costs associated with using high-precision crystal oscillators. This algorithm significantly reduces hardware costs while ensuring system performance, making low-voltage PLC self-organizing network technology more economical and practically valuable.

[0095] For ease of understanding, the embodiments of the present invention will be described below through specific examples: Please see Figure 5 , Figure 5 A flowchart of a low-voltage power line communication correction and master selection method provided in an embodiment of the present invention.

[0096] Step 1: Initialization Phase. Specifically, after the node group is powered on uniformly, it remains silent for the same duration t.

[0097] Step 2: Channel preemption and master selection beacon frame transmission for frequency offset correction. Specifically, when the quiet period expires, the node group randomly delays within a set time interval. The node with the shortest delay preempts the low-voltage power line channel using the CSMA / CA mechanism. The node that has secured the channel then sends a master selection beacon frame for frequency offset correction to other nodes within its communication radius.

[0098] Step 3: The node adjusts its frequency based on the received frequency offset correction frame. Specifically, after receiving the primary beacon frame with frequency offset correction, the node needs to first calculate the frequency offset adjustment amount, and then calculate the adaptive factor based on historical frequency offset values. A weighted correction strategy is used for correction.

[0099] Step 4: Employ a dynamic correction strategy. Specifically, the node dynamically selects an adjustment strategy based on the magnitude of the frequency deviation (Δf). After adjusting the frequency deviation, the FC is correctly resolved by detection and verification (i.e., CRC).

[0100] Step 5: If the node can correctly resolve the FC, exit the adjustment process. If the node cannot correctly resolve the FC, repeat the adjustment process until the frequency offset adjustment is successful.

[0101] Step 6: When a node sends frequency offset correction master election beacon frames to the maximum expected number of times, the current node becomes the master node, and the master election process ends.

[0102] Please see Figure 6 , Figure 6 This is a structural block diagram of a low-voltage power line communication correction and selection device provided in an embodiment of the present invention.

[0103] This invention provides a low-voltage power line communication correction and selection master device, comprising: The node determination module 601 is used to determine the node that preempts the low-voltage power line channel as the master node after the node group is powered on and silent for the same period of time, and to determine the nodes other than the master node as child nodes. The broadcast module 602 is used to broadcast the master beacon frame through the master node and count the number of times the master beacon frame is broadcast. The master beacon frame includes a preamble sequence and frame control information. The frequency correction module 603 is used to correct the frequency offset of the child nodes using a preamble sequence to obtain the corrected frequency. The parsing and judgment module 604 is used to determine whether the child nodes after the frequency offset correction can correctly parse the frame control information based on the correction frequency. Exit module 605 is used to exit the frequency offset correction process if the frequency offset is corrected. The broadcast count determination module 606 is used to determine whether the broadcast count has reached the expected number of times; Return module 607 is used to return the steps of determining the node that preempts the low-voltage power line channel as the master node and other nodes as child nodes if no. The network master node determination module 608 is used to determine the current master node as the network master node if the condition is met.

[0104] This invention, in the process of frequency correction, relies not only on the frequency offset information of the node itself, but also on the correction information of neighboring nodes, and optimizes the process through a feedback loop mechanism and a parallel correction mechanism. Nodes can share frequency offset information with surrounding nodes and adjust simultaneously, thereby accelerating the frequency offset correction process of the entire network. In other words, this mechanism can improve the efficiency of frequency offset correction, especially in cases of sudden network changes or large node frequency offsets, better adapting to changes in the channel environment, accelerating synchronization between nodes, and improving the success rate of inter-node communication.

[0105] In this embodiment of the invention, the node determination module 601 includes: The node determination submodule is used to determine the master node when the node group is powered on and silent for the same period of time. The nodes in the node group are randomly delayed within a set time interval. The node with the shortest delay is determined and preempts the low-voltage power line channel. The nodes other than the master node are determined as child nodes.

[0106] In this embodiment of the invention, the frequency correction module 603 includes: The target frequency determination submodule is used to determine the target frequency based on the preamble sequence; The data acquisition submodule is used to acquire the current frequency, historical frequency deviation, and initial step size of the child node. The historical frequency deviation includes the previous corrected frequency deviation. The current frequency deviation determination submodule is used to determine the current frequency deviation based on the current frequency and the target frequency. The weighting factor and dynamic adjustment factor determination submodule is used to determine the weighting factor and dynamic adjustment factor based on the current frequency deviation; The adaptive frequency adjustment factor calculation submodule is used to calculate the adaptive frequency adjustment factor based on historical frequency deviations. The correction step size calculation submodule is used to calculate the correction step size based on the previous correction frequency deviation, initial step size, weighting factor, dynamic adjustment factor, and adaptive frequency adjustment factor; The corrected frequency calculation submodule is used to calculate the corrected frequency based on the corrected step size and the current frequency.

[0107] In this embodiment of the invention, it further includes: The parsing failure return module is used to return the steps of designating the node that preempts the low-voltage power line channel as the master node and other nodes as child nodes if the child node after frequency offset correction cannot correctly parse the master beacon frame.

[0108] In this embodiment of the invention, the parsing and judgment module 604 includes: The demodulation submodule is used to demodulate the selected master beacon frame using a modified frequency to obtain frame control information; The judgment submodule is used to determine whether the frame control information meets the format constraints and passes the cyclic redundancy check. The first determination submodule is used to determine that if the frame control information does not meet the format constraints or fails the cyclic redundancy check, the child node after correcting the frequency offset cannot correctly parse the frame control information. The second determination submodule is used to determine whether the child node after correcting the frequency offset can correctly parse the frame control information if the frame control information meets the format constraints and passes the cyclic redundancy check.

[0109] This invention also provides an electronic device, which includes a processor and a memory: The memory is used to store program code and transfer the program code to the processor; The processor is used to execute the low-voltage power line communication correction and master selection method of this invention according to the instructions in the program code.

[0110] This invention also provides a computer-readable storage medium for storing program code for executing the low-voltage power line communication correction and master selection method of this invention.

[0111] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0112] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0113] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0114] Embodiments of the present invention are described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0115] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0116] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0117] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0118] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of the relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0119] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0120] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for correcting and selecting a master in low-voltage power line communication, characterized in that, include: When the node group is powered on and silent for the same period of time, the node that preempts the low-voltage power line channel will be designated as the master node, and the nodes other than the master node will be designated as child nodes. The master node broadcasts a master selection beacon frame and counts the number of times the master selection beacon frame is broadcast. The master selection beacon frame includes a preamble sequence and frame control information. The frequency offset of the child node is corrected using the preamble sequence to obtain the corrected frequency. Based on the corrected frequency, determine whether the child node after correcting the frequency offset can correctly parse the frame control information; If so, remove the child node after correcting the frequency offset from the frequency offset correction process; Determine whether the number of broadcasts has reached the expected number; If not, return to the steps of designating the node that preempts the low-voltage power line channel as the master node and determining the nodes other than the master node as child nodes; If so, designate the current master node as the master node within the network.

2. The method according to claim 1, characterized in that, The step of determining the node that preempts the low-voltage power line channel as the master node and the nodes other than the master node as child nodes after the node group is powered on and silent for the same period of time includes: When the node group is powered on and silent for the same period of time, the nodes in the node group are randomly delayed within a set time interval. The node with the shortest delay is determined as the master node and preempts the low-voltage power line channel. The nodes other than the master node are determined as child nodes.

3. The method according to claim 1, characterized in that, The step of correcting the frequency offset of the child node using the preamble sequence to obtain the corrected frequency includes: The target frequency is determined based on the preamble sequence; Obtain the current frequency, historical frequency deviation, and initial step size of the child node, wherein the historical frequency deviation includes the previous corrected frequency deviation; Determine the current frequency deviation based on the current frequency and the target frequency; The weighting factor and dynamic adjustment factor are determined based on the current frequency deviation. Calculate the adaptive frequency adjustment factor based on the historical frequency deviation; The correction step size is calculated based on the previous corrected frequency deviation, the initial step size, the weighting factor, the dynamic adjustment factor, and the adaptive frequency adjustment factor; The corrected frequency is calculated based on the corrected step size and the current frequency.

4. The method according to claim 1, characterized in that, Also includes: If the child node after frequency offset correction cannot correctly parse the selected master beacon frame, return to the step of designating the node that preempts the low-voltage power line channel as the master node, and determining the nodes other than the master node as child nodes.

5. The method according to claim 1, characterized in that, The step of determining whether the child node after correcting the frequency offset can correctly parse the frame control information based on the corrected frequency includes: The selected master beacon frame is demodulated using the corrected frequency to obtain the frame control information; Determine whether the frame control information meets the format constraints and passes the cyclic redundancy check; If the frame control information does not meet the format constraints or fails the cyclic redundancy check, it is determined that the child node after correcting the frequency offset cannot correctly parse the frame control information. If the frame control information satisfies the format constraints and passes the cyclic redundancy check, it is determined that the child node after correcting the frequency offset can correctly parse the frame control information.

6. A low-voltage power line communication correction and selection device, characterized in that, include: The node determination module is used to determine the node that preempts the low-voltage power line channel as the master node after the node group is powered on and silent for the same period of time, and the nodes other than the master node are determined as child nodes. The broadcast module is used to broadcast the master selection beacon frame through the master node and count the number of times the master selection beacon frame is broadcast. The master selection beacon frame includes a preamble sequence and frame control information. A frequency correction module is used to correct the frequency offset of the child node using the preamble sequence to obtain the corrected frequency. The parsing and judgment module is used to determine whether the child node after the frequency offset correction can correctly parse the frame control information based on the correction frequency. The exit module is used to exit the frequency offset correction process if the frequency offset is corrected. The broadcast count determination module is used to determine whether the broadcast count has reached the expected number of times; The return module is used to return the steps of designating the node that preempts the low-voltage power line channel as the master node and other nodes as child nodes if no. The network master node determination module is used to determine the current master node as the network master node if the condition is met.

7. The apparatus according to claim 6, characterized in that, The node determination module includes: The node determination submodule is used to determine the master node when the node group is powered on and silent for the same period of time. The nodes in the node group are randomly delayed within a set time interval. The node with the shortest delay is determined and preempts the low-voltage power line channel. The nodes other than the master node are determined as child nodes.

8. The apparatus according to claim 6, characterized in that, The frequency correction module includes: The target frequency determination submodule is used to determine the target frequency based on the preamble sequence; The data acquisition submodule is used to acquire the current frequency, historical frequency deviation and initial step size of the sub-node, wherein the historical frequency deviation includes the previous corrected frequency deviation; The current frequency deviation determination submodule is used to determine the current frequency deviation based on the current frequency and the target frequency; The weighting factor and dynamic adjustment factor determination submodule is used to determine the weighting factor and dynamic adjustment factor based on the current frequency deviation; An adaptive frequency adjustment factor calculation submodule is used to calculate the adaptive frequency adjustment factor based on the historical frequency deviation. The step size calculation submodule is used to calculate the correction step size based on the previous correction frequency deviation, the initial step size, the weighting factor, the dynamic adjustment factor, and the adaptive frequency adjustment factor. The frequency correction calculation submodule is used to calculate the correction frequency based on the correction step size and the current frequency.

9. An electronic device, characterized in that, The device includes a processor and a memory: The memory is used to store program code and transmit the program code to the processor; The processor is configured to execute the low-voltage power line communication correction and master selection method according to any one of the instructions in the program code.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store program code for executing the low-voltage power line communication correction and master selection method according to any one of claims 1-5.

Images