Borosilicate system tgv glass interposer composite interconnect structure for three-dimensional integrated circuit package and preparation method and application thereof

Abstract

The present application relates to the field of advanced semiconductor packaging technology, and particularly relates to a borosilicate system TGV glass interposer composite interconnection structure for three-dimensional integrated circuit packaging and a preparation method and application thereof. The structure comprises a borosilicate glass interposer, a TGV through array penetrating the interposer, a low-loss insulation / adhesion layer arranged on the upper and lower surfaces of the interposer, a fine re-routed layer, a ground shielding via array and a thermal diffusion metal layer. By adopting borosilicate glass as the core material of the interposer, realizing vertical interconnection through TGV, constructing a ground shielding and power integrity enhancement structure around the high-speed signal channel, and introducing a thermal diffusion layer and a stress buffer insulation layer, the requirements of high-density interconnection, low insertion loss, low crosstalk, low warpage and high reliability can be met. The structure is suitable for three-dimensional packaging scenes such as AI accelerator, high-performance computing, radio frequency front end, co-packaged optical and high-reliability sensor.

Description

Technical Field

[0001] This invention belongs to the field of advanced electronic packaging and three-dimensional integration technology, specifically relating to a borosilicate-based TGV glass interposer composite interconnect structure for three-dimensional integrated circuit packaging and its preparation method, which is particularly suitable for high bandwidth, high frequency, high density and high reliability packaging scenarios. Background Technology

[0002] In the post-Moore era, the path of improving system performance by continuously shrinking the size of a single chip has gradually approached its limit. Heterogeneous integration, chip-to-chip integration, and system-in-package based on 2.5D / 3D packaging have become important technical routes to improve bandwidth density, shorten signal paths, and reduce system power consumption, especially in the fields of AI accelerators, high-performance computing, and RF front-ends.

[0003] The main material bottlenecks for improving the performance of 3D packaging currently lie in three aspects: the interposer, the metal interconnect, and the electrical insulation material. Among them, the interposer needs to simultaneously meet multiple requirements such as high-density wiring, low dielectric loss, dimensional stability, thermomechanical matching, and large-size processing compatibility; the metal interconnect needs to balance low resistance, high reliability, and high aspect ratio forming capability; and the electrical insulation material needs to achieve a balance between low loss, heat resistance, mechanical buffering, and interface adhesion.

[0004] Under the aforementioned constraints, the TGV (Through-Glass Via) route has become an important candidate for 3D packaging. Among various glass systems, borosilicate glass is more suitable as the core material platform defined in this invention. Borosilicate glass combines low dielectric loss, high resistivity, good surface flatness, and thermal expansion characteristics compatible with silicon chips. This is beneficial for high-speed, low-loss signal transmission, reducing the risk of package warpage and thermal cycling failure, while also possessing good process maturity and cost controllability.

[0005] However, existing borosilicate-based TGV interposers still have several problems: First, the intrinsic thermal conductivity of glass is relatively low, making it difficult to independently handle heat dissipation in hot areas of high-power chips; second, the direct bonding ability between borosilicate glass and copper layers is limited, requiring synergistic enhancement through interface layers and low-loss polymers; third, under the combined effect of high-speed signals and power distribution networks, the lack of grounding shielding and power integrity optimization design can easily lead to crosstalk, discontinuous return paths, and local resonance problems; fourth, reliability risks such as cracks, hole wall defects, and residual stress still exist during the TGV via forming, filling, and thinning processes. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of existing borosilicate TGV glass interposers in terms of thermal management, interface bonding, power integrity, and long-term reliability, and to propose a composite interconnect structure that combines low loss, high density, low warpage, low crosstalk, and thermal reliability to support the application of 3D integrated circuit packaging in AI, high-performance computing, and high-frequency radio frequency fields.

[0007] Borosilicate systems are chosen because, compared to organic interposers, they offer better dimensional stability, lower dielectric loss, and higher wiring precision. Compared to silicon interposers, their high resistivity and low high-frequency loss characteristics are more advantageous for radio frequency and high-speed signal transmission. Furthermore, borosilicate glass can achieve TGV vias through processes such as laser etching and reflow, and can be integrated with fine RDLs, shielded vias, passive devices, and heterogeneous chips to form a highly compatible interposer platform. Therefore, it is a preferred material system that balances performance, reliability, and engineering feasibility.

[0008] This invention modifies the glass system, using a borosilicate-based TGV glass interposer composite interconnect structure. A borosilicate glass substrate serves as the core carrier of the interposer, forming a TGV array within the substrate and using metal filling to create vertical conductive paths. Low-loss insulating adhesive layers and fine redistribution layers are constructed on the upper and lower surfaces of the glass substrate, respectively, to achieve high-density redistribution connections between the chip side and the package substrate side. For high-speed signal regions, a ground-shielded TGV array is deployed around signal vias, and electromagnetic shielding and return current channels are constructed in conjunction with a ground plane. For high-power chip regions, a heat-diffusing metal layer or thermal channel array is locally integrated into the interposer, thereby balancing electrical performance, thermal performance, and mechanical reliability. Attached Figure Description

[0009] A borosilicate-based TGV glass interposer composite interconnect structure for three-dimensional integrated circuit packaging and its fabrication method are disclosed below.

[0010] Example 1

[0011] A borosilicate-based TGV interposer package for AI accelerators / HPC utilizes a 200μm thick borosilicate glass as the core interposer. A TGV array with apertures of 30–60 μm is formed within the glass, and copper filler is used to create vertical interconnects. Low-loss polymer layers and a double-layer RDL are formed on the upper and lower surfaces of the glass, respectively. Computational chips and HBM memory chips are arranged on the upper surface of the interposer, while the lower surface is connected to an organic packaging substrate. A grounded shielded TGV array is positioned around the high-speed signal channel between the computational chips and the HBM, and a locally heat-diffusing metal layer is placed directly beneath the computational chips. This structure is suitable for high-bandwidth, high I / O density, and low-latency packaging applications.

[0012] Example 2

[0013] This borosilicate-based TGV wafer-level package for RF front-ends uses low-loss borosilicate glass as the cover / intermediate material, forming a TGV array within the glass and constructing an RDL on the glass surface for filters, antenna feeds, or passive network connections. A grounded ring TGV structure reduces RF signal leakage and crosstalk; the cavity and metal sealing layer design improves the device's hermeticity and long-term reliability. This structure is suitable for SAW / BAW filters, millimeter-wave front-end modules, and passive device packaging.

[0014] Example 3

[0015] Heterogeneous packaging for co-packaged optics and MEMS uses ultra-thin borosilicate glass as an interlayer or cover plate, and builds TGV and RDL networks required for optoelectronic chip interconnection on the glass to achieve high-density integration of optical chips, electrical chips and driver chips; or forms a vacuum cavity packaging structure by combining TGV with glass cover plate to meet the requirements of optical transparency, reliable sealing and vertical lead output.

[0016] The main application scenarios for this invention are:

[0017] 1) AI Accelerator and High-Performance Computing: Used for 2.5D / 3D heterogeneous integration of logic chips and HBM to meet the requirements of high bandwidth, low latency, and low power interconnect.

[0018] 2) RF front-end and filter packaging: Utilizing the advantages of low loss, high insulation and high Q of borosilicate glass, it is suitable for 5G / 6G filters, antennas, millimeter-wave passive devices and SIW structures.

[0019] 3) Co-packaged optics: It can serve as a high-density interconnect carrier between electrical chips and silicon photonic chips, supporting higher communication bandwidth and more compact packaging.

[0020] 4) MEMS / sensor wafer-level packaging: Taking advantage of the transparency, good sealing and convenient vertical interconnection of borosilicate glass, it is suitable for motion sensors, vacuum packaging and optical sensor packaging.

Claims

1. A borosilicate-based TGV glass interposer composite interconnect structure for three-dimensional integrated circuit packaging, characterized in that: A borosilicate glass interposer; a plurality of TGV vias extending through the thickness direction of the borosilicate glass interposer; a conductive metal layer or composite conductive layer filling the TGV vias; an insulating adhesive layer disposed on the upper and lower surfaces of the borosilicate glass interposer; and at least one redistribution layer (RDL) disposed on the insulating adhesive layer. A grounded shielded TGV array surrounding a high-speed signal TGV; a grounded metal plane electrically connected to the grounded shielded TGV array; and a heat-diffusion metal layer or heat channel structure located at the corresponding position of the hot spot area.

2. The composite interconnect structure according to claim 1, characterized in that... The thickness of the borosilicate glass interlayer is 50–500 μm, and the coefficient of thermal expansion of the glass is matched with that of the silicon chip and packaging system to reduce the risk of packaging warpage and thermal cycling failure.

3. The composite interconnect structure according to claim 1, characterized in that... The diameter of the TGV via is 10–100 μm, the spacing between the vias is 20–200 μm, and the aspect ratio is 1–70. The TGV via is one of the following: straight hole, tapered hole, double tapered hole, or near-vertical hole.

4. The composite interconnect structure according to claim 1, characterized in that... The insulating adhesive layer is one or more of polyimide, benzocyclobutene, PBO, dry film dielectric or low dielectric loss polymer, used to improve the interfacial bonding strength between borosilicate glass and metal layer and buffer thermal stress.

5. The composite interconnect structure according to claim 1, characterized in that... The grounded shielded TGV array is arranged around the high-speed signal TGV or high-speed differential line to form a coaxial, quasi-coaxial or fence-type electromagnetic shielding structure to reduce crosstalk and power / ground noise coupling.

6. A method for preparing the composite interconnect structure according to any one of claims 1 to 6, comprising the following steps: 1) Provide a borosilicate glass substrate and form TGV holes using laser-induced deep etching, laser drilling, sandblasting, wet / dry etching or glass reflow processes; 2) A barrier layer and a seed layer are formed on the inner wall of the TGV hole; 3) Conductive vias are formed by electroplating, chemical plating, slurry filling and sintering, or composite filling methods; 4) Thinning, grinding, and chemical mechanical polishing are performed on the upper and lower surfaces of the borosilicate glass substrate; 5) An insulating adhesive layer and a rewiring layer are formed on both sides of the glass substrate; 6) Construct a grounded shielded TGV array, a grounded metal plane, and a heat diffusion structure; 7) Microbumps, pads, or hybrid bonding interfaces are formed on the surface of the interposer for chip and packaging substrate integration. Copper plating or copper-based conductive paste is used for filling to obtain a low-resistance, high-reliability vertical interconnect structure.