An interleaved three-phase single-stage boost inverter and a carrier phase-shifted modulation method, device and medium thereof
By combining interleaved parallel three-phase single-stage boost inverters with carrier phase-shift modulation technology, the problems of large inductor size, large input current ripple, and device stress concentration in traditional three-phase single-stage boost inverters are solved, achieving the effects of reduced inductor size, reduced ripple, and extended device life.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-01
- Publication Date
- 2026-06-26
AI Technical Summary
Existing three-phase single-stage boost inverters suffer from problems such as large inductor size, large input current ripple, and device stress concentration in high-current applications, which especially affect device lifespan and system reliability under high-frequency operation.
An interleaved parallel three-phase single-stage boost inverter combined with carrier phase-shift modulation technology is adopted. By dividing the six interleaved bridge arms into three phases, with two symmetrically parallel interleaved bridge arms in each phase, the carrier phase-shifting strategy is used to achieve ripple cancellation between the three phases and within the phase. The ripple cancellation effect is optimized by combining the carrier phase-shifting modulation strategy.
It achieves a reduction of more than 30% in input current ripple, doubles the equivalent switching frequency, reduces inductor size, reduces device losses, and improves device lifespan and system reliability.
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Figure CN122292925A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronic converters, and in particular to an interleaved parallel three-phase single-stage boost inverter and its carrier phase-shift modulation method, device and medium. Background Technology
[0002] Wide-bandgap semiconductor devices, represented by silicon carbide and gallium nitride, have driven the development of DC-DC boost converters towards higher frequencies, higher power levels, and higher power densities due to their high-frequency operation, low loss, and high-temperature resistance. Three-phase single-stage boost inverters have become the mainstream topology for medium and high-power DC-DC boost stages due to their natural three-phase power balance, smooth input and output characteristics, and moderate control complexity. They are widely used in photovoltaic, fuel cell, and data center power supply fields.
[0003] Existing three-phase single-stage boost inverters generally adopt a single-branch topology for each phase. Although this topology is simple in structure, it has significant limitations in high-current applications: First, the inductor needs to carry the full phase current, and a large inductance value is required to limit current ripple, which directly leads to an increase in inductor size and a decrease in power density. Second, with the three-phase switches operating synchronously or in a fixed phase, the input current ripple cannot be naturally canceled out, and high input current ripple requires a large-capacity input filter capacitor to suppress bus voltage fluctuations. Third, the switching devices carry the full branch current, resulting in highly concentrated conduction and switching losses, and the thermal stress under high-frequency operation reduces the lifespan of the devices and the reliability of the system.
[0004] Interleaved parallel technology enables multiple homogeneous branches to operate with phase shifting, achieving current ripple cancellation between branches, reducing the total current ripple amplitude, and shunting the load, thus improving converter performance. Carrier phase-shift pulse width modulation (CPS-PWM) further optimizes ripple cancellation and increases the equivalent switching frequency by precisely allocating the carrier phase, thereby improving output power quality. Currently, multiphase interleaving and carrier phase-shifting technologies have been verified in various inverters. However, research on the operating modes and ripple relationships of three-phase six-carrier boost inverters with dual-branch interleaving per phase combined with three-phase carrier phase shifting is still relatively scarce, and mature topologies and modulation schemes have not yet been developed.
[0005] Therefore, developing a three-phase single-stage boost inverter that combines interleaved parallel connection and carrier phase-shift modulation to solve the problems of large input current ripple, large inductor size, and device stress concentration in traditional topologies has become a feasible solution. Summary of the Invention
[0006] The purpose of this application is to provide an interleaved parallel three-phase single-stage boost inverter and its carrier phase-shift modulation method, equipment and medium to solve the problems of large input current ripple, large inductor size and device stress concentration in traditional topologies.
[0007] To achieve the above objectives, this application provides the following solution: In the first aspect, this application provides an interleaved parallel three-phase single-stage boost inverter, including a DC input power supply and three output filter capacitors, adopting a DC input and three-phase sinusoidal AC output form, and also including: six interleaved bridge arms and a controller; The six staggered arms are divided into three phases, each phase consisting of two symmetrically connected staggered arms in parallel; Each of the interleaved bridge arms includes an input inductor and two complementary switching transistors, the input inductor and the two switching transistors forming a boost branch; The input terminals of the two interleaved bridge arms of each phase are connected in parallel to the DC input power supply, and the output terminals are connected in parallel to one end of the output filter capacitor of the same phase. The three output filter capacitors are respectively connected to the three positive terminals of the AC load, and the other end of the three-phase output filter capacitors is grounded with the negative terminal of the DC input power supply. The output filter capacitors are used to filter out the DC component and smooth the output voltage waveform of each phase. In the interleaved parallel operation mode, the ripple of the output filter capacitors is reduced synchronously. The controller employs a carrier phase-shift modulation strategy, which shifts the carrier phases of the three phases by 120° sequentially, and shifts the carrier phases of the two staggered arms within each phase by 180°, thereby achieving ripple cancellation between the three phases and within each phase.
[0008] Secondly, this application provides a carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter, characterized in that it includes: A three-phase modulation wave is generated, which corresponds to the three-phase output of the above-mentioned interleaved parallel three-phase single-stage boost inverter; A carrier signal is generated, wherein the three-phase carrier signals are shifted by 120° in sequence, and the carrier signals corresponding to the two staggered bridge arms in each phase are shifted by 180°. The three-phase modulated wave is compared with the two carrier signals of the corresponding phase to generate the drive signal for each switch. The switching state of the switching transistors in each interleaved bridge arm is controlled according to the drive signal, so that the interleaved parallel three-phase single-stage boost inverter switches between different operating states to achieve current sharing and ripple cancellation.
[0009] Thirdly, this application provides a computer device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the above-described carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter.
[0010] Fourthly, this application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter.
[0011] According to the specific embodiments provided in this application, this application has the following technical effects: This application divides six interleaved bridge arms into three phases, with each phase including two symmetrically parallel interleaved bridge arms. Each interleaved bridge arm includes an input inductor and two complementary conducting switches, forming a boost branch. The input terminals of the two interleaved bridge arms in each phase are connected in parallel to the DC input power supply, and the output terminals are connected in parallel to one end of the output filter capacitor of the same phase. The three output filter capacitors are respectively connected to the three-phase positive terminals of the AC load, and the other end of the three-phase output filter capacitors shares a common ground with the negative terminal of the DC input power supply. This constructs an interleaved parallel three-phase single-stage boost inverter combining carrier phase-shift modulation and interleaved parallel connection. The structure is simple, and ripple suppression and performance optimization are achieved, making it suitable for high-power, high-frequency applications. The controller adopts a carrier phase-shift modulation strategy, which shifts the carrier phase between the three phases by 120° sequentially, and shifts the carrier phase of the two interleaved bridge arms within each phase by 180°, achieving ripple cancellation between the three phases and within each phase. The input current ripple is reduced by more than 30% compared to the traditional topology, the equivalent switching frequency is doubled, and the input current waveform quality is improved. The topology of the double-symmetric staggered bridge arms in each phase achieves current sharing, allowing for the use of inductors with smaller inductance values and reducing inductor size. At the same time, the current stress on individual devices is reduced, losses are reduced, and device lifespan is improved. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 A topology diagram of an interleaved parallel three-phase single-stage boost inverter provided in one embodiment of this application; Figure 2 A schematic flowchart illustrating a carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter provided in an embodiment of this application; Figure 3 for Figure 1 A schematic diagram of the modulation strategy; Figure 4 for Figure 1 Schematic diagram of state a of phase A in the middle; Figure 5 for Figure 1Schematic diagram of phase A in the middle; Figure 6 for Figure 1 Schematic diagram of state c of phase A in the middle; Figure 7 for Figure 1 Schematic diagram of state d of phase A in the middle; Figure 8 This is a schematic diagram of the input voltage waveform; Figure 9 This is a schematic diagram of the three-phase output capacitor voltage, three-phase output load voltage, input current, and A-phase input inductor current of a traditional three-phase single-stage boost inverter. Figure 10 This is a schematic diagram of the three-phase output capacitor voltage, three-phase output load voltage, input current, and A-phase input inductor current of a three-phase single-stage boost inverter containing only carrier phase-shift modulation. Figure 11 This is a schematic diagram showing the three-phase output capacitor voltage, three-phase output load voltage, input current, and A-phase input inductor current of a three-phase single-stage boost inverter with only interleaved parallel connections. Figure 12 This is a schematic diagram of the three-phase output capacitor voltage, three-phase output load voltage, input current, and A-phase input inductor current of a three-phase single-stage boost inverter that simultaneously incorporates carrier phase-shift modulation and interleaved parallel connection. Figure 13 This diagram illustrates the input current ripple and the A-phase input inductor current ripple of a traditional three-phase single-stage boost inverter. Figure 14 This diagram illustrates the input current ripple and the A-phase input inductor current ripple of a three-phase single-stage boost inverter containing only carrier phase-shift modulation. Figure 15 This is a schematic diagram showing the input current ripple of a three-phase single-stage boost inverter with only interleaved parallel connections and the input inductor current ripple of phase A. Figure 16 This diagram illustrates the input current ripple and the A-phase input inductor current ripple of a three-phase single-stage boost inverter that simultaneously incorporates carrier phase-shift modulation and interleaved parallel operation. Detailed Implementation
[0014] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0015] To make the objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0016] like Figure 1 As shown in the figure, this application embodiment provides an interleaved parallel three-phase single-stage boost inverter, including a DC input power supply and three output filter capacitors, adopting a DC input and three-phase sinusoidal AC output form, and also including: six interleaved bridge arms and a controller.
[0017] The six staggered bridge arms are divided into three phases, with each phase comprising two symmetrically connected staggered bridge arms in parallel. Each staggered bridge arm includes an input inductor and two complementary conducting switches, which together form a boost branch.
[0018] The input terminals of the two interleaved bridge arms of each phase are connected in parallel to the DC input power supply, and the output terminals are connected in parallel to one end of the output filter capacitor of the same phase.
[0019] The three output filter capacitors are respectively connected to the three positive terminals of the AC load, and the other end of the three-phase output filter capacitors is grounded with the negative terminal of the DC input power supply. The output filter capacitors are used to filter out the DC component and smooth the output voltage waveform of each phase. In the interleaved parallel operation mode, the ripple of the output filter capacitors is reduced synchronously.
[0020] The controller employs a carrier phase-shift modulation strategy, which shifts the carrier phases of the three phases by 120° sequentially, and shifts the carrier phases of the two staggered arms within each phase by 180°, thereby achieving ripple cancellation between the three phases and within each phase.
[0021] Figure 1 middle, S A1 - S A4 For switching transistors, L A1 and L A2 For input inductance.
[0022] In practical applications, the interleaved parallel three-phase single-stage boost inverter provided in this application is a three-phase single-stage boost inverter that simultaneously includes carrier phase-shift modulation and interleaved parallel connection.
[0023] This application connects the DC input power supply, six inductors, twelve gallium nitride (GaN) switching transistors, and three-phase output filter capacitors in a specific manner to form a three-phase topology with two symmetrical interleaved bridge arms per phase. A carrier modulation strategy is designed for the interleaved parallel three-phase single-stage boost inverter. The phase of the modulated wave and the carrier wave is calculated to determine the switching transistor turn-on and turn-off logic. Based on the carrier modulation strategy, the on / off state of each bridge arm switching transistor is controlled, enabling the inverter to switch between different operating states, achieving current sharing and ripple cancellation, and obtaining a sinusoidal AC voltage output to drive the load.
[0024] This application integrates Carrier Phase Shift Pulse Width Modulation (CPS-PWM) with interleaved parallel technology, designing a topology with two symmetrical interleaved bridge arms per phase, and is equipped with a three-phase six-carrier modulation strategy. This overcomes the problems of large input current ripple, large inductor size, and stress concentration of switching devices in traditional three-phase single-stage boost inverters. By shifting the three-phase carrier by 120° and interleaving the carrier within each phase by 180°, the input current ripple is significantly suppressed, and the equivalent switching frequency is doubled.
[0025] The staggered structure of dual branches per phase can achieve current sharing, reduce the current stress of single inductors and single switching devices, make it easier to select inductors with smaller inductance values, and reduce the size of magnetic components and winding copper losses.
[0026] This application inherits the advantages of traditional single-stage boost inverters, such as simple structure and stable AC / DC conversion, while reducing the current and thermal stress on individual inductors and switching transistors, making it suitable for high-frequency, high-power applications. Therefore, the interleaved parallel three-phase single-stage boost inverter proposed in this application based on carrier phase-shift modulation features low input current ripple, low device stress, excellent power quality, and suitability for high-frequency, high-power scenarios.
[0027] In one exemplary embodiment, the switching transistor is a gallium nitride switching transistor.
[0028] In one exemplary embodiment, the controller generates drive signals to control the switching of the transistors in the six interleaved bridge arms.
[0029] In one exemplary embodiment, the inductance value of the input inductor is less than half of the inductance value required without an interleaved parallel structure, in order to reduce the current stress on a single inductor.
[0030] like Figure 2 As shown, this application also provides a carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter, comprising: S1: Generate a three-phase modulation wave, which corresponds to the three-phase output of an interleaved parallel three-phase single-stage boost inverter.
[0031] S2: Generate carrier signals, wherein the three-phase carrier signals are shifted by 120° in sequence, and the carrier signals corresponding to the two staggered bridge arms in each phase are shifted by 180°.
[0032] S3: Compare the three-phase modulated wave with the corresponding two-channel carrier signals to generate drive signals for each switch.
[0033] S4: Control the on / off state of the switching transistors in each interleaved bridge arm according to the drive signal, so that the interleaved parallel three-phase single-stage boost inverter switches between different operating states to achieve current sharing and ripple cancellation.
[0034] In an exemplary embodiment, the interleaved parallel three-phase single-stage boost inverter adopts the form of DC input and three-phase sinusoidal AC output, with two symmetrical interleaved bridge arms for each phase, for a total of six interleaved bridge arms. Each bridge arm includes one input inductor and two complementary gallium nitride (GaN) switches, which are adapted to the high-frequency operation requirements of the inverter.
[0035] The two staggered bridge arms of each phase are connected in parallel to the output filter capacitor of the same phase. The three-phase output filter capacitors are respectively connected to the three positive terminals of the AC load, and the negative terminals of the output filter capacitors are grounded with the negative terminal of the DC power supply.
[0036] The entire topology consists of one DC input power supply, six input inductors, twelve gallium nitride (GaN) switches, and three output filter capacitors. The three-phase carriers are sequentially phase-shifted by 120°, and the carriers of the two interleaved arms within each phase are phase-shifted by 180°, achieving ripple cancellation between and within the three phases. See the topology diagram. Figure 1 .
[0037] The output filter capacitor is used to filter out the DC component and smooth the output voltage waveform of each phase. In the interleaved parallel operation mode, the ripple of the output capacitor is also reduced synchronously, and sinusoidal AC output can be achieved without the need for additional filter components.
[0038] In an exemplary embodiment, S1 specifically includes: S11: Assume the three-phase output voltage is... V AO , V BO , V CO for: The three-phase duty cycle is calculated based on the relationship between the input voltage, output voltage, and duty cycle; the three-phase duty cycle is: ;in, d A , d B , d C For three-phase duty cycle, V Om The output voltage amplitude, V in DC input voltage K The DC component coefficient of the output voltage relative to the input voltage. ω This is the angular frequency of the output voltage.
[0039] S12: Determine the phase relationship between the modulation wave and the carrier based on the three-phase duty cycle, such that the time difference between interphase carriers is one-third of the switching period, and the time difference between intraphase carriers is one-half of the switching period, thereby generating a three-phase modulation wave; the time difference between interphase carriers for: The time difference of the intra-phase carrier for: ;in, The switching cycle.
[0040] Interleaved parallel connection causes intraphase ripples to cancel each other out, effectively doubling the switching frequency.
[0041] In an exemplary embodiment, pulse width modulation is applied to the three-phase single-stage boost inverter combining carrier phase-shift modulation and interleaved parallel connection proposed in this application, such as... Figure 3 As shown, where, S i1 and S i3 ( i =A, B, C) are the upper switching transistors of the two arms in each phase. S i1 and S i3 The waveform diagram shows that the waveforms of the lower and upper switching transistors are logically complementary, and are not shown in detail in the diagram.
[0042] First, a three-phase modulated wave is generated. d A , d B , d C and the interleaved carriers of each phase V pi1 , V pi2 ( i = a , b , c ).
[0043] Three-phase modulated wave d A , d B , d C Each is compared with the two carriers of the corresponding phase: S4 specifically includes: S41: When the carrier amplitude is greater than the modulated wave, control the upper switch of the corresponding interleaved bridge arm to turn on and the lower switch to turn off.
[0044] S42: When the carrier amplitude is less than the modulated wave, control the upper switch of the corresponding interleaved bridge arm to turn off and the lower switch to turn on.
[0045] In practical applications, the on and off signals of the switches are sent to the corresponding switching transistors of the interleaved bridge arms to control the on and off of the switches.
[0046] Taking phase A as an example, each phase contains four states depending on the switching state, such as... Figures 4-7 As shown, where, C A It is the output capacitor. V CA It is the capacitor voltage, which is also the inverter output voltage: State a: Carrier V pa1 Greater than the modulated wave d A , S A1 , S A4 On, carrier V pa2 Less than the modulated wave d A , S A2 , S A3 Cut off. Power supply through. L A1 , S A1 Give capacitor C A Charge.
[0047] State b: Carrier V pa1 and V pa2 All are smaller than the modulated wave d A , S A2 , S A4 Conduction, S A1 , S A3 Cut off. The power supply is grounded through an inductor and the switching transistor.
[0048] State c: Carrier V pa2 Greater than the modulated wave d A , S A2 , S A3 On, carrier V pa1 Less than the modulated wave d A ,S A1 , S A4 Cut off. Power supply through. L A2 , S A3 Give capacitor C A Charge.
[0049] State d: Carrier V pa1 and V pa2 All are smaller than the modulated wave d A , S A2 , S A4 Conduction, S A1 , S A3 Cut off. The power supply is grounded through the inductor and the switching transistor. This state is the same as state b.
[0050] The operating states of phases B and C are the same as those of phase A, with the corresponding waveforms of each phase differing by 120° in phase.
[0051] In an exemplary embodiment, S11 further includes: S13: Determine the output voltage amplitude and DC bias voltage based on the boost ratio and DC component coefficient; the output voltage amplitude is: The DC bias voltage for: ;in, B The boost ratio, K This is the ratio of the DC bias voltage to the DC bus voltage, where... K ≥ B +1; S14: Calculate the output current amplitude and the resistive load per phase based on the output power and the output voltage amplitude; the output current amplitude... for: The resistive load R per phase is: ;in, This refers to the output power. S15: Calculate the output capacitance and input inductance based on the output current amplitude, output voltage ripple, and output current ripple; the output capacitance... C for: The input inductor L for: ;in, f sw For switching frequency, NIn this embodiment, the number of phases is staggered in parallel. N =2, This represents the maximum output voltage of the inverter.
[0052] Figures 8-16 The simulation results are based on the LTspice software for the three-phase single-stage boost inverter proposed in this application, which combines carrier phase-shift modulation and interleaved parallel connection. In order to verify the effect of the proposed inverter, simulations were performed on four topologies: a traditional three-phase single-stage boost inverter, a three-phase single-stage boost inverter with only carrier phase-shift modulation, a three-phase single-stage boost inverter with only interleaved parallel connection, and a three-phase single-stage boost inverter that includes both carrier phase-shift modulation and interleaved parallel connection. Figure 8 Display the input voltage waveform. Figures 9-12 The three-phase output capacitor voltages of four topologies are shown. V CA , V CB , V CC Three-phase output load voltage V RA , V RB , V RC Input current I in and the input inductor current of phase A. I LA1 (In a topology with interleaved parallel connections, phase A has an additional input inductor current) I LA2 ( ), the waveform within multiple modulation wave cycles. Figures 13-16 The input current ripple of four topologies over multiple switching cycles is shown. I in and input inductor current ripple I LA1 (In a topology with interleaved parallel connections, phase A has an additional input inductor current) I LA2 ). Figures 8-16 The horizontal axis represents time, in milliseconds (ms).
[0053] Setting the DC input voltage in the simulation V in =100V, required load voltage amplitude V o =310V, boost ratio B =2, DC component coefficient K =3.5, output AC voltage frequency f o =50kHz, output power P o=675W; Output capacitor C =32 μ H, the input inductance per phase in a topology without interleaved parallel connections. L i1 ( i =A, B, C) is 245 μ H, the interleaved inductance per phase in a topology containing interleaved parallel connections. L i1 , L i2 ( i =A, B, C) is 123 μ H.
[0054] Depend on Figures 9-12 As can be seen, since the variables among the four inverters primarily affect the switching frequency, mainly altering the voltage and current ripple, the overall output capacitor voltage and load voltage of the four topologies are essentially consistent. From the perspective of input current, the traditional three-phase single-stage boost inverter topology exhibits significant input current fluctuations and pronounced ripple. Adding only carrier phase shift significantly improves the input current ripple, but the switching frequency of the ripple remains unchanged. Adding interleaved parallel connection increases the switching frequency of the ripple, resulting in a more regular waveform. Regarding the input inductor current of phase A, carrier phase shift has little impact on the overall waveform of the input inductor. However, due to the current shunting effect of the interleaved parallel connection, the inductor current in both the original and interleaved phases of phase A is reduced to about half its original value, and the low-frequency ripple amplitude is also significantly reduced, lowering the current stress on each inductor and its branch.
[0055] Depend on Figures 13-16 As can be seen from the input current ripple, the input current ripple after adding carrier phase shift is reduced to approximately 34.3% of the original ripple of a traditional three-phase boost inverter. The input current ripple of the inverter topology with interleaved parallel connection alone is almost the same as that of the traditional three-phase boost inverter, but the inductance values of the two inductors in each phase of the interleaved parallel connection are only half that of the non-interleaved parallel connection. Although the peak-to-peak value of the high-frequency ripple increases after adding interleaved parallel connection to the existing three-phase boost inverter topology with carrier phase shift, due to the reduced inductance values of the interleaved parallel connection, its switching frequency increases from 50kHz to 100kHz. Furthermore, unlike the input current ripple of a three-phase single-stage boost inverter with only carrier phase shift modulation, which exhibits alternating magnitudes, the waveform regularity of the input current ripple of the three-phase single-stage boost inverter with carrier phase shift modulation and interleaved parallel connection is significantly improved, enhancing waveform quality.
[0056] from Figures 13-16A comparison of the input inductor current waveforms shows that carrier shift has little impact on the ripple of a single inductor current. While the interleaved parallel connection does not significantly affect the amplitude of the ripple on a single inductor, the interleaved inductors cancel each other out, which reduces the ripple of the combined input inductor current for each phase. Furthermore, due to the current shunting effect, the current flowing through each inductor is reduced, thereby reducing the current pressure and losses of each inductor.
[0057] The simulation results show that the proposed inverter topology does indeed reduce input current ripple, reduce input inductor current pressure, and reduce individual device losses.
[0058] In an exemplary embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments. The computer device can be a server or a terminal. The computer device includes a processor, a memory, an input / output interface (I / O), and a communication interface. The processor, memory, and I / O interface are connected via a system bus, and the communication interface is connected to the system bus via the I / O interface. The processor of the computer device provides computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the computer device stores data to be processed. The I / O interface of the computer device is used for exchanging information between the processor and external devices. The communication interface of the computer device is used for communicating with an external terminal via a network connection. When the computer program is executed by the processor, it implements the above-described methods.
[0059] In one exemplary embodiment, a computer-readable storage medium is provided storing a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.
[0060] In one exemplary embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.
[0061] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.
[0062] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by hardware related to computer program instructions. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM).
[0063] The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.
[0064] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0065] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. An interleaved parallel three-phase single-stage boost inverter, comprising a DC input power supply and three output filter capacitors, characterized in that, It adopts a DC input and a three-phase sinusoidal AC output form, and also includes: six interleaved bridge arms and a controller; The six staggered arms are divided into three phases, each phase consisting of two symmetrically connected staggered arms in parallel; Each of the interleaved bridge arms includes an input inductor and two complementary switching transistors, the input inductor and the two switching transistors forming a boost branch; The input terminals of the two interleaved bridge arms of each phase are connected in parallel to the DC input power supply, and the output terminals are connected in parallel to one end of the output filter capacitor of the same phase. The three output filter capacitors are respectively connected to the three positive terminals of the AC load, and the other end of the three-phase output filter capacitors is grounded with the negative terminal of the DC input power supply. The output filter capacitors are used to filter out the DC component and smooth the output voltage waveform of each phase. In the interleaved parallel operation mode, the ripple of the output filter capacitors is reduced synchronously. The controller employs a carrier phase-shift modulation strategy, which shifts the carrier phases of the three phases by 120° sequentially, and shifts the carrier phases of the two staggered arms within each phase by 180°, thereby achieving ripple cancellation between the three phases and within each phase.
2. The interleaved parallel three-phase single-stage boost inverter according to claim 1, characterized in that, The switching transistor is a gallium nitride switching transistor.
3. The interleaved parallel three-phase single-stage boost inverter according to claim 1, characterized in that, The controller generates drive signals to control the switching on and off of the transistors in the six interleaved bridge arms.
4. The interleaved parallel three-phase single-stage boost inverter according to claim 1, characterized in that, The inductance value of the input inductor is less than half of the inductance value required without using an interleaved parallel structure.
5. A carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter, characterized in that, include: A three-phase modulation wave is generated, wherein the three-phase modulation wave corresponds to the three-phase output of the interleaved parallel three-phase single-stage boost inverter as described in any one of claims 1-4; A carrier signal is generated, wherein the three-phase carrier signals are shifted by 120° in sequence, and the carrier signals corresponding to the two staggered bridge arms in each phase are shifted by 180°. The three-phase modulated wave is compared with the two carrier signals of the corresponding phase to generate the drive signal for each switch. The switching state of the switching transistors in each interleaved bridge arm is controlled according to the drive signal, so that the interleaved parallel three-phase single-stage boost inverter switches between different operating states to achieve current sharing and ripple cancellation.
6. The carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter according to claim 5, characterized in that, The generation of the three-phase modulated wave specifically includes: The three-phase duty cycle is calculated based on the relationship between input voltage, output voltage, and duty cycle; the three-phase duty cycle is: Where dA, dB, and dC are the three-phase duty cycles, VOm is the output voltage amplitude, Vin is the DC input voltage, K is the DC component coefficient of the output voltage relative to the input voltage, and ω is the angular frequency of the output voltage. The phase relationship between the modulated wave and the carrier is determined based on the three-phase duty cycle, such that the time difference between interphase carriers is one-third of the switching period, and the time difference between intraphase carriers is one-half of the switching period, thus generating a three-phase modulated wave; the time difference between interphase carriers... for: The time difference of the intra-phase carrier for: ;in, The switching cycle.
7. The carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter according to claim 5, characterized in that, The on / off state of the switching transistors in each interleaved bridge arm is controlled according to the drive signal, specifically including: When the carrier amplitude is greater than the modulated wave, the upper switch of the corresponding interleaved bridge arm is turned on and the lower switch is turned off. When the carrier amplitude is less than the modulated wave, the upper switch of the corresponding interleaved bridge arm is turned off and the lower switch is turned on.
8. The carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter according to claim 6, characterized in that, The three-phase duty cycle is calculated based on the relationship between input voltage, output voltage, and duty cycle. This also includes: The output voltage amplitude and DC bias voltage are determined based on the boost ratio and DC component coefficient; the output voltage amplitude is: The DC bias voltage for: Where B is the boost ratio, and K is the ratio of DC bias voltage to DC bus voltage, where K≥B+1; Based on the output power and the output voltage amplitude, calculate the output current amplitude and the resistive load per phase; the output current amplitude for: The resistive load R per phase is: ;in, This refers to the output power. Calculate the output capacitance and input inductance based on the output current amplitude, output voltage ripple, and output current ripple; the output capacitance C is: The input inductance L is: Where fsw is the switching frequency and N is the number of interleaved parallel phases. This represents the maximum output voltage of the inverter.
9. A computer device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor executes the computer program to implement the carrier phase-shift modulation method for an interleaved parallel three-phase single-stage boost inverter as described in any one of claims 5-8.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the carrier phase-shift modulation method for the interleaved parallel three-phase single-stage boost inverter as described in any one of claims 5-8.