A data processing method and apparatus

Abstract

A data processing method and apparatus, relating to the field of optical communication technology, are disclosed to improve the access capability of SDH. This application removes a set number of idle bytes from the overhead regions of two STM-4 frames and then maps them to the payload regions of ODU0 or OPU0. This results in the data rate of the two STM-4 frames after the deletion operation being lower than the payload rate of OPU0 or ODU0. This not only reduces resource waste caused by idle bytes but also improves the access capability of SDH.

Description

Technical Field

[0001] This application relates to the field of optical communication technology, and in particular to a data processing method and apparatus. Background Technology

[0002] To promote the replacement of the Synchronous Digital Hierarchy (SDH) with fine-grained optical transport networks (fgOTN), the fiber optic rate of the access ring was upgraded from 622 Mbps to 2.5 Gbps. However, due to the limitations of existing encapsulation standards, optical data unit-0 (ODU0) can only encapsulate one SDH frame, thus not actually improving the access capability of SDH. Summary of the Invention

[0003] This application provides a data processing method and apparatus for improving SDH access capabilities.

[0004] In a first aspect, embodiments of this application provide a data processing method, which is applied to a transmitting device, or a chip or chip system of the transmitting device. The method includes: acquiring two first-level fourth-stage synchronous transmission module STM-4 frames; deleting a predetermined number of bytes from the overhead regions of the two first-level STM-4 frames respectively to obtain two second-level STM-4 frames, wherein the predetermined number of bytes belong to the free bytes of the overhead region of the first-level STM-4 frames; mapping the two second-level STM-4 frames to the payload region of a first optical transport network (OTN) frame; wherein the rate of the two second-level STM-4 frames is less than or equal to the rate of the payload region of the first OTN frame, and the rate of the two first-level STM-4 frames is greater than the rate of the payload region of the first OTN frame.

[0005] In one possible implementation, the first OTN frame is either an Optical Channel Payload Unit (OPU0) frame or an Optical Data Unit (ODU0) frame.

[0006] This application embodiment deletes some or all of the idle bytes in the two first STM-4 frames and then maps them to the OTN frame, so that the rate of the two STM-N frames after deleting bytes is less than the payload rate of the OTN frame. This can map the two STM-N frames to the OTN frame and improve the access capability of SDH.

[0007] In one possible implementation, the set number of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4; or, the set number of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4; or, the set number of bytes includes a first part of bytes and a second part of bytes, wherein the first part of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4, and the second part of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4.

[0008] In the above implementation, by deleting some or all of the idle bytes in the multiplex section overhead area and / or the regenerator section overhead area, the rate of the two STM-4 channels after deletion is made lower than the payload area rate of ODU0 or OPU0. This not only reduces resource waste caused by idle bytes but also improves the access capability of SDH.

[0009] In one possible implementation, the set number of bytes belongs to the bytes of a first region, which is the second to 12th columns, the 14th to 24th columns, and the 26th to 36th columns of the third row of the overhead region of the first STM-4; or,

[0010] The specified number of bytes belong to the second region, which is the second region consisting of columns 2 to 12 of rows 6 to 8, columns 14 to 24 of rows 5 to 8, columns 26 to 36 of rows 5 to 8, columns 2 to 14 of row 9, and columns 16 to 24 of row 9, of the overhead region of the first STM-4; or,

[0011] The first portion of the set number of bytes belongs to the first region, and the second portion of the set number of bytes belongs to the second region.

[0012] In one possible implementation, the overhead region of the first optical transport network (OTN) frame includes first indication information, which indicates that a deletion operation is performed, wherein the deletion operation is an operation that deletes a set number of bytes from the overhead region of the first STM-4 frame.

[0013] The above implementation method uses the overhead area of ​​ODU0 or OPU0 to indicate whether a deletion operation has been performed, which can accommodate schemes that do not perform the operation and improve the flexibility of the application.

[0014] In one possible implementation, the overhead region of the first optical transport network (OTN) frame includes second indication information, which indicates the location of a set number of bytes in the overhead region of the first STM-4.

[0015] In one approach, the location of the deleted byte can be indicated by issuing a configuration through the network management device. In another approach, the location can be indicated by the overhead of ODU0 or OPU0, thus improving the flexibility of the location of the deleted byte.

[0016] In one possible implementation, the overhead region of the first OTN frame includes third indication information, which indicates the set quantity. In the above scheme, the number and position of deleted bytes can be flexibly set, thereby improving flexibility by indicating the number and position of deleted bytes.

[0017] In one possible implementation, the method further includes:

[0018] Send the first OTN frame; or,

[0019] The first OTN frame is mapped into the second OTN frame, and the second OTN frame is sent.

[0020] In one possible implementation, acquiring two STM-4 frames from the first and fourth level synchronization transmission modules includes:

[0021] Receive the first service data;

[0022] The first service data is mapped to the two first STM-4 frames.

[0023] In one possible implementation, the method further includes:

[0024] Receive second service data;

[0025] The second service data is mapped into an fgOTN frame, and the fgOTN frame is mapped into the payload area of ​​another first OTN frame.

[0026] In one possible implementation, two first OTN frames are mapped to one OTU frame.

[0027] Secondly, embodiments of this application provide a data processing method, including:

[0028] Receive the first OTN frame;

[0029] Demap two second-level 4th-level synchronous transmission module STM-4 frames from the first OTN frame;

[0030] The deleted number of bytes in the overhead regions of the two second STM-4 frames are filled with 0 or 1 to restore the two first STM-4 frames; wherein the set number of bytes are free bytes in the overhead region of the first STM-4 frames, the rate of the two second STM-4 frames is less than or equal to the rate of the payload region of the first OTN frame, and the rate of the two first STM-4 frames is greater than the rate of the payload region of the first OTN frame.

[0031] In one possible implementation, the first OTN frame is an Optical Channel Payload Unit (OPU0) frame or an Optical Data Unit (ODU0) frame.

[0032] In one possible implementation, the set number of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4; or, the set number of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4; or, the set number of bytes includes a first part of bytes and a second part of bytes, wherein the first part of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4, and the second part of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4.

[0033] In one possible implementation, the set number of bytes belongs to the bytes of a first region, which is the second to 12th columns, the 14th to 24th columns, and the 26th to 36th columns of the third row of the overhead region of the first STM-4; or,

[0034] The specified number of bytes belong to the second region, which is the second region consisting of columns 2 to 12 of rows 6 to 8, columns 14 to 24 of rows 5 to 8, columns 26 to 36 of rows 5 to 8, columns 2 to 14 of row 9, and columns 16 to 24 of row 9, of the overhead region of the first STM-4; or,

[0035] The first portion of the set number of bytes belongs to the first region, and the second portion of the set number of bytes belongs to the second region.

[0036] In one possible implementation, the method further includes:

[0037] Before filling the predetermined number of deleted bytes in the overhead regions of the two second STM-4 frames with 0 or 1, a first indication information is demapped from the overhead region of the first OTN frame. The first indication information is used to indicate that a deletion operation is performed, which is the operation of deleting a predetermined number of bytes from the overhead region of the first STM-4 frame.

[0038] In one possible implementation, the method further includes:

[0039] The second indication information is demapped from the overhead region of the first OTN frame. The second indication information is used to indicate the position of a set number of bytes in the overhead region of the first STM-4.

[0040] The predetermined number of deleted bytes in the overhead regions of the two second STM-4 frames are filled with 0s or 1s, including:

[0041] According to the position indicated by the second instruction information, fill the predetermined number of deleted bytes in the overhead area of ​​the two second STM-4 frames with 0 or 1 respectively.

[0042] In one possible implementation, receiving the first OTN frame includes:

[0043] Receive the second OTN frame and demap the first OTN frame from the second OTN frame.

[0044] In one possible implementation, the method further includes:

[0045] The first service data is demapped from the two first STM-4 frames.

[0046] Thirdly, embodiments of this application provide a data processing apparatus, which is applied to a transmitting end device or a receiving end device. The apparatus includes a processor and a memory. The memory is used to store program code; the processor is used to read and execute the program code stored in the memory to implement the method as described in the first aspect or any design of the first aspect, or to implement the method as described in the second aspect or any design of the second aspect.

[0047] Fourthly, embodiments of this application provide a data processing apparatus. This apparatus is applied to a transmitting end device or a receiving end device. The apparatus includes a processor and an optical transceiver; the processor is configured to execute the method described in the first aspect or any design of the first aspect, or to execute the method described in the second aspect or any design of the second aspect, and to receive or transmit service data, or receive or transmit OTN frames, via the optical transceiver.

[0048] Fifthly, embodiments of this application provide a computer-readable storage medium storing a software program that, when read and executed by one or more processors, can implement the method provided by any of the designs in the first or second aspects.

[0049] Sixthly, embodiments of this application provide a computer program product containing instructions. When run on a computer, it causes the computer to perform the method provided by any of the designs in the first or second aspects described above.

[0050] In a seventh aspect, embodiments of this application provide a chip. The chip is connected to a memory and is used to read and execute software programs stored in the memory to implement the method provided in either the first or second aspect.

[0051] Based on the implementations provided in the above aspects, this application can be further combined to provide more implementations. Attached Figure Description

[0052] Figure 1 This is a schematic diagram of an OTN network architecture;

[0053] Figure 2 This is a schematic diagram of the structure of an OTN device;

[0054] Figure 3 This is a schematic diagram of an SDH multiplexing process;

[0055] Figure 4 This is a schematic diagram of the structure of an STM-N frame;

[0056] Figure 5 This is a schematic diagram of the segment overhead bytes of an STM-1 microcontroller.

[0057] Figure 6 This is a schematic diagram of the segment overhead bytes of an STM-4.

[0058] Figure 7A This is a schematic diagram of an access ring;

[0059] Figure 7B This is a schematic diagram illustrating the evolution from SDH to OTN.

[0060] Figure 7C This is a schematic diagram of the structure of an OTN frame;

[0061] Figure 8 This is a schematic flowchart of the data processing method provided in the embodiments of this application;

[0062] Figure 9 This is a schematic diagram of the data processing flow provided in the embodiments of this application;

[0063] Figure 10 A schematic diagram showing the location of the deleted byte in RSOH as provided in the embodiments of this application;

[0064] Figure 11 This is a schematic diagram showing the location of the deleted byte in the MSOH, provided in an embodiment of this application.

[0065] Figure 12 A schematic diagram showing the location of the deleted byte in RSOH as provided in the embodiments of this application;

[0066] Figure 13 This is a schematic diagram showing the location of the deleted byte in the MSOH, provided in an embodiment of this application.

[0067] Figure 14 This is a schematic diagram showing the location of the deleted byte in the MSOH, provided in an embodiment of this application.

[0068] Figure 15 A schematic diagram showing the position of the deleted byte in RSOH+MSOH provided in the embodiments of this application;

[0069] Figure 16 A schematic diagram illustrating the evolution of SDH to OTN provided in an embodiment of this application;

[0070] Figure 17A This is a schematic diagram of the data processing flow provided in the embodiments of this application;

[0071] Figure 17B A schematic diagram illustrating the mapping of two STM-4 channels to one ODU0 channel provided in this application embodiment;

[0072] Figure 18 A schematic diagram of a device structure provided in an embodiment of this application;

[0073] Figure 19 This is a schematic diagram of another device structure provided in an embodiment of this application;

[0074] Figure 20 This is a schematic diagram of another device 2000 provided in the embodiments of this application. Detailed Implementation

[0075] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0076] In the description of this application, unless otherwise stated, "multiple" refers to two or more. Additionally, " / " indicates that the related objects are in an "or" relationship; for example, A / B can represent A or B. "And / or" in this application merely describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. Furthermore, to facilitate a clear description of the technical solutions of the embodiments of this application, the terms "first" and "second" are used in the embodiments to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different. It should also be noted that, unless specifically stated, the specific description of some technical features in one embodiment can also be used to explain the corresponding technical features mentioned in other embodiments.

[0077] This application applies to optical networks, such as OTNs. An OTN typically consists of multiple OTN devices connected by optical fibers, and can be configured into different topologies such as linear, ring, and mesh, depending on specific needs. Figure 1 The OTN shown consists of two OTN networks. Each OTN network comprises a certain number of OTN devices (N1 to N7). Depending on the actual needs, an OTN device may have different functions. Generally speaking, OTN devices are divided into optical layer devices, electrical layer devices, and optoelectronic hybrid devices. Optical layer devices refer to devices capable of processing optical layer signals, such as optical amplifiers (OA). Electrical layer devices refer to devices capable of processing electrical layer signals, such as devices capable of processing OTN signals. Optoelectronic hybrid devices refer to devices capable of processing both optical layer and electrical layer signals. It should be noted that, depending on specific integration needs, a single OTN device can integrate multiple different functions. The technical solutions provided in this application are applicable to OTN devices of different forms and integration levels. The network devices involved in the embodiments of this application can be OTN devices, which can also be called network nodes, or simply nodes.

[0078] Figure 2 This is a schematic diagram of a possible OTN device structure. Here, "OTN device" can refer to... Figure 1The OTN nodes (N1 to N7) are defined as follows. Specifically, an OTN device includes a power supply, fan, auxiliary boards, and may also include tributary boards, line boards, cross-connect boards, optical layer processing boards, and system control and communication boards. The power supply provides power to the OTN device and may include primary and backup power supplies. The fan dissipates heat from the device. Auxiliary boards provide auxiliary functions such as external alarms or access to external clocks. Tributary boards, cross-connect boards, and line boards primarily process the electrical layer signals of the OTN. Tributary boards are used to receive and transmit various customer services, such as SDH services, packet services, Ethernet services, and fronthaul services. Furthermore, tributary boards can be divided into customer-side optical modules and signal processors. Customer-side optical modules can be optical transceivers used to receive and / or transmit service data. Signal processors are used to perform mapping and demapping of service data to data frames. Cross-connect boards are used to switch data frames, completing the exchange of one or more types of data frames. Line boards primarily handle line-side data frames. Specifically, the circuit board can be divided into line-side optical modules and signal processors. The line-side optical modules can be line-side optical transceivers used to receive and / or transmit data frames. The signal processor is used to implement multiplexing and demultiplexing, or mapping and demapping, of the line-side data frames. System control and communication boards are used to implement system control and communication. Specifically, information can be collected from different boards through the backplane, or control commands can be sent to the corresponding boards. It should be noted that, unless otherwise specified, a specific component (e.g., a signal processor) can be one or more, and this application does not impose any limitations. It should also be noted that the embodiments of this application do not impose any limitations on the types of boards included in the device, or the specific functional design and quantity of the boards.

[0079] It should be noted that the specific types and number of circuit boards included in each device may differ. For example, a network device acting as a core node may not have any tributary boards, while a network device acting as an edge node may have multiple tributary boards.

[0080] The multiplexing process in a Synchronous Digital Hierarchy (SDH) involves synchronously interpolating multiple lower-order channel layer signals into higher-order channel layers, or interpolating multiple higher-order channel layer signals into multiplexed section layers. Higher-order channel layer signals can include synchronous transport modules (STM)-16, STM-64, and STM-256, etc. Taking a rate of 2048 kbit / s as an example, this signal is also known as an E1 signal. Figure 3As shown, the E1 signal is first mapped to container 12 (C12), then C12 is mapped to virtual container 12 (VC12). VC12 is then encapsulated into tributary unit 12 (TU12) after adding overhead. TU12 is multiplexed into tributary unit group 12 (TUG2), then TUG2 is multiplexed into VC3. VC3 is then encapsulated into administrative unit 3 (AU3) after adding overhead, and AU3 is multiplexed into the AU group (AUG). Multiple AUGs are then combined to form the STM-N interface signal. Here, STM-N can be one of the various high-speed STM signal types mentioned earlier.

[0081] See Figure 4The diagram shows the structure of an STM-N frame. An STM-N frame, also known as an SDH frame, is a rectangular block frame structure using bytes (8 bits) as units. An STM-1 frame is a 9-row × 270-column block frame. When N STM-1 signals are multiplexed into an STM-N signal through byte interleaving, the columns of the STM-1 signals are multiplexed by byte interleaving, with a constant number of 9 rows. The STM-N frame structure is divided into two parts: the frame header contains frame identification information, and the frame body is the service content, which is the content we actually transmit, also called the payload. The frame header can also be called the overhead. Therefore, the STM-N frame structure includes an overhead area and a payload area. The overhead area includes section overhead, used to monitor the overall STM-N signal flow and to monitor the overall performance of the payload area. Section overhead includes regenerator section overhead (RSOH) and multiplex section overhead (MSOH). The regenerator section overhead is used to monitor the overall information structure of the STM-N frame. The multiplexing section overhead is used to monitor the multiplexing section layer information structure within the STM-N frame. The overhead area also includes an administrative unit pointer (AU-PTR), used to locate the position of low-speed signals within the payload area of ​​the STM-N frame, making the position of low-speed signals predictable within high-speed signals. After the transmitting end maps the signal to the payload area of ​​the STM-N frame, it adds the AU-PTR to indicate the signal's position within the payload area. The receiving end can directly extract the required low-speed tributary signals from the payload area of ​​the STM-N frame based on the AU-PTR. The frame transmission principle of SDH signals is that the frame structure bytes (8 bits) are transmitted one byte (or one bit) from left to right and top to bottom, transmitting one line at a time. One frame is transmitted before the next frame is transmitted.

[0082] The STM-1 section overhead (SOH) byte arrangement is as follows: Figure 5 As shown. The SOH bytes of STM-N (N>1, N=4, 16,…) can be constructed using byte interleaving, with the following arrangement rules: The SOH of the first STM-1 is fully preserved; of the remaining N-1 SOHs, only the framing bytes A1, A2, and BIP-N(B2) are preserved; other bytes (B1, E1, E2, F1, K1, K2, and D1~D12) are omitted, and the position of the M1 byte must be specifically defined. For example, the SOH byte arrangement of STM-4 is as follows: Figure 6 As shown.

[0083] Frame Positioning Bytes: A1 and A2 are used to identify the start position of a frame, consisting of 3N A1 bytes and 3N A2 bytes respectively. Bit Interleaving Parity Check: Includes BIP-8 and BIP-24, used for error monitoring. Data Communication Path (DCC, D1-D12): Used for the transmission link of the SDH management network, divided into the regenerator section data communication path (DCCr) and the multiplex section data communication path (DCCm). Official Bytes: E1 and E2 are used for official communication, belonging to RSOH and MSOH respectively. User Path Bytes: F1 is used to maintain temporary data / voice path connections. Regenerator Section Trace Bytes: J0 is used for trace recording at the regenerator end relay.

[0084] See Figure 5 As shown, taking STM-1 as an example, the segment overhead consists of 8 × 9 = 72 bytes and 72 × 8 = 576 bits. The STM-1 segment overhead rate is 576 × 8000 = 4.608 Mbit / s. See also... Figure 6 As shown, for STM-4, the number of bits for segment overhead is (3+5)×4×9×8=2304 bits.

[0085] The fiber optic speed of the access ring has been upgraded from 622 Mbps to 2.5 Gbps. For example, see [link to relevant documentation]. Figure 7A As shown. The 2.5G pipeline can be divided into two ODU0 paths: one maintains the current SDH service access, and the other is reserved for fgOTN services. See [link / reference]. Figure 7B As shown, fgOTN services are encapsulated in fgODUflex frames. fgODUflex uses 10M time slot hard isolation and provides p*10M flexible containers. p is a positive integer. The payload rate used to encapsulate service signals in the ODU0 frame (or the payload rate of OPU0) is 238 / 239*1244160kbit / s, while the rate of STM-4 is 9*270*8*8000*4*2=1244160kbps (kbit / s). The rate of two STM-4 frames is greater than the payload rate of OPU0. Therefore, ODU0 can only encapsulate one STM-4 frame, which does not actually improve the access capability of SDH and results in a waste of ODU0 frame resources.

[0086] This application provides a data processing scheme to improve the access capability of SDH. The structure of the OTN frame is described below.

[0087] See Figure 7CThe diagram shows the structure of an OTN frame. An OTN frame can have a 4×4080 bit structure, i.e., 4 rows × 4080 columns. The OTN frame structure includes a frame alignment area, OTU overhead (OH), ODU OH, optical payload unit (OPU) OH, OPU payload area, and forward error correction (FEC) area. The header 16 columns are overhead bytes, the tail 256 columns are the FEC check area, and the middle 3808 columns are the payload area. The frame alignment overhead can include two parts: the frame alignment signal (FAS) and the multiframe alignment signal (MFAS). Multiple OTN frames constitute an OTN multiframe, for example, 8 OTN frames constitute one OTN multiframe. The OPUk is used to carry service data, including the OPU payload area and OPU OH, where k represents the OPU rate level. k = 1, 2, 3, 4 correspond to 2.5G, 10G, 40G, and 100G speeds respectively. k = flex, i.e., OPUflex, can correspond to any speed level and is only used to carry single-path services. k = Cn, i.e., OPUCN, corresponds to a speed level of n times 100G. ODUk is the information structure used to support OPUk, composed of OPUk and ODUk OH. Similarly, the capacity of ODUk is distinguished by k. ODUflex is composed of OPUflex and ODUflex OH. ODUCN is composed of OPUCN and ODUCN OH. OTUk is composed of ODUk, FEC area, and OTUk OH. OTUCn is composed of ODUCN and OTUCn OH, and does not include the FEC area.

[0088] The Adjustment Control (JC) byte in the OPU overhead is used for data path maintenance and performance monitoring. Byte Redundancy (RES) is a field in the OPU overhead used to represent redundancy information in protection overhead. There are also Negative Justification Opportunity (NJO) and Positive Justification Opportunity (PJO) bytes. The PJO is used to determine the optical payload structure. The PJO helps the receiving device correctly resolve the optical signal to extract the payload data. The size of the PJO overhead depends on the type of optical payload structure used and the number of data frames. The role of the NJO and PJO is to ensure that the optical signal in the OTN can be correctly transmitted and resolved in the network. The Payload Structure Identifier (PSI) field in the OPU overhead is used to identify the payload structure; it can indicate information such as the format, type, and length of data in the OPU.

[0089] The region corresponding to MFAS 1 in the multiframe alignment sequence is a reserved byte; the region corresponding to MFAS 2 to 17 in the multiframe alignment sequence is the multiplexing structure indicator (MSI). The MSI region contains the multiplexing structure information of the low-speed ODUj tributary signal in the high-speed OPUk signal. According to the MSI indication, the position of the low-speed tributary signal in the OPU payload region can be determined.

[0090] TCM1-TCM6 represent the overhead of the ODU, used to transmit monitoring and control information to ensure transmission quality and reliability. TCM1-TCM6 can also monitor the ODU's transmission status, such as transmission error rate, latency, and packet loss, to ensure data is not damaged or lost during transmission. The TCMact (TCM Activation) field indicates whether TCM monitoring is enabled for this ODUk channel. If TCMact is 1, TCM monitoring is enabled for this channel; if TCMact is 0, TCM monitoring is disabled for this channel.

[0091] The regenerator section overhead byte (RES) is an overhead byte in ODUk used to transmit information as the optical signal passes through the regenerator. Fixed transport frame overhead (FTFL): FTFL is the most basic overhead byte in ODUk, used to provide necessary management and protection functions. General communication channel (GCC): GCC is a programmable communication channel in ODUk used to transmit ODUk-related management and control information. GCC helps network administrators remotely monitor, diagnose, and configure ODUk devices. Automatic protection switching / path communication channel (APS / PCC): APS / PCC is a protection overhead byte in ODUk used to implement automatic protection switching and backup path communication. When the primary path fails, APS / PCC can quickly switch data to the backup path and notify the network administrator. EXP overhead byte: Used to transmit experimental information, such as test data and debugging information. Signal monitoring (SM): Used to monitor signal quality and strength. The SM continuously monitors the signals transmitted in the OTUk channel and provides timely feedback on signal quality. GCC0 (General Communication Channel Zero) is used to translate the transmitted signals. In OTN, GCC0 translates the signals transmitted in the OTUk channel into the standard language of OTN so that the receiver can correctly understand the meaning of the signals.

[0092] The data processing scheme provided in the embodiments of this application will be described in detail below. See also Figure 8 and Figure 9 The diagram shown is a schematic representation of the data processing flow provided in an embodiment of this application. Steps S801-S803 in this method can be executed by the transmitting device or by a chip within the transmitting device. Steps S804-S806 in this method can be executed by the receiving device or by a chip within the receiving device.

[0093] S801, the transmitting device acquires two first STM-4 frames.

[0094] The rate of two STM-4 channels (2xSTM-4) is 9x270x8x8000x4x2 = 1244160kbps (kbit / s). The structure of an STM-4 frame is as shown above.

[0095] In some embodiments, the transmitting device receives service data and then maps the service data into a first STM-4 frame.

[0096] S802, the transmitting device deletes a set number of bytes from the overhead region of the two first STM-4 frames respectively to obtain two second STM-4 frames.

[0097] In some embodiments, a set number of bytes belong to the free bytes of the overhead region of the first STM-4 frame.

[0098] like Figure 6 The diagram illustrates the overhead region of an STM-4 frame. The overhead region includes some free bytes, which can be deleted by a predetermined number of bytes. For clarity, the STM-4 frame before the deletion operation is referred to as the first STM-4, and the STM-4 frame after the deletion operation is referred to as the second STM-4. The deletion operation involves removing a predetermined number of bytes from the overhead region of the first STM-4 frame.

[0099] S803, the transmitting device maps two second STM-4 frames to the payload area of ​​the first OTN frame; wherein the rate of the two second STM-4 frames is less than or equal to the rate of the payload area of ​​the first OTN frame, and the rate of the first STM-4 frame is greater than the rate of the payload area of ​​the first OTN frame.

[0100] In this application, some free bytes in the overhead region of two STM-4 frames are deleted and then mapped to the payload region of the first OTN frame. Since the rate of the two STM-4 frames before the deletion operation is greater than the rate of the payload region of the first OTN frame, the rate of the two STM-4 frames after the deletion operation is less than or equal to the rate of the payload region of the first OTN frame.

[0101] For example, the first OTN frame can be an OPU0 frame or an ODU0 frame. The rate of the payload area of ​​OPU0 or ODU0 is 238 / 239 x 1244160 kbit / s ≈ 1238954 kbps. It can be seen that the rate of the payload area of ​​OPU0 or ODU0 (or the payload rate) is less than the rate of the two STM-4 frames. Using the scheme provided in the embodiments of this application, before mapping the two STM-4 frames into the payload area of ​​ODU0 or OPU0, some bytes of the overhead area are deleted, thereby compressing the bandwidth of the two STM-4 frames, or in other words, compressing the data bandwidth of the payload area to be mapped to ODU0 or OPU0. The data is then the two STM-4 frames.

[0102] S802 can be understood as removing redundant overhead of the SDH signal, or in other words, removing some of the idle overhead of the SDH signal. See [link to documentation]. Figure 9As shown. Further, the transmitting device performs ODU mapping, merging and mapping the two STM-4 channels into the ODU, see [link to ODU documentation]. Figure 9 As shown.

[0103] Furthermore, the transmitting end can send the first OTN frame, and then the receiving end performs a receiving processing operation, including steps S804-S806.

[0104] S804, the receiving device receives the first OTN frame.

[0105] S805, the receiving device demaps two second-level 4th-level synchronous transmission module STM-4 frames from the first OTN frame.

[0106] S806 fills the deleted number of bytes in the overhead region of the two second STM-4 frames with 0 or 1 respectively to restore the two first STM-4 frames.

[0107] S806 can be understood as replenishing the redundant overhead portion of the SDH signal, or in other words, replenishing the deleted idle overhead portion of the SDH signal. See [link to documentation]. Figure 9 As shown.

[0108] In some possible implementations, the transmitting device may also map the first OTN frame to a second OTN frame. The second OTN frame may be a higher-rate ODU frame, or other OTU frames, or other types of OTN frames. Further, when the receiving device receives the first OTN frame, it specifically receives the second OTN frame, then demaps the first OTN frame from the second OTN frame, and further executes S805-S806.

[0109] As an example, the set quantity is greater than or equal to 41. For example, the set quantity is 54 bytes, 55 bytes, 56 bytes, 58 bytes, etc. The set quantity is less than or equal to the number of free bytes in the overhead region of the STM-4 frame.

[0110] Taking a set quantity of 41 as an example, the speed of the second STM-N after the deletion operation is:

[0111] 1244160000bps - 41 * 8 * 8000 * 2bps = 1244160kbps - 5248kbps = 1238912kbps. After the deletion operation, the rate of the two second STM-4 channels is <238 / 239 x 1244160kbit / s ≈ 1238954kbps.

[0112] The following describes the location of the specified number of bytes to be deleted.

[0113] In the first possible implementation, the bytes specifying the number of bytes are located in the RSOH of the first STM-4 frame. For example, the bytes specifying the number of bytes are located in the idle overhead region of the RSOH of the first STM-4 frame. This idle overhead region is referred to as the first region. It can also be described as the bytes specifying the number of bytes belonging to the first region. The first region is the second to 12th columns, the 14th to 24th columns, and the 26th to 36th columns of the third row of the first STM-4 overhead region, see [link to relevant documentation]. Figure 10 As shown. That is, the first region is Figure 10 The area within the black box.

[0114] As an example, see Figure 11 As shown, Figure 11 Taking a set quantity of 54 as an example, the bytes for setting the quantity are the bytes located in the overhead area of ​​the first STM-4, specifically columns 2 to 12, columns 14 to 24 of rows 2 to columns 26 to 35 of row 3. Figure 11 The area within the bold black-filled "×" box. It should be understood that... Figure 11 This is merely an example and does not specify the exact location of the given number of bytes.

[0115] In the second possible implementation, the set number of bytes is located in the MSOH of the first STM-4 frame. For example, the set number of bytes is located in the idle overhead region of the MSOH of the first STM-4 frame. This idle overhead region is referred to as the second region. It can also be described as the bytes that the set number of bytes belongs to the second region. The second region is the overhead region of the first STM-4 frame, specifically columns 2 to 12 of rows 6 to 8, columns 14 to 24 of rows 5 to 8, columns 26 to 36 of rows 5 to 8, columns 2 to 14 of row 9, and columns 16 to 24 of row 9. See also... Figure 12 As shown. That is, the second region is Figure 12 The area within the black box.

[0116] As an example, see Figure 13 As shown, the set number of bytes refers to the bytes located in rows 6 to 9, columns 2 to 12 of the overhead region of the first STM-4. Figure 13 Taking a set quantity of 44 as an example.

[0117] As another example, see Figure 14 As shown, the set number of bytes is the bytes in columns 2 to 12 of rows 6 to 9 and columns 14 to 24 of rows 5 to 8 of the overhead region of the first STM-4. Figure 14 Taking a set quantity of 88 as an example.

[0118] It should be understood that Figures 13-14 This is merely an example and does not specify the exact location of the given number of bytes.

[0119] In the third possible implementation, the set number of bytes consists of two parts, such as a first part of bytes and a second part of bytes. The first part of bytes is located in the RSOH of the first STM-4 frame, and the second part of bytes is located in the MSOH of the first STM-4 frame. For example, the first part of bytes belongs to the bytes of the first region, and the second part of bytes belongs to the bytes of the second region.

[0120] As an example, see Figure 15 As shown, the set number of bytes is the bytes in columns 2 to 10 of rows 6 to 9 and columns 2 to 10 of rows 2 to 3 of the overhead region of the first STM-4. Figure 15 Taking a set quantity of 54 as an example. It should be understood that... Figure 15 This is merely an example and does not specify the exact location of the given number of bytes.

[0121] In one possible implementation, the transmitting device can indicate to the receiving device whether a deletion operation has been performed using the overhead of the first OTN frame. For example, the transmitting device can add first indication information to the overhead region of the first OTN frame. The first indication information is used to indicate that a deletion operation has been performed. This implementation is compatible with existing schemes that do not perform deletion operations. For example, the first indication information can be carried in the PSI field or RES field (such as an unoccupied RES field) or other free fields of the overhead region of ODU0.

[0122] In some possible embodiments, the location of the deleted byte can be configured by the network management device in the sending and receiving devices.

[0123] In other possible embodiments, the location of the predetermined number of deleted bytes can also be indicated to the receiving device by the transmitting device in the overhead of ODU0. For example, the transmitting device can add second indication information to the overhead area of ​​the first OTN frame. The second indication information indicates the location of the predetermined number of bytes in the overhead area of ​​the first STM-4. For example, the second indication information can be carried in the PSI field or RES field (such as an unoccupied RES field) or other free field in the overhead area of ​​ODU0.

[0124] In one example, the specific region containing the deleted bytes can be indicated. For instance, the location can be indicated by specifying the boundaries of the region containing the deleted bytes. That is, the second indication information can be specific region boundary information.

[0125] In another example, the network management device can also pre-configure several possible location areas, each corresponding to a different ID. The sending device uses the ID to indicate the location of the deleted byte. That is, the second indication information can be an ID.

[0126] In some possible embodiments, the number of bytes deleted can be configured by the network management device in both the sending and receiving devices.

[0127] In another possible embodiment, the number of bytes to be deleted can also be indicated to the receiving device by the transmitting device in the overhead of ODU0. For example, the transmitting device can add third indication information to the overhead region of the first OTN frame. The third indication information indicates the set number. For example, the third indication information can be carried in the PSI field or RES field (such as an unoccupied RES field) or other free field in the overhead region of ODU0.

[0128] The solutions provided in the embodiments of this application are described below in specific scenarios. See also Figure 16 As shown, during the gradual evolution of SDH networks to OTN networks, some scenarios require compatibility between SDH and OTN networks, which can be understood as the O(OTN) to S(SDH) network conversion scenario.

[0129] OTN equipment includes E1 tributary boards (also known as E1 tributary cards), tributary unit protect switches (TPS) devices, cross connect boards (XC), and OTN line boards (or OTN line cards). The TPS device can also be understood as an interface board, which has tributary unit protect switching functionality.

[0130] See Figure 17A As shown, from the perspective of the sending device:

[0131] The E1 tributary board receives either a 2M optical signal or an E1 optical signal. The 2M or E1 optical signal carries service data. Taking the E1 optical signal as an example, for ease of distinction, we will refer to the E1 optical signal as the first E1 optical signal, which carries the first service data. The E1 tributary board parses the first service data from the first E1 optical signal and encapsulates it into two first STM-4 frames. The two first STM-4 frames are sent to the OTN line card via the switching board. The OTN line card can perform a deletion operation on the two first STM-4 frames to obtain two second STM-4 frames, which are then mapped to one ODU0 frame for transmission, or further mapped to OTU frames and transmitted via optical fiber. In some implementation scenarios, the TPS device receives the second E1 optical signal and parses it to obtain the second service data. The second service data is mapped into an fgOTN frame. The fgOTN frame is sent to the OTN line card via the switching board. The OTN line card can map an fgOTN frame to another ODU0, and then perform a transmission operation, or further map it to an OTU frame and transmit it through fiber optic cable. For example, two ODU0s can be mapped to OTU frames and then transmitted through fiber optic cable.

[0132] See Figure 17A As shown, from the perspective of the receiving device:

[0133] The OTN line card receives ODU0 or OTU frames via optical fiber, then demaps two second STM-4 frames from one ODU0 frame. It then performs a deletion and recovery operation on these two STM-4 frames to obtain two first STM-4 frames. These are then sent to the E1 branch card via the switching board. The E1 branch card then decapsulates the two first STM-4 frames to obtain the first service data. In some implementation scenarios, the OTN line card receives ODU0 or OTU frames via optical fiber, then demaps another ODU0 frame to obtain an fgOTN frame. This is then sent to the E1 branch card via the switching board. The E1 branch card then demaps the fgOTN frame to obtain the first service data.

[0134] The solution provided in this application embodiment enables the mapping of two STM-4 frames to one ODU0 or OPU0. See [link to relevant documentation]. Figure 17B As shown, it can not only reduce bandwidth

[0135] It should also be understood that, in the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced by each other, and the technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0136] It should also be understood that in some of the above embodiments, the examples are mainly based on devices in existing network architectures (such as OTN devices), and this application does not limit the specific form of the devices in the embodiments. For example, any device that can achieve the same function in the future is applicable to this application.

[0137] The data processing method provided in the embodiments of this application has been described in detail above with reference to the accompanying drawings. It is understood that, in order to achieve the above functions, the receiving end device and the sending end device include corresponding hardware structures and / or software modules for performing each function.

[0138] The following describes in detail the data transmission apparatus provided in the embodiments of this application. It should be understood that the description of the apparatus embodiments corresponds to the description of the method embodiments. Therefore, for content not described in detail, please refer to the method embodiments above. For the sake of brevity, some content will not be repeated.

[0139] This application embodiment can divide the transmitting or receiving device into functional modules according to the above method examples. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. The following description uses the division of functional modules according to each function as an example.

[0140] In one example, this device is applied to the transmitting device, see [link to relevant documentation]. Figure 18 As shown, the device includes a receiving unit 1801, an overhead processing unit 1802, and a mapping unit 1803. The receiving unit 1801 executes step S801. The overhead processing unit 1802 executes step S802. The mapping unit 1803 executes step S803. For example, the receiving unit 1801 may be an SDH interface. In some embodiments, the device may further include a transmitting unit (…). Figure 18 (not shown in the image), used to send a first OTN frame or a second OTN frame to the receiving device.

[0141] Optionally, the three units may also perform other related optional steps performed by the transmitting device mentioned in any of the foregoing embodiments, which will not be repeated here.

[0142] In one example, this device is used in a receiving device, see [link to relevant documentation]. Figure 19 As shown, the device includes a receiving unit 1901, an overhead processing unit 1903, and a demapping unit 1902. The receiving unit 1901 executes step S804. The overhead processing unit 1903 executes step S806. The demapping unit 1902 executes step S805.

[0143] Optionally, the three units may also perform other related optional steps performed by the receiving device mentioned in any of the foregoing embodiments, which will not be repeated here.

[0144] This device can be used in transmitting or receiving devices. Specifically, it can be a processor, chip, chip system, or a module within a processor that performs the functions of the transmitting or receiving device. This device can be... Figure 2 The branch board is implemented in the middle.

[0145] Figure 20 This is a schematic diagram of another data transmission device provided in an embodiment of this application. Figure 20 As shown, the device 2000 includes a processor 2001, a transceiver 2002, and a memory 2003. The memory 2003 is optional. The device 2000 can be applied to both transmitting-side devices (e.g., the transmitting end device described above) and receiving-side devices (e.g., the receiving end device described above). Exemplarily, the processor 2001, memory 2003, and transceiver 2002 can be connected via a bus 2004.

[0146] When applied to a transmitting device, the processor 2001 and transceiver 2002 are used to implement... Figure 8 or Figure 17A The method performed by the transmitting device shown in the figure can be implemented in various steps of the processing flow through integrated logic circuits in the hardware of the processor 2001 or through software instructions. For example, it can map service data to two first STM-4 frames, but cannot perform deletion operations on the first STM-4 frames. The transceiver 2002 is used to receive service data and send OTN frames to the peer device (also called the receiving device).

[0147] When applied to a receiving device, the processor 2001 and transceiver 2002 are used to implement... Figure 8 or Figure 17A The method performed by the receiving device is shown in the figure. Transceiver 2002 receives the first OTN frame sent by the peer device (also called the sending device) and sends it to processor 2001 for subsequent processing. In implementation, each step of the processing flow can be accomplished by integrated logic circuitry in the hardware of processor 2001 or by software instructions, such as performing redundant byte padding (0-padding) and demapping operations. Memory 2003 stores instructions so that processor 2001 can execute the steps mentioned in the figure above. Alternatively, memory 2003 can also store other instructions to configure parameters of processor 2001 to achieve corresponding functions.

[0148] It should be noted that the processor 2001 and memory 2003 are in Figure 2 In the network device hardware structure diagram, the processor 2001 may be located in a tributary board, or it may be located in a single board that combines tributary and line circuitry. Alternatively, multiple processors 2001 and memory 2003 may be included, located on the tributary board and line circuitry board respectively, with the two boards working together to complete the aforementioned method steps.

[0149] It should be understood that the processor mentioned in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0150] It should also be understood that the memory mentioned in the embodiments of this application can be volatile memory and / or non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM). For example, RAM can be used as an external cache. By way of example and not limitation, RAM can include a variety of forms, such as: static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0151] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory (storage module) can be integrated into the processor.

[0152] As will be apparent to those skilled in the art, the units and steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, and such implementations should be considered within the scope of protection of this application.

[0153] Based on the same concept as the above method embodiments, this application also provides a computer-readable storage medium storing program instructions (or computer programs, instructions) thereon. When the program instructions are executed by a processor, they cause the computer to perform the operations performed by the sending end device and the receiving end device in any possible implementation of the above method embodiments and method embodiments.

[0154] Based on the same concept as the above method embodiments, this application also provides a computer program product, including program instructions. When the computer program product is invoked and executed by a computer, it can enable the computer to perform the operations performed by the sending end device and the receiving end device in any possible implementation of the above method embodiments and method embodiments.

[0155] Based on the same concept as the above-described method embodiments, this application also provides a chip or chip system, which is coupled to a transceiver and used to implement the operations performed by the transmitting and receiving devices in any possible implementation of the above-described method embodiments. The chip system may include the chip, as well as components including a memory, a communication interface, etc.

[0156] Based on the same concept as the above-described method embodiments, this application also provides a communication system. The communication system includes a transmitting device and a receiving device.

[0157] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0158] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0159] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0160] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0161] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the scope of protection of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A data processing method, characterized by, include: Acquire two STM-4 frames from the first and fourth level synchronous transmission modules; A set number of bytes are deleted from the overhead region of the two first STM-4 frames to obtain two second STM-4 frames. The set number of bytes belong to the free bytes in the overhead region of the first STM-4 frames. Two second STM-4 frames are mapped to the payload area of ​​a first OTN frame; wherein the rate of the two second STM-4 frames is less than or equal to the rate of the payload area of ​​the first OTN frame, and the rate of the two first STM-4 frames is greater than the rate of the payload area of ​​the first OTN frame.

2. The method of claim 1, wherein, The first OTN frame is either an Optical Channel Payload Unit (OPU0) frame or an Optical Data Unit (ODU0) frame.

3. The method of claim 1 or 2, wherein, The set number of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4; or, the set number of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4; or, the set number of bytes includes a first part of bytes and a second part of bytes, wherein the first part of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4, and the second part of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4.

4. The method of claim 3, wherein, The specified number of bytes belong to the first region, which is the second to 12th columns, the 14th to 24th columns, and the 26th to 36th columns of the third row of the overhead region of the first STM-4; or, The specified number of bytes belong to the second region, which is the second region consisting of columns 2 to 12 of rows 6 to 8, columns 14 to 24 of rows 5 to 8, columns 26 to 36 of rows 5 to 8, columns 2 to 14 of row 9, and columns 16 to 24 of row 9, of the overhead region of the first STM-4; or, The first portion of the set number of bytes belongs to the first region, and the second portion of the set number of bytes belongs to the second region.

5. The method according to any one of claims 1 to 4, characterized in that, The overhead region of the first optical transport network (OTN) frame includes first indication information, which indicates that a deletion operation is performed. The deletion operation is an operation that deletes a set number of bytes from the overhead region of the first STM-4 frame.

6. The method according to any one of claims 1 to 5, wherein, The overhead region of the first optical transport network (OTN) frame includes second indication information, which indicates the location of a set number of bytes in the overhead region of the first STM-4.

7. The method according to any one of claims 1 to 6, wherein The method further includes: Send the first OTN frame; or, The first OTN frame is mapped into the second OTN frame, and the second OTN frame is sent.

8. The method according to any one of claims 1 to 7, wherein Acquire two STM-4 frames from the first and fourth level synchronous transmission modules, including: Receive the first service data; The first service data is mapped to the two first STM-4 frames.

9. A data processing method, characterized by, include: Receive the first OTN frame; Demap two second-level 4th-level synchronous transmission module STM-4 frames from the first OTN frame; The deleted number of bytes in the overhead regions of the two second STM-4 frames are filled with 0 or 1 to restore the two first STM-4 frames; wherein the set number of bytes are free bytes in the overhead region of the first STM-4 frames, the rate of the two second STM-4 frames is less than or equal to the rate of the payload region of the first OTN frame, and the rate of the two first STM-4 frames is greater than the rate of the payload region of the first OTN frame.

10. The method of claim 9, wherein, The first OTN frame is either an Optical Channel Payload Unit (OPU0) frame or an Optical Data Unit (ODU0) frame.

11. The method of claim 9 or 10, wherein, The set number of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4; or, the set number of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4; or, the set number of bytes includes a first part of bytes and a second part of bytes, wherein the first part of bytes is located in the regenerator section overhead region of the overhead region of the first STM-4, and the second part of bytes is located in the multiplex section overhead region of the overhead region of the first STM-4.

12. The method of claim 11, wherein, The specified number of bytes belong to the first region, which is the second to 12th columns, the 14th to 24th columns, and the 26th to 36th columns of the third row of the overhead region of the first STM-4; or, The specified number of bytes belong to the second region, which is the second region consisting of columns 2 to 12 of rows 6 to 8, columns 14 to 24 of rows 5 to 8, columns 26 to 36 of rows 5 to 8, columns 2 to 14 of row 9, and columns 16 to 24 of row 9, of the overhead region of the first STM-4; or, The first portion of the set number of bytes belongs to the first region, and the second portion of the set number of bytes belongs to the second region.

13. The method according to any one of claims 9 to 12, wherein, The method further includes: Before filling the predetermined number of deleted bytes in the overhead regions of the two second STM-4 frames with 0 or 1, a first indication information is demapped from the overhead region of the first OTN frame. The first indication information is used to indicate that a deletion operation is performed, which is the operation of deleting a predetermined number of bytes from the overhead region of the first STM-4 frame.

14. The method according to any one of claims 9-13, characterized in that, The method further includes: The second indication information is demapped from the overhead region of the first OTN frame. The second indication information is used to indicate the position of a set number of bytes in the overhead region of the first STM-4. The predetermined number of deleted bytes in the overhead regions of the two second STM-4 frames are filled with 0s or 1s, including: According to the position indicated by the second instruction information, fill the predetermined number of deleted bytes in the overhead area of ​​the two second STM-4 frames with 0 or 1 respectively.

15. The method according to any one of claims 9-14, characterized in that, Receiving the first OTN frame includes: Receive the second OTN frame and demap the first OTN frame from the second OTN frame.

16. The method according to any one of claims 9-15, characterized in that, The method further includes: The first service data is demapped from the two first STM-4 frames.

17. A data processing apparatus, characterized in that, Including the processor and memory, of which: The memory is used to store program code; The processor is configured to read and execute program code stored in the memory to implement the method as described in any one of claims 1 to 8, or to implement the method as described in any one of claims 9 to 16.

18. A chip, characterized in that, The chip is connected to a memory and is used to read and execute program code stored in the memory to implement the method as described in any one of claims 1 to 8, or to implement the method as described in any one of claims 9 to 16.

Images