Anti-quantum method and system based on stateless signature and execution isomorphism

By employing a quantum-resistant method that is isomorphic between stateless hash signatures and execution, the problems of state management and side-channel attacks in multi-receiver broadcast scenarios of quantum-resistant cryptography are solved, achieving a highly secure and robust system defense.

CN122339684APending Publication Date: 2026-07-03BEIJING LANGKONG QUANTUM TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202610485949.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-14
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing quantum-resistant cryptography technologies have security bottlenecks in multi-receiver broadcast scenarios, including state management risks and physical side-channel attacks. They are particularly vulnerable to private key leakage and side-channel attacks in cloud-native environments.

Method used

Employing a quantum-resistant approach that combines stateless hash signatures with execution isomorphism, the system eliminates cloud-based state management failures through the Stateless Hash Digital Signature Algorithm (SLH-DSA) and combines a PQC hardware engine with an I/O-aware microarchitecture execution isomorphism mechanism to eliminate side-channel fingerprints, achieving physical-level defense.

Benefits of technology

Completely resolves security risks caused by cloud-based state management, eliminates distinguishable side-channel fingerprints at the system-wide level, improves system security and robustness in high-concurrency and dynamic scheduling environments, and defends against side-channel attacks.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a quantum-resistant method and system based on stateless signatures and execution isomorphism, belonging to the field of quantum-resistant cryptography. First, the sender generates an mKEM broadcast payload based on a modulus error rounding algorithm and signs it using a stateless hash signature algorithm. The receiver performs microsecond-level verification of the signature at the network card driver layer; if verification fails, the signature is silently discarded. After successful verification, a dedicated PQC hardware engine decapsulates the signature, implicitly outputting a pseudo-random scrap key if verification fails. The operating system executes an I / O-aware microarchitecture with isomorphic execution, forcing subsequent processes to maintain physical isomorphism in system calls, memory accesses, and peripheral bus activities, regardless of whether the key is real or scrap. This invention eliminates the risk of private key leakage caused by cloud-based state management through stateless signatures and completely eliminates distinguishable side-channel fingerprints across the entire link through physical-level execution isomorphism, achieving system-level quantum-resistant security in high-concurrency scenarios.
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Description

Technical Field

[0001] This invention belongs to the field of quantum-resistant cryptography technology, and in particular relates to a quantum-resistant method and system based on stateless signature and execution isomorphism. Background Technology

[0002] In the field of quantum-resistant cryptography, key encapsulation mechanisms based on lattice-hard problems (such as learning with error (LWE) or modulus error rounding (M-LWR)) have become an important technical approach, and their algorithmic security has been thoroughly studied. However, existing technologies (such as ML-KEM) have significant security bottlenecks at the system implementation level in practical deployment scenarios for multi-receiver broadcasting, mainly in the following two aspects:

[0003] First, at the state management level, existing solutions rely on stateful hash signatures to ensure the authentication of broadcast sources and message integrity. In high-concurrency, dynamically scheduled environments such as cloud-native environments, the synchronization, maintenance, and rollback prevention of signature states are extremely challenging. Snapshots, rollbacks, and horizontal scaling operations on virtual machines or containers can easily lead to the reuse of signature states, potentially resulting in private key leaks. Once the centralized signature service is compromised, attackers can use the leaked key to encapsulate payloads with forged keys, sign them, and broadcast them, jeopardizing the security of the entire communication system.

[0004] Secondly, at the side-channel defense level, existing key encapsulation mechanisms based on the Fujisaki-Okamoto transform typically employ an implicit rejection strategy when encountering invalid ciphertext during the decryption process. This means the process immediately terminates or jumps to an error handling procedure after verification failure. This difference between successful and failed decryption paths creates observable distinguishing characteristics in software execution flow, cache access patterns, memory timing, and energy consumption. Attackers can capture and analyze this side-channel information using techniques such as timing analysis, electromagnetic probing, or deep learning-driven encrypted traffic analysis to construct effective decryption fingerprints, thereby launching chosen-ciphertext attacks and ultimately threatening the security of core secret keys.

[0005] In summary, existing quantum-resistant multi-receiver key encapsulation technologies have inherent defects in addressing state management risks and physical side-channel attacks in practical system deployments, which restricts their reliable application in scenarios with high security requirements. Summary of the Invention

[0006] The purpose of this invention is to provide a quantum-resistant method based on stateless signatures and execution isomorphism. Stateless signatures eliminate the risk of private key leakage and forged broadcasts caused by cloud state management failures, and the physical-level execution isomorphism mechanism eliminates distinguishable side-channel fingerprints at the system-wide level, thus achieving a dual quantum-resistant security protection effect.

[0007] The second objective of this invention is to provide a quantum-resistant system based on stateless signatures and execution isomorphism.

[0008] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is a quantum-resistant method based on stateless signature and execution isomorphism, comprising the following steps:

[0009] The sender generates a multi-receiver key to encapsulate the broadcast payload based on the modulo error rounding algorithm, and signs the broadcast payload using a stateless hash digital signature algorithm;

[0010] After capturing the broadcast payload, the receiver verifies the signature using a preset public key at the network interface card driver layer;

[0011] If signature verification fails, the broadcast payload is silently discarded at the network card driver layer.

[0012] If the signature verification passes, the receiver extracts the ciphertext component from the broadcast payload and submits it to the PQC hardware engine for decapsulation and consistency verification. If the verification fails, the PQC hardware engine implicitly outputs a pseudo-random sequence as a scrap key. If the verification succeeds, the PQC hardware engine outputs the real session key normally and transmits it to the receiver's operating system.

[0013] The receiving operating system executes I / O-aware microarchitecture isomorphism: regardless of whether the PQC hardware engine outputs a real session key or a scrap key, the operating system forces subsequent processing flows to maintain physical isomorphism in software execution flow, memory access patterns, and peripheral bus activity.

[0014] Furthermore, the stateless hash digital signature algorithm is the SLH-DSA algorithm compliant with the FIPS 205 standard.

[0015] Furthermore, the step of generating multi-receiver key encapsulation of broadcast payload based on the modulus error rounding algorithm includes:

[0016] Generate a high-entropy random seed and expand it into a common polynomial matrix A using an extensible output function;

[0017] Based on the public polynomial matrix A, the sender's temporary secret value, and the receiver's public key, the shared ciphertext component is calculated. ;

[0018] Each recipient independently generates a compressed, proprietary ciphertext hint component based on their public key. ;

[0019] The shared ciphertext component With all proprietary ciphertext hint components The data are then sequentially spliced ​​together to form the broadcast payload.

[0020] Furthermore, the signature verification using a pre-set public key at the network card driver layer is implemented using an extended Berkeley packet filter or a fast data path method, and the silent discard operation when verification fails is triggered by the XDP_DROP instruction.

[0021] Furthermore, the public key used to verify the signature is pre-stored in the recipient's local hardware root of trust.

[0022] Furthermore, the PQC hardware engine is a systolic array hardware coprocessor that supports number theory transformation operations. Its depackaging process has constant time characteristics, and all intermediate data and calculation processes are confined to the internal registers of the hardware coprocessor.

[0023] Furthermore, during the key derivation function call phase of the Fujisaki-Okamoto transformation in the decapsulation process, the hash value of the receiver's public key is forcibly injected as the domain separation salt value.

[0024] Furthermore, in the I / O-aware microarchitecture execution isomorphism, when processing the scrap key, the resulting invalid data stream is physically written into a preset shadow quiescent area on the non-volatile memory through a real direct memory access operation.

[0025] Furthermore, the shadow silent zone is a hidden logical block addressing namespace that is invisible to the user-mode file system and configured as a circular overlay buffer.

[0026] A quantum-resistant system based on stateless signature and execution isomorphism includes a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0027] Compared with the prior art, the beneficial effects of the present invention include:

[0028] Completely resolves security vulnerabilities caused by cloud state management: This invention employs a stateless hash digital signature algorithm (SLH-DSA) compliant with FIPS 205 specifications. This algorithm fundamentally eliminates the problem of signature state (state tree) reuse caused by cloud service provider's underlying virtual machine snapshot rollback and abnormal container restarts. This eliminates the risk of private key leakage and broadcast forgery after a single point of attack, ensuring absolute security in high-concurrency and dynamically scheduled environments.

[0029] Building a physical-level defense to eliminate end-to-end side-channel fingerprints: This innovative approach combines a PQC hardware constant-time engine with an I / O-aware microarchitecture execution isomorphism mechanism. Regardless of whether the system processes legitimate or illegitimate forged payloads, its software execution flow, cache access patterns, memory timing, and power consumption and electromagnetic radiation characteristics on the peripheral PCIe bus remain completely consistent. This renders side-channel attacks based on timing analysis, high-resolution near-field electromagnetic probes, or deep learning network analysis completely ineffective.

[0030] Rapidly filtering malicious traffic significantly improves system availability against DoS attacks: eBPF / XDP technology is introduced at the network interface card (NIC) driver layer, the lowest level of the network protocol stack, for pre-authentication, enabling the silent discarding of illegal data packets within microseconds (50 microseconds). This avoids the inefficient and resource-intensive post-quantum decomposition and encapsulation computations that consume upper-layer system resources, greatly enhancing the system's availability and robustness against massive malicious traffic attacks. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a flowchart of a quantum-resistant method based on stateless signature and execution isomorphism provided in an embodiment of the present invention;

[0033] Figure 2 This is an architecture diagram of a quantum-resistant system based on stateless signature and execution isomorphism provided by an embodiment of the present invention. Detailed Implementation

[0034] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0035] like Figure 1This embodiment provides a quantum-resistant method based on stateless signatures and execution isomorphism, specifically a quantum-resistant multi-receiver key encapsulation method based on stateless hash signatures and I / O-aware execution isomorphism. It blocks single-point fallout and broadcast forgery caused by cloud infrastructure failures through stateless signatures, and completely smooths out all system-level side-channel fingerprints, including network traffic, memory access and PCIe bus radiation, through physical-level execution isomorphism that runs through the CPU to the peripheral bus.

[0036] In some specific implementations, the quantum-resistant method based on stateless signature and execution isomorphism includes the following steps:

[0037] S1, the generation of mKEM ciphertext and its binding with stateless hash signature anchors

[0038] The sender (cloud) generates a common shared ciphertext component based on a modulo error rounding algorithm. and dedicated encrypted message component The mKEM encrypted broadcast payload; the sender strictly calls the stateless hash digital signature algorithm that conforms to the FIPS 205 standard, and uses the cloud private key to generate an asymmetric broadcast verification signature for the encrypted broadcast payload.

[0039] In some specific implementations, the modulus q used in the modulus error rounding algorithm is a prime number 3329. During algorithm execution, noise sampling follows a central binomial distribution. After completing the core operations, the polynomial coefficient vector is rounded down by performing a bitwise right shift operation, thereby compressing the coefficients from the integer field of modulus q to a smaller integer modulus field. The number of low-order bits discarded in the rounding operation is defined by the parameter d.

[0040] The generation of the mKEM broadcast payload includes the following steps: First, the sender generates a high-entropy random seed and expands it into a common polynomial matrix A using a Scalable Output Function (XOF). Then, based on this common matrix A, the temporary secret value generated by the sender, and the receiver's public key, a shared ciphertext component is calculated. Furthermore, for each designated recipient, a unique, compressed ciphertext hint component is independently calculated and generated based on their public key. Finally, the shared ciphertext component... Dedicated ciphertext hint component corresponding to all target recipients The payloads are then assembled in an orderly manner to form a complete mKEM broadcast payload.

[0041] Before sending the broadcast payload, in this embodiment, the stateless hash digital signature algorithm adopts the SLH-DSA algorithm conforming to the FIPS 205 specification. Its signature process does not require maintaining or updating any underlying signature state tree, thus mathematically eliminating the risk of signature state reuse and catastrophic private key leakage caused by virtual machine snapshot rollbacks, abnormal container restarts, or high-concurrency race conditions at the cloud service provider's underlying layer. The signature process is executed sequentially: First, randomized hashing and domain separation calculations are performed using the sender's private key and the payload data to be signed to generate a deterministic message digest. Next, a Multiple Random Subset Forest (FORS) signature is constructed based on this message digest. Then, a signature (WOTS+) is calculated in the supertree structure, and a corresponding Merkle authentication path is generated. Finally, the FORS signature, WOTS+ signature, and Merkle authentication path are assembled into a complete stateless digital signature, and this signature is appended to the header of the mKEM broadcast payload, completing the binding of the signature and payload.

[0042] This implementation uses a modulo error rounding algorithm to round the universal shared ciphertext components. With dedicated encrypted message components for each recipient Ordered concatenation, while ensuring the independent security of each receiver, significantly reduces the size of broadcast packets and lowers the bandwidth overhead of multicast communication. This implementation mandates the use of stateless hash signatures (SLH-DSA) to bind the mKEM payload, whose generation process does not rely on any internal state that requires long-term maintenance. This not only simplifies the complexity of key management in the cloud but also fundamentally cuts off the path from cloud infrastructure failures (such as concurrency race conditions and snapshot rollbacks) to cryptographic security vulnerabilities, achieving a highly reliable binding between signature and payload.

[0043] S2, Microsecond-level asymmetric verification of edge nodes

[0044] After capturing broadcast packets, the receiving terminal first forces a pre-authentication process. This authentication operation is performed at the lowest level of packet processing, namely the network interface card (NIC) driver layer. Specifically, using Extended Berkeley Packet Filtering (eBPF) or Fast Data Path (XDP) technology, the SLH-DSA signature is verified using a locally pre-configured public key within the NIC or very low-level kernel space, before the packet is allocated to the operating system kernel socket buffer after arriving at the NIC's receive queue. The aim of this design is to achieve a verification speed in the microsecond range, with the completion time of the verification process strictly controlled within 50 microseconds.

[0045] In some specific implementations, the public key used for verification is securely pre-stored locally on the terminal. Specifically, this is achieved by burning the public key into the hardware root of trust on the motherboard, such as the Trusted Platform Module (TPM2.0) or the read-only non-volatile memory area of ​​an embedded security chip. This storage method effectively prevents the public key from being tampered with or stolen by malicious software on the terminal side.

[0046] If the signature verification fails, the network card driver layer will perform a silent discard operation, directly discarding the data packet and ensuring that the decapsulation core process of the upper-layer application is not triggered as a result.

[0047] In some specific implementations, the underlying driver silent discard mechanism is executed according to the following process:

[0048] When signature verification based on XDP (Fast Data Path) fails, the network card driver layer immediately triggers the XDP_DROP instruction. Execution of this instruction causes the current data frame to be directly and physically discarded at the network card hardware level, thereby completely blocking the data packet from entering the operating system protocol stack and prohibiting any subsequent upper-layer PQC (post-quantum cryptography) decapsulation core process from being initiated.

[0049] In this implementation, the dropping action is designed as a silent operation, without sending interruption or error notifications to the upper-layer conventional network protocol stack (such as the TCP / IP stack). To ensure auditability and constant time complexity, the driver asynchronously pushes the header information of the dropped packet (e.g., its hash value) along with a timestamp to a dedicated, isolated, lock-free circular buffer for security auditing. This approach avoids variable latency introduced by logging, thus guaranteeing a constant time complexity regardless of the type of packet dropped.

[0050] S3, PQC decapsulation and underlying implicit rejection mechanism:

[0051] In this embodiment of the invention, the specific steps for the receiver to perform PQC decapsulation and underlying implicit rejection mechanism after the signature verification is passed are as follows:

[0052] The receiver extracts the shared ciphertext component from the verified data packet, strictly adhering to the fixed-length header and bit offset defined in the protocol. and its corresponding dedicated prompt component Then, these two components are submitted to a dedicated PQC hardware engine for processing.

[0053] The PQC hardware engine is implemented as a dedicated hardware coprocessor, which can be designed using a hardware description language to support a systolic array structure that supports number-theoretic transformation (NTT) operations. This ensures that the execution timing of all operations is absolutely deterministic, thereby eliminating side-channel leakage caused by execution time differences.

[0054] The decapsulation process is executed sequentially within the hardware engine: First, using the receiver's local private key, the decapsulation is performed... Combination Perform polynomial decryption to recover the intermediate message. Next, using this Using the recipient's local public key, a re-encryption operation is performed strictly following the Fujisaki-Okamoto (FO) transformation to generate ciphertext for comparison. All intermediate results of the entire calculation process are confined to the internal registers of the hardware engine for processing and are prohibited from being swapped out to the system main memory to ensure the physical security of sensitive data.

[0055] To enhance security, this implementation enforces public key prefix hash injection during the key derivation function (KDF) call phase of the FO transformation. Specifically, the SHA3-256 hash value of the receiver's public key is pre-calculated, and its first 32 bytes are used as the public key prefix. When the key derivation function is called, this 32-byte public key prefix is ​​forcibly injected as a fixed field separation salt value to achieve strict context isolation.

[0056] Finally, the constant-time comparator integrated by the hardware engine compares the generated ciphertext. A consistency check is performed with the original ciphertext C received from the data packet. If the check succeeds, the correct shared key is output. If the check fails, the hardware engine does not throw any software exception or jump the process; instead, it implicitly calls a pseudo-random function (e.g., ...). Based on an internal secret value and the received ciphertext, a pseudo-random sequence of equal length is generated and returned to the upper-layer system as a "scrap key".

[0057] This implementation, S3, eliminates the risk of software-level side-channel leakage. All intermediate sensitive data and computational processes during PQC decapsulation and Fujisaki-Okamoto (FO) transformation are strictly confined to the internal registers of a dedicated hardware coprocessor (systolic array structure) with absolutely deterministic execution timing, prohibiting swapping them out to system main memory. This physically isolates and blocks software-level timing and memory-level side-channel leakage. This implementation achieves immunity to Selected Ciphertext Attacks (CCA) and detection. A hardware-level implicit rejection mechanism is introduced; even if ciphertext verification fails (C' is not equal to C), the engine will not throw an exception or jump to an error branch, but will output an indistinguishable pseudo-random "scrap key" based on SHAKE256. This prevents attackers from probing the internal decryption status or constructing a decryption fingerprint through error responses. Step S3 of this implementation strengthens multi-tenant / multi-receiver context isolation: the SHA3-256 hash prefix of the public key is forcibly injected as a domain separation salt in the Key Derivation Function (KDF) call of the FO transformation, effectively preventing key obfuscation and replay attacks across receiver identities that may occur in multi-target networks.

[0058] S4. The receiving operating system executes I / O-aware microarchitecture to perform isomorphic operations (blocking AI traffic fingerprinting and near-field EM probes).

[0059] In some specific implementations, the I / O-aware microarchitecture executed by the receiving operating system implements an isomorphic mechanism, the specific implementation of which is as follows:

[0060] The core of this mechanism lies in the fact that regardless of whether the PQC decapsulation core outputs a real session key or a pseudo-random scrap key, the operating system enforces a completely isomorphic subsequent processing flow. First, at the operating system call and memory access level, the operating system kernel scheduler binds the core of the process executing the decryption task (PQC process) to a specific CPU core. Based on this, regardless of the key being processed, the system allocates the same number of virtual memory pages and controls the program to execute pseudo-memory access operations with the same number of loops and cache line spans. This implementation ensures that the CPU's translational backstop miss rate and the access and eviction patterns of each level of cache (such as L1 / L2) are completely consistent, thereby eliminating microarchitectural side-channeling caused by differences in memory access trajectories.

[0061] In some specific implementations, invalid data streams generated by decryption of scrap keys are not logically discarded by the system, but are physically written to the storage device through actual direct memory access operations. This process relies on a shadow quiescent zone pre-defined on the non-volatile storage device. This area is a hidden logical block addressing namespace invisible to the user-space file system and is typically configured as a circular overwrite buffer with wear leveling disabled, specifically for absorbing the physical writes of invalid data.

[0062] In some specific implementations, the DMA write process for invalid data streams includes the following steps: First, the operating system kernel constructs a hash-cluster list describing the data stream. Next, the DMA controller is configured, setting the transfer block size and PCIe traffic type to be exactly the same as when real business data is written to disk. Finally, a transaction layer packet write operation based on the PCIe bus is initiated, transmitting the invalid data stream via the peripheral bus and writing it to the shadow silent zone.

[0063] This implementation, through the aforementioned isomorphic mechanism, forces real PCIe bus data transmission and storage medium charge flipping at the physical level. This physically homogenizes the power consumption peaks and electromagnetic radiation spectrum characteristics generated when processing malicious and legitimate ciphertext, thereby rendering side-channel analysis attacks based on high-resolution near-field electromagnetic probes ineffective. At the network and system level, since successful and failed paths exhibit completely consistent statistical distribution characteristics across all observable metadata (such as packet arrival time, CPU cache hit rate, and peripheral bus occupancy), it can fundamentally block deep learning-based encrypted traffic analysis and network side-channel fingerprint stripping.

[0064] like Figure 2 This embodiment also provides a quantum-resistant system based on stateless signatures and execution isomorphism, including...

[0065] The cloud-based mKEM multicast scheduling subsystem, deployed on the sender, is used to generate components containing shared ciphertext based on the Modulus-Low-Round (M-LWR) algorithm. With multiple proprietary encrypted hint components The system broadcasts the payload and invokes a stateless hash digital signature algorithm (SLH-DSA) compliant with the FIPS 205 standard to generate a signature for the payload.

[0066] The edge XDP driver interception and verification unit is deployed in the network driver layer of the receiver. It is used to perform microsecond-level verification of the signature using the public key pre-installed in the hardware root of trust before the data packet enters the operating system protocol stack. If the verification fails, the data packet is silently discarded in the driver layer.

[0067] The PQC hardware isomorphic decapsulation core is a dedicated hardware coprocessor for the receiver. It is used to perform decapsulation operations on the verified payload and implicitly outputs a pseudo-random scrap key when the ciphertext consistency check fails. The execution timing of its decapsulation process has constant time characteristics.

[0068] The microarchitecture state machine isomorphic scheduler, located in the receiver's operating system kernel, is used to schedule the processing of the decapsulated key. Regardless of whether the key is a real session key or a pseudo-random scrap key, it forces the process to execute isomorphic system calls and memory access patterns to keep the CPU's cache and page table access trajectories consistent.

[0069] PCIe Radiation Simulation and Shadow Storage Controller includes a non-volatile storage device and its controller equipped with an isolated logical block addressing namespace. The controller is used to write invalid data streams generated by decrypting the pseudo-random scrap key into the isolated storage area via the PCIe bus through direct memory access (DMA) to simulate equivalent peripheral bus physical activities when processing valid data.

[0070] To verify the ability of this implementation method to resist microarchitectural and physical side-channel attacks, the applicant built a prototype system and conducted the following effectiveness verifications:

[0071] TVLA (Transmission Vector Leakage) Assessment: Using a high-precision oscilloscope and a near-field electromagnetic probe, the power consumption trajectory and electromagnetic radiation distribution of the PQC hardware isomorphic depackaging core and PCIe bus were collected when processing legitimate ciphertext (outputting the real key) and tampered ciphertext (triggering discarded keys). After more than 1 million sampling calculations, the TVLAt-value test results for both processing paths strictly remained within a certain range. Within the safe confidence interval. Verification results show that the I / O-aware execution isomorphic mechanism of this system successfully smooths out the physical-level electromagnetic and power fingerprints, possessing extremely high anti-analysis security.

[0072] Verification against network and deep learning traffic probing: The microarchitectural behavior of the system when processing the two types of encrypted data was collected using a performance monitoring counter (PMC). The results show statistical distribution characteristics of successful and failed paths across dimensions such as CPU L1 / L2 cache miss rate, branch prediction hit rate, and PCIe transaction layer throughput bandwidth. The consistency fully demonstrates that this solution blocks deep learning-based traffic feature extraction at the system level.

[0073] Denial-of-Service (DoS) Resistance Verification: A forged signature broadcast storm with a rate of up to 10 MPPS (millions of packets per second) was injected into the edge XDP driver node. Test results show that the underlying silent drop mechanism (XDP_DROP) of this system has an average processing latency of less than 50 microseconds, and the core CPU utilization remains at an extremely low level. Compared with conventional software decapsulation systems without this interception mechanism, the robustness against high-volume concurrent attacks is improved by several orders of magnitude.

[0074] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0075] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A quantum-resistant method based on stateless signature and execution isomorphism, characterized in that, Includes the following steps: The sender generates a multi-receiver key to encapsulate the broadcast payload based on the modulo error rounding algorithm, and signs the broadcast payload using a stateless hash digital signature algorithm; After capturing the broadcast payload, the receiver verifies the signature using a preset public key at the network interface card driver layer; If signature verification fails, the broadcast payload is silently discarded at the network card driver layer. If the signature verification passes, the receiver extracts the ciphertext component from the broadcast payload and submits it to the PQC hardware engine for decapsulation and consistency verification. If the verification fails, the PQC hardware engine implicitly outputs a pseudo-random sequence as a scrap key. If the verification is successful, the PQC hardware engine will output the real session key and pass it to the receiving operating system. The receiving operating system executes I / O-aware microarchitecture isomorphism: regardless of whether the PQC hardware engine outputs a real session key or a scrap key, the operating system forces subsequent processing flows to maintain physical isomorphism in software execution flow, memory access patterns, and peripheral bus activity.

2. The anti-quantum method based on stateless signature and execution isomorphism according to claim 1, characterized in that, The stateless hash digital signature algorithm is the SLH-DSA algorithm compliant with the FIPS 205 standard.

3. The anti-quantum method based on stateless signature and execution isomorphism of claim 1, wherein, The steps for generating multi-receiver key-encapsulated broadcast payloads based on the modulo error rounding algorithm include: Generate a high-entropy random seed and expand it into a common polynomial matrix A using an extensible output function; Based on the public polynomial matrix A, the ephemeral secret value of the sender and the public key of the receiver, a shared ciphertext component is calculated ; Each recipient independently generates a compressed, proprietary ciphertext hint component based on their public key. ; The shared ciphertext component With all proprietary ciphertext hint components The data are then sequentially spliced ​​together to form the broadcast payload.

4. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 1, characterized in that, The signature verification using a pre-set public key at the network card driver layer is implemented using an extended Berkeley packet filter or a fast data path method, and the silent discard operation when verification fails is triggered by the XDP_DROP instruction.

5. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 1 or 4, characterized in that, The public key used to verify the signature is pre-stored in the recipient's local hardware root of trust.

6. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 1, characterized in that, The PQC hardware engine is a systolic array hardware coprocessor that supports number theory transformation operations. Its decapsulation process has constant time characteristics, and all intermediate data and calculation processes are confined to the internal registers of the hardware coprocessor.

7. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 6, characterized in that, During the key derivation function call phase of the Fujisaki-Okamoto transformation in the decapsulation process, the hash value of the receiver's public key is forcibly injected as the domain separation salt value.

8. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 1, characterized in that, In the I / O-aware microarchitecture execution isomorphism, when processing the scrap key, the resulting invalid data stream is physically written to a preset shadow silent area on the non-volatile memory through a real direct memory access operation.

9. The quantum-resistant method based on stateless signature and execution isomorphism according to claim 8, characterized in that, The shadow silent zone is a hidden logical block addressing namespace that is invisible to the user-mode file system and is configured as a circular overlay buffer.

10. A quantum-resistant system based on stateless signature and execution isomorphism, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the method according to any one of claims 1-9.