Communication protocol conversion method, module and fire alarm system

Abstract

The present disclosure provides a communication protocol conversion method, module and fire alarm system. The method comprises: receiving a first communication protocol code sending signal from a controller, decoding the first communication protocol code sending signal to generate a logic signal; the controller uses a first communication protocol; generating a first control signal according to the logic signal; converting the first communication protocol code sending signal into a second communication protocol code sending signal based on the first control signal, and sending the second communication protocol code sending signal to a first type of detection device, the first type of detection device using a second communication protocol; receiving a first return code current signal in the second communication protocol pulled down by the first type of detection device under a second voltage signal, and converting the first return code current signal into a return code voltage signal; generating a second control signal according to the return code voltage signal; generating a second return code current signal in the first communication protocol according to the second control signal, and sending the second return code current signal to the controller.

Description

Technical Field

[0001] This disclosure relates to the fields of circuit and fire protection technology, and more specifically, to a communication protocol conversion method, module, and fire alarm system. Background Technology

[0002] In real-world scenarios, when manufacturers launch their own fire alarm systems, they utilize power line carrier communication as the primary communication method to share communication and power supply lines, reducing construction costs. The application layer protocol employs a special proprietary protocol, ensuring that only products using the same protocol can be connected within the same communication loop, guaranteeing system stability and compatibility. For example, if the fire alarm system's controller uses a first communication protocol, only fire detection devices using the same first communication protocol (hereinafter referred to as second-type detection devices) can be connected within the communication loop. When the application layer protocol of the fire alarm system is updated, for example to a second communication protocol, fire detection devices using the second communication protocol (hereinafter referred to as first-type detection devices) cannot connect to the existing fire alarm system using the first communication protocol. Upgrading the existing fire alarm system using the first communication protocol to the updated second communication protocol involves significant engineering work and high construction costs.

[0003] Therefore, how to adapt peripheral products (i.e., first-class detection devices) that adopt the updated second communication protocol to the existing fire alarm system that adopts the first communication protocol, and how to expand the subsystem that adopts the second communication protocol, are urgent problems to be solved. Summary of the Invention

[0004] The purpose of this disclosure is to provide a communication protocol conversion method, module, and fire alarm system that enables the connection of a first type of detection device using a second communication protocol to a controller using a first communication protocol.

[0005] This disclosure provides a communication protocol conversion method, including:

[0006] The controller receives a first communication protocol transmission signal, decodes the first communication protocol transmission signal, and generates a logic signal; the controller adopts the first communication protocol.

[0007] A first control signal is generated based on the logic signal;

[0008] Based on the first control signal, the first communication protocol transmission signal is converted into a second communication protocol transmission signal, and the second communication protocol transmission signal is sent to the first type of detection device, wherein the first type of detection device adopts the second communication protocol.

[0009] Receive the first return code current signal in the second communication protocol pulled by the first type of detection device under the second voltage signal, and convert the first return code current signal into a return code voltage signal;

[0010] A second control signal is generated based on the return code voltage signal;

[0011] The second backcode current signal in the first communication protocol is generated according to the second control signal, and the second backcode current signal is sent to the controller.

[0012] This disclosure provides a communication protocol conversion module, including:

[0013] A decoding unit includes an input terminal and an output terminal; the input terminal of the decoding unit is used to connect to a first communication bus to receive a first communication protocol transmission signal from a controller connected to the first communication bus, wherein the controller adopts the first communication protocol; the decoding unit is used to decode the first communication protocol transmission signal to generate a logic signal; the output terminal of the decoding unit is used to output the logic signal.

[0014] A central control unit includes a first input terminal, a second input terminal, and a first output terminal; the first input terminal of the central control unit is used to receive a first voltage signal as its operating voltage; the second input terminal of the central control unit is used to connect to the output terminal of the decoding unit to receive the logic signal; the central control unit is used to generate a first control signal according to the logic signal; the first output terminal of the central control unit is used to output the first control signal.

[0015] A coding unit includes a first input terminal, a second input terminal, and an output terminal. The first input terminal of the coding unit is used to receive a second voltage signal. The second input terminal of the coding unit is used to connect to the first output terminal of the central control unit to receive the first control signal. The coding unit is used to convert the first communication protocol coding signal into a second communication protocol coding signal based on the first control signal. The output terminal of the coding unit is used to connect to a second communication bus to send the second communication protocol coding signal to a first type of detection device connected to the second communication bus, wherein the first type of detection device adopts the second communication protocol.

[0016] A loop detection circuit includes an input terminal and an output terminal. The input terminal of the loop detection circuit is used to connect to the second communication bus to receive a first return code current signal in the second communication protocol pulled down by the first type of detection device under the second voltage signal. The return code detection unit is used to convert the first return code current signal into a return code voltage signal. The central control unit further includes a third input terminal, and the output terminal of the return code detection unit is used to connect to the third input terminal and the second output terminal of the central control unit to input the return code voltage signal to the central control unit. The central control unit is also used to generate a second control signal based on the return code voltage signal. The second output terminal of the central control unit is used to output the second control signal.

[0017] The return code unit includes an input terminal and an output terminal; the input terminal of the return code unit is used to connect to the second output terminal of the central control unit to receive the second control signal; the return code unit is used to generate a second return code current signal in the first communication protocol according to the second control signal; the output terminal of the return code unit is used to connect to the first communication bus to send the second return code current signal to the controller.

[0018] This disclosure provides a fire alarm system for implementing the communication protocol conversion method as described in any embodiment of this disclosure.

[0019] This disclosure provides a fire alarm system, including:

[0020] A controller employing a first communication protocol, the controller being used to connect to a first communication bus;

[0021] The communication protocol conversion module is described in any embodiment of this disclosure; the communication protocol conversion module is used to connect to the first communication bus and the second communication bus respectively;

[0022] A first type of detection device that is connected to the second communication bus and uses the second communication protocol.

[0023] The communication protocol conversion method, module, and fire alarm system provided in this disclosure analyze a first communication protocol encoding signal sent by a controller using a first communication protocol to generate a logic signal corresponding to the first communication protocol encoding signal. Then, a first control signal is generated based on the logic signal, and this first control signal converts the first communication protocol encoding signal into a second communication protocol encoding signal. This allows the first communication protocol encoding signal sent by the controller to be converted into a corresponding second communication protocol encoding signal and sent to a first type of detection device using the second communication protocol. When the first type of detection device extracts a first return current signal from the second communication protocol under a second voltage signal, it converts the first return current signal into a return voltage signal and generates a second control signal based on the return voltage signal. Under the control of this second control signal, the first return current signal extracted from the second communication protocol is converted into a second return current signal extracted from the first communication protocol and returned to the controller using the first communication protocol. This enables the first type of detection device using the second communication protocol to be connected to a controller or fire alarm system using the first communication protocol, eliminating the need for engineering upgrades to the existing fire alarm system or controller using the first communication protocol, thus reducing costs. Attached Figure Description

[0024] Figure 1 A flowchart of a communication protocol conversion method according to an embodiment of this disclosure is shown.

[0025] Figure 2 A schematic diagram of a communication protocol conversion module according to an embodiment of this disclosure is shown.

[0026] Figure 3 The diagram shows a waveform of a first communication protocol signal according to an embodiment of the present disclosure.

[0027] Figure 4 The diagram shows a waveform of a second communication protocol signal according to an embodiment of this disclosure.

[0028] Figure 5 A schematic diagram of a power conversion unit according to an embodiment of the present disclosure is shown.

[0029] Figure 6 A circuit diagram of a power conversion unit according to an embodiment of the present disclosure is shown.

[0030] Figure 7 A schematic diagram of a decoding unit according to an embodiment of the present disclosure is shown.

[0031] Figure 8 A circuit diagram of a decoding unit according to an embodiment of the present disclosure is shown.

[0032] Figure 9This diagram illustrates a minimum system schematic of a central control unit according to an embodiment of the present disclosure.

[0033] Figure 10 A schematic diagram of a central control unit according to an embodiment of the present disclosure is shown.

[0034] Figure 11 A schematic diagram of a coding unit according to an embodiment of the present disclosure is shown.

[0035] Figure 12 A circuit diagram of a coding unit according to an embodiment of the present disclosure is shown.

[0036] Figure 13 A schematic diagram of a return code detection unit according to an embodiment of the present disclosure is shown.

[0037] Figure 14 A circuit diagram of a return code detection unit according to an embodiment of the present disclosure is shown.

[0038] Figure 15 A circuit diagram of an anomaly detection unit according to an embodiment of this disclosure is shown.

[0039] Figure 16 A schematic diagram of a return code unit in an embodiment of this disclosure is shown.

[0040] Figure 17 A circuit diagram of a return code unit according to an embodiment of the present disclosure is shown.

[0041] Figure 18 A circuit diagram of an abnormal return code unit according to an embodiment of the present disclosure is shown.

[0042] Figure 19 A schematic diagram of a fire alarm system according to an embodiment of this disclosure is shown.

[0043] Figure 20 A schematic diagram of another fire alarm system according to an embodiment of this disclosure is shown.

[0044] Figure 21 A flowchart illustrating the operations performed by the communication protocol conversion module in an embodiment of this disclosure is shown.

[0045] Figure 22 This illustration shows a communication frame format provided by an embodiment of the present disclosure.

[0046] Figure 23 This diagram illustrates a timing diagram of data provided in an embodiment of the present disclosure. Detailed Implementation

[0047] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0048] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced by omitting one or more of the specific details, or other methods, apparatuses, steps, etc. In other instances, well-known structures, methods, apparatuses, implementations, or operations are not shown or described in detail.

[0049] Figure 1 A flowchart of a communication protocol conversion method according to an embodiment of this disclosure is shown. Figure 1 The method provided in the embodiments can be executed by any electronic device, such as the communication protocol conversion module in the following embodiments. Figure 1 As shown, the method provided in this disclosure embodiment may include the following steps.

[0050] In S110, a first communication protocol transmission signal is received from the controller, and the first communication protocol transmission signal is decoded to generate a logic signal; the controller adopts the first communication protocol.

[0051] In an exemplary embodiment, decoding the first communication protocol transmission signal to generate a logic signal includes: dividing the first communication protocol transmission signal into voltages to generate a first voltage divider signal and a second voltage divider signal, wherein the first voltage divider signal is smaller than the second voltage divider signal; comparing the magnitude of the first voltage divider signal with that of a first reference voltage to generate the first logic signal; comparing the magnitude of the second voltage divider signal with that of a second reference voltage to generate the second logic signal; wherein the second reference voltage is greater than that of the first reference voltage.

[0052] In an exemplary embodiment, the first communication protocol transmission signal includes a third voltage signal. The method further includes converting the third voltage signal into a second voltage signal and a first voltage signal.

[0053] In an exemplary embodiment, converting the third voltage signal into a second voltage signal and a first voltage signal includes: sending the first communication protocol transmission signal to the positive terminal of a first diode; connecting a first terminal of a first capacitor to the negative terminal of the first diode and connecting a second terminal of the first capacitor to a ground voltage signal to store the third voltage signal in the first communication protocol transmission signal; connecting the input terminal of a first power conversion chip to the negative terminal of the first diode and the first terminal of the first capacitor respectively to convert the third voltage signal into the second voltage signal; and connecting the input terminal of a second power conversion chip to the output terminal of the first power conversion chip to convert the second voltage signal into the first voltage signal.

[0054] In S120, a first control signal is generated based on the logic signal.

[0055] In an exemplary embodiment, the logic signal includes a first logic signal and a second logic signal; different combinations of the first logic signal and the second logic signal are used to represent the third voltage signal, the second voltage signal and the ground voltage signal in the first communication protocol coding signal, respectively.

[0056] In an exemplary embodiment, the first control signal includes a third voltage control signal, a second voltage control signal, and a ground voltage control signal.

[0057] In an exemplary embodiment, generating a first control signal based on the logic signal includes: generating the third voltage control signal, the second voltage control signal, and the ground voltage control signal based on the first logic signal and the second logic signal.

[0058] In S130, the first communication protocol transmission signal is converted into a second communication protocol transmission signal based on the first control signal, and the second communication protocol transmission signal is sent to the first type of detection device, which uses the second communication protocol.

[0059] In an exemplary embodiment, converting the first communication protocol transmission signal into a second communication protocol transmission signal based on the first control signal includes: generating a second communication protocol transmission signal including the third voltage signal, the second voltage signal, and the ground voltage signal under the control of the third voltage control signal, the second voltage signal, and the ground voltage control signal.

[0060] In an exemplary embodiment, under the control of the third voltage control signal, the second voltage control signal, and the ground voltage control signal, generating a second communication protocol transmission signal including the third voltage signal, the second voltage signal, and the ground voltage signal includes: when the third voltage control signal is at a first level, controlling the output of the third voltage signal to the second communication protocol transmission signal; when the second voltage control signal is at the first level, controlling the output of the second voltage signal to the second communication protocol transmission signal; and when the ground voltage control signal is at the first level, controlling the output of the ground voltage signal to the second communication protocol transmission signal.

[0061] In an exemplary embodiment, when the third voltage control signal is at a first level, controlling the output of the third voltage signal to the second communication protocol transmission signal includes: inputting the third voltage control signal and the ground voltage signal to the base and emitter of a first transistor, respectively, so that the first transistor is turned on when the third voltage control signal is at the first level and turned off when it is at the second level; the collector of the first transistor is connected to the control terminal of a first PMOS transistor, the base of a second transistor, and the collector of a third transistor, respectively; the base of the third transistor is connected to the collector of the second transistor; inputting the ground voltage signal to the emitter of the second transistor; inputting the third voltage signal to the emitter of the third transistor; inputting the third voltage signal to the first terminal of the first PMOS transistor, so that the second terminal of the first PMOS transistor outputs the second communication protocol transmission signal containing the third voltage signal when the third voltage control signal is at the first level.

[0062] In an exemplary embodiment, the first control signal further includes a discharge control signal. The method further includes: inputting the discharge control signal, the ground voltage signal, and the third voltage signal to the control terminal, the first terminal, and the second terminal of a first NMOS transistor, respectively; when the discharge control signal is at the first level, turning on the first NMOS transistor to pull the voltage of the output second communication protocol encoding signal down from the third voltage signal to the ground voltage signal.

[0063] In an exemplary embodiment, when the second voltage control signal is at the first level, controlling the output of the second voltage signal to the second communication protocol transmission signal includes: inputting the second voltage control signal, the ground voltage signal, and the third voltage signal to the base, emitter, and collector of a fourth transistor, respectively, so that the fourth transistor is turned on when the second voltage control signal is at the first level and turned off when it is at the second level; the base of a fifth transistor is connected to the collector of the fourth transistor; the third voltage signal and the ground voltage signal are input to the emitter and collector of the fifth transistor, respectively; the control terminal of a second NMOS transistor is connected to the collector of the fifth transistor; the second voltage signal is input to the first terminal of the second NMOS transistor, so that when the second voltage control signal is at the first level, the second terminal of the second NMOS transistor outputs the second communication protocol transmission signal containing the second voltage signal.

[0064] In an exemplary embodiment, when the ground voltage control signal is at the first level, controlling the output of the ground voltage signal to the second communication protocol transmission signal includes: inputting the ground voltage control signal, the ground voltage signal, and the third voltage signal to the control terminal, the first terminal, and the second terminal of the third NMOS transistor, respectively, so that when the ground voltage control signal is at the first level, the second communication protocol transmission signal containing the ground voltage signal is output through the second terminal of the third NMOS transistor.

[0065] In S140, the first echo current signal in the second communication protocol pulled down by the first type of detection device under the second voltage signal is received, and the first echo current signal is converted into an echo voltage signal.

[0066] In an exemplary embodiment, converting the first return code current signal into a return code voltage signal includes: detecting the voltage difference generated by the first return code current signal across a first current sampling resistor; amplifying the voltage difference generated by the first return code current signal across the first current sampling resistor using a first operational amplifier to generate an amplified voltage difference output by the first operational amplifier; and converting the amplified voltage difference output by the first operational amplifier into the return code voltage signal using a first load resistor.

[0067] In S150, a second control signal is generated based on the return code voltage signal.

[0068] In S160, a second backcode current signal in the first communication protocol is generated according to the second control signal, and the second backcode current signal is sent to the controller.

[0069] In an exemplary embodiment, generating the second return current signal in the first communication protocol according to the second control signal includes: dividing the second control signal by a first voltage divider resistor and a second voltage divider resistor to obtain a single response signal; inputting the single response signal to a first input terminal of a second operational amplifier, wherein the second input terminal of the second operational amplifier is connected to a first terminal of a fourth NMOS transistor, and the first terminal of the fourth NMOS transistor is also connected to a first terminal of a first return current resistor; dividing the output signal of the second operational amplifier by a third voltage divider resistor and a fourth voltage divider resistor to obtain a third voltage divider signal; inputting the third voltage divider signal to a control terminal of the fourth NMOS transistor, and inputting the ground voltage signal to a second terminal of the first return current resistor, so that when the second control signal is at a first level, the fourth NMOS transistor is turned on, and the single response signal is converted into the second return current signal through the first return current resistor.

[0070] In an exemplary embodiment, the method provided in this disclosure further includes: receiving an abnormal current signal pulled by the first type of detection device under a third voltage signal; converting the abnormal current signal into an abnormal voltage signal; and generating an abnormal control signal based on the abnormal voltage signal.

[0071] In an exemplary embodiment, converting the abnormal current signal into an abnormal voltage signal includes: detecting the voltage difference generated by the abnormal current signal across a second current sampling resistor; amplifying the voltage difference generated by the abnormal current signal across the second current sampling resistor using a third operational amplifier to generate an amplified voltage difference output by the third operational amplifier; and converting the amplified voltage difference output by the third operational amplifier into the abnormal voltage signal using a second load resistor.

[0072] In an exemplary embodiment, the method provided by this disclosure further includes: generating an abnormal return code current signal when the abnormal control signal is at a first level; and sending the abnormal return code current signal to the controller.

[0073] In an exemplary embodiment, when the abnormal control signal is at a first level, generating an abnormal return current signal includes: dividing the abnormal control signal by a fifth voltage divider resistor and a sixth voltage divider resistor to obtain a dual-response signal; inputting the dual-response signal to a first input terminal of a fourth operational amplifier, wherein the second input terminal of the fourth operational amplifier is connected to a first terminal of a fifth NMOS transistor, and the first terminal of the fifth NMOS transistor is also connected to a first terminal of a second return current resistor; dividing the output signal of the fourth operational amplifier by a seventh voltage divider resistor and an eighth voltage divider resistor to obtain a fourth voltage divider signal; inputting the fourth voltage divider signal to a control terminal of the fifth NMOS transistor, and inputting the ground voltage signal to a second terminal of the second return current resistor, so that when the abnormal control signal is at a first level, the fifth NMOS transistor is turned on, and the dual-response signal is converted into the abnormal return current signal through the second return current resistor.

[0074] The communication protocol conversion method provided in this embodiment parses the first communication protocol transmission signal sent by a controller using a first communication protocol, generates a logic signal corresponding to the first communication protocol transmission signal, and then generates a first control signal based on the logic signal. The first control signal is used to convert the first communication protocol transmission signal into a second communication protocol transmission signal, thereby enabling the conversion of the first communication protocol transmission signal sent by the controller into a corresponding second communication protocol transmission signal, which is then sent to a first type of detection device using the second communication protocol. When the first type of detection device draws a first return current signal in the second communication protocol under a second voltage signal, it converts the first return current signal into a return voltage signal, and generates a second control signal based on the return voltage signal. Under the control of the second control signal, the first return current signal drawn in the second communication protocol is converted into a second return current signal drawn in the first communication protocol and returned to the controller using the first communication protocol. This enables the first type of detection device using the second communication protocol to be connected to a controller or fire alarm system using the first communication protocol, thus eliminating the need for engineering upgrades to the existing fire alarm system or controller using the first communication protocol, reducing costs.

[0075] The following examples illustrate the implementation of the communication protocol conversion method provided in any embodiment of this disclosure using the communication protocol conversion module provided in the embodiments of this disclosure. It should be understood that the specific circuit structures described below are for illustrative purposes only and this disclosure is not limited thereto.

[0076] Figure 2 A schematic diagram of a communication protocol conversion module according to an embodiment of this disclosure is shown. Figure 2 The communication protocol conversion module provided in this embodiment can be applied to fire alarm systems, and therefore can also be referred to as a fire alarm system communication protocol conversion module.

[0077] The communication protocol conversion module in this embodiment is used to convert between first communication protocol data and second communication protocol data. The first communication protocol data refers to data conforming to the first communication protocol in the fire alarm system, including a first communication protocol transmission signal and a first communication protocol return signal (e.g., the second return current signal described below). The second communication protocol data refers to data conforming to the second communication protocol in the fire alarm system, including a second communication protocol transmission signal and a second communication protocol return signal (e.g., the first return current signal described below).

[0078] like Figure 2 As shown, the communication protocol conversion module 100 provided in this embodiment includes a decoding unit 110, a central control unit 120, a code transmission unit 130, a code return detection unit or code return current detection unit 140, and a code return unit 150.

[0079] refer to Figure 2 The decoding unit 110 includes an input terminal I1 and an output terminal O1. The input terminal I1 of the decoding unit 110 is used to connect to a first communication bus to receive a first communication protocol transmission signal from a controller connected to the first communication bus. The controller uses the first communication protocol. The decoding unit 110 decodes the first communication protocol transmission signal to generate a logic signal DECODE. The output terminal O1 of the decoding unit outputs the logic signal DECODE. The decoding unit parses the first communication protocol transmission signal and generates a logic signal to indicate the different voltage signals contained in the first communication protocol transmission signal.

[0080] In this embodiment, the communication protocol conversion module 100 is connected to a first communication bus. The controller outputs first communication protocol data through the first communication bus. This first communication protocol data includes a first communication protocol transmission signal. The first communication protocol transmission signal refers to a signal sent by the controller that conforms to the first communication protocol in the fire alarm system. Figure 2 As shown, the first communication bus may include a first communication line ( Figure 2 The CLIP communication line shown is hereinafter referred to as COM+) and the second communication line ( Figure 2 The CLIP communication line shown is hereinafter referred to as COM.

[0081] The controller in this embodiment, also known as a fire alarm control panel, is responsible for providing a stable power supply to fire detection devices (including first-class and second-class detection devices), receiving fire signals from the fire detection devices (which can be fed back through alarm events); upon receiving a fire signal, the controller immediately activates the fire alarm device, emitting audible and visual alarm signals; indicating the specific location of the fire and recording relevant information; and activating automatic fire extinguishing equipment and fire linkage control equipment via a fire alarm transmitting device or automatic fire extinguishing control device. The controller may include: a display panel, which may include a display screen for displaying system status, alarm information, etc.; indicator lights for indicating the system's operating status, alarm status, etc.; switches and buttons for controlling the system's start, stop, reset, and other operations; a motherboard, including a microprocessor, memory, etc., responsible for processing system data and instructions; an input / output control board for receiving external input signals and sending control signals; an audio device for emitting audible alarm signals; a network interface component for enabling network communication with other devices; and a power supply unit, including a main power supply and a backup power supply, ensuring the system can operate normally under any circumstances.

[0082] The first and second communication protocols in this embodiment both belong to the application layer protocols of a fire alarm system, and both are proprietary protocols. Proprietary protocols are communication protocols designed by specific manufacturers or organizations to meet their own needs. The specific protocol content may vary between different manufacturers or systems. In a fire alarm system, proprietary protocols can precisely control the data format, transmission method, verification method, etc. Therefore, using proprietary protocols for the application layer can ensure the stability and compatibility of the system, thereby ensuring the accuracy and reliability of the data. Proprietary protocols are highly customized and specialized. Because different manufacturers or organizations use different proprietary protocols, generally only products with the same protocol can be connected in the same communication loop. This limits the system's scalability and flexibility.

[0083] The first communication protocol in this embodiment is a communication protocol between the controller and field devices (including second-type detection devices) in a fire alarm system, used for data communication between the controller and field devices.

[0084] In both the first and second communication protocols of a fire alarm system, the second and first types of detection devices each include detectors and modules. Detectors are the front-end devices of a fire alarm system, used to detect fires or related hazards. They are installed in areas where fires may occur, such as rooms, corridors, and warehouses. The main function of a detector is to sense physical quantities in the environment (such as smoke, temperature, and flames) through sensors and convert these physical quantities into electrical signals for transmission. When a detector detects a fire or related hazard, it immediately sends an alarm signal to the controller so that the system can take appropriate measures in a timely manner. Modules are intermediate devices in a fire alarm system, used to receive, process, transmit, and amplify the signals emitted by the detectors. Modules are installed on the connection line between the detector and the controller.

[0085] refer to Figure 2 The central control unit 120 includes a first input terminal I21, a second input terminal I22, and a first output terminal O21. The first input terminal I21 of the central control unit 120 is used to receive a first voltage signal u1 as its operating voltage. The second input terminal I22 of the central control unit 120 is connected to the output terminal O1 of the decoding unit 110 to receive the logic signal DECODE. The central control unit 120 is used to generate a first control signal CTL1 based on the logic signal DECODE. The first output terminal O21 of the central control unit 120 is used to output the first control signal CTL1.

[0086] In this embodiment of the disclosure, it is assumed that the operating voltage of the central control unit is 3.3V. In subsequent embodiments, the first voltage signal is 3.3V as an example. However, this disclosure is not limited to this and can be set according to the actual operating voltage required by the central control unit.

[0087] In this embodiment, the central control unit pre-stores the mapping relationship between the first communication protocol transmission signal and the second communication protocol transmission signal, as well as the mapping relationship between logic signals and the first communication protocol transmission signal. When the central control unit receives a logic signal, it can determine the corresponding second communication protocol transmission signal from the mapping relationship based on the logic signal. Based on the second communication protocol transmission signal to be sent, it generates a corresponding first control signal to control the transmission unit to generate the corresponding second communication protocol transmission signal.

[0088] exist Figure 2In this embodiment, the coding unit 130 includes a first input terminal I31, a second input terminal I32, and an output terminal. The first input terminal I31 of the coding unit 130 is used to receive a second voltage signal u2. The second input terminal I32 of the coding unit 130 is used to connect to the first output terminal O21 of the central control unit 120 to receive a first control signal CTL1. The coding unit 130 is used to convert a first communication protocol coding signal into a second communication protocol coding signal based on the first control signal CTL1. The output terminal of the coding unit 130 is used to connect to a second communication bus to send the second communication protocol coding signal to a first type of detection device connected to the second communication bus. The first type of detection device uses the second communication protocol.

[0089] like Figure 2 As shown, the second communication bus may include a third communication line ( Figure 2 The PLIP communication line shown is COM+ (hereinafter referred to as COM+) and the fourth communication line ( Figure 2 The PLIP communication line shown is hereinafter referred to as COM-). The output of the coding unit 130 may include a first sub-output terminal O31 and a second sub-output terminal O32, which are used to connect the PLIP communication line + and the PLIP communication line - respectively, so as to send the second communication protocol coding signal to the first type of detection device.

[0090] In the embodiments disclosed herein, the second voltage signal u2 is 5V as an example for illustration. However, this disclosure is not limited to this and can be set according to the specific specifications of the second communication protocol.

[0091] In this embodiment of the disclosure, the second communication protocol transmission signal refers to a signal conforming to the second communication protocol sent to a first-type detection device using the second communication protocol in a fire alarm system. In this embodiment, the fire detection device using the second communication protocol for data communication is referred to as a first-type detection device. The fire detection device using the first communication protocol for data communication is referred to as a second-type detection device.

[0092] Continue to refer to Figure 2 The loop detection circuit 140 includes an input terminal I4 and an output terminal O4. The input terminal I4 of the loop detection circuit 140 is used to connect to a second communication bus (e.g., PLIP communication line +) to receive a first return current signal, such as 25mA, pulled down by the first type of detection device under a second voltage signal (e.g., 5V) in the second communication protocol. However, this disclosure is not limited to this and can be configured according to the specifications in the actual second communication protocol. The return current detection unit 140 is used to convert the first return current signal into a return voltage signal CUR_5V.

[0093] In this embodiment, the central control unit 120 further includes a third input terminal I23 and a second output terminal O22. The output terminal O4 of the return code detection unit 140 is connected to the third input terminal I23 of the central control unit 120 to input the return code voltage signal CUR_5V to the central control unit 120. The central control unit 120 is also used to generate a second control signal CTL2 based on the return code voltage signal CUR_5V. The second output terminal O22 of the central control unit 120 is used to output the second control signal CTL2.

[0094] exist Figure 2 In this embodiment, the echo code unit 150 includes an input terminal I5 and an output terminal O5. The input terminal I5 of the echo code unit 150 is connected to the second output terminal O22 of the central control unit 120 to receive the second control signal CTL2. The echo code unit 150 is used to generate a second echo code current signal, for example, 50mA, in the first communication protocol based on the second control signal CTL2. The output terminal O5 of the echo code unit 150 is connected to the first communication bus (e.g., CLIP communication line +) to send the second echo code current signal to the controller.

[0095] The communication protocol conversion module provided in this embodiment includes a decoding unit, a central control unit, a code transmission unit, a return code detection unit, and a return code unit. The decoding unit parses the first communication protocol code transmission signal sent by a controller using a first communication protocol, generating a logic signal corresponding to the first communication protocol code transmission signal. The central control unit then generates a first control signal based on the logic signal, controlling the code transmission unit to convert the first communication protocol code transmission signal into a second communication protocol code transmission signal. This allows the first communication protocol code transmission signal sent by the controller to be converted into a corresponding second communication protocol code transmission signal and sent to a first type of detection device using the second communication protocol. When the first type of detection device extracts a first return code current signal from the second communication protocol under a second voltage signal, the return code detection unit converts the first return code current signal into a return code voltage signal and sends the return code voltage signal to the central control unit. The central control unit generates a second control signal based on the return code voltage signal. Under the control of the second control signal, the return code unit converts the first return code current signal extracted from the second communication protocol into a second return code current signal extracted from the first communication protocol and returns it to the controller using the first communication protocol. In other words, by using the provided communication protocol conversion module, the first type of detection device using the second communication protocol can be connected to the controller or fire alarm system using the first communication protocol. This eliminates the need for engineering upgrades or improvements to the original fire alarm system or controller using the first communication protocol, thus reducing costs.

[0096] Continue to refer to Figure 2In an exemplary embodiment, the communication protocol conversion module 100 may further include a power conversion unit 160. The power conversion unit 160 in this embodiment includes an input terminal, a first output terminal O61, and a second output terminal O62.

[0097] The input terminal of the power conversion unit 160 can be used to connect to the first communication bus to receive the first communication protocol transmission signal. For example, the input terminal of the power conversion unit 160 includes a first sub-input terminal I61 and a second sub-input terminal I62. The first sub-input terminal I61 is used to connect to the CLIP communication line +, and the second sub-input terminal I62 is used to connect to the CLIP communication line -.

[0098] The first communication protocol transmission signal may include a third voltage signal. In the following embodiments, the third voltage signal is exemplified as 24V, but this disclosure is not limited to this. It can be set according to the actual voltage used in the first communication protocol.

[0099] In this embodiment of the disclosure, the power conversion unit 160 can be used to convert a third voltage signal (e.g., 24V) into a second voltage signal (e.g., 5V) and a first voltage signal (e.g., 3.3V).

[0100] For example, the first input terminal I21 of the central control unit 120 is used to connect to the second output terminal O62 of the power conversion unit 160 to receive a first voltage signal (e.g., 3.3V) as its operating voltage. The first input terminal I31 of the coding unit 130 can be used to connect to the first output terminal O61 of the power conversion unit 160 to receive a second voltage signal (e.g., 5V).

[0101] The communication protocol conversion module provided in this embodiment also integrates a power conversion unit. This enables the extraction of the operating voltage (i.e., the first voltage signal) required for the operation of the central control unit and the second voltage signal required by the coding unit from the first communication protocol coding signal sent by the controller. On the one hand, this avoids the need for additional power supply voltage, reduces costs, and improves efficiency; on the other hand, it simplifies the circuit structure of the communication protocol conversion module.

[0102] The first and second communication protocols in this disclosure can be any two different communication protocols that need to be converted between each other, and both can be applied to fire alarm systems. In the following embodiments, the first communication protocol is an analog communication protocol (hereinafter referred to as CLIP protocol), and the second communication protocol is a digital communication protocol (hereinafter referred to as PLIP protocol) for illustrative purposes.

[0103] CLIP and PLIP protocols are two communication protocols used in fire alarm systems. The controller initiates communication as the master, and the loop unit (which includes a loop card connected to the controller and a first- or second-type detection device connected to that loop card) responds as a slave. During communication, the signals sent by the controller (e.g., the first communication protocol code signal) are voltage signals, and the response signals from the loop unit (e.g., the first or second return code current signal) are pull-up current signals.

[0104] Figure 3 The diagram illustrates a waveform (which may be abbreviated as CLIP waveform or CLIP waveform signal) of an analog communication protocol signal according to an embodiment of this disclosure. CLIP is a bidirectional serial communication protocol and also an analog protocol.

[0105] CLIP is a protocol based on cell address lookup. The controller polls each cell address in the loop (i.e., the unique identifier of each loop cell), and the queried loop cell responds by pulling a specific current (I2 = 50mA, hereinafter referred to as the second code current signal) on the loop.

[0106] like Figure 3 As shown, the CLIP protocol communication frame is composed as follows: Each frame includes address bits (i.e., a unique identifier for each loop unit), control bits, parity bits, and return code bits. The loop voltage Vdd (i.e., the third voltage signal) is equal to 24V, and a high level of 24V represents the clock bit. The data bits have a 5V voltage (i.e., the second voltage signal) representing logic "1", and a 0V voltage (i.e., the ground voltage signal) representing logic "0". PW1-PW5 are the unit return code bits, i.e., the return code bits of the loop unit. The return code information or return code bits are analog quantities representing the current jacking time width.

[0107] Continue to refer to Figure 3 The communication frames between the controller and multiple fire communication terminals (such as Class II detection devices) consist of, from front to back, 1 type bit indicating the type of the fire communication terminal (A8; when A8=0, it indicates that the fire communication terminal is a detector; when A8=1, it indicates that the fire communication terminal is a module (also known as an output control module)), 8 address bits (A7 to A0), multiple control bits (e.g., CB1 to CB3), and 1 parity bit (…). Figure 3Taking even parity as an example (denoted by P), the echo information consists of multiple PW pulses (e.g., PW1-PW5) and a synchronization signal (communication reset time). The 8 address bits include 4 decimal high-order bits (A7-A4) and 4 decimal low-order bits (A3-A0). Each frame of information transmitted and received between the controller and multiple fire communication terminals consists of three types of signals: clock signal, data signal, and synchronization signal. The synchronization signal indicates the start or end of a communication frame.

[0108] When the controller communicates bidirectionally with multiple fire communication terminals, it includes the following steps:

[0109] Step 1. Information Transmission: The controller transmits information simultaneously to multiple fire communication terminals via a data stream through a loop card or communication circuit. Before transmitting information, the controller must first convert the 8 address bits into binary data. Each frame of information transmitted by the controller consists of a synchronization signal and a superimposed signal of clock and data signals. For each frame of information transmitted by the controller, the clock signal is a series of clock signals separated from the superimposed signal of each frame of information. The data signal includes 1 type bit, 8 address bits, multiple control bits, and 1 parity bit, all separated from the superimposed signal of each frame of information. In actual communication, the controller converts the 8 decimal address bits into binary data according to their corresponding relationship before transmitting information.

[0110] Step 2. Information transmission: The loop card or communication circuit synchronously transmits the information sent by the controller to multiple fire communication terminals; and during the information transmission process, the loop card or communication circuit separates the clock signal and data signal in each frame of information transmitted.

[0111] Step 3. Information Reception, Analysis, Judgment, and Response: After the information is transmitted to multiple fire communication terminals, each terminal performs its own judgment on the received information. For one of the fire communication terminals, such as the i-th fire communication terminal, the information reception process is as follows:

[0112] When the i-th fire communication terminal detects a synchronization signal, it indicates that a communication frame has begun. At this time, the i-th fire communication terminal initializes its internal communication register and prepares to receive the first bit of data.

[0113] First data reception and analysis: After the i-th fire communication terminal receives the first data, i.e., the type data, it analyzes and judges the received type data. If it is determined that the received type data is consistent with its own type, then the i-th fire communication terminal continues to receive the data after the current frame information; otherwise, the i-th fire communication terminal exits the data reception of the current frame information and returns to the state of receiving the synchronization signal representing the start of the next frame information of the current frame.

[0114] Data reception and analysis for bits 2-9: The i-th fire communication terminal continuously receives bits 2-9 (address bits) of the current frame information and stores them sequentially into the communication register connected to the i-th fire communication terminal. After all bits 2-9 of the current frame information have been received, the terminal analyzes and judges them. If the received bits 2-9 match its own address bits, the i-th fire communication terminal continues to receive data following the current frame information. Otherwise, the i-th fire communication terminal exits the data reception of the current frame information and returns to the state of receiving the synchronization signal representing the start of the next frame information.

[0115] Multiple control bit data reception and actions: The i-th fire communication terminal continuously receives multiple control bit data after the address bit data in the current frame information, analyzes and judges the combination data of the received multiple control bit data, and executes corresponding actions according to the control instructions represented by the combination data.

[0116] Parity check bit data reception and verification: The i-th fire communication terminal continues to receive parity check data following multiple control bit data in the current frame information, and performs parity check on all data of the type bit data, address bit data, and control bit data of the current frame information according to the received parity check bit data: when the parity check is correct, the i-th fire communication terminal starts to send a code back to the controller; otherwise, the i-th fire communication terminal returns to the state of receiving the synchronization signal representing the start of the next frame information of the current frame.

[0117] Information response: The i-th fire communication terminal returns its specific product type, specific working status, and collected analog quantity values ​​to the controller via a loop card or communication circuit through multiple PW pulses; the controller reads the PW values ​​of the multiple PW pulses transmitted from the i-th fire communication terminal in sequence, and combines the PW values ​​of the multiple PW pulses to determine the current working status of the i-th fire communication terminal.

[0118] After the information reply is completed, the i-th fire communication terminal receives the synchronization signal for the next frame of information in the current frame.

[0119] By repeatedly performing the above steps, real-time bidirectional communication between the controller and the i-th fire communication terminal can be achieved; similarly, real-time bidirectional communication between the controller and multiple fire communication terminals can be achieved.

[0120] The detector in this embodiment includes a detection device with remote testing function (in the remote testing state, the detection device outputs an analog signal higher than the alarm value), an LED indicator unit 1, a processing unit 1 for controlling and adjusting the remote testing state of the detection device and the operating state of the LED indicator unit 1, and a communication register connected to the processing unit 1. The processing unit 1 is connected to both the detection device and the LED indicator unit 1. The processing unit 1 is connected to a communication circuit.

[0121] The output control module in this embodiment includes an output controller, an LED indicator unit 2, a communication register connected to the output controller, and a processor 2 that controls the output controller and the LED indicator unit 2 respectively. Both the output controller and the LED indicator unit 2 are connected to the processor 2.

[0122] In an exemplary embodiment, the number of control bit data is three, and the three control bit data are CB1, CB2, and CB3. The parity bit data is correspondingly even parity bit data. The combination of control bit data CB1 and CB3 represents the control command for LED indicator unit one or LED indicator unit two: when CB1 = CB3 = 1, the working state of LED indicator unit one or LED indicator unit two is flashing; when CB1 = 0, the working state of LED indicator unit one or LED indicator unit two is constantly on; when CB1 = 1 and CB3 = 0, the working state of LED indicator unit one or LED indicator unit two is constantly off.

[0123] When the fire communication terminal is a detector, the control bit data CB2 indicates whether to reply with the specific product type information of the detector: when CB2=1, the detector does not reply with its specific product type information to the controller, that is, the PW value representing the specific product type information of the detector is 0; when CB2=0, the detector replies with its specific product type information to the controller. The control bit data CB3 indicates whether to control the detection device to enter the remote test state. When CB1=CB3=1 in two consecutive frames of information received by the detector, the detector exits the remote test state; when CB1=CB3=0 in two consecutive frames of information received by the detector, the detector enters the remote test state. Correspondingly, when the detector's processing unit 1 receives the three control bit data, it analyzes and judges the combined data of the three control bit data, and controls the detection device and LED indicator unit 1 to perform corresponding actions according to the control instructions represented by the combined data.

[0124] When the fire communication terminal is an output control module, the control bit data CB1 indicates whether to reset the lock state of the output monitoring of the output control module. When CB1 = 0, the lock state of the output monitoring of the output control module is reset. The control bit data CB2 indicates whether to reply with the specific product type information of the output control module: when CB2 = 1, the output control module does not reply with its specific product type information to the controller, that is, the PW value representing the specific product type information of the output control module is 0; when CB2 = 0, the output control module replies with its specific product type information to the controller, and at this time, the processor of the output control module updates the output command of the current output controller with the output control command received and stored in its communication register. The control bit data CB3 indicates whether the output control module should save the currently received output control command through the communication register. When CB1 = CB3 = 1 in two consecutive frames of information received by the output control module, the controller controls the output control module to save the currently received output control command in an open state; when CB1 = CB3 = 0 in two consecutive frames of information received by the output control module, the controller controls the output control module to save the currently received output control command in a closed state. Accordingly, when the processor of the output control module receives the three control bit data, it analyzes and judges the combination of the three control bit data, and controls the output controller and LED indicator unit two to perform corresponding actions according to the control command represented by the combination data.

[0125] In this embodiment of the disclosure, the number of multiple PW pulses is 5, and the 5 PW pulses are PW1, PW2, PW3, PW4 and PW5, where PW1 is the reference pulse width.

[0126] When the fire communication terminal is a detector, PW2 indicates the on / off state of the detector's remote test status: when PW2 = 1 times the pulse width of PW1, the remote test status of the detector is off; when PW2 = 2 times the pulse width of PW1, the remote test status of the detector is on. PW3 represents the assigned ID code representing the detector. PW4 represents the real-time sampled value of the detector. PW5 represents the specific product type of the detector.

[0127] When the fire communication terminal Xi is an output control module, PW2 indicates the on / off state of the output control module storing the currently received output control command: when PW2 = 1 times the pulse width of PW1, it indicates that the output control module is in a closed state; when PW2 = 2 times the pulse width of PW1, it indicates that the output control module is in an open state. PW3 indicates the real-time output monitoring status of the output control module: when PW3 = 1 times the pulse width of PW1, it indicates that the real-time output monitoring status of the output control module is normal; when PW3 = 2 times the pulse width of PW1, it indicates that the real-time output monitoring status of the output control module is open; when PW3 = 3 times the pulse width of PW1, it indicates that the real-time output monitoring status of the output control module is short-circuited. PW4 indicates the real-time analog monitoring value of the output control module. PW5 indicates the specific product type of the output control module.

[0128] In this embodiment of the disclosure, the specific product type of the detection device includes any one or more of the following: a temperature detector, an ion detector, and a photodetector. When PW5 = 1 times the pulse width of PW1, it indicates that the specific product type of the detection device is a temperature detector; when PW5 = 2 times the pulse width of PW1, it indicates that the specific product type of the detection device is an ion detector; when PW5 = 3 times the pulse width of PW1, it indicates that the specific product type of the detection device is a photodetector. However, this is only for illustrative purposes and is not limited thereto.

[0129] In actual use, the clock signal and data signal are square wave signals separated from the communication waveform of each frame of information. The low and high bits of the data signal are both at the low bit of the clock signal. The synchronization signal is a high-level clock signal lasting at least 3ms (milliseconds) (the synchronization signal is used in the product software program to determine the start of a communication frame and is also the software reset time). Simultaneously, the data signal is at the low level of the clock signal; therefore, the fire communication terminal reads the high or low level of the data signal when the clock signal is at its low level. Accordingly, when the fire communication terminal determines that the clock signal is high for, for example, 5ms, it begins to initialize the relevant communication registers, preparing to capture the falling edge of the clock signal and receive data. Furthermore, each communication frame starts at A and ends at C. Figure 3 In the middle, the clock pulse after PW5 ensures that the loop unit in the flashing state will turn off all LED indicator units in the fire communication terminal after the communication of this frame ends.

[0130] With the technological iteration and upgrading of fire alarm systems, fire-fighting equipment based on the PLIP digital protocol (i.e., Class I detection equipment) has emerged. Due to its communication method based on rapid event location and the high proportion of high-level signals in the frame structure, it has many advantages such as good reliability, high power efficiency, and a large number of full-loop communication units (i.e., the maximum number of loop units that can be connected in a communication loop), and can be quickly applied to the market.

[0131] Figure 4 The diagram shows a waveform of a digital communication protocol signal according to an embodiment of this disclosure.

[0132] PLIP (Power Bus Loop Protocol) is a half-duplex second-order communication protocol (in digital communication, data can be transmitted in both directions, but only one direction can transmit data at a time). PLIP is an event-driven protocol. The controller queries loop units, locates the address of the unit that generated the event, and then reads the event status of the loop unit that generated the event. This event-driven technology can effectively reduce communication frequency, achieve fast event response, and significantly reduce loop power consumption.

[0133] like Figure 4 As shown, the communication frame encoding in the PLIP protocol is based on a 24V high level ( Figure 4 (represented by "H") and 0V low level ( Figure 4 In this context, "L" represents different pulse width combinations to represent logic 1 and logic 0. For example, a width of 660 microseconds (where L is 60 microseconds and H is 600 microseconds) represents logic 1. A width of 360 microseconds (where L is 60 microseconds and H is 300 microseconds) represents logic 0. The return code bit is at a 5V level. Figure 4 (Represented by "R" in Chinese). The loop unit responds with a fixed pulse width current (I1 = 25mA, i.e., the first return code current signal) at the return code bit. Figure 4 The controller in the context includes the Control Panel, and "from Control Panel" means "from controller".

[0134] In this embodiment of the disclosure, a two-wire communication bus is used to implement data communication. For example... Figure 4As shown, the communication data frame or communication frame includes a communication code transmission part (i.e., the second communication protocol code transmission signal) for the controller to send data to the fire communication terminal and a communication return code part (e.g., the first return code current signal) for the controller to receive the return code data from the fire communication terminal. The communication signal sent by the controller through the loop card includes three level specifications: a power supply voltage of 24V (i.e., the third voltage signal); a second voltage signal of 5V; and a ground voltage signal of 0V. The moment when the 24V voltage switches to 5V or 0V is the clock synchronization moment. After a certain period of time, it switches back to the 24V power supply voltage. At this time, the duration of the 24V power supply voltage is controlled according to the data content in the communication data frame of the second communication protocol.

[0135] In the communication code transmission section, there are multiple code transmission bits. In each code transmission bit, the moment when the 24V power supply voltage switches to 0V is the clock synchronization moment. After the 0V lasts for a first duration (e.g., 60 microseconds), it switches back to the 24V power supply voltage. The 24V power supply voltage after the switch lasts for different durations to represent the frame header bit, frame interval bit (INTB), frame tail bit, and digital signal logic 0 and 1, respectively.

[0136] The communication feedback code section contains multiple feedback bits. In each feedback bit, the moment the 24V power supply voltage switches to 5V is the clock synchronization moment. After a second duration of 5V (e.g., 300 microseconds), the power supply voltage switches back to 24V for a third duration (e.g., 600 microseconds). In the communication feedback code section, the fire communication terminal (e.g., a Class I detection device) provides feedback for designated data bits in the communication data frame. For each feedback bit, the fire communication terminal outputs a current representing a digital signal logic 0 or 1 during the second duration of the 5V level. Specifically, as shown... Figure 4 As shown, the fire communication terminal outputs current (e.g., 25mA) for a sustained 5V level for the second duration, representing a digital signal logic 1; no current output represents a digital signal logic 0. After the end-of-frame bit of the communication frame is sent, a complete communication frame is considered complete. Subsequently, if the communication signal level is the power supply voltage of 24V, this is a communication reset state, and a new communication frame begins with the frame header. High and low levels within the communication frame have corresponding duration limits. In this state, the terminal waits to receive the frame header of the next communication frame.

[0137] In the communication signals sent by the controller through the loop card, when the power supply voltage is 24V, it can provide power support for the fire communication terminal. Using the above communication data frame encoding method, the duration of the 24V power supply voltage in the data waveform sent by the controller represents the logic 0 and 1 of the digital signal, as well as the frame header, frame interval, and frame tail bits. Therefore, the duration of the 24V power supply voltage is significantly increased throughout the entire communication data frame transmission process, allowing the fire communication terminal, which has high power consumption in the system, to draw power from the communication bus for most of the time, thereby further improving the power utilization of the two-wire communication bus. Furthermore, since the data waveform sent by the controller only contains the power supply voltage (e.g., 24V) and low level (0V), the threshold for high / low level judgment can be set very flexibly, which is more conducive to realizing a polarity-free communication design.

[0138] The addition of a frame header, frame trailer, and interval bit to the communication data frame format increases the proportion of power level in the entire data communication frame, significantly improving the power utilization of the two-wire communication bus and fully supporting two-wire operation without the need for an external power supply. Simultaneously, the frame header, frame trailer, and interval bit provide buffer time for the fire communication terminal to receive and parse data, thereby reducing the performance requirements of the entire system.

[0139] Each PLIP communication frame consists of a frame header, a frame body, and a frame trailer, and includes three types of communication frames: loop event query frame, group query frame, and read / write command frame.

[0140] The loop event query frame includes: a frame header, address data, an interval bit, an event return bit, and a frame trailer bit. The frame header and trailer bits represent the beginning and end of a frame, respectively, and the address data indicates the type of data frame. The event return bit data represents the event return data from the fire communication terminal. When the controller sends a loop event query frame to all fire communication terminals via the loop card, if an event occurs at a fire communication terminal, that terminal writes a logic "1" to the event return bit of the loop event query frame. The interval bit is used to separate data segments.

[0141] A group query frame includes: a frame header, address data, an interval bit, group number data, an interval bit, a tag number data, and a frame trailer bit. The frame header and frame trailer bits represent the beginning and end of a frame, respectively. The address data and group number data characterize the type of data frame. The tag number data is the group number and tag number value of the fire communication terminal. The interval bit is used to separate data segments. For example, all fire communication terminals can be divided into 15 groups, each with a group number value. Each group is divided into 16 bits, with each bit containing a group tag number value. Group query frames include: group online query frames, group fire alarm event query frames, and group event query frames. Group online query frames include inter-group online query frames and intra-group online query frames. Group fire alarm event query frames include inter-group fire alarm event query frames and intra-group fire alarm event query frames. Group event query frames include inter-group event query frames and intra-group event query frames. Inter-group online query frames are used to query the group number occupied by online fire communication terminals. The address data and group number data are fixed values ​​used to characterize the data frame type, while the tag number data stores the group number value return code data of the fire communication terminal. When the controller sends an inter-group online query frame to all fire communication terminals through the loop card, the online fire communication terminal returns the corresponding data bit in the tag number of the inter-group online query frame according to its group number value.

[0142] The intra-group online query frame is used to query the tag number occupied by an online fire communication terminal in a certain group. The address data is a fixed value used to identify the type of data frame, the group number data is the group number to be queried, and the tag number data is used to store the group tag number data return code of the fire communication terminal. When the controller sends an intra-group online query frame to an online fire communication terminal in the same group through the loop card, the online fire communication terminal returns the corresponding data bit code in the tag number of the intra-group online query frame according to its group tag number value.

[0143] The inter-group fire alarm event query frame is used to query the group number of the fire communication terminal where a fire alarm event occurred. The address data and group number data are fixed values ​​used to identify the type of data frame, while the tag number data stores the group number value of the fire communication terminal. When the controller sends the inter-group fire alarm event query frame to all fire communication terminals via the loop card, the fire communication terminal where the fire alarm event occurred returns the corresponding data bit in the tag number of the inter-group fire alarm event query frame based on its group number value.

[0144] The intra-group fire alarm event query frame is used to query the tag number of the fire communication terminal that has experienced a fire alarm event within a certain group. The address data is a fixed value used to characterize the data frame type, the group number data is the group number to be queried, and the tag number data is used to store the group tag number value return code data of the fire communication terminal. When the controller sends an intra-group fire alarm event query frame to fire communication terminals within the same group via the loop card, the fire communication terminal that experienced the fire alarm event returns the corresponding data bit code in the tag number of the intra-group fire alarm event query frame based on its group tag number value.

[0145] The inter-group event query frame is used to query the group number of the fire communication terminal where the event occurred. The address data and group number data are fixed values ​​used to characterize the type of data frame, and the tag number data is used to store the group number value return code data of the fire communication terminal. When the controller sends the inter-group event query frame to all fire communication terminals through the loop card, the fire communication terminal where the event occurred returns the corresponding data bit in the tag number of the inter-group event query frame according to its group number value.

[0146] The intra-group event query frame is used to query the tag number of the fire communication terminal in a certain group where an event has occurred. The address data is a fixed value used to characterize the data frame type, the group number data is the group number to be queried, and the tag number data is used to store the group tag number value return code data of the fire communication terminal. When the controller sends an intra-group event query frame to fire communication terminals in the same group through the loop card, the fire communication terminal where the event occurred returns the corresponding data bit code in the tag number of the intra-group event query frame based on its group tag number value.

[0147] Since fire alarm events are the highest priority events, this embodiment adds inter-group fire alarm event query frames and intra-group fire alarm event query frames. After the controller detects that an event has occurred at the fire communication terminal, it first checks whether a fire alarm event has occurred through the inter-group fire alarm event query frames and intra-group fire alarm event query frames, thereby enabling the fire alarm event to be reported faster.

[0148] Fire communication terminals that have only undergone a state transition and whose latest state is fire alarm will respond to grouped fire alarm event query frames. Fire communication terminals that have undergone a state transition (e.g., normal, fire alarm, or fault, where any two states change) will respond to grouped event query frames. If a fire communication terminal has already responded to a grouped fire alarm event query frame, it will not respond to another grouped event query frame for the same fire alarm event.

[0149] The read / write command frame includes: frame header, address data, interval bit, command number bit data, interval bit, DATA1 data, interval bit, DATA2 data, interval bit, checksum data, interval bit, error acknowledgment bit data, and frame tail bit. The frame header and frame tail bits represent the beginning and end of a frame, respectively. Address data stores the physical address of the fire communication terminal, and command number bit data indicates the type of data frame. DATA1 data is the address information of the registers or memory within the fire communication terminal. DATA2 is the data information read from the fire communication terminal or the data instruction information to be written to the fire communication terminal. Checksum data is used for data verification, and error acknowledgment bit data indicates whether the data read or write was successful. In this embodiment, if the read or write is successful, a logical "1" is written to the error acknowledgment bit; if the read or write fails, a logical "0" is written to the error acknowledgment bit. The interval bit is used for the spacing between data information. The read / write control command frame includes: register read command frame, register write command frame, memory read command frame, memory write command frame, area control command frame, and type control command frame. The register read command frame is used to read the value from the register at the corresponding address in the fire communication terminal. The address data is the physical address of the fire communication terminal, the command number bit is a fixed value used to identify the type of data frame, DATA1 data is the address information of the register in the fire communication terminal, DATA2 is used to store the data information read from the register of the fire communication terminal, the check data is used to store the check data generated by the fire communication terminal, and the error response bit is used to indicate whether the data reading was successful.

[0150] The register write command frame is used to write data into the register at the corresponding address in the fire communication terminal. The address data stores the physical address of the fire communication terminal, the command number bit is a fixed value used to identify the type of data frame, DATA1 data is the address information of the register in the fire communication terminal, DATA2 data is the data instruction information to be written to the register, the check data is used to store the check data generated by the controller, and the error response bit is used to indicate whether the data writing was successful.

[0151] The memory read command frame is used to read the value from the memory at the corresponding address in the fire communication terminal. The address data is the physical address of the fire communication terminal, the command number bit is a fixed value used to identify the type of data frame, DATA1 data is the address information of the memory inside the fire communication terminal, DATA2 is used to store the data information read from the memory of the fire communication terminal, the check data is used to store the check data generated by the fire communication terminal, and the error response bit is used to indicate whether the data reading was successful.

[0152] The memory write command frame is used to write data into the memory at the corresponding address in the fire communication terminal. The address data stores the physical address of the fire communication terminal, the command number bit is a fixed value used to identify the type of data frame, DATA1 data is the address information of the memory in the fire communication terminal, DATA2 data is the data instruction information to be written to the memory, the check data is used to store the check data generated by the controller, and the error response bit is used to indicate whether the data writing was successful.

[0153] The area control command frame is used to control the rapid batch operation (rapid start-up or stop-up) of fire communication terminals in a specific area. The address data stores the physical address of the fire communication terminal, the command number bit data is a fixed value used to identify the type of data frame, DATA1 data is the address information of the register in the fire communication terminal, DATA2 data is the data instruction information to be written to the register, the check data is used to store the check data generated by the controller, and the error response bit data is used to indicate whether the data writing was successful.

[0154] The type control command frame is used for rapid batch operation (rapid start-up or stop-up) of specific types of fire communication terminals in the control loop. The address data stores the physical address of the fire communication terminal, the command number bit data is a fixed value used to characterize the type of data frame, DATA1 data is the address information of the register in the fire communication terminal, DATA2 data is the data instruction information to be written to the register, the check data is used to store the check data generated by the controller, and the error response bit data is used to characterize whether the data writing was successful.

[0155] By adding zone control command frames and type control command frames, related fire communication terminals can be operated in batches according to the set zone or type, eliminating the need for individual terminal operation, resulting in high efficiency and greater operational flexibility. Furthermore, zones and types have corresponding registers, allowing the type or zone of each fire communication terminal to be pre-configured during system programming.

[0156] The communication protocol conversion module provided in this embodiment can extract common content from different proprietary protocols. For example, both CLIP and PLIP protocols use three voltages: 25V, 5V, and 0V, and both draw current to represent return code information at 5V, thereby realizing the mutual conversion between digital and analog communication protocols. This communication protocol conversion module converts PLIP protocol (digital protocol) instructions into CLIP protocol (analog protocol) instructions, enabling current PLIP protocol peripheral products to be connected to the fire alarm system via the CLIP bus, greatly improving the flexibility of system configuration and solving the compatibility problem of field devices.

[0157] Figure 5 A schematic diagram of a power conversion unit according to an embodiment of the present disclosure is shown.

[0158] like Figure 5 As shown, the power conversion unit 160 includes a first diode D1, a first capacitor C1 (energy storage capacitor), a first power conversion chip DC-DC, and a second power conversion chip LDO.

[0159] Figure 5 In this embodiment, the first diode D1 includes a positive terminal and a negative terminal. The positive terminal of the first diode D1 is used to connect to the input terminal of the power conversion unit 160 (here referring to the first sub-input terminal I61) to connect to the first communication bus and receive the first communication protocol transmission signal, i.e., the CLIP waveform. The first communication protocol transmission signal includes a third voltage signal, such as 24V.

[0160] The first capacitor C1 includes a first terminal and a second terminal. The first terminal of the first capacitor C1 is used to connect to the negative terminal of the first diode D1 to store a third voltage signal, such as 24V, in the first communication protocol transmission code signal. The second terminal of the first capacitor C1 is used to connect to a ground voltage signal, such as 0V.

[0161] The first power conversion chip (DC-DC) includes an input terminal and an output terminal. The input terminal of the first power conversion chip (DC-DC) is connected to the cathode of the first diode D1 and the first terminal of the first capacitor C1, respectively, to receive a third voltage signal, such as 24V. The first power conversion chip (DC-DC) converts the third voltage signal, such as 24V, into a second voltage signal, such as 5V. The output terminal of the first power conversion chip (DC-DC) is connected to the first output terminal O61 of the power conversion unit 160 to output the second voltage signal, such as 5V, to the coding unit.

[0162] The second power conversion chip (LDO) includes an input terminal and an output terminal. The input terminal of the second power conversion chip (LDO) is connected to the output terminal of the first power conversion chip (DC-DC converter) to receive a second voltage signal, such as 5V. The second power conversion chip (LDO) converts the second voltage signal, such as 5V, into a first voltage signal, such as 3.3V. The output terminal of the second power conversion chip (LDO) is connected to the second output terminal O62 of the power conversion unit 160 to output the first voltage signal, such as 3.3V, to the central control unit.

[0163] In this embodiment, the energy storage capacitor charges and stores energy when the first communication bus outputs a high level of 24V, powering the entire communication protocol conversion module. Two power conversion chips are used: one converts 24V to 5V to provide a 5V level for the coding unit; the other converts 5V to 3.3V to provide the operating voltage for the central control unit. The first diode prevents reverse leakage when the storage capacitor C1 stores 24V, functioning similarly to a forward-biased switch.

[0164] Figure 6 A circuit diagram of a power conversion unit according to an embodiment of this disclosure is shown. Figure 6 As shown, COM+ here means Figure 2 CLIP communication line +, and Figure 2 The CLIP communication line in the middle is grounded, therefore in Figure 6 Not shown in the image.

[0165] like Figure 6 As shown, the first power conversion chip (DC-DC) can be, for example, a TPS54331DR chip, which includes VIN, EN, SS, COMP, PH, BOOT, VSENSE, and GND terminals. The first sub-input terminal I61 of the power conversion unit 160 is connected to COM+, i.e., CLIP communication line +, to receive the first communication protocol transmission signal. The first sub-input terminal I61 of the power conversion unit 160 is connected to the positive terminal of the first diode D1. The negative terminal of the first diode D1, the first terminals of the first energy storage capacitor C11 and the second energy storage capacitor C12, and the first terminal of the resistor R1 are all connected to the VIN terminal of the first power conversion chip (DC-DC). Figure 6In this embodiment, it is assumed that the first capacitor C1 includes two parallel energy storage capacitors, C11 and C12. The second terminals of both C11 and C12 are connected to a ground voltage signal, i.e., grounded (represented by GND). The first terminals of C11 and C12 are also connected to a power supply voltage, for example, 24V. The second terminal of resistor R1 is connected to the first terminal of resistor R2 and the EN terminal of the first power conversion chip DC-DC, respectively. The second terminal of resistor R2 is grounded. The first terminal of capacitor C2 is connected to the SS terminal of the first power conversion chip DC-DC, and the second terminal is grounded. The first terminals of capacitors C3 and C4 are both connected to the COMP terminal of the first power conversion chip DC-DC, and the second terminal of capacitor C3 is connected to the first terminal of resistor R3. The second terminals of resistor R3 and capacitor C4 are both grounded. The PH terminal of the first power conversion chip DC-DC is connected to the second terminal of capacitor C5, the first terminal of inductor L1, and the negative terminal of Zener diode D2, respectively. The second terminal of inductor L1 is connected to the first terminals of resistor R4, capacitor C6, and capacitor C7, as well as the first output terminal O61 of power conversion unit 160, to output a 5V second voltage signal. The second terminal of resistor R4 is connected to the first terminal of resistor R5, and the second terminal of resistor R5 is grounded. The second terminals of capacitors C6 and C7 are both grounded. The anode of Zener diode D2 is connected to the GND terminal of the first power conversion chip DC-DC, and the GND terminal of the first power conversion chip DC-DC is grounded. The first terminal of capacitor C5 is connected to the BOOT terminal of the first power conversion chip DC-DC. The values ​​of C11, C12, R1, R2, C2, C3, R3, C4, C5, R4, R5, C6, C7, and L1 are 2.2 mF, 10 nF, 332 kΩ, 68.1 kΩ, 10 nF, 4.7 nF, 49.9 kΩ, 39 pF, 100 nF, 11 kΩ, 1.91 kΩ, 47 μF, 10 μF, and 6.8 μH, respectively.

[0166] The second power conversion chip LDO uses the HT7533-1 chip, which includes VIN, VOUT, and GND terminals. The VIN terminal of the second power conversion chip LDO is connected to the first terminals of capacitors C8 and C9 and the first output terminal O61 of the power conversion unit 160 to receive the second voltage signal 5V. The VOUT terminal of the second power conversion chip LDO is connected to the first terminals of capacitors C10 and C11 and the voltage VDD, connecting to the second output terminal O62 of the power conversion unit 160 to output a first voltage signal, for example, 3.3V. The voltage VDD is, for example, 3.3V. The second terminals of capacitors C8 and C9, and capacitors C10 and C11 are all grounded. The GND terminal of the second power conversion chip LDO is grounded. The values ​​of C8, C9, C10, and C11 are 10μF, 100nF, 10μF, and 100nF, respectively.

[0167] It is understandable that the above Figure 6 The capacitance, resistance, and inductance values ​​listed are for illustrative purposes only. In practice, the corresponding capacitance, resistance, and inductance values ​​can be set according to the different values ​​of the third, second, and first voltage signals.

[0168] In an exemplary embodiment, the decoding unit decodes the logic signals generated by the first communication protocol transmission signal, including a first logic signal and a second logic signal. Different combinations of the first logic signal and the second logic signal are used to represent the third voltage signal, the second voltage signal, and the ground voltage signal in the first communication protocol transmission signal, respectively.

[0169] It should be noted that the number of bits in the logic signal generated by the decoding unit depends on the number of voltage signals contained in the first communication protocol encoding signal. For example, in the example above, if the first communication protocol encoding signal includes three voltage signals, then a 2-bit logic signal is sufficient to distinguish these three voltage signals. As another example, if the first communication protocol encoding signal includes five or more but less than eight voltage signals, then a 3-bit logic signal can be used for differentiation.

[0170] Figure 7 A schematic diagram of a decoding unit according to an embodiment of this disclosure is shown. For example... Figure 7 As shown, the decoding unit 110 includes two comparators: a first comparator (i.e., comparator 1) and a second comparator (i.e., comparator 2). Both comparators receive CLIP waveforms through a first communication bus, and after comparison, generate a first logic signal DECODE_1 and a second logic signal DECODE_2 to identify the third voltage signal, the second voltage signal, and the ground voltage signal.

[0171] For example, as shown in Table 1 below, when the first logic signal DECODE_1 output by the first comparator and the second logic signal DECODE_2 output by the second comparator are logic "0" and "0" respectively, it indicates that the corresponding loop voltage in the first communication protocol code transmission signal is the third voltage signal 24V; when the first logic signal DECODE_1 output by the first comparator and the second logic signal DECODE_2 output by the second comparator are logic "0" and "1" respectively, it indicates that the corresponding loop voltage in the first communication protocol code transmission signal is the second voltage signal 5V; when the first logic signal DECODE_1 output by the first comparator and the second logic signal DECODE_2 output by the second comparator are logic "1" and "1" respectively, it indicates that the corresponding loop voltage in the first communication protocol code transmission signal is the ground voltage signal 0V.

[0172] Table 1

[0173]

[0174] It is understood that the loop voltages represented by the logic signals are not limited to the examples in Table 1 above, as long as the values ​​of the logic signals can distinguish these three different loop voltages. Correspondingly, the circuit structure of the decoding unit is not limited to the following. Figure 8 Examples are provided.

[0175] Figure 8 A circuit diagram of a decoding unit according to an embodiment of this disclosure is shown. For example... Figure 8 As shown, the decoding unit 110 provided in this embodiment includes a first voltage divider resistor circuit 111, a first comparator U1, and a second comparator U2.

[0176] The first voltage divider resistor circuit 111 includes an input terminal, a first output terminal N11, and a second output terminal N12. The input terminal of the first voltage divider resistor circuit 111 is connected to the input terminal of the decoding unit 110, to connect to COM+, i.e., the CLIP communication line+ in the first communication bus, to receive the first communication protocol transmission signal. The first voltage divider resistor circuit 111 is used to divide the first communication protocol transmission signal, generating a first voltage divider signal Vout1 and a second voltage divider signal Vout2, where the first voltage divider signal Vout1 is smaller than the second voltage divider signal Vout2. The first output terminal N11 and the second output terminal N12 of the first voltage divider resistor circuit 111 are used to output the first voltage divider signal Vout1 and the second voltage divider signal Vout2, respectively.

[0177] The first comparator U1 includes a first input terminal (e.g., a non-inverting input terminal), a second input terminal (e.g., a negative inverting input terminal), and an output terminal. The first input terminal of the first comparator U1 is used to receive a first reference voltage Vref1. The second input terminal of the first comparator U1 is connected to the first output terminal N11 of the first voltage divider circuit 111 to receive a first voltage divider signal Vout1. The first comparator U1 compares the magnitude of the first voltage divider signal Vout1 with the magnitude of the first reference voltage Vref1 to generate a first logic signal (DECODE_1). For example, when Vout1 is less than Vref1, DECODE_1 is logic "1"; when Vout1 is greater than Vref1, DECODE_1 is logic "0".

[0178] The second comparator U2 includes a first input terminal (e.g., a non-inverting input terminal), a second input terminal (e.g., a negative inverting input terminal), and an output terminal. The first input terminal of the second comparator U2 receives a second reference voltage Vref2, which is greater than the first reference voltage Vref1. The second input terminal of the second comparator U2 is connected to the second output terminal N12 of the first voltage divider circuit 111 to receive a second voltage divider signal Vout2. The second comparator U2 compares the second voltage divider signal Vout2 with the second reference voltage Vref2 to generate a second logic signal (DECODE_2). For example, when Vout2 is less than Vref2, DECODE_2 is logic "1"; when Vout2 is greater than Vref2, DECODE_2 is logic "0".

[0179] The outputs of the first comparator U1 and the second comparator U2 are both connected to the output of the decoding unit 110 to output the first logic signal DECODE_1 and the second logic signal DECODE_2 to the central control unit.

[0180] Continue to refer to Figure 8 The first voltage divider resistor circuit 111 includes voltage divider resistors R6, R7, and R8 connected in series. The first terminal of resistor R6 is connected to COM+, and its second terminal is connected to the first terminal of resistor R7. The second terminal of resistor R7 is connected to the first terminal of resistor R8. The second terminal of resistor R8 is grounded. The first output terminal N11 of the first voltage divider resistor circuit 111 is connected to the second terminals of both voltage divider resistors R7 and R8. The second output terminal N12 of the first voltage divider resistor circuit 111 is connected to the second terminals of both voltage divider resistors R6 and R7.

[0181] exist Figure 8 In this embodiment, the decoding unit 110 may further include a second voltage divider resistor circuit 112. The second voltage divider resistor circuit 112 includes voltage divider resistors R9, R10, and R11 connected in series. The first terminal of voltage divider resistor R9 is connected to voltage VDD (e.g., 3.3V), and its second terminal is connected to the first terminal of resistor R10. The second terminal of resistor R10 is connected to the first terminal of resistor R11, and the second terminal of resistor R11 is grounded. The first output terminal N21 of the second voltage divider resistor circuit 112 is connected to the second terminals of voltage divider resistors R10 and R11, respectively, to output a first reference voltage Vref1. The second output terminal N22 of the second voltage divider resistor circuit 112 is connected to the second terminals of voltage divider resistors R9 and R10, respectively, to output a second reference voltage Vref2.

[0182] Continue to refer to Figure 8The output of the first comparator U1 is also connected to the first terminal of resistor R12, and the second terminal of resistor R12 is connected to the voltage VDD. The output of the second comparator U2 is also connected to the first terminal of resistor R13, and the second terminal of resistor R13 is connected to the voltage VDD.

[0183] Figure 8 In this embodiment, the values ​​of R6, R7 and R8, R9, R10 and R11, and R12 and R13 can be 390kΩ, 10kΩ, 27kΩ, 27kΩ, 10kΩ, 2.2kΩ, 10kΩ, and 10kΩ, respectively. The non-inverting inputs of U2 and U1 are both between 0 and 3.3V. Because COM+ has a resistor voltage divider, Vout1 and Vout2 are less than 24V or less than 5V when the input voltage of COM+ is 24V or 5V.

[0184] The decoding unit provided in this embodiment is used to parse communication frame information output by the controller, such as parsing the first communication protocol transmission signal. The decoding unit includes two comparator circuits, each of which can be configured with different comparison voltages through an external resistor bridge. It is used to parse the CLIP communication line voltage value and pulse width, obtain CLIP command information (CLIP communication frames have 0V, 5V, and 24V), and transmit the information to the central control unit.

[0185] The central control unit in this embodiment consists of a microcontroller and its peripheral minimum system, realizing the signal detection and logic control functions of the entire system. The central control unit, for example, uses a microcontroller LPC5516JBD100E, which has 512KB of Flash memory, 96KB of RAM, and multiple built-in peripherals such as UART, SPI, and I2C interfaces. It also has various analog interfaces, including ADC and DAC, and USB, CAN, and Ethernet connectivity.

[0186] Figure 9 This diagram illustrates a minimum system schematic of a central control unit according to an embodiment of the present disclosure. Figure 9 As shown, the VDD_1 to VDD_9 terminals of the central control unit 120 are all connected to the voltage VDD (3.3V). For example, the first input terminal I21 of the central control unit 120 is connected to the second output terminal O62 of the power conversion unit 160 to receive the first voltage signal 3.3V, and is also connected to the first terminals of capacitors C13 to C21, the second terminals of which are all grounded. The VDDA terminal of the central control unit 120 is connected to the voltage VDDA (also 3.3V), and is also connected to the first terminal of capacitor C22. The second terminal of capacitor C22 is grounded. The VBT_PMU, VBT_DCDC_1, and VBT_DCDC_2 terminals of the central control unit 120 are all connected to the voltage VDDA. That is, the operating voltage of the central control unit 120 is 3.3V.

[0187] like Figure 10 As shown, the first control signal CTL1 generated and output by the central control unit 120 includes a third voltage control signal CTL_24V, a second voltage control signal CTL_5V, and a ground voltage control signal CTL_0V, and is assumed to be output to the coding unit through the PIO0_28 / WAKUP, PIO1_18 / WAKUP, and PIO1_12 terminals of the central control unit 120, respectively. The central control unit 120 receives the first logic signal and the second logic signal output by the decoding unit through the PIO1_2 and PIO1_3 terminals, respectively. It can be understood that the first logic signal and the second logic signal can be sent from the decoding unit to the central control unit via the CAN bus. The CAN bus includes CAN_TX0 and CAN_RX0, and these two CAN buses are bidirectional communication.

[0188] The central control unit 120 generates a third voltage control signal, a second voltage control signal, and a ground voltage control signal based on a first logic signal and a second logic signal. Correspondingly, the first output terminal of the central control unit may include a first sub-output terminal, a second sub-output terminal, and a third sub-output terminal, for outputting the third voltage control signal, the second voltage control signal, and the ground voltage control signal to the coding unit, respectively. The second input terminal of the coding unit may include a first sub-input terminal, a second sub-input terminal, and a third sub-input terminal, for connecting to the first sub-output terminal, the second sub-output terminal, and the third sub-output terminal of the central control unit, respectively, to receive the third voltage control signal, the second voltage control signal, and the ground voltage control signal.

[0189] In this embodiment, the first logic signal and the second logic signal can represent the CLIP instruction information represented in the first communication protocol encoding signal. The central control unit pre-stores a mapping relationship between CLIP instruction information and PLIP instruction information. When the central control unit receives the first logic signal and the second logic signal sent by the decoding unit, it retrieves the mapping relationship, determines the corresponding second communication protocol encoding signal to be generated, and then generates the corresponding third voltage control signal CTL_24V, the second voltage control signal CTL_5V, and the ground voltage control signal CTL_0V to control the encoding unit to generate the corresponding second communication protocol encoding signal.

[0190] Continue to refer to Figure 10The first control signal generated and output by the central control unit 120 also includes a discharge control signal CUR_5V. The central control unit 120 is further configured to generate the discharge control signal CUR_5V based on the first logic signal and the second logic signal. The first output terminal of the central control unit may also include a fourth sub-output terminal for outputting the discharge control signal CUR_5V to the coding unit. The second input terminal of the coding unit may also include a fourth sub-input terminal for connecting to the fourth sub-output terminal of the central control unit to receive the discharge control signal.

[0191] In an exemplary embodiment, the coding unit is used to generate a second communication protocol coding signal including a third voltage signal, a second voltage signal, and a ground voltage signal under the control of a third voltage control signal, a second voltage control signal, and a ground voltage control signal.

[0192] like Figure 11 As shown, the central control unit controls the duration of the high and low levels of CTL_24V, CTL_5V, and CTL_0V to control the duration of 24V, 5V, and 0V in the second communication protocol encoding signal generated by the encoding unit, thereby forming a PLIP waveform.

[0193] In this embodiment of the disclosure, the coding unit interacts with the central control unit via the internal CAN bus. Based on the information parsed by the decoding unit, it assembles a PLIP command, i.e., a second communication protocol coding signal, according to the communication frame structure defined by the PLIP protocol, and sends it to the peripheral terminal (i.e., the first type of detection device).

[0194] like Figure 12 As shown, the coding unit 130 includes a first switching circuit 131, a second switching circuit 132, and a third switching circuit 133.

[0195] In an exemplary embodiment, the first switching circuit 131 includes a control terminal, an input terminal, and an output terminal. The control terminal of the first switching circuit is used to receive a third voltage control signal CTL_24V. The input terminal of the first switching circuit is used to receive a third voltage signal, such as 24V, and the output terminal of the first switching circuit 131 is used to connect to the output terminal of the coding unit. The first switching circuit 131 is used to control the closing of the first switching circuit 131 when the third voltage control signal CTL_24V is at a first level (e.g., a high level, but this disclosure is not limited thereto), so that the third voltage signal, such as 24V, is output to the output terminal of the coding unit.

[0196] In an exemplary embodiment, the second switching circuit 132 includes a control terminal, an input terminal, and an output terminal. The control terminal of the second switching circuit is used to receive a second voltage control signal CTL_5V. The input terminal of the second switching circuit is used to receive a second voltage signal, such as 5V. The output terminal of the second switching circuit is used to connect to the output terminal of the coding unit. The second switching circuit is used to control the closing of the second switching circuit 132 when the second voltage control signal CTL_24V is at a first level (e.g., a high level, but this disclosure is not limited thereto), so that the second voltage signal, such as 5V, is output to the output terminal of the coding unit.

[0197] In an exemplary embodiment, the third switching circuit 133 includes a control terminal, an input terminal, and an output terminal. The control terminal of the third switching circuit is used to receive the ground voltage control signal CTL_0V. The input terminal of the third switching circuit is used to receive the ground voltage signal. The output terminal of the third switching circuit is used to connect to the output terminal of the coding unit. The third switching circuit is used to control the closing of the third switching circuit 133 when the ground voltage control signal CTL_0V is at a first level (e.g., a high level, but this disclosure is not limited thereto), so that the ground voltage signal, for example, 0V, is output to the output terminal of the coding unit.

[0198] refer to Figure 12 In an exemplary embodiment, the first switching circuit 131 includes a first transistor Q7, a first PMOS transistor Q6, a second transistor Q5, and a third transistor Q4.

[0199] The base of the first transistor Q7 is used to receive the third voltage control signal CTL_24V, which is connected to the first sub-output terminal of the central control unit. The first transistor Q7 is turned on when the third voltage control signal CTL_24V is at a first level and turned off when it is at a second level (e.g., low level). For example, the first transistor Q7 is an NPN transistor. The emitter of the first transistor Q7 is used to receive a ground voltage signal, such as ground. The collector of the first transistor Q7 is used to connect to the control terminal (e.g., gate) of the first PMOS transistor Q6.

[0200] Specifically, the base of the first transistor Q7 is connected to the first terminals of resistors R45 and R46, respectively. The second terminal of resistor R45 is connected to the first sub-output terminal of the central control unit to receive the third voltage control signal CTL_24V. The second terminal of resistor R46 is grounded. The values ​​of resistors R45 and R46 can be 1KΩ and 10KΩ, respectively.

[0201] The first terminal (e.g., source or drain) of the first PMOS transistor Q6 is used to receive a third voltage signal, such as 24V. The second terminal (e.g., drain or source) of the first PMOS transistor Q6 is used to connect to the output terminal of the coding unit. Figure 12 In Chinese, LP1_A+ is used to represent the PLIP communication line +.

[0202] The base of the second transistor Q5 is connected to the collector of the first transistor Q7. The emitter of the second transistor Q5 is used to receive a ground voltage signal, such as grounding. The second transistor Q5 is an NPN transistor, which conducts when the voltage level is high and is cut off when the voltage level is low.

[0203] The base of the third transistor Q4 is connected to the collector of the second transistor Q5. The emitter of the third transistor is used to receive the third voltage signal. The collector of the third transistor Q4 is connected to the collector of the first transistor Q7. The third transistor Q4 is a PNP transistor, which conducts when the voltage level is low and is cut off when the voltage level is high.

[0204] Specifically, a resistor R42 with a resistance of 51KΩ is connected in series between the collector of the first transistor Q7 and the base of the second transistor Q5. A resistor R41 with a resistance of 10KΩ is also connected in series between the collector of the second transistor Q5 and the base of the third transistor Q4. The collector of the first transistor Q7 is also connected to the first terminal of resistor R44, which has a resistance of 10KΩ. The second terminal of resistor R44 is connected to the second terminal of resistor R43 and the control terminal of the first PMOS transistor Q6. The first terminal of resistor R43 is connected to the collector of the third transistor Q4, and has a resistance of 1KΩ. The first terminal of the first PMOS transistor Q6 is connected to the emitter of the third transistor Q4, the first terminal of resistor R40 (10KΩ), the base of the PNP transistor Q3, and the first terminal of resistor R36 (1Ω). The second terminal of resistor R40 is connected to the collector of the PNP transistor Q3 and the control terminal of the first PMOS transistor Q6. The second terminal of resistor R36 is connected to the third voltage signal 24V and the emitter of PNP transistor Q3. The second terminal of the first PMOS transistor Q6 is connected to the anode of diode D7, and the cathode of diode D7 is connected to LP1_VA+.

[0205] In an exemplary embodiment, the first terminal of the first PMOS transistor Q6 is also connected to the negative terminal of a Zener diode ZD3. The positive terminal of Zener diode ZD3 is connected to the positive terminal of another Zener diode ZD4. The negative terminal of Zener diode ZD4 is connected to the second terminal of resistor R43 and the control terminal of the first PMOS transistor Q6. Zener diodes ZD3 and ZD4 serve to protect the first PMOS transistor Q6.

[0206] In an exemplary embodiment, an electrostatic discharge (ESD) protection circuit 135 may be further included between LP1_VA+ (the positive input terminal of the ESD protection circuit), LP1_A+ (the positive output terminal of the ESD protection circuit), LP1_VA- (the negative input terminal of the ESD protection circuit), and LP1_A- (the negative output terminal of the ESD protection circuit). This ESD protection circuit is used for interference suppression and to achieve ESD protection function. This disclosure does not limit the structure of the ESD protection circuit. Figure 12 The examples shown are for illustrative purposes only.

[0207] Continue to refer to Figure 12 In an exemplary embodiment, the first control signal generated and output by the central control unit further includes a discharge control signal DISCH_5V. The coding unit 130 also includes a first NMOS transistor Q8.1.

[0208] The control terminal of the first NMOS transistor Q8.1 is used to receive the discharge control signal DISCH_5V. The first terminal of the first NMOS transistor Q8.1 is used to receive a ground voltage signal, such as ground. The second terminal of the first NMOS transistor is used to connect to the output terminal of the coding unit and to receive a third voltage signal, such as 24V.

[0209] The first NMOS transistor Q8.1 is used to turn on when the discharge control signal DISCH_5V is at the first level, so as to pull down the voltage output by the output terminal of the coding unit from the third voltage signal 24V to the ground voltage signal 0V.

[0210] Specifically, the control terminal of the first NMOS transistor Q8.1 is connected to the first terminals of resistors R32 (100Ω) and R53 (10KΩ). The second terminal of resistor R32 is used to receive the discharge control signal DISCH_5V from the central control unit. The second terminal of resistor R53 is grounded. The first terminal of the first NMOS transistor Q8.1 is connected to the anode of Zener diode Z4. The cathode of Zener diode Z4 is connected to the first terminal of resistor R48 (5.1Ω). The second terminal of resistor R48 is connected to the cathode of diode D7 and LP1_VA+, respectively.

[0211] Continue to refer to Figure 12 In an exemplary embodiment, the second switching circuit 132 includes a fourth transistor Q2, a fifth transistor Q1, and a second NMOS transistor Q9.1.

[0212] In this transistor, the base of the fourth transistor Q2 is used to receive the second voltage control signal CTL_5V. The fourth transistor Q2 is turned on when the second voltage control signal CTL_5V is at the first level and turned off when it is at the second level; for example, the fourth transistor Q2 is an NPN transistor. The emitter of the fourth transistor Q2 is used to connect to the ground voltage signal. The collector of the fourth transistor Q2 is used to connect to the third voltage signal, such as 24V.

[0213] The base of transistor Q1 is connected to the collector of transistor Q2. The emitter of transistor Q1 is connected to a third voltage signal, such as 24V. The collector of transistor Q1 is connected to a ground voltage signal, such as ground.

[0214] The control terminal (e.g., gate) of the second NMOS transistor Q9.1 is connected to the collector of the fifth transistor Q1. The first terminal of the second NMOS transistor Q9.1 is connected to a second voltage signal, such as 5V. The second terminal of the second NMOS transistor Q9.1 is connected to the output terminal of the coding unit.

[0215] Specifically, the base of the fourth transistor Q2 is connected to the first terminal of resistor R30 (1KΩ) and the first terminal of resistor R31 (10KΩ). The second terminal of resistor R30 is used to receive the second voltage control signal CTL_5V. The second terminal of resistor R31 is grounded. The collector of the fourth transistor Q2 is connected to the first terminal of resistor R27 (5.1KΩ). The second terminal of resistor R27 is connected to a third voltage signal, such as 24V. The emitter of the fifth transistor Q1 is connected to the first terminal of resistor R28 (100Ω). The second terminal of resistor R28 is connected to a third voltage signal, such as 24V. The emitter of the fourth transistor Q2 is connected to the first terminal of resistor R32 (10KΩ). The collector of the fifth transistor Q1 is connected to the first terminal of resistor R33 (2KΩ). The second terminals of resistors R32 and R33 are both grounded. The control terminal of the second NMOS transistor Q9.1 is connected to the first terminal of resistor R33 and the collector of the fifth transistor Q1. The first terminal of the second NMOS transistor Q9.1 is connected to the first terminal of resistor R29 (3Ω). The second terminal of resistor R29 is connected to the first terminal of resistor R25 (2Ω). The second terminal of resistor R25 is connected to a second voltage signal, such as 5V.

[0216] In an exemplary embodiment, the second terminal of the second NMOS transistor Q9.1 is connected to the anode of diode D8. The cathode of diode D8 is connected to LP1_VA+.

[0217] In an exemplary embodiment, the control terminal of the second NMOS transistor Q9.1 is also connected to the negative terminal of Zener diode ZD1. The positive terminal of Zener diode ZD1 is connected to the positive terminal of Zener diode ZD2. The negative terminal of Zener diode ZD2 is connected to the second terminal of the second NMOS transistor Q9.1. Zener diodes ZD1 and ZD2 serve to protect the second NMOS transistor Q9.1.

[0218] Continue to refer to Figure 12 In an exemplary embodiment, the third switching circuit 133 includes a third NMOS transistor Q8.2.

[0219] The control terminal of the third NMOS transistor Q8.2 is used to receive the ground voltage control signal CTL_0V. The first terminal of the third NMOS transistor Q8.2 is used to receive the ground voltage signal, such as 0V. The second terminal of the third NMOS transistor Q8.2 is used to connect to the output terminal of the coding unit and to receive the third voltage signal, such as 24V.

[0220] Specifically, the control terminal of the third NMOS transistor Q8.2 is connected to the first terminals of resistors R54 (1KΩ) and R55 (10KΩ). The second terminal of resistor R54 is used to receive the ground voltage control signal CTL_0V from the central control unit. The second terminal of resistor R55 is grounded. The first terminal of the third NMOS transistor Q8.2 is connected to the first terminal of resistor R49 (5.1Ω). The second terminal of resistor R49 is connected to the cathode of diode D7 and LP1_VA+, respectively.

[0221] In this embodiment of the disclosure, the 5V in the code transmission unit 130 comes from the power conversion unit, and the 24V comes from the first communication line.

[0222] In this embodiment, when the central control unit wants to input a 24V voltage to the PLIP peripheral (i.e., the first type of detection device), a high voltage of a corresponding duration is applied to CTL_24V to turn on Q7. Along the path R44, Q6, a PMOS transistor, turns on with a low voltage, grounding the gate of Q6 (ignoring the voltage drop of Q7), thus turning on Q6 and outputting a +24V voltage to LP1_A+. Considering the large integrated capacitance of the PMOS transistor and its slow turn-off, the falling edge of the 24V voltage is not steep enough. Therefore, to achieve fast turn-on and fast turn-off of the 24V voltage, when a low level is applied to CTL_24V, Q7 turns off, and Q3, Q4, and Q5 turn on, causing the LP1_A+ terminal to be quickly pulled low from 24V.

[0223] In this embodiment, DISCH_5V is input to the discharge circuit 134. When the voltage output to the PLIP peripheral needs to be reduced from 24V to 5V, an NMOS transistor is used in Q8.1 to quickly reduce the 24V. When the voltage output to the PLIP peripheral needs to be reduced from 24V to 5V, CTL_24V is first changed from high to low, then DISCH_5V is changed from low to high, and after a short time, DISCH_5V is changed back to low, and then CTL_5V is changed back to high.

[0224] In this embodiment of the disclosure, when the central control unit wants to output a 5V voltage to the PLIP peripheral, it applies a high voltage for a corresponding duration to CTL_5V to turn on Q2 and Q1. After Q1 is turned on, the voltage at the collector terminal of Q1 is close to a high voltage, which in turn turns on Q9.1. Q9.1 is an NMOS transistor. When Q9.1 is turned on, the +5V voltage is output to LP1_A+.

[0225] In this embodiment of the disclosure, when the central control unit wants to output 0V voltage to the PLIP peripheral, it first changes CTL_5V from high level to low level, and then changes CTL_0V from low level to high level, so that Q8.2 is turned on, thereby grounding LP1_A-, i.e., outputting 0V.

[0226] In this embodiment, when the peripheral device (here referring to the first type of detection device) receives a PLIP command message (i.e., a second communication protocol code signal), it responds to the command by either pulling or not pulling current. The response code detection unit is used to detect whether there is current pulling on the loop line. According to the PLIP protocol definition, the peripheral device performs a response code (pulling 25mA current) at 5V voltage, and the response information of the peripheral device is determined based on the response code / no response code.

[0227] like Figure 13 As shown, the input terminal of the loop detection circuit 140 is used to connect to the second communication bus, which is connected to the PLIP peripheral, i.e. Figure 13 The load in the circuit receives the first return current signal (I1 = 25mA) from the second communication protocol pulled down by the first type of detection device under the second voltage signal (5V). The first return current signal flows through the first current sampling resistor Rs, is converted into a return voltage signal Vo, and is input to the central control unit. The first load resistor Rs... L Used to adjust the magnitude of the return code voltage signal Vo input to the central control unit.

[0228] Figure 14 A circuit diagram of a return code detection unit according to an embodiment of this disclosure is shown. Figure 14 As shown, the return code detection unit 140 includes a first current sampling resistor R25 (e.g., 2Ω), a first operational amplifier U4, and a first load resistor R26 (e.g., 3.9KΩ).

[0229] The first current sampling resistor R25 includes a first terminal and a second terminal. The first terminal of the first current sampling resistor R25 is used to receive a second voltage signal, such as 5V. The second terminal of the first current sampling resistor R25 is used to connect to a second communication bus to receive a first feedback current signal, such as I1 = 25mA. (Combined with the above...) Figure 12 The first end of the first current sampling resistor R25 is connected to node N41, and the second end is connected to node N42.

[0230] The first operational amplifier U4 includes a first input terminal (positive inverting input terminal), a second input terminal (negative inverting input terminal), and an output terminal. The first input terminal of the first operational amplifier U4 is connected to the first terminal of the first current sampling resistor R25. The second input terminal of the first operational amplifier U4 is connected to the second terminal of the first current sampling resistor R25. The output terminal of the first operational amplifier U4 is connected to the output terminal of the feedback detection unit. The first operational amplifier U4 amplifies the voltage difference generated across the first current sampling resistor R25 by the first feedback current signal, producing an amplified voltage difference.

[0231] The first load resistor R26 includes a first terminal and a second terminal. The first terminal of the first load resistor R26 is used to connect to the output terminal of the first operational amplifier U4 and the output terminal of the feedback detection unit 140, respectively, so as to output the feedback voltage signal CUR_5V based on the amplified voltage difference. The second terminal of the first load resistor R26 is used to connect to a ground voltage signal, such as ground.

[0232] Specifically, the output of the first operational amplifier U4 is connected to the first terminal of the first load resistor R26 and the first terminal of resistor R24 ​​(e.g., 100Ω). The second terminal of the first load resistor R26 is grounded. The second terminal of resistor R24 ​​is connected to the anode of diode D2 and the cathode of diode D3 to output the feedback voltage signal CUR_5V to the central control unit. The cathode of diode D2 is connected to voltage VDDA, for example, 3.3V. The anode of diode D3 is grounded and connected to the first terminal of capacitor C41 (e.g., 1nF). The second terminal of capacitor C41 is connected to the second terminal of resistor R24.

[0233] In this embodiment, CUR_5V is the return code voltage signal input from the return code detection unit to the central control unit. When the PLIP peripheral terminal pulls a 25mA current up to 5V, a voltage drop is generated across R25. After being amplified by the U4 operational amplifier, the detected current is output to the load resistor R26. R26 is used to control the magnitude of the return code voltage signal output to the central control unit. When it is desired that the voltage value output to the central control unit be larger, the resistance value of R26 can be increased. R24 is a current-limiting resistor used for port protection, and D2 and D3 serve to protect the port. C41 is a filter capacitor.

[0234] In an exemplary embodiment, the central control unit further includes a fourth input terminal. For example... Figure 15 As shown, the communication protocol conversion module may further include an anomaly detection unit 170. The anomaly detection unit 170 includes an input terminal and an output terminal. The input terminal of the anomaly detection unit 170 is connected to a second communication bus to receive an abnormal current signal drawn by the first type of detection device under a third voltage signal, such as 24V. The anomaly detection unit 170 is used to convert the abnormal current signal into an abnormal voltage signal CUR_24V. The output terminal of the anomaly detection unit 170 is used to connect to a fourth input terminal of the central control unit to input the abnormal voltage signal CUR_24V to the central control unit.

[0235] The central control unit can also be used to generate abnormal control signals based on abnormal voltage signals.

[0236] For example, such as Figure 15 As shown, the anomaly detection unit 170 includes a second current sampling resistor R36 (e.g., 1Ω), a third operational amplifier U5, and a second load resistor R37 (e.g., 3.9KΩ).

[0237] The second current sampling resistor R36 includes a first terminal and a second terminal. The first terminal of the second current sampling resistor R36 is used to receive a third voltage signal of 24V. The second terminal of the second current sampling resistor R36 is used to connect to a second communication bus to receive abnormal current signals. (Combined with the above...) Figure 12 The first end of the second current sampling resistor R36 is connected to node N33, and the second end is connected to node N34.

[0238] The third operational amplifier U5 includes a first input terminal (positive inverting input terminal), a second input terminal (negative inverting input terminal), and an output terminal. The first input terminal of the third operational amplifier U5 is connected to the first terminal of the second current sampling resistor R36. The second input terminal of the third operational amplifier U5 is connected to the second terminal of the second current sampling resistor R36. The output terminal of the third operational amplifier U5 is connected to the output terminal of the anomaly detection unit 170. The third operational amplifier U5 amplifies the voltage difference generated by the abnormal current signal across the second current sampling resistor R36, producing an amplified voltage difference.

[0239] The second load resistor R37 includes a first terminal and a second terminal. The first terminal of the second load resistor R37 is used to connect to the output terminal of the third operational amplifier U5 and the output terminal of the abnormality detection unit 170, respectively, so as to output an abnormal voltage signal CUR_24V based on the amplified voltage difference. The second terminal of the second load resistor R37 is used to connect to the ground voltage signal.

[0240] Specifically, the output of the third operational amplifier U5 is connected to the first terminal of the second load resistor R37 and the first terminal of resistor R35 (e.g., 100Ω). The second terminal of the second load resistor R37 is grounded. The second terminal of resistor R35 is connected to the anode of diode D5 and the cathode of diode D6 to output an abnormal voltage signal CUR_24V to the central control unit. The cathode of diode D5 is connected to voltage VDDA, for example, 3.3V. The anode of diode D6 is grounded and connected to the first terminal of capacitor C45 (e.g., 1nF). The second terminal of capacitor C45 is connected to the second terminal of resistor R35.

[0241] In this embodiment of the disclosure, the anomaly detection unit can be used to detect the current flowing through the second communication bus. The presence of an anomaly can be detected by detecting the magnitude of the current flowing through the second communication bus. For example, when the PLIP peripheral is short-circuited, an abnormal current signal will be detected and the central control unit will be notified.

[0242] Figure 16 A schematic diagram of a return code unit according to an embodiment of this disclosure is shown. For example... Figure 16As shown, the feedback information sent by the CLIP peripheral to the controller is transmitted to the central control unit via the internal CAN bus. The central control unit converts it into corresponding feedback information according to the CLIP protocol definition. The feedback unit performs the function of pulling current on the loop line. Based on the feedback information converted by the central control unit, it pulls a specific current (e.g., the second feedback current signal I2 = 50mA) at the feedback bit sent at the controller. For the CLIP protocol, feedback is also performed at a 5V level, and the feedback width represents the corresponding feedback information. The feedback unit 150 includes a feedback control terminal, which is the input terminal of the feedback unit. This feedback control terminal receives the second control signal CTL2 from the central control unit, processes the second control signal through a voltage follower, converts it into feedback bits that meet the CLIP protocol, and returns it to the controller via the first communication bus.

[0243] Figure 17 A circuit diagram of a return code unit according to an embodiment of this disclosure is shown. Figure 17 As shown, the backcode unit 150 includes a first voltage divider resistor R82 (e.g., 20KΩ), a second voltage divider resistor R83 (e.g., 10KΩ), a second operational amplifier U6.1, a third voltage divider resistor R84 (e.g., 100Ω), a fourth voltage divider resistor R85 (e.g., 10KΩ), a fourth NMOS transistor (S2, G2, and D2 in Q81 represent the source, gate, and drain of the fourth NMOS transistor, respectively), and a first backcode current resistor R81 (e.g., 22Ω).

[0244] The first voltage divider resistor R82 includes a first terminal and a second terminal. The first terminal of the first voltage divider resistor R82 is used to receive the second control signal CTL2. Figure 17 (represented by SINGE_RESPOND in Chinese).

[0245] The second voltage divider resistor R83 includes a first terminal and a second terminal. The first terminal of the second voltage divider resistor R83 is used to connect to the second terminal of the first voltage divider resistor R82. The second terminal of the second voltage divider resistor R83 is used to connect to the ground voltage signal. The second voltage divider resistor R83 is smaller than the first voltage divider resistor R82.

[0246] The second operational amplifier U6.1 includes a first input terminal (e.g., a non-inverting input terminal), a second input terminal (e.g., a negative inverting input terminal), and an output terminal. The first input terminal of the second operational amplifier U6.1 is used to connect to the second terminal of the first voltage divider resistor R82 and the first terminal of the second voltage divider resistor R83, respectively.

[0247] The third voltage divider resistor R84 includes a first terminal and a second terminal. The first terminal of the third voltage divider resistor R84 is used to connect to the output terminal of the second operational amplifier U6.1.

[0248] The fourth voltage divider resistor R85 includes a first terminal and a second terminal. The first terminal of the fourth voltage divider resistor R85 is used to connect to the second terminal of the third voltage divider resistor R84. The second terminal of the fourth voltage divider resistor R85 is used to connect to the ground voltage signal.

[0249] The control terminal G2 of the fourth NMOS transistor is used to connect to the second terminal of the third voltage divider resistor R84 and the first terminal of the fourth voltage divider resistor R85, respectively. The first terminal S2 of the fourth NMOS transistor is used to connect to the second input terminal of the second operational amplifier U6.1. The second terminal D2 of the fourth NMOS transistor is used to connect to the first communication bus (i.e.,...) Figure 17 In this context, COM+ represents the CLIP communication line+. That is, the second terminal D2 of the fourth NMOS transistor is used to connect to the output terminal of the evoked code unit to output the second evoked code current signal to the first communication bus and send it to the controller.

[0250] The first return current resistor R81 includes a first terminal and a second terminal. The first terminal of the first return current resistor R81 is used to connect the second input terminal of the second operational amplifier U6.1 and the first terminal S2 of the fourth NMOS transistor, respectively. The second terminal of the first return current resistor R81 is used to connect to the ground voltage signal.

[0251] In this embodiment, the inverting input and output of the second operational amplifier U6.1 are connected to form a voltage follower. When the feedback detection unit detects a normal 25mA source current, the SINGE_RESPOND input from the central control unit to the feedback unit is high, for example, 3.3V. After the 3.3V is divided by R83 and R82, SINGE+ (i.e., the single response signal) equals a voltage of 1.1V, which is then input to the S2 terminal of the fourth NMOS transistor through the voltage follower. Q81 is an integrated circuit of two MOS transistors, representing the source, drain, and gate of the two MOS transistors, respectively. When SINGE_RESPOND is high, after voltage division by R85 and R84, a high voltage is input to the G2 terminal of the fourth NMOS transistor, causing the fourth NMOS transistor to conduct. This connects D2 and S2 of the fourth NMOS transistor, and a 50mA pull-up current flows from the COM+ terminal, D2, S2, and R81 to ground, resulting in a 50mA current output from the COM+ terminal as the return code bit to the controller.

[0252] In an exemplary embodiment, the communication protocol conversion module further includes an abnormal return code unit. The central control unit also includes a third output terminal for outputting an abnormal control signal to the abnormal return code unit. The abnormal return code unit includes an input terminal and an output terminal. The input terminal of the abnormal return code unit is used to connect to the third output terminal of the central control unit to receive the abnormal control signal. The abnormal return code unit is used to generate an abnormal return code current signal, such as 100mA or higher, when the abnormal control signal is at a first level (e.g., a high level). The output terminal of the abnormal return code unit is used to connect to a first communication bus to send the abnormal return code current signal to the controller.

[0253] Figure 18 A circuit diagram of an abnormal return code unit according to an embodiment of the present disclosure is shown.

[0254] like Figure 18 As shown, the abnormal return code unit 180 includes a fifth voltage divider resistor R93 (e.g., 10KΩ), a sixth voltage divider resistor R92 (e.g., 20KΩ), a fourth operational amplifier U6.2, a seventh voltage divider resistor R94 (e.g., 100Ω), an eighth voltage divider resistor R95 (e.g., 10KΩ), a fifth NMOS transistor (S1, G1, and D1 in Q81 represent the source, gate, and drain of the fifth NMOS transistor, respectively), and a second return code current resistor R91 (e.g., 22Ω).

[0255] The fifth voltage divider resistor R93 includes a first terminal and a second terminal. The first terminal of the fifth voltage divider resistor R93 is used to receive the abnormal control signal DUAL_RESPOND. That is, the first terminal of the fifth voltage divider resistor R93 is used to connect to the input terminal of the abnormal feedback unit, so as to connect to the third output terminal of the central control unit and receive the abnormal control signal DUAL_RESPOND from the central control unit.

[0256] The sixth voltage divider resistor R92 includes a first terminal and a second terminal. The first terminal of the sixth voltage divider resistor R92 is used to connect to the second terminal of the fifth voltage divider resistor R93. The second terminal of the sixth voltage divider resistor R92 is used to connect to the ground voltage signal. The sixth voltage divider resistor R92 is smaller than the fifth voltage divider resistor R93.

[0257] The fourth operational amplifier U6.2 includes a first input terminal (e.g., a non-inverting input terminal), a second input terminal (e.g., a negative inverting input terminal), and an output terminal. The first input terminal of the fourth operational amplifier U6.2 is used to connect to the second terminal of the fifth voltage divider resistor R93 and the first terminal of the sixth voltage divider resistor R92, respectively.

[0258] The seventh voltage divider resistor R94 includes a first terminal and a second terminal. The first terminal of the seventh voltage divider resistor R94 is used to connect to the output terminal of the fourth operational amplifier U6.2.

[0259] The eighth voltage divider resistor R95 includes a first terminal and a second terminal. The first terminal of the eighth voltage divider resistor R95 is used to connect to the second terminal of the seventh voltage divider resistor R94. The second terminal of the eighth voltage divider resistor R95 is used to connect to the ground voltage signal.

[0260] The control terminal G1 of the fifth NMOS transistor is used to connect to the second terminal of the seventh voltage divider resistor R94 and the first terminal of the eighth voltage divider resistor R95, respectively. The first terminal S1 of the fifth NMOS transistor is used to connect to the second input terminal of the fourth operational amplifier U6.2. The second terminal D1 of the fifth NMOS transistor is used to connect to the first communication bus.

[0261] The second-pass current resistor R91 includes a first terminal and a second terminal. The first terminal of the second-pass current resistor R91 is used to connect to the second input terminal of the fourth operational amplifier U6.2 and the first terminal of the fifth NMOS transistor, respectively. The second terminal of the second-pass current resistor R91 is used to connect to the ground voltage signal.

[0262] In this embodiment, under normal circumstances, the return code detection unit polls one PLIP peripheral at a time, resulting in a pull-up current of only 25mA. Correspondingly, the return code unit replies with a pull-up current of 50mA to the first communication bus. When multiple PLIP peripherals return codes simultaneously, a duplicate code fault occurs. At this time, the anomaly detection unit will detect a pull-up current of 50mA or more. The DUAL_RESPOND input from the central control unit to the return code unit is high, for example, 3.3V. After being divided by R92 and R93, the 3.3V is converted to 2.2V, resulting in DUAL+ (i.e., the dual response signal), which is input to the fourth operational amplifier U6.2. The fourth operational amplifier U6.2 is connected as a voltage follower, so the 2.2V voltage is input to the S1 pin of the fifth NMOS transistor through the voltage follower. Simultaneously, through the voltage divider formed by R94 and R95, a high voltage is input to the G1 terminal of the fifth NMOS transistor, causing it to conduct. This connects the D1 and S1 terminals of the fifth NMOS transistor, allowing a current of 100mA or more to flow from the COM+ terminal, through D1, S1, and R9 to ground. This results in an abnormal current of 100mA or more being output from the COM+ terminal. In other words, an abnormal current of 100mA or more has been detected.

[0263] Given the prevalence of CLIP fire alarm systems, directly upgrading to a PLIP system involves a large workload and high construction costs. To address the compatibility and expansion issues between PLIP devices and CLIP systems, this disclosure provides a CLIP-PLIP communication protocol conversion module (i.e., a communication protocol conversion module) for fire alarm systems. This module can adapt PLIP fire-fighting equipment and expand PLIP subsystems within a CLIP fire alarm system.

[0264] Figure 19A schematic diagram of a fire alarm system according to an embodiment of this disclosure is shown.

[0265] like Figure 19 As shown, this disclosure also provides a fire alarm system. The fire alarm system includes a controller 200 (i.e., a controller in a fire alarm system using the CLIP protocol, which may be simply referred to as a CLIP controller), a communication protocol conversion module 100, and a first type of detection device (i.e., a peripheral device 300 in a fire alarm system using the PLIP protocol, which includes a PLIP fire detector, i.e., a fire detector using the PLIP protocol).

[0266] In this embodiment of the disclosure, the controller employs a first communication protocol. The controller is used to connect to a first communication bus.

[0267] The communication protocol conversion module in this embodiment may be referenced in other embodiments. The communication protocol conversion module is used to connect to the first communication bus and the second communication bus respectively.

[0268] The first type of detection equipment is connected to the second communication bus and uses the second communication protocol.

[0269] Figure 20 A schematic diagram of another fire alarm system according to an embodiment of this disclosure is shown. Figure 20 This is a schematic diagram of a fire alarm system that includes CLIP and PLIP protocol conversion (which can be achieved by CLIP and PLIP conversion device 401, which is equivalent to the aforementioned communication protocol conversion module 100).

[0270] like Figure 20 As shown, the fire alarm system includes a CLIP controller 101, N CLIP loop cards (N is a positive integer greater than or equal to 1, CLIP loop card 201, ... CLIP loop card 202 are shown in the figure) or communication circuit that are connected to the CLIP controller 101, N CLIP fire detectors (including in the second type of detection devices, CLIP fire detector 301, ... CLIP fire detector 302 are shown in the figure), a CLIP to PLIP conversion device 401, and N PLIP fire detectors (PLIP fire detector 501, ... PLIP fire detector 502 are shown in the figure).

[0271] N CLIP fire detectors and N PLIP fire detectors communicate bidirectionally with the CLIP controller 101 via N loop cards or communication circuits. The loop cards or communication circuits communicate bidirectionally with the N CLIP and N PLIP fire detectors, and are connected to each other via communication lines (including the first and second communication buses mentioned above). Each of the N loop cards corresponds to one of the N CLIP and N PLIP fire detectors, and each CLIP or PLIP fire detector and each loop card forms a corresponding loop unit for transmitting and receiving information with the CLIP controller 101. The loop card separates or superimposes the clock signal and data signal in each frame of data it transmits. Each CLIP and each PLIP fire detector has a unique physical address.

[0272] The CLIP loop card in this disclosure refers to a loop control card specific to a fire alarm system. The CLIP loop card is used to connect the CLIP controller in the fire alarm system to field devices (such as detectors, modules, etc.) to achieve data transmission and monitoring. The CLIP loop card is responsible for managing and controlling one or more communication loops, ensuring accurate data transmission within the loops. Multiple field devices (such as fire detectors, manual alarm buttons, etc.) can be connected to the CLIP controller via the CLIP loop card. The CLIP loop card supports bidirectional data communication, capable of receiving signals from field devices and transmitting this information to the controller for processing. The CLIP loop card supports specific communication protocols (such as the CLIP protocol) to ensure compatibility and communication efficiency with the controller and field devices.

[0273] The communication protocol conversion module provided in this embodiment can perform functional mapping between two different protocol commands. For example, it can convert PLIP protocol data (e.g., commands or first return code current signals) into CLIP protocol data (e.g., commands or second return code current signals), and convert CLIP protocol data (e.g., first communication protocol transmission signals) into PLIP protocol data (e.g., second communication protocol transmission signals). This allows fire alarm products using different communication protocols to be mixed and connected in the same fire alarm system. It enables the access of PLIP peripheral products (i.e., the first type of detection devices using the PLIP protocol) to the CLIP bus (i.e., the first communication bus) of the fire alarm system, improving the flexibility of the fire alarm system and solving the compatibility problem of field devices. PLIP devices (i.e., the first type of detection devices using the PLIP protocol) can be accessed through the CLIP fire alarm control panel (i.e., the control panel included in the controller using the CLIP protocol).

[0274] like Figure 21As shown, the communication protocol conversion module provided in this embodiment of the disclosure is used to perform the following operations to achieve protocol conversion, that is, it provides the following protocol conversion method:

[0275] S1, CLIP data processing.

[0276] That is, the communication protocol conversion module receives and processes the first communication protocol data (abbreviated as CLIP data).

[0277] For example, the decoding unit receives and parses CLIP data to obtain information about all CLIP peripherals (second-type probe devices) on the first communication bus, such as the address, instructions, functions, and current event status of the CLIP peripherals, and then sends this information to the central control unit. The central control unit stores the information of all received CLIP peripherals in a mapping table, which includes a current event status information table. This current event status information table stores the PLIP waveform corresponding to each CLIP instruction or event, i.e., the PLIP instruction or event.

[0278] S2, Waiting for CLIP data to become available.

[0279] In this embodiment of the disclosure, the central control unit waits for the first communication protocol data processing to be idle.

[0280] S3, Heartbeat / Command Issuance.

[0281] In this embodiment of the disclosure, the central control unit sends heartbeat frames or command frames. That is, when CLIP data processing is idle, the communication protocol conversion module sends heartbeat frames or command frames to the CLIP peripheral.

[0282] For example, such as Figure 23 As shown, assuming that the communication protocol conversion module initially receives and processes the CLIP waveform on the left, when CLIP data processing becomes idle, i.e., as shown... Figure 23 When the duration of 10ms is shown, the heartbeat frame or command frame is sent out, that is, waiting for the interval between every two CLIP waveforms.

[0283] In this embodiment, the central control unit may include one or two MCUs (Microcontroller Units). When two MCUs are included, they are referred to as MCU1 and MCU2, respectively. MCU1 is responsible for CLIP data reception and processing. For example, MCU1 interacts with the decoding unit and the return code unit, receiving data from the decoding unit and sending control signals to the return code unit. MCU2 is responsible for PLIP data reception and processing. For example, MCU2 interacts with the transmitting unit and the return code detection unit, sending control signals to the transmitting unit and receiving data from the return code detection unit. MCU1 can execute the above S1 and S2. When MCU1 detects that CLIP data processing is idle, if there is no instruction or command to send to MCU2, it sends a heartbeat frame to MCU2; when there is an instruction or command, it sends a command frame or instruction frame to MCU2. Then, MCU2 can convert the instruction frame into PLIP format according to the above mapping table and send it to the PLIP device. The instruction frame may, for example, instruct the PLIP device to light up, flash, or turn off the LED indicator of the PLIP device, or enable the remote test state of the PLIP device.

[0284] There is a time-division multiplexed transmission line between MCU1 and MCU2. The central control unit contains memory to store the mapping relationship or mapping table between CLIP and PLIP. MCU1 synchronizes all CLIP peripheral information to MCU2, and MCU2 synchronizes all PLIP peripheral information to MCU1.

[0285] S4.0, Report alarm frames to the controller.

[0286] Specifically, step S4a is executed first, where the communication protocol conversion module determines whether the PLIP device (Type I detection device) has any alarms; if an alarm event is detected in the PLIP device, step S4.0 is executed; if no alarm is detected in the PLIP device, step S4b is executed.

[0287] S4.1 Report a fault frame to the controller.

[0288] Specifically, step S4b is executed first, where the communication protocol conversion module determines whether the PLIP device is faulty; if a fault event is detected in the PLIP device, step S4.1 is executed; if no fault is detected in the PLIP device, step S4c is executed.

[0289] S4.2 Report an open circuit fault frame to the controller.

[0290] Specifically, step S4c is executed first, where the communication protocol conversion module determines whether the PLIP device has an open circuit fault. If an open circuit fault event is detected in the PLIP device, step S4.2 is executed. If no open circuit fault is detected in the PLIP device, step S4d is executed.

[0291] S4.3 Report a short-circuit fault frame to the controller.

[0292] Specifically, step S4d is executed first, where the communication protocol conversion module determines whether the PLIP device has a short circuit fault; if a short circuit fault event is detected in the PLIP device, step S4.3 is executed; if no short circuit fault is detected in the PLIP device, step S4e is executed.

[0293] S4.4 Report a power failure frame to the controller.

[0294] Specifically, step S4e is executed first, where the communication protocol conversion module determines whether the PLIP device has a power failure. If a power failure event is detected in the PLIP device, step S4.4 is executed. If no power failure is detected in the PLIP device, step S4f is executed.

[0295] S4.5 If an offline event is detected in the first type of detection device, an offline event frame is reported to the controller.

[0296] Specifically, step S4f is executed first, where the communication protocol conversion module determines whether the PLIP device has an offline event. If an offline event is detected, step S4.5 is executed, followed by step S5a. If no offline event is detected, step S5a is executed.

[0297] S5. Report a no-event response (ACK) frame to the controller.

[0298] Specifically, step S5a is executed first. The communication protocol conversion module determines whether a command has been sent to the PLIP device and no event has been reported. If so, step S5 is executed, and after executing step S5, the process jumps back to step S1 above and repeats the execution. If not, the process jumps back to step S1 above and repeats the execution.

[0299] In the embodiments of this disclosure, a service fault frame or fault frame refers to a frame used to indicate a general fault other than a service open circuit fault / open circuit fault, a service short circuit fault / short circuit fault, or a power supply fault. In other embodiments, there may be only one service fault frame or fault frame, that is, the relationship between open circuit, short circuit, and power supply faults and general faults is not distinguished, i.e., the aforementioned open circuit fault frames, short circuit fault frames, and power supply fault frames may not exist.

[0300] In an exemplary embodiment, there is a first time interval (e.g., 2 milliseconds) between S2 and S3, a second time interval (e.g., 1.2 milliseconds) between S4.0 and S4.1, S4.2 and S4.3, S4.3 and S4.4, and S4.4 and S4.5 respectively, and a third time interval (e.g., 1.5 milliseconds) between S4.5 and S5. The first time interval is greater than the third time interval, and the third time interval is greater than the second time interval.

[0301] In this embodiment of the disclosure, to ensure service reliability and reduce protocol conversion latency, the following time intervals are designed: S2 and S3 are 2 milliseconds apart; S4.0 and S4.1 are 1.2 milliseconds apart; S4.2 and S4.3 are 1.2 milliseconds apart; S4.3 and S4.4 are 1.2 milliseconds apart; S4.4 and S4.5 are 1.2 milliseconds apart; and S4.5 and S5 are 1.5 milliseconds apart. However, this disclosure is not limited to these intervals and can be set according to actual needs.

[0302] In this embodiment of the disclosure, when CLIP loop card 201 sends a remote test command to PLIP fire detector 501, and PLIP fire detector 502 generates an alarm event, the command, upon reaching the CLIP to PLIP conversion device 401, is executed. Figure 21 S1 parses CLIP data and obtains the device address and instructions. Then, S2 waits for CLIP data processing to become idle. After a waiting time interval, for example, 2 milliseconds, S3 sends a PLIP service heartbeat / instruction. At this time, the PLIP fire detector 501 executes the remote test instruction. Simultaneously, S4.0 receives the alarm service frame / alarm frame from the PLIP fire detector 502. Since the system has not generated any fault events, open circuit fault events, short circuit fault events, power failure events, offline events, or has generated an alarm event, steps S4.1, S4.2, S4.3, S4.4, S4.5, and S5 are skipped, waiting for the next execution of S1 to report the alarm event to the CLIP loop card 201.

[0303] In an exemplary embodiment, the alarm frame, the fault frame, the open-circuit fault frame, the short-circuit fault frame, the power supply fault frame, and the offline event frame all include a frame type field, a data length field, and a data field. The frame type field indicates the frame type of the alarm frame, the fault frame, the open-circuit fault frame, the short-circuit fault frame, the power supply fault frame, and the offline event frame. The data length field indicates the length of the data field.

[0304] Figure 22This is the service frame or communication frame format provided in the embodiments of this disclosure. The service frame includes a frame type field, which may occupy 1 byte, indicating that the service frame belongs to a certain type of frame, such as a heartbeat frame, instruction frame, alarm frame, fault frame, open circuit fault frame, short circuit fault frame, power failure frame, offline event frame, etc. The data length field may also occupy 1 byte, indicating the length of the data field in the service frame. The data field is used to store which of the multiple PLIP peripherals connected to the second communication bus (here, 200 PLIP peripherals are used as an example, but this disclosure is not limited to this; the corresponding number of PLIP peripherals can be connected according to the actual scenario) have corresponding events (for example, if the service frame is an alarm frame, it indicates which PLIP peripherals have alarm events). The length of the data field is variable, assumed to be n bytes, where n is a positive integer greater than or equal to 1. That is, the service frame format provided in the embodiments of this disclosure is a variable-length frame, which may occupy 2 to 27 bytes of data depending on service needs. In some embodiments, the size of the frame type field and the data field can be determined by the data length field.

[0305] In this embodiment, each bit in the data field corresponds to the address of a PLIP peripheral and its corresponding status. For example, taking a service failure frame as an example, the data field has 200 bits, each bit indicating a corresponding PLIP peripheral, that is, indicating the address of the PLIP peripheral. When the corresponding bit takes a first value, such as 1, it indicates that the PLIP peripheral has a service failure; when it takes a second value, such as 0, it indicates that the PLIP peripheral does not have a service failure. In this way, the same event of 200 PLIP peripherals can be synchronized simultaneously through the same frame.

[0306] During the above process, when receiving the alarm service frame from the PLIP fire detector 502 in S4.0, the following was adopted: Figure 22 The service frame format shown.

[0307] In this embodiment, the communication protocol conversion module obtains the current event status of 200 PLIP peripherals by polling all PLIP peripherals connected to the second communication bus. Figure 23 After the 10ms shown ends, the PLIP waveform is modulated into the CLIP waveform on the right and synchronized to the CLIP controller.

[0308] This disclosure, through the classification of various attributes and factors of data, rationally designs several regions (e.g., frame type field, data length field, and data field) to eliminate redundant data. Simultaneously, by using bit data and the address of that bit to characterize the status and address of an entity device (i.e., a PLIP peripheral), the frame length is significantly reduced and transmission efficiency is improved while ensuring sufficient information content.

[0309] In an exemplary embodiment, during the first time period, if a command is received, a command frame is sent; otherwise, a heartbeat frame is sent. During the second to seventh time periods, when an alarm event, fault event, open-circuit fault event, short-circuit fault event, power failure event, or offline event occurs, the alarm frame, fault frame, open-circuit fault frame, short-circuit fault frame, power failure frame, and offline event frame are sent sequentially. During the eighth time period, when an alarm event, fault event, open-circuit fault event, short-circuit fault event, power failure event, or offline event occurs, a response frame is sent.

[0310] Figure 23 This refers to the internal data synchronization timing provided in the embodiments of this disclosure. For example... Figure 23 As shown, there are time periods: 1 (first time period), 2 (second time period), 3 (third time period), 4 (fourth time period), 5 (fifth time period), 6 (sixth time period), 7 (seventh time period), and 8 (eighth time period). In time period 1, if a command is received, a command frame is sent; otherwise, a heartbeat frame is sent. In time periods 2 through 7, if a relevant event occurs, an alarm frame is sent in the following priority / order: in time period 2, a fault frame is sent; in time period 3, an open-circuit fault frame is sent; in time period 4, a short-circuit fault frame is sent; in time period 5, a power failure frame is sent; and in time period 7, an offline event frame is sent. In time period 8, if an event occurs, an ACK frame is sent; otherwise, nothing is sent.

[0311] refer to Figure 23 The first to eighth time periods all fall within the minimum first communication protocol frame interval. When the first communication protocol is CLIP, this minimum first communication protocol frame interval is also called the minimum CLIP frame interval. The minimum CLIP frame interval refers to the minimum time interval between two adjacent CLIP waveforms. This minimum time interval is used by the communication protocol conversion module to convert PLIP communication frames to CLIP waveforms, i.e., for the PLIP peripheral data acquisition and parsing period, for example, to implement... Figure 20 The steps are shown.

[0312] Figure 23 If a service alarm frame exists, it will be sent during time slot 2. If no service alarm frame exists, a service fault frame will be sent during time slot 2. If no alarm frame, fault frame, open circuit fault frame, short circuit fault frame, power supply fault frame, or offline event frame exists, a no-event ACK frame can be sent during time slot 2. Other cases follow the same logic.

[0313] Figure 23 CAN_TXD and CAN_RXD in the code actually refer to the same CAN transmission line. Figure 23 The two lines shown are to distinguish which are sent to the PLIP peripheral and which are received from the PLIP peripheral.

[0314] The communication protocol conversion module and communication frame format provided in this disclosure are novel and reasonable in design, simple in application, highly reliable, have high protocol conversion timeliness, and large information payload. They can convert CLIP-issued instructions and PLIP-reported events in one go. This provides theoretical guidance and design basis for solving the interconnection and communication problems between CLIP and PLIP fire alarm systems, as well as the compatibility and adaptation issues of CLIP systems.

[0315] This disclosure provides, on the one hand, a communication protocol conversion module that enables mutual conversion between CLIP and PLIP protocols. On the other hand, by designing the communication frame format, it is possible to achieve conversion within the minimum CLIP frame interval (e.g., Figure 23 Within a 10ms interval, events from up to 200 PLIP peripherals can be synchronized simultaneously. Simultaneously, up to seven types of events (alarm events, fault events, open circuit fault events, short circuit fault events, power failure events, offline events, and no event) can be synchronized. Commands can be issued while events are being synchronized (here, "simultaneously" means within the same 10ms timeframe, both commands and events can be synchronized, and this is time-division multiplexing within the same 10ms interval), greatly improving communication timeliness and providing more time for rapid response to fire incidents. Furthermore, PLIP service processing occurs after S2, resulting in low time correlation between CLIP and PLIP service processing and high conversion reliability. Time intervals between S2, S3, S4.0, S4.1, S4.2, S4.3, S4.4, and S4.5 are also designed to ensure high timeliness of data synchronization from the CLIP protocol to the PLIP protocol and the ability to handle concurrent events. It provides a variable-length PLIP service frame format, in which a single service frame can carry the same event information from all communication units in a full loop, thereby improving information payload and communication efficiency.

[0316] The illustrative embodiments and descriptions of this disclosure are for illustrative purposes only and are not intended to limit the scope of this disclosure. Figure 21 This is for illustrative purposes only and does not necessarily include all content and operations / steps.

[0317] Furthermore, embodiments of this disclosure provide a fire alarm system for implementing the communication protocol conversion method as described in any embodiment of this disclosure.

[0318] Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this disclosure, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. The symbol " / " generally indicates that the preceding and following related objects are in an "or" relationship. In this disclosure, unless otherwise explicitly specified and limited, terms such as "connection" should be interpreted broadly, for example, it can mean an electrical connection or the ability to communicate with each other; it can mean a direct connection or an indirect connection through an intermediate medium. Exemplary embodiments of this disclosure have been specifically shown and described above. This disclosure is not limited to the detailed structures, arrangements, or implementation methods described herein; rather, this disclosure is intended to cover various modifications and equivalent arrangements contained within the spirit and scope of the appended claims.

Claims

1. A communication protocol conversion method, characterized in that, include: Receive the first communication protocol transmission signal from the controller, decode the first communication protocol transmission signal, and generate a logic signal; The controller uses a first communication protocol; A first control signal is generated based on the logic signal; Based on the first control signal, the first communication protocol transmission signal is converted into a second communication protocol transmission signal, and the second communication protocol transmission signal is sent to the first type of detection device, wherein the first type of detection device adopts the second communication protocol. Receive the first return code current signal in the second communication protocol pulled by the first type of detection device under the second voltage signal, and convert the first return code current signal into a return code voltage signal; A second control signal is generated based on the return code voltage signal; The second backcode current signal in the first communication protocol is generated according to the second control signal, and the second backcode current signal is sent to the controller.

2. The method according to claim 1, characterized in that, The logic signal includes a first logic signal and a second logic signal; different combinations of the first logic signal and the second logic signal are used to represent the third voltage signal, the second voltage signal and the ground voltage signal in the first communication protocol transmission signal, respectively. The first control signal includes a third voltage control signal, a second voltage control signal, and a ground voltage control signal; The generation of the first control signal based on the logic signal includes: The third voltage control signal, the second voltage control signal, and the ground voltage control signal are generated based on the first logic signal and the second logic signal. The process of converting the first communication protocol transmission signal into a second communication protocol transmission signal based on the first control signal includes: Under the control of the third voltage control signal, the second voltage control signal, and the ground voltage control signal, a second communication protocol transmission signal including the third voltage signal, the second voltage signal, and the ground voltage signal is generated.

3. The method according to claim 2, characterized in that, Under the control of the third voltage control signal, the second voltage control signal, and the ground voltage control signal, a second communication protocol transmission signal is generated, including the third voltage signal, the second voltage signal, and the ground voltage signal, comprising: When the third voltage control signal is at the first level, the control outputs the third voltage signal to the second communication protocol transmission signal; When the second voltage control signal is at the first level, the control outputs the second voltage signal to the second communication protocol transmission signal; When the ground voltage control signal is at the first level, the ground voltage signal is output to the second communication protocol code signal.

4. The method according to claim 3, characterized in that, When the third voltage control signal is at the first level, the control outputs the third voltage signal to the second communication protocol transmission signal, including: The third voltage control signal and the ground voltage signal are respectively input to the base and emitter of the first transistor, so that the first transistor is turned on when the third voltage control signal is at the first level and turned off when it is at the second level; the collector of the first transistor is connected to the control terminal of the first PMOS transistor, the base of the second transistor, and the collector of the third transistor; the base of the third transistor is connected to the collector of the second transistor; The grounding voltage signal is input to the emitter of the second transistor; The third voltage signal is input to the emitter of the third transistor; The third voltage signal is input to the first terminal of the first PMOS transistor, so that when the third voltage control signal is at the first level, the second terminal of the first PMOS transistor outputs the second communication protocol transmission signal containing the third voltage signal.

5. The method according to claim 4, characterized in that, The first control signal further includes a discharge control signal; wherein, the method further includes: The discharge control signal, the ground voltage signal, and the third voltage signal are respectively input to the control terminal, the first terminal, and the second terminal of the first NMOS transistor; When the discharge control signal is at the first level, the first NMOS transistor is turned on to pull the voltage of the output second communication protocol encoding signal down from the third voltage signal to the ground voltage signal.

6. The method according to claim 3, characterized in that, When the second voltage control signal is at the first level, the control outputs the second voltage signal to the second communication protocol transmission signal, including: The second voltage control signal, the ground voltage signal, and the third voltage signal are respectively input to the base, emitter, and collector of the fourth transistor, so that the fourth transistor is turned on when the second voltage control signal is at the first level and turned off when it is at the second level; the base of the fifth transistor is connected to the collector of the fourth transistor. The third voltage signal and the ground voltage signal are respectively input to the emitter and collector of the fifth transistor; the control terminal of the second NMOS transistor is connected to the collector of the fifth transistor; The second voltage signal is input to the first terminal of the second NMOS transistor so that when the second voltage control signal is at the first level, the second terminal of the second NMOS transistor outputs the second communication protocol transmission signal containing the second voltage signal.

7. The method according to claim 3, characterized in that, When the ground voltage control signal is at the first level, the ground voltage signal is controlled to be output to the second communication protocol transmission signal, including: The ground voltage control signal, the ground voltage signal, and the third voltage signal are respectively input to the control terminal, the first terminal, and the second terminal of the third NMOS transistor, so that when the ground voltage control signal is at the first level, the second communication protocol transmission signal containing the ground voltage signal is output through the second terminal of the third NMOS transistor.

8. The method according to claim 2, characterized in that, Decoding the first communication protocol transmission signal to generate a logic signal includes: The first communication protocol transmission signal is divided by voltage to generate a first voltage divider signal and a second voltage divider signal, wherein the first voltage divider signal is smaller than the second voltage divider signal. The first logic signal is generated by comparing the magnitude of the first voltage divider signal with the first reference voltage. The second voltage divider signal is compared with the second reference voltage to generate the second logic signal; the second reference voltage is greater than the first reference voltage.

9. The method according to claim 1, characterized in that, Converting the first return code current signal into a return code voltage signal includes: Detect the voltage difference generated across the first current sampling resistor by the first feedback current signal; The voltage difference generated by the first backcode current signal across the first current sampling resistor is amplified by the first operational amplifier to generate the amplified voltage difference output by the first operational amplifier. The amplified voltage difference output from the first operational amplifier is converted into the return code voltage signal through the first load resistor.

10. The method according to claim 1, characterized in that, Generating the second return code current signal in the first communication protocol according to the second control signal includes: The second control signal is divided by the first voltage divider resistor and the second voltage divider resistor to obtain a single response signal; The single response signal is input to the first input terminal of the second operational amplifier, and the second input terminal of the second operational amplifier is connected to the first terminal of the fourth NMOS transistor. The first terminal of the fourth NMOS transistor is also connected to the first terminal of the first return current resistor. The output signal of the second operational amplifier is divided by the third and fourth voltage divider resistors to obtain the third voltage divider signal. The third voltage divider signal is input to the control terminal of the fourth NMOS transistor, and the ground voltage signal is input to the second terminal of the first return current resistor, so that when the second control signal is at the first level, the fourth NMOS transistor is turned on, and the single response signal is converted into the second return current signal through the first return current resistor.

11. The method according to claim 1, characterized in that, Also includes: Receive the abnormal current signal pulled by the first type of detection device under the third voltage signal; Convert the abnormal current signal into an abnormal voltage signal; An abnormal control signal is generated based on the abnormal voltage signal.

12. The method according to claim 11, characterized in that, Converting the abnormal current signal into an abnormal voltage signal includes: The abnormal current signal is detected to generate a voltage difference across the second current sampling resistor; The voltage difference generated by the abnormal current signal across the second current sampling resistor is amplified by the third operational amplifier to generate the amplified voltage difference output by the third operational amplifier. The amplified voltage difference output from the third operational amplifier is converted into the abnormal voltage signal through the second load resistor.

13. The method according to claim 11, characterized in that, Also includes: When the abnormal control signal is at the first level, an abnormal return code current signal is generated; The abnormal return code current signal is sent to the controller.

14. The method according to claim 13, characterized in that, When the abnormal control signal is at the first level, an abnormal return code current signal is generated, including: The abnormal control signal is divided by the fifth and sixth voltage divider resistors to obtain a dual response signal; The dual-response signal is input to the first input terminal of the fourth operational amplifier, and the second input terminal of the fourth operational amplifier is connected to the first terminal of the fifth NMOS transistor. The first terminal of the fifth NMOS transistor is also connected to the first terminal of the second backcode current resistor. The output signal of the fourth operational amplifier is divided by the seventh and eighth voltage divider resistors to obtain the fourth voltage divider signal. The fourth voltage divider signal is input to the control terminal of the fifth NMOS transistor, and the ground voltage signal is input to the second terminal of the second return current resistor, so that when the abnormal control signal is at the first level, the fifth NMOS transistor is turned on, and the dual response signal is converted into the abnormal return current signal through the second return current resistor.

15. The method according to claim 1, characterized in that, The first communication protocol transmission signal includes a third voltage signal; wherein, the method further includes: The third voltage signal is converted into a second voltage signal and a first voltage signal.

16. The method according to claim 15, characterized in that, Converting the third voltage signal into a second voltage signal and a first voltage signal includes: The first communication protocol transmission signal is sent to the positive terminal of the first diode; The first terminal of the first capacitor is connected to the negative terminal of the first diode, and the second terminal of the first capacitor is connected to the ground voltage signal to store the third voltage signal in the first communication protocol transmission signal. The input terminal of the first power conversion chip is used to connect the negative terminal of the first diode and the first terminal of the first capacitor respectively, so as to convert the third voltage signal into the second voltage signal; The input terminal of the second power conversion chip is connected to the output terminal of the first power conversion chip to convert the second voltage signal into the first voltage signal.

17. The method according to claim 1, characterized in that, Also perform the following operations: S1. Receive and process data using the first communication protocol; S2, Waiting for the first communication protocol data processing to be idle; S3, Send a heartbeat frame or command frame; S4.0 If an alarm event is detected in the first type of detection device, an alarm frame is reported to the controller; S4.1 If a fault event is detected in the first type of detection device, a fault frame is reported to the controller; S4.2 If an open-circuit fault event is detected in the first type of detection device, an open-circuit fault frame is reported to the controller; S4.3 If a short-circuit fault event is detected in the first type of detection device, a short-circuit fault frame is reported to the controller; S4.4 If a power failure event is detected in the first type of detection device, a power failure frame is reported to the controller. S4.5 If an offline event is detected in the first type of detection device, an offline event frame is reported to the controller; S5. If it is detected that there is no event in the first type of detection device, a no-event response frame is reported to the controller.

18. The method according to claim 17, characterized in that, There is a first time interval between S2 and S3, and there are second time intervals between S4.0 and S4.1, S4.2 and S4.3, S4.3 and S4.4, and S4.4 and S4.5 respectively. There is a third time interval between S4.5 and S5. The first time interval is greater than the third time interval, and the third time interval is greater than the second time interval.

19. The method according to claim 17, characterized in that, The alarm frame, the fault frame, the open circuit fault frame, the short circuit fault frame, the power supply fault frame, and the offline event frame all include a frame type field, a data length field, and a data field. The frame type field is used to indicate the frame type of the alarm frame, the fault frame, the open circuit fault frame, the short circuit fault frame, the power supply fault frame, and the offline event frame; The data length field is used to indicate the length of the data field; The data field is used for the address of the first type of detection device and its corresponding status.

20. The method according to claim 17, characterized in that, In the first time period, if there is a command, a command frame is sent; If no command is given, a heartbeat frame is sent. During the second to seventh time periods, when an alarm event, fault event, open circuit fault event, short circuit fault event, power failure event, or offline event occurs, the alarm frame, the fault frame, the open circuit fault frame, the short circuit fault frame, the power failure frame, and the offline event frame are sent in sequence. In the event of an alarm event, fault event, open circuit fault event, short circuit fault event, power failure event, or offline event, a response frame is sent in the eighth time period. The first time period to the eighth time period are within the minimum first communication protocol frame interval.

21. A communication protocol conversion module, characterized in that, include: A decoding unit includes an input terminal and an output terminal; the input terminal of the decoding unit is used to connect to a first communication bus to receive a first communication protocol transmission signal from a controller connected to the first communication bus, wherein the controller adopts the first communication protocol; the decoding unit is used to decode the first communication protocol transmission signal to generate a logic signal; the output terminal of the decoding unit is used to output the logic signal. A central control unit includes a first input terminal, a second input terminal, and a first output terminal; the first input terminal of the central control unit is used to receive a first voltage signal as its operating voltage; the second input terminal of the central control unit is used to connect to the output terminal of the decoding unit to receive the logic signal. The central control unit is used to generate a first control signal based on the logic signal; The first output terminal of the central control unit is used to output the first control signal; The code-generating unit includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the code-generating unit is used to receive a second voltage signal; the second input terminal of the code-generating unit is used to connect to the first output terminal of the central control unit to receive the first control signal. The code-transmitting unit is used to convert the first communication protocol code-transmitting signal into a second communication protocol code-transmitting signal based on the first control signal; the output terminal of the code-transmitting unit is used to connect to a second communication bus to send the second communication protocol code-transmitting signal to a first type of detection device connected to the second communication bus, wherein the first type of detection device adopts the second communication protocol; The return code detection unit includes an input terminal and an output terminal; The input terminal of the return code detection unit is used to connect to the second communication bus to receive the first return code current signal in the second communication protocol pulled down by the first type of detection device under the second voltage signal; the return code detection unit is used to convert the first return code current signal into a return code voltage signal; the central control unit further includes a third input terminal and a second output terminal, the output terminal of the return code detection unit is used to connect to the third input terminal of the central control unit to input the return code voltage signal to the central control unit, the central control unit is also used to generate a second control signal according to the return code voltage signal; the second output terminal of the central control unit is used to output the second control signal; The return code unit includes an input terminal and an output terminal; the input terminal of the return code unit is used to connect to the second output terminal of the central control unit to receive the second control signal; The return code unit is used to generate a second return code current signal in the first communication protocol according to the second control signal; the output terminal of the return code unit is used to connect to the first communication bus to send the second return code current signal to the controller.

22. The communication protocol conversion module according to claim 21, characterized in that, The logic signal includes a first logic signal and a second logic signal; different combinations of the first logic signal and the second logic signal are used to represent the third voltage signal, the second voltage signal and the ground voltage signal in the first communication protocol transmission signal, respectively. The first control signal includes a third voltage control signal, a second voltage control signal, and a ground voltage control signal; wherein, the central control unit is used to generate the third voltage control signal, the second voltage control signal, and the ground voltage control signal according to the first logic signal and the second logic signal; The coding unit is used to generate a second communication protocol coding signal, including the third voltage signal, the second voltage signal, and the ground voltage signal, under the control of the third voltage control signal, the second voltage control signal, and the ground voltage control signal.

23. The communication protocol conversion module according to claim 22, characterized in that, The code-issuing unit includes: A first switching circuit includes a control terminal, an input terminal, and an output terminal. The control terminal of the first switching circuit is used to receive the third voltage control signal. The input terminal of the first switching circuit is used to receive the third voltage signal. The output terminal of the first switching circuit is used to connect to the output terminal of the coding unit. The first switching circuit is used to control the closing of the first switching circuit when the third voltage control signal is at a first level, so that the third voltage signal is output to the output terminal of the coding unit. The second switching circuit includes a control terminal, an input terminal, and an output terminal. The control terminal of the second switching circuit is used to receive the second voltage control signal. The input terminal of the second switching circuit is used to receive the second voltage signal. The output terminal of the second switching circuit is used to connect to the output terminal of the coding unit. The second switching circuit is used to control the closing of the second switching circuit when the second voltage control signal is at the first level, so that the second voltage signal is output to the output terminal of the coding unit. The third switching circuit includes a control terminal, an input terminal, and an output terminal. The control terminal of the third switching circuit is used to receive the ground voltage control signal. The input terminal of the third switching circuit is used to receive the ground voltage signal. The output terminal of the third switching circuit is used to connect to the output terminal of the coding unit. The third switching circuit is used to control the closing of the third switching circuit when the ground voltage control signal is at the first level, so that the ground voltage signal is output to the output terminal of the coding unit.

24. The communication protocol conversion module according to claim 23, characterized in that, The first switching circuit includes: The first transistor has its base used to receive the third voltage control signal; the first transistor is turned on when the third voltage control signal is at the first level and turned off when it is at the second level; the emitter of the first transistor is used to receive the ground voltage signal; and the collector of the first transistor is used to connect to the control terminal of the first PMOS transistor. The first PMOS transistor has a first terminal for receiving the third voltage signal and a second terminal for connecting to the output terminal of the code transmission unit. The base of the second transistor is used to connect to the collector of the first transistor, and the emitter of the second transistor is used to receive the ground voltage signal. The third transistor has its base connected to the collector of the second transistor; its emitter is used to receive the third voltage signal; and its collector is connected to the collector of the first transistor.

25. The communication protocol conversion module according to claim 24, characterized in that, The first control signal further includes a discharge control signal; wherein, the code transmission unit further includes: The first NMOS transistor has a control terminal for receiving the discharge control signal, a first terminal for receiving the ground voltage signal, and a second terminal for connecting to the output terminal of the coding unit and receiving the third voltage signal, respectively. The first NMOS transistor is used to turn on when the discharge control signal is at the first level, so as to pull the voltage output by the output terminal of the coding unit down from the third voltage signal to the ground voltage signal.

26. The communication protocol conversion module according to claim 23, characterized in that, The second switching circuit includes: A fourth transistor, wherein the base of the fourth transistor is used to receive the second voltage control signal; the fourth transistor is used to conduct when the second voltage control signal is at the first level and to cut off when it is at the second level; the emitter of the fourth transistor is used to connect to the ground voltage signal; and the collector of the fourth transistor is used to connect to the third voltage signal. The fifth transistor has its base connected to the collector of the fourth transistor, and its emitter connected to the third voltage signal; the collector of the fifth transistor is connected to the ground voltage signal. The second NMOS transistor has its control terminal connected to the collector of the fifth transistor; its first terminal is connected to the second voltage signal; and its second terminal is connected to the output terminal of the coding unit.

27. The communication protocol conversion module according to claim 23, characterized in that, The third switching circuit includes: The third NMOS transistor has a control terminal for receiving the ground voltage control signal; a first terminal for receiving the ground voltage signal; and a second terminal for connecting to the output terminal of the coding unit and receiving the third voltage signal.

28. The communication protocol conversion module according to claim 22, characterized in that, The decoding unit includes: A first voltage divider resistor circuit includes an input terminal, a first output terminal, and a second output terminal. The input terminal of the first voltage divider resistor circuit is used to connect to the input terminal of the decoding unit to receive the first communication protocol transmission signal. The first voltage divider resistor circuit is used to divide the first communication protocol transmission signal to generate a first voltage divider signal and a second voltage divider signal, wherein the first voltage divider signal is smaller than the second voltage divider signal. The first output terminal and the second output terminal of the first voltage divider resistor circuit are used to output the first voltage divider signal and the second voltage divider signal, respectively. A first comparator includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the first comparator is used to receive a first reference voltage; the second input terminal of the first comparator is used to connect to the first output terminal of the first voltage divider circuit to receive the first voltage divider signal; the first comparator is used to compare the magnitude of the first voltage divider signal with the magnitude of the first reference voltage to generate the first logic signal. The second comparator includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the second comparator is used to receive a second reference voltage, which is greater than the first reference voltage; the second input terminal of the second comparator is used to connect to the second output terminal of the first voltage divider circuit to receive the second voltage divider signal; the second comparator is used to compare the second voltage divider signal with the second reference voltage to generate the second logic signal. The outputs of the first comparator and the second comparator are both connected to the output of the decoding unit to output the first logic signal and the second logic signal.

29. The communication protocol conversion module according to claim 21, characterized in that, The return code detection unit includes: A first current sampling resistor includes a first terminal and a second terminal; the first terminal of the first current sampling resistor is used to receive the second voltage signal; the second terminal of the first current sampling resistor is used to connect to the second communication bus to receive the first feedback current signal. The first operational amplifier includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the first operational amplifier is used to connect to the first terminal of the first current sampling resistor; the second input terminal of the first operational amplifier is used to connect to the second terminal of the first current sampling resistor; the output terminal of the first operational amplifier is used to connect to the output terminal of the return code detection unit; the first operational amplifier is used to amplify the voltage difference generated by the first return code current signal on the first current sampling resistor to generate an amplified voltage difference. The first load resistor includes a first terminal and a second terminal; the first terminal of the first load resistor is used to connect to the output terminal of the first operational amplifier and the output terminal of the return code detection unit respectively, so as to output the return code voltage signal according to the amplified voltage difference; the second terminal of the first load resistor is used to connect to the ground voltage signal.

30. The communication protocol conversion module according to claim 21, characterized in that, The return code unit includes: The first voltage divider resistor includes a first terminal and a second terminal; the first terminal of the first voltage divider resistor is used to receive the second control signal. The second voltage divider resistor includes a first terminal and a second terminal; the first terminal of the second voltage divider resistor is used to connect to the second terminal of the first voltage divider resistor; the second terminal of the second voltage divider resistor is used to connect to a ground voltage signal; the second voltage divider resistor is smaller than the first voltage divider resistor. The second operational amplifier includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the second operational amplifier is used to connect to the second terminal of the first voltage divider resistor and the first terminal of the second voltage divider resistor, respectively. The third voltage divider resistor includes a first terminal and a second terminal; the first terminal of the third voltage divider resistor is used to connect to the output terminal of the second operational amplifier. The fourth voltage divider resistor includes a first terminal and a second terminal; the first terminal of the fourth voltage divider resistor is used to connect to the second terminal of the third voltage divider resistor; the second terminal of the fourth voltage divider resistor is used to connect to the ground voltage signal. The fourth NMOS transistor has its control terminal connected to the second terminal of the third voltage divider resistor and the first terminal of the fourth voltage divider resistor, respectively; the first terminal of the fourth NMOS transistor is connected to the second input terminal of the second operational amplifier; and the second terminal of the fourth NMOS transistor is connected to the first communication bus. The first return current resistor includes a first terminal and a second terminal; the first terminal of the first return current resistor is used to connect to the second input terminal of the second operational amplifier and the first terminal of the fourth NMOS transistor, respectively; the second terminal of the first return current resistor is used to connect to the ground voltage signal.

31. The communication protocol conversion module according to claim 21, characterized in that, The central control unit further includes a fourth input terminal; wherein, the communication protocol conversion module further includes: An anomaly detection unit includes an input terminal and an output terminal; the input terminal of the anomaly detection unit is connected to the second communication bus to receive the abnormal current signal pulled by the first type of detection device under the third voltage signal; the anomaly detection unit is used to convert the abnormal current signal into an abnormal voltage signal; the output terminal of the anomaly detection unit is used to connect to the fourth input terminal of the central control unit to input the abnormal voltage signal to the central control unit. The central control unit is also used to generate an abnormal control signal based on the abnormal voltage signal.

32. The communication protocol conversion module according to claim 31, characterized in that, The anomaly detection unit includes: The second current sampling resistor includes a first terminal and a second terminal; the first terminal of the second current sampling resistor is used to receive the third voltage signal; the second terminal of the second current sampling resistor is used to connect to the second communication bus to receive the abnormal current signal. The third operational amplifier includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the third operational amplifier is used to connect to the first terminal of the second current sampling resistor; the second input terminal of the third operational amplifier is used to connect to the second terminal of the second current sampling resistor; the output terminal of the third operational amplifier is used to connect to the output terminal of the anomaly detection unit; the third operational amplifier is used to amplify the voltage difference generated by the abnormal current signal across the second current sampling resistor to generate an amplified voltage difference. The second load resistor includes a first terminal and a second terminal; the first terminal of the second load resistor is used to connect to the output terminal of the third operational amplifier and the output terminal of the abnormal detection unit respectively, so as to output the abnormal voltage signal according to the amplified voltage difference; the second terminal of the second load resistor is used to connect to the ground voltage signal.

33. The communication protocol conversion module according to claim 31, characterized in that, The central control unit further includes a third output terminal for outputting the abnormal control signal; wherein, the communication protocol conversion module further includes: An abnormal return code unit includes an input terminal and an output terminal; the input terminal of the abnormal return code unit is used to connect to the third output terminal of the central control unit to receive the abnormal control signal; the abnormal return code unit is used to generate an abnormal return code current signal when the abnormal control signal is at a first level; the output terminal of the abnormal return code unit is connected to the first communication bus to send the abnormal return code current signal to the controller.

34. The communication protocol conversion module according to claim 33, characterized in that, The abnormal return code unit includes: The fifth voltage divider resistor includes a first terminal and a second terminal; the first terminal of the fifth voltage divider resistor is used to receive the abnormal control signal. The sixth voltage divider resistor includes a first terminal and a second terminal; the first terminal of the sixth voltage divider resistor is used to connect to the second terminal of the fifth voltage divider resistor; the second terminal of the sixth voltage divider resistor is used to connect to a ground voltage signal, and the sixth voltage divider resistor is smaller than the fifth voltage divider resistor. The fourth operational amplifier includes a first input terminal, a second input terminal, and an output terminal; the first input terminal of the fourth operational amplifier is used to connect to the second terminal of the fifth voltage divider resistor and the first terminal of the sixth voltage divider resistor, respectively. The seventh voltage divider resistor includes a first terminal and a second terminal; the first terminal of the seventh voltage divider resistor is used to connect to the output terminal of the fourth operational amplifier. The eighth voltage divider resistor includes a first terminal and a second terminal; the first terminal of the eighth voltage divider resistor is used to connect to the second terminal of the seventh voltage divider resistor; the second terminal of the eighth voltage divider resistor is used to connect to the ground voltage signal. The fifth NMOS transistor has its control terminal connected to the second terminal of the seventh voltage divider resistor and the first terminal of the eighth voltage divider resistor, respectively; the first terminal of the fifth NMOS transistor is connected to the second input terminal of the fourth operational amplifier; and the second terminal of the fifth NMOS transistor is connected to the first communication bus. The second return current resistor includes a first terminal and a second terminal; the first terminal of the second return current resistor is used to connect to the second input terminal of the fourth operational amplifier and the first terminal of the fifth NMOS transistor, respectively; the second terminal of the second return current resistor is used to connect to the ground voltage signal.

35. The communication protocol conversion module according to claim 21, characterized in that, Also includes: A power conversion unit includes an input terminal, a first output terminal, and a second output terminal; the input terminal of the power conversion unit is used to connect to the first communication bus to receive the first communication protocol transmission signal, wherein the first communication protocol transmission signal includes a third voltage signal; the power conversion unit is used to convert the third voltage signal into a second voltage signal and the first voltage signal. The first input terminal of the central control unit is connected to the second output terminal of the power conversion unit to receive the first voltage signal; the first input terminal of the code generation unit is connected to the first output terminal of the power conversion unit to receive the second voltage signal.

36. The communication protocol conversion module according to claim 35, characterized in that, The power conversion unit includes: The first diode includes a positive terminal and a negative terminal; the positive terminal of the first diode is used to connect to the input terminal of the power conversion unit to connect to the first communication bus and receive the first communication protocol code transmission signal. A first capacitor includes a first terminal and a second terminal; the first terminal of the first capacitor is used to connect to the negative terminal of the first diode to store the third voltage signal in the first communication protocol transmission signal; the second terminal of the first capacitor is used to connect to a ground voltage signal. A first power conversion chip includes an input terminal and an output terminal; the input terminal of the first power conversion chip is used to connect to the negative terminal of the first diode and the first terminal of the first capacitor respectively to receive the third voltage signal; the first power conversion chip is used to convert the third voltage signal into a second voltage signal; the output terminal of the first power conversion chip is used to connect to the first output terminal of the power conversion unit to output the second voltage signal. The second power conversion chip includes an input terminal and an output terminal; the input terminal of the second power conversion chip is used to connect to the output terminal of the first power conversion chip to receive the second voltage signal; the second power conversion chip is used to convert the second voltage signal into the first voltage signal; the output terminal of the second power conversion chip is used to connect to the second output terminal of the power conversion unit to output the first voltage signal.

37. A fire alarm system, characterized in that, Used to implement the communication protocol conversion method as described in any one of claims 1 to 20.

38. A fire alarm system, characterized in that, include: A controller employing a first communication protocol, the controller being used to connect to a first communication bus; The communication protocol conversion module as described in any one of claims 21 to 36; The communication protocol conversion module is used to connect to the first communication bus and the second communication bus respectively. A first type of detection device that is connected to the second communication bus and uses the second communication protocol.

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