A signal integrity dynamic testing method and system

Abstract

The embodiment of the application provides a kind of signal integrity dynamic test method and system, it is related to high-speed digital system technical field.The method is by the circuit design file of target system to execute topological modeling, generates dynamic test priority list, and executes signal integrity test, to obtain test data, then according to test data, update cognitive map, and according to the updated cognitive map, the comprehensive priority score of the path not measured in dynamic test priority list is calculated, to generate diagnostic report, the method can be based on the real-time feedback closed loop architecture of test, analysis, learning, decision, the result of each test is all converted into new cognition to link state, and dynamically select the next test most information value or most likely to find problem, realize the rapid positioning of problem and the optimization of test efficiency, improve signal integrity test efficiency.

Description

Technical Field

[0001] This application relates to the field of high-speed digital system technology, and in particular to a method and system for dynamic testing of signal integrity. Background Technology

[0002] Signal integrity (SI) testing is the process of measuring and evaluating the transmission quality of signals in high-speed digital systems. Signal integrity testing is a critical step in ensuring system stability. Due to the complex topologies of onboard low-speed control buses in high-speed digital systems such as servers and communication equipment—e.g., Inter-Integrated Circuit (I2C) buses and Serial Peripheral Interface (SPI) buses containing multiple levels of switches, level shifters, and connecting numerous slave devices—signal integrity testing requires testing all signal paths. This results in low efficiency, high cost, and limitations imposed by time and resources.

[0003] To improve the efficiency of signal integrity testing, test path selection can be optimized. Optimizing test path selection aims to cover the most potential defects with the fewest tests. For example, relying on a static test order list generated before testing, a simple traversal strategy can be used to perform undifferentiated and complete testing on all possible communication paths in the static test order list according to topology or address order.

[0004] However, the aforementioned signal integrity testing methods are inefficient, wasting a significant amount of time on obviously healthy paths, making them unsuitable for large-scale, fast-paced production testing. Furthermore, because the test sequence is statically predetermined, this method cannot dynamically adjust based on real-time feedback during the testing process, further reducing testing efficiency and learning capabilities. Summary of the Invention

[0005] In view of this, embodiments of this application provide a dynamic signal integrity testing method and system to solve the problem of low efficiency in signal integrity testing.

[0006] According to a first aspect of this application, a dynamic signal integrity testing method is provided, the method comprising: A dynamic test priority list is generated by performing topology modeling on the circuit design file of the target system; the dynamic test priority list includes test paths and untested paths. Based on the dynamic test priority list, signal integrity testing is performed on the test path to obtain test data, which includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity testing of the test path. The test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. The cognitive map is updated based on the test data. The cognitive map is a dynamic graph model of topological fault association constructed based on the topological modeling results of the circuit design file. The cognitive map is used to represent the knowledge state. The cognitive map includes multiple nodes, and each node is set with a fault belief value that is updated in real time based on the test data. Based on the updated cognitive map, calculate the comprehensive priority score of the untested paths in the dynamic test priority list; Based on the comprehensive priority score, continuous iterative testing is performed on the untested path to generate a diagnostic report.

[0007] As can be seen, the dynamic signal integrity testing method described in the above embodiments can generate a dynamic test priority list by performing topology modeling on the circuit design file of the target system, and then perform signal integrity testing on the test paths based on the dynamic test priority list to obtain test data. The cognitive map is then updated based on the test data, and the comprehensive priority score of the untested paths in the dynamic test priority list is calculated according to the updated cognitive map. Continuous iterative testing is then performed on the untested paths based on the comprehensive priority score to generate a diagnostic report. This method can be based on a real-time feedback closed-loop architecture of testing, analysis, learning, and decision-making, transforming the result of each test into a new understanding of the link status, and dynamically selecting the next test based on this understanding, which is most informative or most likely to discover problems. This achieves rapid problem localization and extreme optimization of testing efficiency, thereby improving signal integrity testing efficiency.

[0008] In some embodiments, a dynamic test priority list is generated by performing topology modeling on the circuit design file of the target system, including: Obtain the circuit design files; The topology of the control mainline is constructed by parsing the circuit design file. The topology includes a set of physical connection paths between the master device and the slave device. Layout and routing data are extracted based on the topology; The similarity between any two test paths in the layout and routing data is evaluated in terms of preset physical parameters to generate a physical similarity matrix; the preset physical parameters include at least one of trace length, spacing, and number of vias; the physical similarity matrix includes the similarity between any two connection paths; Using heuristic rules, a dynamic test priority list is generated based on the physical similarity matrix, and the test paths in the dynamic test priority list are arranged in descending order of path length.

[0009] As can be seen, the signal integrity dynamic testing method described in the above embodiments can complete topology modeling and dynamic test priority list initialization before the test starts. The dynamic test priority list can be continuously updated according to real-time feedback during the test, ensuring that test resources prioritize the coverage of paths with complex structures, concentrated risks, or large impact ranges, thereby achieving a dual improvement in test efficiency and defect coverage.

[0010] In some embodiments, signal integrity testing is performed on the test path based on the dynamic test priority list to obtain test data, including: Acquire waveform data, which is a waveform signal collected during the signal integrity test performed on the test path; The signal characteristic parameters of the waveform data are measured, and the signal characteristic parameters include at least one of rise time, fall time, overshoot amplitude, and monotonicity. The test rules are extracted from the fault mode library, and the test rules include the decision thresholds for various types of faults; The test conclusion is generated by comparing the signal feature parameters with the test rules; the test conclusion includes the fault existence result and the fault type, which are determined based on the numerical relationship and difference between the signal feature parameters and the decision threshold.

[0011] As can be seen, the signal integrity dynamic testing method described in the above embodiments can perform signal integrity testing and collect waveform data during the testing process. It can then compare the signal characteristic parameters in the waveform data with the rules in the predefined fault mode library to output a clear, machine-readable test conclusion, providing a reliable basis for subsequent fault location and decision-making.

[0012] In some embodiments, updating the cognitive map based on the test data includes: Prior knowledge is constructed based on the topology modeling results of the circuit design file, and the prior knowledge includes the topology and layout information of the target system. Obtain calculation parameters, including learning rate, propagation decay factor, and impact factor; the impact factor is determined according to the propagation update method. The test conclusions from the test data are fused with the prior knowledge, and the cognitive map is updated in conjunction with the calculation parameters.

[0013] As can be seen, the signal integrity dynamic testing method described in the above embodiments can construct prior knowledge based on the topology modeling results of the circuit design file, and update the node fault belief value in the cognitive map by combining calculation parameters such as learning rate, propagation attenuation factor and influence factor. That is, based on the real-time update mechanism, it can realize continuous knowledge learning, discover suspected root causes, confirm faults and high-risk suspicions, and realize intelligent core data structure and knowledge representation.

[0014] In some embodiments, fusing test conclusions from the test data with the prior knowledge and updating the cognitive map in conjunction with the calculation parameters includes: The test path is updated based on the initial belief values ​​of the nodes in the test path and the learning rate to update the fault belief values ​​of the nodes in the test path. Based on the prior knowledge, a propagable path is determined, which includes the upstream path of the test path and similar paths of the test path; the upstream path is the path between the main device and the upstream converter of the test path; the similar path is an untested path whose similarity to the test path is greater than or equal to a preset similarity threshold. Obtain the propagation update method corresponding to the propagable path, and set the influence factor according to the propagation update method; wherein, for the upstream path, the propagation update method is causal propagation, and the influence factor is set to 1; for the similar path, the propagation update method is common cause propagation, and the influence factor is set to similarity. The fault belief values ​​of the nodes in the propagable path are updated based on the initial belief values ​​of the nodes in the propagable path, the learning rate, the propagation decay factor, and the influence factor.

[0015] As can be seen, the signal integrity dynamic testing method described in the above embodiments can integrate test results with prior knowledge, dynamically update the fault belief value of each node in the cognitive map, thereby simulating the fault location thinking of engineers, ensuring that the cognitive map can reflect the state of the target system in real time, and guiding fault location and risk prediction.

[0016] In some embodiments, the method further includes: Iterate through the circuit elements in the circuit design file, including device elements and network elements; The nodes of the cognitive map are defined according to the circuit elements, and the nodes include element nodes defined according to the device elements and network nodes defined according to the network elements; Set the initial belief value of the node; The cognitive map is defined based on the connection relationships between the nodes, and the nodes and edges of the cognitive map are instantiated into a dynamic graph model to generate the cognitive map.

[0017] As can be seen, the signal integrity dynamic testing method described in the above embodiments can generate a cognitive map by traversing the circuit components in the circuit design file, defining the nodes and edges of the cognitive map, and then instantiating it into a dynamic graph object. The cognitive map can serve as the core module for implementing learning and reasoning, maintaining a topological fault association graph to enable dynamic updates of fault belief values.

[0018] In some embodiments, the comprehensive priority score of untested paths in the dynamic test priority list is calculated according to the updated cognitive map, including: Based on the fault belief values ​​in the updated cognitive map, a utilization component is calculated, which is positively correlated with the fault belief values. Calculate the uncertainty parameter of the fault belief value, and set the exploration component based on the uncertainty parameter; A dynamic adjustment weight is obtained, which includes a utilization weight and an exploration weight; the utilization weight is used to perform a weighted calculation on the utilization component; the exploration weight is used to perform a weighted calculation on the exploration component; Based on the dynamically adjusted weights, a weighted summation calculation is performed on the utilization component and the exploration component to obtain the comprehensive priority score.

[0019] As can be seen, the signal integrity dynamic testing method described in the above embodiments can scientifically balance the exploration component and the utilization component based on the real-time status of the cognitive map, select the optimal test path for each step of the test, achieve extensive screening, and thus efficiently balance fault location and new knowledge discovery, and execute dynamic multi-objective decision-making.

[0020] In some embodiments, continuous iterative testing is performed on the untested paths in the dynamic test priority list based on the comprehensive priority score to generate a diagnostic report, including: Record test progress data during the iterative testing process. The test progress data includes at least one of the following: the number of paths tested, the current fault belief value of the cognitive map, the number of faults in the test conclusion, and the test time. Obtain preset termination conditions, which include the maximum number of paths corresponding to the number of paths, the preset safety threshold corresponding to the current fault belief value, the predefined quantity tolerance corresponding to the number of faults, and the budgeted test time threshold corresponding to the test time. The diagnostic report is generated when the test progress data meets at least one of the termination conditions.

[0021] As can be seen, the signal integrity dynamic testing method described in the above embodiments can complete the signal integrity test of the entire target system through a continuous iterative testing process, and generate a detailed diagnostic report when the test progress data meets any termination condition. The generated diagnostic report can contain in-depth knowledge and can replace engineers in data analysis and problem troubleshooting, further improving the efficiency of signal integrity testing.

[0022] In some embodiments, the diagnostic report includes the fault location, the root cause of the fault location, and the extent of its impact; generating the diagnostic report includes: Iterate through the fault types corresponding to the test path; The fault point is determined according to the fault type; Read the analytical belief value of the fault point during multiple rounds of signal integrity testing, the analytical belief value including the fault belief value of the test path and / or the fault belief value of the propagable path of the test path; Calculate the trend of the analyzed belief value during multiple rounds of signal integrity testing; Root cause inference is performed based on the changing trend and the fault type to generate the root cause of the fault and the scope of its impact.

[0023] As can be seen, the signal integrity dynamic testing method described in the above embodiments can automatically infer the root cause and scope of the fault through the belief propagation mechanism of cognitive maps when generating diagnostic reports. This ensures that the diagnostic report not only includes all identified fault points, but also, by combining the analysis of cognitive maps, infers the most likely root cause and its scope of influence, providing engineers with clear and practical debugging reference information to ensure rapid problem location and resolution.

[0024] According to a second aspect of this application, a dynamic signal integrity testing system is provided, the system comprising: The topology modeling module is used to perform topology modeling on the circuit design file of the target system and generate a dynamic test priority list; the dynamic test priority list includes test paths and untested paths. The testing module is used to perform signal integrity testing on the test path based on the dynamic test priority list to obtain test data, which includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity test of the test path. The test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. An update module is used to update the cognitive map based on the test data. The cognitive map is a dynamic graph model of topological fault association constructed based on the topological modeling results of the circuit design file. The cognitive map is used to represent the knowledge state. The cognitive map includes multiple nodes, and each node is set with a fault belief value that is updated in real time based on the test data. The dynamic decision-making module is used to calculate the comprehensive priority score of the untested paths in the dynamic test priority list according to the updated cognitive map. The results output module is used to perform continuous iterative testing on the untested path based on the comprehensive priority score to generate a diagnostic report.

[0025] As can be seen, the signal integrity dynamic testing system described in the above embodiments can perform topology modeling on the circuit design file of the target system through the topology modeling module to generate a dynamic test priority list. Then, the testing module performs signal integrity tests on the test paths based on the dynamic test priority list to obtain test data. Next, the update module updates the cognitive map based on the test data, and the dynamic decision-making module calculates the comprehensive priority score of the untested paths in the dynamic test priority list according to the updated cognitive map. This allows the result output module to perform continuous iterative testing on the untested paths based on the comprehensive priority score to generate a diagnostic report. The system can achieve dynamic adaptive signal integrity testing. Through a real-time feedback closed-loop strategy of testing, analysis, learning, and decision-making, the result of each test is transformed into a new understanding of the link status. Based on this understanding, the system dynamically selects the next test that is most informative or most likely to discover problems, thereby achieving rapid problem localization and optimized testing efficiency.

[0026] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0027] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments of this application and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram of the dynamic signal integrity testing method provided in the embodiments of this application; Figure 2 This application provides an overall architecture diagram for dynamic signal integrity testing in embodiments of the present application. Figure 3 This is a schematic diagram of the iterative testing process provided in the embodiments of this application; Figure 4 This is a schematic diagram of the process for generating a diagnostic report provided in an embodiment of this application; Figure 5 This is a schematic diagram of the signal integrity dynamic testing system provided in an embodiment of this application; Figure 6 This is a schematic diagram of the data processing flow of the test system provided in an embodiment of this application. Detailed Implementation

[0028] The present application will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the embodiments of the present application can be combined with each other.

[0029] In this embodiment, signal integrity testing refers to the process of measuring and evaluating the transmission quality of signals in a high-speed digital system. As a crucial step in ensuring system stability, the number of paths tested during signal integrity testing is influenced by the complex topology of the system.

[0030] For example, the onboard low-speed control bus of high-speed digital systems such as servers and communication equipment has a complex topology, including network components such as integrated circuit bus (I2C) and serial peripheral interface (SPI), as well as device components such as multi-level switch chips and level converters. These device components also connect to a large number of slave devices. Therefore, when performing signal integrity testing, it is necessary to test all signal paths, which makes the signal integrity testing inefficient, costly, and subject to time and resource constraints.

[0031] To improve the efficiency of signal integrity testing, signal paths can be selected to determine the priority of testing. For example, during signal integrity testing, test engineers can rely on their experience and analysis of circuit schematics to manually preset test paths and their test order. Signal integrity tests are then performed sequentially along these preset paths. During testing, waveform data from the test paths can be monitored and analyzed to obtain the test results.

[0032] However, this signal integrity testing method is highly dependent on the engineer's technical skill level, lacks consistency and scientific rigor, and is prone to omissions or inefficiencies due to insufficient experience. Therefore, in some embodiments, a simple traversal strategy can be used to perform undifferentiated and complete testing on all possible communication paths according to the topology or address order.

[0033] While the simple traversal method can guarantee the coverage of the test scope, it is extremely inefficient and wastes a lot of time on healthy paths. Therefore, the simple traversal method cannot meet the needs of large-scale, fast-paced production testing.

[0034] To improve testing efficiency, some embodiments can perform pre-computation optimization based on static optimization sorting before testing. The pre-computation optimization method can be based on signal integrity testing using tree modeling and static optimization sorting. During testing, the I2C link under test can be abstracted into a tree topology model. The master device is the root node, and slave devices or switch chips at branch points are child nodes or intermediate nodes. Each unique path from the root to a leaf node represents a physical signal path that needs to be tested.

[0035] Before testing, static optimization is performed, employing an offline, rule-based algorithm to sort all these paths. This path sorting process considers factors such as coverage-awareness and diversity-awareness, prioritizing paths that cover more untested branches, segments, and other network elements to achieve maximum structural coverage with the fewest tests. Furthermore, diversity-awareness prioritizes paths with significant differences in physical characteristics such as path length, number of switching devices, and device type, thus more quickly exposing different types of potential signal integrity issues.

[0036] Through the static optimization described above, a static, fixed test order list can be generated, i.e., a static sequence list. The static sequence list remains unchanged after the test begins; the test system simply needs to execute the test items in the list sequentially.

[0037] While the aforementioned static optimization methods can reduce the blindness of testing and improve efficiency to some extent through pre-computation, they are essentially still an open-loop strategy, lacking real-time feedback and adaptability in the testing process. Because the decision-making process and test execution process are separate in static optimization methods, the most crucial real-time information—the test results themselves—is not incorporated into the decision-making process. This makes it difficult for static optimization methods to achieve intelligent diagnosis, and the test order is statically determined in advance, unable to be dynamically adjusted based on actual test results. For example, if the first few paths pass (PASS), it cannot intelligently infer that similar subsequent paths are also highly likely to pass, thus skipping these tests to save time; conversely, if a path discovers a serious fault such as crosstalk (FAIL), it cannot proactively prioritize testing its adjacent, most likely affected paths to quickly locate the root cause of the problem.

[0038] Furthermore, static optimization methods have weak diagnostic capabilities and struggle to pinpoint root causes. Static optimization methods focus on detecting whether a problem has occurred, rather than diagnosing where the root cause lies. Because static optimization methods lack a cognitive model that continuously learns and updates fault beliefs, they fail to deeply integrate and reason with topology information and test results. Therefore, static optimization methods can only report single-path failures (FAIL) and cannot automatically establish a correlation between fault modes and topology, making it difficult to quickly locate the common root cause leading to a series of problems.

[0039] Static optimization methods are also prone to causing an imbalance between exploration and exploitation. In optimization theory, exploration refers to trying new, highly uncertain options, such as testing unknown paths. Exploitation refers to obtaining the maximum benefit from currently known information, such as further testing a discovered problem area. However, the decision-making strategy of static optimization lists is unidirectional and rigid. It does not model the testing process as a sequential decision problem, and therefore cannot make the optimal next decision based on the current understanding of the system state, i.e., it cannot intelligently weigh these two aspects.

[0040] To address the issue of low efficiency in signal integrity testing, some embodiments of this application provide a dynamic signal integrity testing method. This method enables dynamically adaptive signal integrity testing by introducing a real-time feedback closed-loop approach of "test-analysis-learning-decision," transforming the results of each test into new insights into the link status. Based on this insight, the method dynamically selects the next test that is most informative or most likely to uncover problems, thereby achieving rapid problem localization and optimized testing efficiency.

[0041] The method can be applied to a signal integrity testing system or an electronic device connected to the testing system and possessing data processing capabilities. The electronic device includes, but is not limited to, computers, servers, mobile terminals, smart wearable devices, and industrial control computers. For ease of description, the testing system is used as the execution subject in this embodiment. It should be understood that the method can also be applied to other types of execution subjects, which are not illustrated in this embodiment. Figure 2 As shown, the method includes: S101. Generate a dynamic test priority list by performing topology modeling on the circuit design file of the target system.

[0042] When performing signal integrity testing, system initialization and dynamic test priority list generation can be performed first. This involves obtaining the target system's circuit design file, performing topology modeling on the file, and generating a dynamic test priority list. This dynamic test priority list includes multiple signal paths, which are used as test paths and untested paths in different testing processes.

[0043] like Figure 2 As shown, the system initialization process provides necessary prior knowledge and initial states for dynamic testing, thereby generating a dynamic test priority list that can be scheduled in real time. The Dynamic Test Priority List (DTPL) is an ordered list of paths to be tested that can be updated in real time. The order of the paths in the DTPL is not pre-defined statically, but is calculated and continuously updated by the dynamic decision engine based on the latest cognitive map state. It serves as the core carrier and execution object of the signal integrity test sequence.

[0044] To generate a dynamic test priority list, in some embodiments, topology modeling is performed on the circuit design file of the target system. When generating the dynamic test priority list, the circuit design file can be obtained first, and the topology of the control mainline can be constructed by parsing the circuit design file. This topology includes a set of physical connection paths between master and slave devices.

[0045] For example, before starting the test, topology tree modeling and DTPL initialization need to be completed. The test system can then automatically parse printed circuit board (PCB) design files and other circuit design files to construct a complete topology of control buses such as I2C, thereby clarifying the set of physical connection paths between all master and slave devices.

[0046] Then, based on the topology, layout and routing data are extracted, and the similarity between any two test paths in the layout and routing data in terms of preset physical parameters is evaluated to generate a physical similarity matrix. The preset physical parameters include at least one of trace length, spacing, and number of vias; the physical similarity matrix includes the similarity between any two connection paths.

[0047] For example, based on the complete topology, layout and routing data can be extracted, and the similarity between any two paths in terms of trace length, spacing, number of vias, etc., can be comprehensively evaluated to generate a physical similarity matrix, which is used to characterize the similarity between any two paths. Obviously, the higher the similarity, the more similar the two paths are in terms of topology and physical parameters, and the more likely they are to have the same type of failure.

[0048] After generating the physical similarity matrix, a dynamic test priority list is generated based on heuristic rules. The heuristic rules refer to sorting strategies that are based on a single information dimension, have low computational complexity and low data volume, and are easy to implement. For example, based on heuristic rules, test paths in the dynamic test priority list can be arranged in descending order of path length. That is, the testing system uses a simple heuristic rule, such as sorting by path length in descending order, to generate an initial dynamic test priority list (DTPL). The dynamic test priority list is continuously updated during testing based on real-time feedback, thereby ensuring that test resources prioritize coverage of paths with complex structures, concentrated risks, or large impact ranges, achieving a dual improvement in testing efficiency and defect coverage.

[0049] Heuristic rules can also include sorting strategies based on the topological complexity of test paths, sorting strategies based on historical information of test paths, sorting strategies based on the degree of influence of test path dependencies, random sorting strategies, and round-robin sorting strategies. Different sorting strategies corresponding to heuristic rules can also be combined to form a comprehensive sorting strategy to sort the test paths in the initial dynamic test priority list.

[0050] Using heuristic rules, a dynamic test priority list is generated based on the physical similarity matrix. A test path sequence can be initially formed in the dynamic test priority list, so that the test system can determine the path to perform the signal integrity test first according to the initially formed path sequence, which can serve as the initial state and basis for subsequent dynamic analysis, learning and decision-making.

[0051] For example, if the target system is an I2C link, the topology can be obtained by analyzing the PCB design file corresponding to the I2C link. Specifically, the output of the I2C master chip in the I2C link includes a series matching resistor R1, whose theoretical correct resistance is 33Ω. This is then connected to a switch chip via a transmission line. After the switch, two paths branch out: Path_A to Slave1 and Path_B to Slave2.

[0052] When the series matching resistor R1 in the Bill of Materials (BOM) is incorrectly set to 0Ω due to a design flaw, it can lead to severe source-end impedance mismatch, causing signal reflection and overshoot at the switch's input port. This signal overshoot occurs on the upstream common path, thus affecting the waveforms of all signals output from the switch (Path_A and Path_B).

[0053] During the system initialization phase, topology modeling can be performed on the input PCB design file. This involves parsing the PCB file to identify two paths to be tested: Path_A(Master-Switch-Slave1); Path_B(Master-Switch-Slave2); Physical similarity can then be calculated through layout analysis. Assuming Path_A and Path_B have similar load and length, the similarity matrix can be obtained as S(A, B) = 0.8. Therefore, an initial list can be generated, i.e., the Dynamic Test Priority List (DTPL) is initialized to [Path_A, Path_B], and thus the output can be a Dynamic Test Priority List with the content DTPL=[Path_A, Path_B].

[0054] S102. Perform signal integrity testing on the test path based on the dynamic test priority list to obtain test data.

[0055] After generating a dynamic test priority list, signal integrity testing can be performed based on this list. Specifically, the current test path is first determined according to the dynamic test priority list, and then signal integrity testing is executed on that path to obtain test data.

[0056] The test data includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity test of the test path; the test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. During the signal integrity test, waveform monitoring equipment such as an oscilloscope can be used to monitor the waveform of the test path, obtain waveform data, and extract signal characteristic parameters by analyzing the waveform data.

[0057] To obtain test data, in some embodiments, during signal integrity testing of the test path based on a dynamic test priority list, waveform data can be acquired first. This waveform data consists of waveform signals collected during the signal integrity testing of the test path. The waveform data is then measured, specifically, the signal characteristic parameters of the waveform data are measured. These signal characteristic parameters include at least one of rise time, fall time, overshoot amplitude, and monotonicity.

[0058] Then, test rules are extracted from the fault mode library, and test conclusions are generated by comparing the signal characteristic parameters with the test rules. The test rules include decision thresholds for various fault types; the test conclusions include the fault existence result and the fault type, which are determined based on the numerical relationship and difference between the signal characteristic parameters and the decision thresholds.

[0059] For example, the testing system can measure the acquired waveform data through signal quality evaluation to automatically measure a series of predefined signal characteristic parameters, including but not limited to: rise time, fall time, overshoot amplitude, monotonicity, etc. Furthermore, it records the actual test results and compares the extracted signal characteristic parameters with test rules in a predefined fault mode library.

[0060] Because each test rule in the fault rule base defines a judgment threshold for various types of faults, for example, if the overshoot amplitude in the signal characteristic parameters exceeds the judgment threshold of 3.6V in the test rule, an overshoot fault can be determined, generating a test conclusion of "FAIL: [OverShoot]". Therefore, by comparing the signal characteristic parameters with the test rules, a clear, machine-readable test conclusion can be output, such as "PASS" for test pass or "FAIL" for test fail. Furthermore, for test conclusions of test failure, the specific fault type can be marked, providing a reliable basis for subsequent fault location and decision-making, such as "FAIL: [Specific Type]".

[0061] For example, in a dynamic test closed-loop process, test execution and signal quality assessment can be performed first, i.e., the test system automatically tests the first path Path_A in the DTPL. Based on the raw waveform data of Path_A acquired from the oscilloscope, and according to the measurement algorithm, the waveform is automatically measured and the overshoot amplitude is found to be 4.2V. Then, it is compared with the overshoot test rules in the rule base. For example, if the overshoot test rule is set to determine the existence of an overshoot fault (FAIL_OverShoot) when the overshoot amplitude exceeds 3.6V, the test result with the content "FAIL: [OverShoot]" can be output.

[0062] S103. Update the cognitive map based on the test data.

[0063] After obtaining test data through signal integrity testing, the cognitive map can be updated based on the test data. The cognitive map is a dynamic graph model of topological fault associations constructed based on the topological modeling results of the circuit design file. As a dynamic graph model maintained internally by the system to represent knowledge states, the cognitive map not only represents the structural points of the target system in terms of physical topology, but also adds dynamically updated fault belief values ​​to each node and path based on the physical topology. Therefore, the cognitive map can be used to represent knowledge states and can serve as the core of the system's learning and reasoning, realizing the core data structure and knowledge representation for intelligence.

[0064] To meet testing requirements, in some embodiments, a cognitive map needs to be constructed based on the target system before updating the cognitive map. When constructing the cognitive map, the circuit elements in the circuit design file can be traversed first. Then, nodes of the cognitive map are defined according to the circuit elements, where the circuit elements include device elements and network elements. Correspondingly, the nodes include element nodes defined based on device elements and network nodes defined based on network elements.

[0065] Then, by setting initial belief values ​​for nodes, dynamically adjustable fault belief values ​​are formed. A fault belief value is a quantified numerical value associated with each node or path in the cognitive map, such as a value ranging from [0, 1]. Fault belief values ​​can represent the credibility or probability that the system currently believes a node or path has a specific fault, and can serve as the object of belief propagation and the basis for the decision engine's calculations. After setting the initial belief values ​​for nodes, the edges of the cognitive map can be defined based on the connections between nodes, and the nodes and edges of the cognitive map can be instantiated into a dynamic graph model to generate the cognitive map.

[0066] For example, the purpose of constructing a cognitive map is to abstract PCB design files into a heterogeneous graph containing multiple types of nodes and edges, thereby preserving all the topological information of the circuit and setting dynamically updatable fault belief values ​​for nodes.

[0067] Therefore, when constructing a cognitive map, one can first traverse the circuit components in the circuit design file, that is, determine the device components (Components / Cells) and network components (Nets) of the target system. Then, through node definition, device components and network components are defined as two different types of nodes. Next, the connection relationships between circuit components are determined, and edges are defined; that is, if two device components are connected through the same network component, a connection relationship can be established, and this connection relationship is represented by edges in the cognitive map. It should be noted that a membership relationship can also be established between a component node and its corresponding network node, and this membership relationship is also represented by edges in the cognitive map.

[0068] Next, feature assignment is performed, setting the physical attributes of component nodes, such as their specific coordinates (X, Y) on the PCB board, package size, and rotation angle. Attributes such as pin count and bounding box are also set for network nodes. Then, an initial belief value is set for each node, such as 0.5, to form nodes containing fault belief values. Finally, the cognitive map is generated by instantiating the nodes and edges of the cognitive map into a dynamic graph model. This can be done using Python's NetworkX or PyTorch Geometric deep learning libraries to instantiate the above parsing results into graph objects.

[0069] As can be seen, by traversing the circuit components in the circuit design file, defining the nodes and edges of the cognitive map, and then instantiating it into a dynamic graph object, the cognitive map is generated. The cognitive map can serve as the core module for implementing learning and reasoning, maintaining a topological fault association graph to enable dynamic updates of fault belief values.

[0070] Since a cognitive map can include multiple nodes, and each node is set with a fault belief value that is updated in real time based on test data, updating the cognitive map is essentially updating the fault belief value corresponding to each node in the cognitive map. Therefore, in some embodiments, when updating the cognitive map based on test data, prior knowledge can be constructed first based on the topology modeling results of the circuit design file. This prior knowledge includes the topology and layout information of the target system.

[0071] Next, calculation parameters are obtained, including the learning rate, propagation decay factor, and influence factor, with the influence factor determined according to the propagation update method. Then, the test conclusions from the test data are fused with prior knowledge, and the cognitive map is updated based on the calculation parameters.

[0072] The topology modeling results based on the circuit design file can construct prior knowledge. Then, combined with calculation parameters such as learning rate, propagation attenuation factor and influence factor, the node fault belief value in the cognitive map is updated. That is, based on the real-time update mechanism, continuous knowledge learning is realized, suspected root causes are discovered, faults are confirmed and high-risk suspects are identified, and the core data structure and knowledge representation of intelligence are realized.

[0073] In some embodiments, in order to update the cognitive map, when performing the fusion of test conclusions from test data with prior knowledge and combining computational parameters to update the cognitive map, the test path can be updated based on the initial belief values ​​and learning rates of the nodes in the test path to update the fault belief values ​​of the nodes in the test path.

[0074] For example, when the test path Test results Upon returning, the test results can be used as a basis. Trigger the belief propagation update algorithm. That is, in the test results... When an overshoot fails, the test path needs to be modified. Perform a self-update, i.e., test path One's own "overshoot" belief value will be significantly increased.

[0075] Then, based on prior knowledge, a propagable path is determined, which includes the upstream path of the test path and similar paths of the test path. The upstream path is the path between the master device and the upstream converter of the test path; the similar path is an untested path whose similarity to the test path is greater than or equal to a preset similarity threshold.

[0076] For example, after updating itself, it can propagate backward along the topology tree to the master device via causal propagation, increasing the "overshoot" belief values ​​of upstream paths and nodes to locate potential root causes, while slightly increasing the belief values ​​of downstream paths to predict risks. Then, through common-cause propagation, based on the physical similarity matrix S, it identifies similar paths with layouts similar to the trial path P_i, and increases the "overshoot" belief values ​​of similar paths based on similarity, thereby predicting similar problems.

[0077] Then, the propagation update method corresponding to the propagable path is obtained, and the influence factor is set according to the propagation update method. Specifically, for the upstream path, the propagation update method is causal propagation, and the influence factor is set to 1; for similar paths, the propagation update method is common-cause propagation, and the influence factor is set to similarity. Then, the fault belief value of the nodes in the propagable path is updated according to the initial belief value, learning rate, propagation decay factor, and influence factor of the nodes in the propagable path.

[0078] For example, when updating the cognitive map, the test system can perform multiple learning iterations. The first learning iteration uses the FAIL_OverShoot result, initial belief value (0.5), topological structure, and similarity (S=0.8) as input. The learning rate is then adjusted accordingly. α =0.7, propagation attenuation factor β =0.6, and propagation calculations are performed in conjunction with the belief update formula.

[0079] Therefore, for the self-update process of the test path, the belief update formula is: F N = F O +(1- F O )× α ; in, F N This represents the new value of the fault belief value; F OThis represents the old value of the fault belief value; α This represents the learning rate.

[0080] For the propagation update process of the propagation path corresponding to the test path, the belief update formula is: F N = F O +(1- F O )× α × β × Influence ; in, F N This represents the new value of the fault belief value; F O This represents the old value of the fault belief value; α Indicates the learning rate; β Indicates the propagation attenuation factor; Influence Indicating influencing factors, in the process of causal propagation, Influence =1, in the process of common cause propagation Influence =S; S represents similarity.

[0081] Accordingly, updating the cognitive map based on test data can be divided into three stages: initialization, self-update, and propagation update. In the initialization stage, all nodes representing physical devices or line segments in the cognitive map are assigned a neutral initial belief value. This initial value can be set to 0.5, representing the system's "ignorance" or "maximum uncertainty" state regarding node malfunctions without any test evidence.

[0082] During the self-update phase, when a test result for a path (Path_A) is returned, the test system first updates the fault belief value for that path itself. The update process of the fault belief value follows a learning rule: new belief value = old belief value + (1 - old belief value) × α .in, α This is the learning rate. When the test result is FAIL, the belief value of Path_A will significantly increase towards 1 (high failure probability). When the test result is PASS, the test system can also use a symmetrical update rule, such as new belief value = old belief value × (1 - ... α This causes the belief value to decay towards 0 (low failure probability). The first critical change in the failure belief value is directly driven by the test results of the path itself.

[0083] During the propagation and update phase, the test results of a single path not only affect itself, but the test system also uses a belief propagation algorithm to intelligently generalize the fault belief value to other related nodes and paths. This includes two propagation methods: causal propagation and common-cause propagation.

[0084] Causal propagation refers to propagation along the topology. For example, since upstream nodes are potential root causes of downstream failures, if the downstream Path_A test fails, the failure belief value of its upstream node (such as Master->Switch) will be increased accordingly based on the propagation decay factor β. Causal propagation is bidirectional; forward propagation can predict downstream risks, while backward propagation can predict upstream risks.

[0085] Common cause propagation represents propagation along physical layout similarity. Since similar physical layouts are likely to have the same design or manufacturing defects, if the Path_A test fails, the testing system will find a Path_B with a similar layout based on the physical similarity matrix S, and increase the belief value of Path_B according to the similarity ratio.

[0086] Therefore, when updating the fault belief value, the fault belief value for the self-update process (Path_A) is 0.5 + (1 - 0.5) × 0.7 = 0.85. The fault belief value for causal backpropagation (to the upstream Master->Switch process) is 0.5 + (1 - 0.5) × 0.7 × 0.6 × 1 = 0.71. The fault belief value for common cause propagation (to the similar path Path_B) is 0.5 + (1 - 0.5) × 0.7 × 0.6 × 0.8 = 0.668.

[0087] By updating the fault belief value, an updated cognitive map can be obtained, which includes "Master-Switch": 0.71, indicating the suspected root cause; "Switch-Path_A": 0.85, indicating a confirmed fault; and "Switch-Path_B": 0.668, indicating a high-risk suspicion.

[0088] It is evident that by integrating test results with prior knowledge, the fault belief value of each node in the cognitive map can be dynamically updated, thereby simulating the fault location thinking of engineers, ensuring that the cognitive map can reflect the state of the target system in real time, and guiding fault location and risk prediction.

[0089] S104. Calculate the overall priority score of the untested paths in the dynamic test priority list according to the updated cognitive map.

[0090] After updating the cognitive map, the comprehensive priority score of the untested paths in the dynamic test priority list can be calculated based on the updated cognitive map, so as to dynamically adjust the test order of the untested paths in the dynamic test priority list according to the comprehensive priority score.

[0091] To calculate the overall priority score, in some embodiments, when calculating the overall priority score of untested paths in the dynamic test priority list according to the updated cognitive map, an exploit component can first be calculated based on the fault belief value in the updated cognitive map. This exploit component is positively correlated with the fault belief value; that is, the score of the exploit component depends on the strength of the association between the path and the discovered fault, i.e., the strength of its fault belief value. Therefore, the exploit component can be used for fault localization. The exploit component can be calculated using the following formula:

[0092] in, Representing a path Utilization of components; This represents the correlation coefficient between the utilization component and the fault belief value. Since the utilization component and the fault belief value are positively correlated, the correlation coefficient is greater than 0. Representing a path Fault belief value.

[0093] In calculating the use of components ( Exploit When this happens, you can first obtain the fault belief value of the corresponding path in the updated cognitive map, and then calculate the utilization component based on the correlation coefficient. For example, when the correlation coefficient is equal to 1, the utilization component equals the fault belief value, that is, you can directly use it. Fault belief values ​​in the cognitive map are used as utilization components.

[0094] Next, the uncertainty parameter of the fault belief value is calculated, and an exploration component is set based on the uncertainty parameter. The level of the exploration component depends on the uncertainty of the path state. For example, information entropy or variance can be used to measure uncertainty. Therefore, the exploration component is used to discover unknown problems.

[0095] Next, dynamically adjusted weights are obtained. Corresponding to the utilization and exploration components, the dynamically adjusted weights include utilization weights and exploration weights. The utilization weights are used to perform weighted calculations on the utilization components; the exploration weights are used to perform weighted calculations on the exploration components. Therefore, based on the dynamically adjusted weights, a weighted summation calculation can be performed on the utilization and exploration components to obtain a comprehensive priority score.

[0096] To perform dynamic multi-objective decision-making, the testing system can incorporate a dynamic multi-objective decision engine for strategy selection. As the core of the system, this engine scientifically balances exploration and utilization components based on the real-time state of the cognitive map, selecting the optimal objective path for each test step.

[0097] The dynamic multi-objective decision engine can determine the outcome of each untested path. The overall priority score is calculated by weighting the Exploit and Explore components. The formula for calculating the overall priority score is as follows:

[0098] in, Indicates an untested path The overall priority score; This indicates the use of weights; Indicates an untested path Utilization of components; Indicates the exploration weight; Indicates an untested path The exploration component.

[0099] Components can be used directly In the cognitive map, a higher fault belief value leads to a higher score for the utilization component, guiding the system to prioritize testing high-risk paths to accurately locate the fault. The exploration component can be calculated... The uncertainty of the fault belief value is obtained. The formula for calculating the uncertainty is:

[0100] in Indicates an untested path The exploration component; Belief ( () indicates an untested path The failure belief value. When the failure belief value is close to 0.5, i.e., highly uncertain, the score of the exploration component is higher to motivate the system to explore unknown areas.

[0101] The dynamic multi-objective decision engine dynamically adjusts and utilizes weights. and exploration weight Optimize decision-making. When a fault is detected, increase the utilization weight. Enter "exploitation mode" to focus on fault location; increase the exploration weight during the initial testing phase or when there are no faults for an extended period. Enter "exploration mode" to achieve extensive screening, thereby efficiently balancing fault location and new knowledge discovery.

[0102] For example, the dynamic decision engine takes the updated cognitive map and the current DTPL[Path_B] as input to perform dynamic decision processing. Upon detecting a fault, the strategy in the decision-making process utilizes weights. =0.8; Exploration weight =0.2. Therefore, the overall priority score for the untested path Path_B can be calculated, i.e., Explore(Path_B) = 0.668, meaning that a high belief value should be utilized. Explore(Path_B) = 1 - |2×0.668 - 1| = 0.664, meaning that a high uncertainty should be explored. Therefore, the overall priority score Score(Path_B) = 0.8×0.668 + 0.2×0.664 = 0.667, which outputs a new DTPL, i.e., DTPL = [Path_B], corresponding to the decision result: the next step is to test path Path_B.

[0103] It is evident that by scientifically balancing the exploration and utilization components based on the real-time status of the cognitive map, the optimal test path can be selected for each step of the test, enabling extensive screening and thus efficiently balancing fault location and new knowledge discovery, and executing dynamic multi-objective decision-making.

[0104] S105. Perform continuous iterative testing on untested paths based on the comprehensive priority score to generate a diagnostic report.

[0105] After calculating the comprehensive priority score of the untested paths in the dynamic test priority list, continuous iterative testing can be performed on the untested paths in the dynamic test priority list based on the comprehensive priority score to generate a diagnostic report.

[0106] like Figure 3 As shown, during continuous iterative testing, the untested paths in the dynamic test priority list can be reordered according to the comprehensive priority score. Then, test paths are re-determined from the reordered dynamic test priority list. The signal integrity test method described in the above embodiment is then used to test the re-determined test paths. This involves obtaining test data by performing signal integrity tests on the test paths, updating the cognitive map based on the test data, calculating the comprehensive priority score of the untested paths in the dynamic test priority list based on the updated cognitive map, and reordering the untested paths in the dynamic test priority list again based on the comprehensive priority score. This process continues until the continuous iterative testing process meets the preset termination conditions, at which point the test ends and a diagnostic report is generated.

[0107] For example, after the dynamic decision engine determines the next test path Path_B, it can continue to perform signal integrity testing and signal quality assessment for Path_B. That is, the test system automatically tests Path_B, acquires waveform data during the test process, and generates test conclusions, such as FAIL_OverShoot, by measuring the signal characteristic parameters in the waveform data and comparing them with test rules.

[0108] At this point, the cognitive map can be updated based on the test results to achieve a second learning process. Specifically, using the FAIL_OverShoot result of Path_B and the current cognitive map as input, the fault belief value is updated by itself (Path_B) to 0.668 + (1 - 0.668) × 0.7 = 0.900. Then, causal backpropagation is performed to reinforce the upstream path (Master-Switch), with a corresponding fault belief value of 0.71 + (1 - 0.71) × 0.7 × 0.6 × 1 = 0.832. Finally, common-cause propagation is performed to backpropagate the tested Path_A, with a corresponding fault belief value of 0.85 + (1 - 0.85) × 0.7 × 0.6 × 0.8 = 0.900. Therefore, a cognitive map can be output, which includes "Master-Switch": 0.832, indicating that the belief value is continuously strengthened and confirmed as the root cause; "Switch-Path_A": 0.900, indicating that the fault is confirmed; "Switch-Path_B": 0.900, indicating that the fault is confirmed.

[0109] In some embodiments, when performing continuous iterative testing on untested paths in a dynamic test priority list based on a comprehensive priority score to generate a diagnostic report, test progress data during the iterative testing process can be recorded. This test progress data includes at least one of the following: the number of paths tested, the current fault belief value in the cognitive map, the number of faults in the test conclusions, and the test time.

[0110] Next, preset termination conditions are obtained, corresponding to the test progress data. These preset termination conditions include the maximum number of paths corresponding to the number of paths, the preset safety threshold corresponding to the current fault belief value, the predefined quantity tolerance corresponding to the number of faults, and the budgeted test time threshold corresponding to the test time. Therefore, a diagnostic report is generated when the test progress data meets at least one termination condition.

[0111] For example, the testing process is iterated until any of the following termination conditions are met: the maximum number of paths corresponding to the number of paths, i.e., all test paths (DTPL) have been tested; the preset safety threshold corresponding to the current fault belief value, i.e., the fault belief value of all nodes in the cognitive map is lower than the preset safety threshold, confirming system health; the predefined quantity tolerance corresponding to the number of faults, i.e., the number of detected faults exceeds the predefined tolerance; and the budgeted test time threshold corresponding to the test time, i.e., the test time budget is exhausted. Once the termination conditions are met, the testing system will generate a detailed diagnostic report. The diagnostic report not only lists all identified fault points, but also, based on the analysis of the cognitive map, infers the most likely root cause and its scope of impact, providing engineers with clear and practical debugging guidance information, which is conducive to the rapid location and resolution of problems.

[0112] By applying the technical solutions of the above embodiments, the dynamic signal integrity testing method described in the above embodiments can generate a dynamic test priority list by performing topology modeling on the circuit design file of the target system, and perform signal integrity testing on the test paths based on the dynamic test priority list to obtain test data. Then, the cognitive map is updated according to the test data, and the comprehensive priority score of the untested paths in the dynamic test priority list is calculated according to the updated cognitive map. Based on the comprehensive priority score, continuous iterative testing is performed on the untested paths to generate a diagnostic report. The method can be based on a real-time feedback closed-loop architecture of testing, analysis, learning, and decision-making, transforming the result of each test into a new understanding of the link status, and dynamically selecting the next test with the most informational value or the highest probability of discovering the problem based on this understanding. This achieves rapid problem localization and extreme optimization of testing efficiency, improving the efficiency of signal integrity testing.

[0113] In some embodiments, as a refinement and extension of the specific implementation of the above embodiments, in order to fully illustrate the specific implementation process of this embodiment, some embodiments of this application also provide a dynamic signal integrity testing method. The difference between this method and the above embodiments is that root cause inference can be performed when generating a diagnostic report to identify the fault point and the root cause and scope of influence of the fault point. Figure 4 As shown, the method includes: S201, Traverse the fault types corresponding to the test path; S202. Determine the fault location based on the fault type; S203. Read the analysis belief value of the fault point during multiple rounds of signal integrity testing; S204. Calculate and analyze the changing trend of belief values ​​during multiple rounds of signal integrity testing; S205. Based on the changing trend and fault type, perform root cause inference to generate the root cause of the fault and the scope of its impact.

[0114] To generate a diagnostic report, when the test progress data of the iterative test process meets any one of the termination conditions, the fault types corresponding to the test paths can be traversed, such as determining that overshoot faults were detected in both Path_A and Path_B.

[0115] Next, the fault points are determined based on the fault type, namely Path_A and Path_B. Then, the analytical belief values ​​of the fault points are read during the multi-round signal integrity test process. These analytical belief values ​​include the fault belief values ​​of the test paths and / or the fault belief values ​​of the propagable paths of the test paths. For example, the fault belief value of the common upstream path "Master-Switch" of Path_A and Path_B.

[0116] Based on the analysis belief value, the trend of the analysis belief value during multiple rounds of signal integrity testing is calculated. Then, based on the trend and fault type, root cause inference is performed to generate the root cause and scope of impact of the fault, and the root cause and scope of impact of the fault are added to the diagnostic report.

[0117] For example, in a test where both Path_A and Path_B show overshoot faults, root cause inference can be performed, indicating that the fault is highly likely to originate from their common upstream path, "Master-Switch". The criteria for root cause inference include the same fault occurring in all downstream branches, and the fault belief value of this upstream path showing a significant and continuous increase during the test, such as from 0.5 to 0.71 and then to 0.832. Therefore, it can be determined that the problem is likely caused by a severe source-end impedance mismatch. A diagnostic report can then be generated, including a prompt for the user to carefully check whether the value of the series matching resistor R1 between the Master output and the Switch input needs adjustment.

[0118] By applying the technical solutions of the above embodiments, the signal integrity dynamic testing method described in the above embodiments can automatically infer the root cause location and scope of influence of the fault through the belief propagation mechanism of the cognitive map when generating the diagnostic report. This makes the diagnostic report not only include all identified fault points, but also, in conjunction with the analysis of the cognitive map, infer the most likely root cause and its scope of influence, providing engineers with clear and practical debugging reference information to ensure that the problem is quickly located and resolved.

[0119] In some embodiments, as a specific implementation of the signal integrity dynamic testing method described in the above embodiments, some embodiments of this application also provide a signal integrity dynamic testing system, such as... Figure 5 As shown, the system includes: The topology modeling module is used to perform topology modeling on the circuit design file of the target system and generate a dynamic test priority list; the dynamic test priority list includes test paths and untested paths. The testing module is used to perform signal integrity testing on the test path based on the dynamic test priority list to obtain test data, which includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity test of the test path. The test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. An update module is used to update the cognitive map based on the test data. The cognitive map is a dynamic graph model of topological fault association constructed based on the topological modeling results of the circuit design file. The cognitive map is used to represent the knowledge state. The cognitive map includes multiple nodes, and each node is set with a fault belief value that is updated in real time based on the test data. The dynamic decision-making module is used to calculate the comprehensive priority score of the untested paths in the dynamic test priority list according to the updated cognitive map. The results output module is used to perform continuous iterative testing on the untested path based on the comprehensive priority score to generate a diagnostic report.

[0120] like Figure 6 As shown, based on the signal integrity dynamic testing method described in the above embodiments, when performing dynamic signal integrity testing, the test system first performs system initialization. It then generates a dynamic test priority list by performing topology modeling on the target system's circuit design file. The test system automatically parses the PCB design file to construct the complete topology of the I2C bus, clarifying the set of physical connection paths between all master and slave devices. Subsequently, it extracts layout and routing data, comprehensively evaluates the similarity between any two paths in terms of trace length, spacing, and number of vias, and generates a physical similarity matrix. Then, the system uses simple heuristic rules to generate an initial dynamic test priority list (DTPL).

[0121] After generating a dynamic test priority list, the testing system can perform signal quality assessment, that is, execute signal integrity tests on the test path based on the dynamic test priority list to obtain test data. The waveform data collected during the signal integrity test is automatically measured to obtain a series of predefined signal characteristic parameters, such as rise time, fall time, overshoot amplitude, and monotonicity. The actual test results are recorded, and the extracted characteristic parameters are compared with rules in a predefined fault mode library. Combining the decision thresholds for various faults defined in the rule library, the system outputs test conclusions, such as "PASS" or "FAIL: [specific type]", providing a reliable basis for subsequent fault location and decision-making.

[0122] A cognitive map is then constructed based on the obtained test data and updated in real time. By maintaining a "topology-fault association graph," test results are integrated with prior knowledge, dynamically updating the "fault belief value" of each node to simulate an engineer's fault localization mindset. During cognitive map updates, each node is initialized with a neutral belief value. When the test result R_i of test path P_i is returned, a belief propagation update algorithm is triggered. First, P_i updates itself, significantly increasing its own fault belief value. Then, through causal propagation, it propagates backward along the topology tree towards the main device, increasing the fault belief values ​​of upstream paths and nodes to locate potential root causes, while slightly increasing the belief values ​​of downstream paths to predict risks. Furthermore, through common-cause propagation, based on the physical similarity matrix S, paths with similar layouts to P_i are identified, and their fault belief values ​​are significantly increased according to the similarity level, thereby predicting similar problems.

[0123] By updating the cognitive map, dynamic multi-objective decision-making can be achieved. The testing system calculates the comprehensive priority score of untested paths in the dynamic test priority list based on the updated cognitive map. This comprehensive priority score is obtained by a weighted average of the exploit and explore components. The dynamic multi-objective decision engine optimizes decisions by dynamically adjusting the weights of the exploit and explore components. When a fault is detected, the exploit component is increased to enter "exploitation mode," focusing on fault localization. In the early stages of testing or during prolonged periods without faults, the explore component is increased to enter "exploration mode," enabling broad screening and thus efficiently balancing fault localization and new knowledge discovery.

[0124] Then, based on the comprehensive priority score, continuous iterative testing is performed on the untested paths to generate a diagnostic report. This continuous iterative testing process continues until any termination condition is met, at which point a detailed diagnostic report is generated. Furthermore, root cause inference can be performed during the generation of the diagnostic report to identify the fault location, its root cause, and its scope of impact.

[0125] By applying the technical solutions of the above embodiments, the signal integrity dynamic testing system described in the above embodiments can perform topology modeling on the circuit design file of the target system through the topology modeling module to generate a dynamic test priority list. Then, the testing module performs signal integrity testing on the test paths based on the dynamic test priority list to obtain test data. Next, the update module updates the cognitive map based on the test data, and the dynamic decision-making module calculates the comprehensive priority score of the untested paths in the dynamic test priority list according to the updated cognitive map. This allows the result output module to perform continuous iterative testing on the untested paths based on the comprehensive priority score to generate a diagnostic report. The system can achieve dynamic adaptive signal integrity testing. Through a real-time feedback closed-loop strategy of testing, analysis, learning, and decision-making, the result of each test is transformed into a new understanding of the link status. Based on this understanding, the system dynamically selects the next test that is most informative or most likely to discover problems, thereby achieving rapid problem localization and optimization of testing efficiency.

[0126] It should be noted that other corresponding descriptions of the functional units involved in the signal integrity dynamic testing system provided in this application embodiment can be found in the corresponding descriptions in the signal integrity dynamic testing method provided in the above embodiments, and will not be repeated here.

[0127] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0128] The embodiments described above are merely examples of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application.

Claims

1. A dynamic signal integrity testing method, characterized in that, The method includes: A dynamic test priority list is generated by performing topology modeling on the circuit design file of the target system; the dynamic test priority list includes test paths and untested paths. Based on the dynamic test priority list, signal integrity testing is performed on the test path to obtain test data, which includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity testing of the test path. The test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. The cognitive map is updated based on the test data. The cognitive map is a dynamic graph model of topological fault association constructed based on the topological modeling results of the circuit design file. The cognitive map is used to represent the knowledge state. The cognitive map includes multiple nodes, and each node is set with a fault belief value that is updated in real time based on the test data. Based on the updated cognitive map, calculate the comprehensive priority score of the untested paths in the dynamic test priority list; Based on the comprehensive priority score, continuous iterative testing is performed on the untested path to generate a diagnostic report.

2. The method according to claim 1, characterized in that, By performing topology modeling on the circuit design files of the target system, a dynamic test priority list is generated, including: Obtain the circuit design files; The topology of the control mainline is constructed by parsing the circuit design file. The topology includes a set of physical connection paths between the master device and the slave device. Layout and routing data are extracted based on the topology; The similarity between any two test paths in the layout and routing data is evaluated in terms of preset physical parameters to generate a physical similarity matrix; the preset physical parameters include at least one of trace length, spacing, and number of vias; the physical similarity matrix includes the similarity between any two connection paths; Using heuristic rules, a dynamic test priority list is generated based on the physical similarity matrix, and the test paths in the dynamic test priority list are arranged in descending order of path length.

3. The method according to claim 1, characterized in that, Based on the dynamic test priority list, signal integrity tests are performed on the test path to obtain test data, including: Acquire waveform data, which is a waveform signal collected during the signal integrity test performed on the test path; The signal characteristic parameters of the waveform data are measured, and the signal characteristic parameters include at least one of rise time, fall time, overshoot amplitude, and monotonicity. The test rules are extracted from the fault mode library, and the test rules include the decision thresholds for various types of faults; The test conclusion is generated by comparing the signal feature parameters with the test rules; the test conclusion includes the fault existence result and the fault type, which are determined based on the numerical relationship and difference between the signal feature parameters and the decision threshold.

4. The method according to claim 1, characterized in that, Update the cognitive map based on the test data, including: Prior knowledge is constructed based on the topology modeling results of the circuit design file, and the prior knowledge includes the topology and layout information of the target system. Obtain calculation parameters, including learning rate, propagation decay factor, and impact factor; the impact factor is determined according to the propagation update method. The test conclusions from the test data are fused with the prior knowledge, and the cognitive map is updated in conjunction with the calculation parameters.

5. The method according to claim 4, characterized in that, The process of fusing test conclusions from the test data with prior knowledge and updating the cognitive map in conjunction with the computational parameters includes: The test path is updated based on the initial belief values ​​of the nodes in the test path and the learning rate to update the fault belief values ​​of the nodes in the test path. Based on the prior knowledge, a propagable path is determined, which includes the upstream path of the test path and similar paths of the test path; the upstream path is the path between the main device and the upstream converter of the test path; the similar path is an untested path whose similarity to the test path is greater than or equal to a preset similarity threshold. Obtain the propagation update method corresponding to the propagable path, and set the influence factor according to the propagation update method; wherein, for the upstream path, the propagation update method is causal propagation, and the influence factor is set to 1; for the similar path, the propagation update method is common cause propagation, and the influence factor is set to similarity. The fault belief values ​​of the nodes in the propagable path are updated based on the initial belief values ​​of the nodes in the propagable path, the learning rate, the propagation decay factor, and the influence factor.

6. The method according to claim 1, characterized in that, The method further includes: Iterate through the circuit elements in the circuit design file, including device elements and network elements; The nodes of the cognitive map are defined according to the circuit elements, and the nodes include element nodes defined according to the device elements and network nodes defined according to the network elements; Set the initial belief value of the node; The cognitive map is defined based on the connection relationships between the nodes, and the nodes and edges of the cognitive map are instantiated into a dynamic graph model to generate the cognitive map.

7. The method according to claim 1, characterized in that, Based on the updated cognitive map, calculate the comprehensive priority score of the untested paths in the dynamic test priority list, including: Based on the fault belief values ​​in the updated cognitive map, a utilization component is calculated, which is positively correlated with the fault belief values. Calculate the uncertainty parameter of the fault belief value, and set the exploration component based on the uncertainty parameter; A dynamic adjustment weight is obtained, which includes a utilization weight and an exploration weight; the utilization weight is used to perform a weighted calculation on the utilization component; the exploration weight is used to perform a weighted calculation on the exploration component; Based on the dynamically adjusted weights, a weighted summation calculation is performed on the utilization component and the exploration component to obtain the comprehensive priority score.

8. The method according to claim 1, characterized in that, Based on the comprehensive priority score, continuous iterative testing is performed on the untested paths in the dynamic test priority list to generate a diagnostic report, including: Record test progress data during the iterative testing process. The test progress data includes at least one of the following: the number of paths tested, the current fault belief value of the cognitive map, the number of faults in the test conclusion, and the test time. Obtain preset termination conditions, which include the maximum number of paths corresponding to the number of paths, the preset safety threshold corresponding to the current fault belief value, the predefined quantity tolerance corresponding to the number of faults, and the budgeted test time threshold corresponding to the test time. The diagnostic report is generated when the test progress data meets at least one of the termination conditions.

9. The method according to claim 8, characterized in that, The diagnostic report includes the fault location, the root cause of the fault location, and the scope of its impact; generating the diagnostic report includes: Iterate through the fault types corresponding to the test path; The fault point is determined according to the fault type; Read the analytical belief value of the fault point during multiple rounds of signal integrity testing, the analytical belief value including the fault belief value of the test path and / or the fault belief value of the propagable path of the test path; Calculate the trend of the analyzed belief value during multiple rounds of signal integrity testing; Root cause inference is performed based on the changing trend and the fault type to generate the root cause of the fault and the scope of its impact.

10. A dynamic signal integrity testing system, characterized in that, The system includes: The topology modeling module is used to perform topology modeling on the circuit design file of the target system and generate a dynamic test priority list; the dynamic test priority list includes test paths and untested paths. The testing module is used to perform signal integrity testing on the test path based on the dynamic test priority list to obtain test data, which includes signal characteristic parameters and test conclusions. The signal characteristic parameters are obtained by measuring waveform data during the signal integrity test of the test path. The test conclusions are determined by comparing the signal characteristic parameters with test rules in the fault mode library. An update module is used to update the cognitive map based on the test data. The cognitive map is a dynamic graph model of topological fault association constructed based on the topological modeling results of the circuit design file. The cognitive map is used to represent the knowledge state. The cognitive map includes multiple nodes, and each node is set with a fault belief value that is updated in real time based on the test data. The dynamic decision-making module is used to calculate the comprehensive priority score of the untested paths in the dynamic test priority list according to the updated cognitive map. The results output module is used to perform continuous iterative testing on the untested path based on the comprehensive priority score to generate a diagnostic report.

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