Signal amplitude limiting circuit, controller and audio equipment
By designing a signal limiting circuit including a first voltage divider circuit, a signal amplification circuit and a second voltage divider circuit, the distortion and power problems caused by excessive signal in the audio device are solved, and the signal is automatically restricted at a lower cost, and the sound distortion or excessive power is prevented.
Patent Information
- Application Number
- CN202421973626.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-08-15
AI Technical Summary
In the prior art, in order to prevent sound distortion and excessive power caused by excessive input signals of audio equipment, high-cost DRC signal limiting chips are usually used. How to achieve automatic signal limiting while reducing costs has become an urgent problem.
A signal limiting circuit is designed, including a first voltage divider circuit, a signal amplification circuit and a second voltage divider circuit. When the input signal is in the normal range, the signal passes through the first voltage divider circuit and amplifies it is not enough to drive the transistor of the second voltage divider into an amplified state and remains in the off state; when the input signal exceeds the normal range, the transistor of the second voltage divider circuit can be driven into an amplified state after passing through the first voltage divider circuit and amplifies it. The output signal is affected by the voltage divider of the resistor and the transistor to avoid distortion or excessive power caused by excessive strong signal.
It realizes automatic limiting of signal too large at lower cost, preventing sound distortion or excessive power, and provides a hardware architecture to solve the problem of signal limiting in audio devices.
Smart Images
Figure CN223024384U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of electronic technology, and more specifically, to a signal limiting circuit, a controller and an audio device. Background Art
[0002] During the use of an audio device, an increase in the input signal will lead to an increase in the power output by the power amplifier and distortion. In the prior art, in order to prevent this situation, a DRC signal limiting chip is usually used, but the cost of using this chip is relatively high. Therefore, how to automatically limit the signal while reducing the cost to solve the problems of sound distortion and excessive power caused by too large an input signal has become a technical problem to be solved urgently. Summary of the Utility Model
[0003] In order to solve the above problems, the utility model provides a signal limiting circuit, a controller and an audio device.
[0004] In a first aspect, the utility model provides a signal limiting circuit, including a third resistor R3 and a second resistor R2. The first end of the third resistor R3 is electrically connected to a signal input end, and the second end is electrically connected to a signal output end. The first end of the second resistor R2 is electrically connected to the signal output end, and the second end of the second resistor R2 is grounded; the circuit further includes:
[0005] A first voltage dividing circuit, the first end of the first voltage dividing circuit is electrically connected to the signal input end;
[0006] A signal amplifying circuit, the input end of the signal amplifying circuit is electrically connected to the second end of the first voltage dividing circuit;
[0007] A second voltage dividing circuit, the second voltage dividing circuit includes a first resistor R1 and a third triode PQ3. The base of the third triode PQ3 is electrically connected to the output end of the signal amplifying circuit, the emitter of the third triode PQ3 is grounded, the collector of the third triode PQ3 is electrically connected to the second end of the first resistor R1, and the first end of the first resistor R1 is electrically connected to the signal output end.
[0008] Advantageous Effects:
[0009] The utility model provides a hardware architecture which can automatically limit excessive signals at low cost, prevent distortion or excessive power by setting a first voltage dividing circuit, a signal amplifying circuit and a second voltage dividing circuit. When the input signal is within the normal range, the input signal passes through the first voltage dividing circuit and is amplified, but it is not sufficient to drive the third triode PQ3 of the second voltage dividing circuit into the amplification state, and it will be in the cut-off state. At this time, the output signal is not affected by the first resistor R1 and the third triode PQ3. When the input signal exceeds the normal range, the input signal passes through the first voltage dividing circuit and is amplified, and can drive the third triode PQ3 of the second voltage dividing circuit into the amplification state. At this time, the output signal is affected by the voltage division of the first resistor R1 and the third triode PQ3, and the output signal will not increase with the increase of the input signal, so as not to cause excessive subsequent signals and bring distortion or excessive power.
[0010] Further, the first voltage dividing circuit includes a fourth resistor R4 and a fifth resistor R5. The first end of the fourth resistor R4 is electrically connected to the signal input end, the second end of the fourth resistor R4 is electrically connected to the input end of the signal amplifying circuit, the first end of the fifth resistor R5 is electrically connected to the second end of the fourth resistor R4, and the second end of the fifth resistor R5 is grounded.
[0011] Further, the signal amplifying circuit includes a twelfth triode PQ12, a sixth resistor R6 and a seventh resistor R7;
[0012] The collector of the twelfth triode PQ12 is connected to the power supply, the base of the twelfth triode PQ12 is electrically connected to the second end of the fourth resistor R4, and the emitter of the twelfth triode PQ12 is electrically connected to the base of the third triode PQ3;
[0013] The first end of the sixth resistor R6 is electrically connected to the collector of the twelfth triode PQ12, and the second end of the sixth resistor R6 is electrically connected to the base of the twelfth triode PQ12;
[0014] The first end of the seventh resistor R7 is electrically connected to the emitter of the twelfth triode PQ12, and the second end of the seventh resistor R7 is grounded.
[0015] Further, the signal amplifying circuit further includes a seventh capacitor PC7. The first end of the seventh capacitor PC7 is electrically connected to the second end of the fourth resistor R4, and the second end of the seventh capacitor PC7 is electrically connected to the base of the twelfth triode PQ12.
[0016] Further, the signal amplification circuit further includes a twenty-eighth capacitor PC28. The first end of the twenty-eighth capacitor PC28 is electrically connected to the base of the twelfth triode PQ12, and the second end of the twenty-eighth capacitor PC28 is grounded.
[0017] Further, the signal amplification circuit further includes a sixth capacitor PC6. The first end of the sixth capacitor PC6 is electrically connected to the emitter of the twelfth triode PQ12, and the second end of the sixth capacitor PC6 is electrically connected to the base of the third triode PQ3.
[0018] Further, the circuit further includes a fifth capacitor PC5. The second end of the third resistor R3, the first end of the first resistor R1, and the first end of the second resistor R2 are all electrically connected to the first end of the fifth capacitor PC5, and the second end of the fifth capacitor PC5 is electrically connected to the signal output terminal.
[0019] In a second aspect, the present invention provides a controller for an audio device, including a signal limiting circuit according to any one of the above embodiments.
[0020] In a third aspect, the present invention provides an audio device, including a controller for an audio device according to the above embodiments. Description of the Drawings
[0021] The following further describes the present utility model in detail with reference to the drawings and specific embodiments.
[0022] Figure 1 The circuit diagram of a signal limiting circuit provided by the present utility model;
[0023] Figure 2 It is the circuit diagram of another signal limiting circuit provided by the present utility model. Detailed Description of the Embodiments
[0024] To make the above objects, features, and advantages of the present application more obvious and understandable, the following describes the specific embodiments of the present application in detail with reference to the drawings. It can be understood that the specific embodiments described herein are only used to explain the present application, rather than limiting the present application. Additionally, it should be noted that for the sake of description, only parts related to the present application are shown in the drawings rather than all the structures. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.
[0025] References to "embodiments" in this specification mean that specific features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0026] In the description of the present application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality of" means two or more unless otherwise specifically defined.
[0027] In this specification, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may include direct contact between the first and second features, or may include contact between the first and second features through additional features therebetween rather than direct contact. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature.
[0028] In the description of the present application, it should be noted that, unless otherwise clearly defined and limited, the terms "mounted", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection, an electrical connection or a communication connection; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0029] As Figure 1 shown, the present utility model provides a signal limiting circuit, including a third resistor R3 and a second resistor R2. The first end of the third resistor R3 is electrically connected to a signal input terminal, and the second end is electrically connected to a signal output terminal. The first end of the second resistor R2 is electrically connected to the signal output terminal, and the second end of the second resistor R2 is grounded. The circuit further includes:
[0030] a first voltage dividing circuit, the first end of the first voltage dividing circuit being electrically connected to the signal input terminal;
[0031] A signal amplification circuit, the input end of the signal amplification circuit is electrically connected to the second end of the first voltage division circuit;
[0032] A second voltage division circuit, the second voltage division circuit includes a first resistor R1 and a third triode PQ3, the base of the third triode PQ3 is electrically connected to the output end of the signal amplification circuit, the emitter of the third triode PQ3 is grounded, the collector of the third triode PQ3 is electrically connected to the second end of the first resistor R1, and the first end of the first resistor R1 is electrically connected to the signal output end.
[0033] In this embodiment, by setting the first voltage division circuit, the signal amplification circuit and the second voltage division circuit, when the input signal is within the normal range, the input signal passes through the first voltage division circuit and is amplified, but it is not sufficient to drive the third triode PQ3 of the second voltage division circuit into the amplification state, and it will be in the cut-off state. At this time, the output signal is not affected by the first resistor R1 and the third triode PQ3; when the input signal exceeds the normal range, the input signal passes through the first voltage division circuit and is amplified, and can drive the third triode PQ3 of the second voltage division circuit into the amplification state. At this time, the output signal is affected by the voltage division of the first resistor R1 and the third triode PQ3, and the output signal will not increase with the increase of the input signal, so as not to cause the subsequent signal to be too strong and cause distortion or excessive power. Therefore, the present utility model provides a hardware architecture, which can help to automatically limit the signal from being too large at a lower cost, and prevent distortion or excessive power.
[0034] Preferably, the first voltage division circuit includes a fourth resistor R4 and a fifth resistor R5, the first end of the fourth resistor R4 is electrically connected to the signal input end, the second end of the fourth resistor R4 is electrically connected to the input end of the signal amplification circuit, the first end of the fifth resistor R5 is electrically connected to the second end of the fourth resistor R4, and the second end of the fifth resistor R5 is grounded.
[0035] Specifically, after the input signal is divided by the fourth resistor R4 and the fifth resistor R5, it passes through the signal amplification circuit to drive the third triode PQ3 to work.
[0036] Preferably, the signal amplification circuit includes a twelfth triode PQ12, a sixth resistor R6 and a seventh resistor R7;
[0037] The collector of the twelfth triode PQ12 is connected to the power supply, the base of the twelfth triode PQ12 is electrically connected to the second end of the fourth resistor R4, and the emitter of the twelfth triode PQ12 is electrically connected to the base of the third triode PQ3;
[0038] The first end of the sixth resistor R6 is electrically connected to the collector of the twelfth triode PQ12, and the second end of the sixth resistor R6 is electrically connected to the base of the twelfth triode PQ12;
[0039] The first end of the seventh resistor R7 is electrically connected to the emitter of the twelfth triode PQ12, and the second end of the seventh resistor R7 is grounded.
[0040] Specifically, the signal after being divided by the fourth resistor R4 and the fifth resistor R5 acts on the base of the twelfth triode PQ12. Following the change in the intensity of the input signal, the strength of the amplified signal output from the emitter of the twelfth triode PQ12 also changes accordingly, thereby driving the third triode PQ3 to work.
[0041] Preferably, the signal amplification circuit further includes a seventh capacitor PC7. The first end of the seventh capacitor PC7 is electrically connected to the second end of the fourth resistor R4, and the second end of the seventh capacitor PC7 is electrically connected to the base of the twelfth triode PQ12.
[0042] Specifically, the seventh capacitor PC7 can play a role in signal coupling. The signal after being divided by the fourth resistor R4 and the fifth resistor R5 acts on the base of the twelfth triode PQ12 through coupling.
[0043] Preferably, the signal amplification circuit further includes a twenty-eighth capacitor PC28. The first end of the twenty-eighth capacitor PC28 is electrically connected to the base of the twelfth triode PQ12, and the second end of the twenty-eighth capacitor PC28 is grounded. The twenty-eighth capacitor PC28 plays a role in filtering. The signal after being divided by the fourth resistor R4 and the fifth resistor R5 acts on the base of the twelfth triode PQ12 through filtering.
[0044] Preferably, the signal amplification circuit further includes a sixth capacitor PC6. The first end of the sixth capacitor PC6 is electrically connected to the emitter of the twelfth triode PQ12, and the second end of the sixth capacitor PC6 is electrically connected to the base of the third triode PQ3. Similarly, the sixth capacitor PC6 plays a role in coupling. The amplified signal output from the emitter of the twelfth triode PQ12 acts on the base of the third triode PQ3 through coupling.
[0045] Preferably, the circuit further includes a fifth capacitor PC5. The second end of the third resistor R3, the first end of the first resistor R1, and the first end of the second resistor R2 are all electrically connected to the first end of the fifth capacitor PC5, and the second end of the fifth capacitor PC5 is electrically connected to the signal output terminal.
[0046] In this embodiment, a controller for an audio device is further provided, including a power-off POP sound suppression circuit described in any of the above embodiments.
[0047] By setting a first voltage division circuit, a signal amplification circuit, and a second voltage division circuit, when the input signal is within the normal range, the input signal passes through the first voltage division circuit and is amplified, but it is not sufficient to drive the third triode PQ3 of the second voltage division circuit into the amplification state and will be in the cut-off state. At this time, the output signal is not affected by the first resistor R1 and the third triode PQ3. When the input signal exceeds the normal range, the input signal passes through the first voltage division circuit and is amplified, and it can drive the third triode PQ3 of the second voltage division circuit into the amplification state. At this time, the output signal is affected by the voltage division of the first resistor R1 and the third triode PQ3, and the output signal will not increase due to the increase of the input signal, so as not to cause the subsequent signal to be too strong and bring distortion or excessive power. Therefore, the present invention provides a controller that can help automatically limit the signal from being too large at a lower cost and prevent distortion or excessive power.
[0048] The present invention provides an audio device, including a controller for an audio device described in the above embodiment.
[0049] By setting a first voltage division circuit, a signal amplification circuit, and a second voltage division circuit, when the input signal is within the normal range, the input signal passes through the first voltage division circuit and is amplified, but it is not sufficient to drive the third triode PQ3 of the second voltage division circuit into the amplification state and will be in the cut-off state. At this time, the output signal is not affected by the first resistor R1 and the third triode PQ3. When the input signal exceeds the normal range, the input signal passes through the first voltage division circuit and is amplified, and it can drive the third triode PQ3 of the second voltage division circuit into the amplification state. At this time, the output signal is affected by the voltage division of the first resistor R1 and the third triode PQ3, and the output signal will not increase due to the increase of the input signal, so as not to cause the subsequent signal to be too strong and bring distortion or excessive power.
[0050] It should be noted that terms such as "horizontal" and "vertical" do not require the components to be absolutely horizontal or vertical, but can be slightly inclined; terms such as "parallel" and "perpendicular" do not mean that the fittings are absolutely parallel or perpendicular to each other, but can have a certain angular deviation. For example, "horizontal" only means that its direction is more horizontal relative to "vertical", and does not mean that the structure must be completely horizontal, but can be slightly inclined. In addition, the orientation or positional relationship indicated by terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the products of this application are usually placed during use. It is only for the convenience of describing the embodiments of this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to this application.
[0051] It can be understood that the meaning of "a plurality of" in this article is at least two, such as two, three, etc., unless there are specific restrictive explanations. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units that are not listed, or optionally further includes other steps or units inherent to these processes, methods, products or devices. The term "and / or" is merely a description of the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after.
[0052] The above description is only the implementation mode of this application, and does not limit the patent scope of this application. Any equivalent structural or equivalent process transformation made by using the content of the specification and drawings of this application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of this application.
Claims
1. A signal limiting circuit, comprising a third resistor R3 and a second resistor R2, wherein a first end of the third resistor R3 is electrically connected to a signal input end, and a second end of the third resistor R3 is electrically connected to a signal output end, a first end of the second resistor R2 is electrically connected to the signal output end, and a second end of the second resistor R2 is grounded; characterized in that: The circuit further comprises: a first voltage-dividing circuit, wherein a first end of the first voltage-dividing circuit is electrically connected to the signal input end; a signal amplifying circuit, wherein an input end of the signal amplifying circuit is electrically connected to the second end of the first voltage dividing circuit; A second voltage-dividing circuit, the second voltage-dividing circuit includes a first resistor R1 and a third transistor PQ3, the base of the third transistor PQ3 is electrically connected to the output end of the signal amplifying circuit, the emitter of the third transistor PQ3 is grounded, the collector of the third transistor PQ3 is electrically connected to the second end of the first resistor R1, and the first end of the first resistor R1 is electrically connected to the signal output end.
2. A signal limiting circuit according to claim 1, characterized in that: The first voltage divider circuit includes a fourth resistor R4 and a fifth resistor R5, a first end of the fourth resistor R4 is electrically connected to the signal input end, a second end of the fourth resistor R4 is electrically connected to the input end of the signal amplification circuit, a first end of the fifth resistor R5 is electrically connected to the second end of the fourth resistor R4, and a second end of the fifth resistor R5 is grounded.
3. A signal limiting circuit according to claim 2, characterized in that: The signal amplifying circuit includes a twelfth transistor PQ12, a sixth resistor R6 and a seventh resistor R7; The collector of the twelfth transistor PQ12 is connected to a power supply, the base of the twelfth transistor PQ12 is electrically connected to the second end of the fourth resistor R4, and the emitter of the twelfth transistor PQ12 is electrically connected to the base of the third transistor PQ3; The first end of the sixth resistor R6 is electrically connected to the collector of the twelfth transistor PQ12, and the second end of the sixth resistor R6 is electrically connected to the base of the twelfth transistor PQ12; A first end of the seventh resistor R7 is electrically connected to the emitter of the twelfth transistor PQ12 , and a second end of the seventh resistor R7 is grounded.
4. A signal limiting circuit according to claim 3, characterized in that: The signal amplifying circuit further includes a seventh capacitor PC7, a first end of the seventh capacitor PC7 is electrically connected to the second end of the fourth resistor R4, and a second end of the seventh capacitor PC7 is electrically connected to the base of the twelfth transistor PQ12.
5. A signal limiting circuit according to claim 3, characterized in that: The signal amplifying circuit further includes a twenty-eighth capacitor PC28 , a first end of the twenty-eighth capacitor PC28 is electrically connected to the base of the twelfth transistor PQ12 , and a second end of the twenty-eighth capacitor PC28 is grounded.
6. A signal limiting circuit according to claim 3, characterized in that: The signal amplifying circuit further includes a sixth capacitor PC6, a first end of the sixth capacitor PC6 is electrically connected to the emitter of the twelfth transistor PQ12, and a second end of the sixth capacitor PC6 is electrically connected to the base of the third transistor PQ3.
7. The signal limiting circuit according to claim 1, characterized in that: The circuit also includes a fifth capacitor PC5, the second end of the third resistor R3, the first end of the first resistor R1, and the first end of the second resistor R2 are all electrically connected to the first end of the fifth capacitor PC5, and the second end of the fifth capacitor PC5 is electrically connected to the signal output end.
8. A controller for an audio device, characterized in that: It comprises a signal limiting circuit as described in any one of claims 1-7.
9. An audio device, characterized in that: A controller for an audio device comprising the step of: