Magnetic disk device
Patent Information
- Application Number
- JP2023149092
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-14
- Publication Date
- 2025-03-27
Smart Images

Figure 2025042216000001_ABST
Abstract
Description
[Technical field]
[0001] An embodiment of the present invention relates to a magnetic disk drive. [Background technology]
[0002] Known magnetic disk devices include conventional magnetic recording (CMR) type (or conventional recording type) magnetic disk devices that write multiple tracks at intervals in the radial direction of the disk, shingled write magnetic recording (SMR, or shingled write recording (SWR) type magnetic disk devices that overwrite multiple tracks in the radial direction of the disk, and hybrid recording type magnetic disk devices that select between the conventional recording type and the shingled recording type. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 10-49996 [Patent Document 2] JP 2013-101734 A [Patent Document 3] U.S. Pat. No. 10,224,063 Summary of the Invention [Problem to be solved by the invention]
[0004] This embodiment provides a magnetic disk device that can improve the efficiency of data processing. [Means for solving the problem]
[0005] A magnetic disk device according to an embodiment includes: a disk having a plurality of data tracks including a first data track and a second data track in a recording layer; a write head that writes data to the recording layer of the disk; and a write processing unit capable of executing a write process to write data to the recording layer, wherein the write processing unit executes a first write process to write data to a first segment that constitutes a part of a first data sector of the first data track, and after executing the first write process, executes a second write process to write data to the first segment that constitutes a part of a second data sector of the first data track, and after executing the second write process, executes a third write process to write data to a second segment that constitutes a part of the first data sector of the second data track.
[0006] Moreover, a magnetic disk device according to an embodiment includes: a disk having a plurality of data tracks including a first data track and a second data track in a recording layer; a first read head, a second read head, and a third read head for respectively reading data from the recording layer of the disk; an arm supporting the first to third read heads; an actuator for moving the arm; and a read processing section capable of executing a read process for reading data from the recording layer, wherein the first data track has a first segment constituting a part of a first data sector, and the second data track has a second segment constituting a part of the first data sector and adjacent to the first segment in a radial direction. the read processing section drives the actuator, controls a seek operation for seeking the first to third read heads, moves the first read head to a position facing the first data track, selects a first selected read head which is the first read head, and a second selected read head which is the read head among the second and third read heads which is closest to the second data track according to a skew angle of the first read head, and simultaneously reads data of the first segment of the first data track and data of the second segment of the second data track with the first and second selected read heads. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is a block diagram showing the configuration of a magnetic disk device according to the first embodiment. [Diagram 2] FIG. 2 is a perspective view showing a part of the magnetic disk device, showing a plurality of disks and a plurality of heads. [Diagram 3] FIG. 3 is a schematic diagram showing an example of an arrangement of a plurality of servo areas and a plurality of data areas on one disk according to the embodiment. [Figure 4] FIG. 4 is a schematic diagram showing three tracks in the user data area of the disk shown in FIG. 3 where shingled recording processing is performed, and a write head. [Diagram 5] FIG. 5 is a schematic diagram showing three tracks of a media cache where normal recording processing of the disk shown in FIG. 3 is performed, and a write head. [Figure 6] FIG. 6 is a schematic diagram showing an example of a data write process on a disk. [Figure 7] FIG. 7 is a schematic diagram showing two tracks in the second zone on the inner periphery side of the user data area. [Figure 8] FIG. 8 is a schematic diagram showing two tracks in a first zone on the outer circumferential side of the second zone in FIG. [Figure 9] FIG. 9 is a block diagram showing a partial configuration of the magnetic disk device, illustrating the configuration of a write channel, etc. [Figure 10] FIG. 10 is a block diagram showing a partial configuration of the magnetic disk device, illustrating the configuration of a read channel, etc. [Figure 11] FIG. 11 is a schematic diagram showing a part of the two tracks and two read heads in FIG. 8, and is a diagram for explaining the read processing method according to the embodiment. [Figure 12] FIG. 12 is a flowchart showing the write processing method according to the embodiment. [Figure 13]FIG. 13 is a flowchart illustrating the write processing method, which follows FIG. [Figure 14] FIG. 14 is a flowchart showing the write processing method, following FIG. [Figure 15] FIG. 15 is a block diagram showing a configuration of a portion of the magnetic disk device, and shows the configuration of a volatile memory inside the write channel. [Figure 16] FIG. 16 is a block diagram showing a configuration of a portion of the magnetic disk device, and shows the configuration of a volatile memory external to the write channel. [Figure 17] FIG. 17 is a block diagram showing a partial configuration of a magnetic disk device according to a first modification of the first embodiment, and shows the configuration of a write channel, etc. [Figure 18] FIG. 18 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a second modified example of the first embodiment. [Figure 19] FIG. 19 is a block diagram showing a partial configuration of a magnetic disk device according to the second modified example, and shows the configuration of a volatile memory external to a write channel. [Figure 20] FIG. 20 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a third modified example of the first embodiment. [Figure 21] FIG. 21 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a fourth modified example of the first embodiment. [Figure 22] FIG. 22 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a fifth modified example of the first embodiment. [Figure 23] FIG. 23 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a sixth modified example of the first embodiment. [Figure 24] FIG. 24 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a seventh modified example of the first embodiment. [Diagram 25]FIG. 25 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to an eighth modification of the first embodiment. [Figure 26] FIG. 26 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a ninth modification of the first embodiment. [Figure 27] FIG. 27 is a schematic diagram showing two tracks in the first zone of a magnetic disk device according to a tenth modification of the first embodiment. [Figure 28] FIG. 28 is a block diagram showing a partial configuration of a magnetic disk device according to the second embodiment, illustrating the configuration of a read channel and the like. [Figure 29] FIG. 29 is a block diagram showing a partial configuration of a magnetic disk device according to the third embodiment, illustrating the configuration of a read channel, etc. [Diagram 30] FIG. 30 is a plan view showing an example of the geometric arrangement of the write head and three read heads in the third embodiment. [Diagram 31] FIG. 31 is a block diagram showing a partial configuration of a magnetic disk device according to the fourth embodiment, illustrating the configuration of a read channel and the like. [Diagram 32] FIG. 32 is a block diagram showing a partial configuration of a magnetic disk device, illustrating the configuration of a read channel, etc. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] The magnetic disk device 1 according to each embodiment and the magnetic disk device 1 according to each modification will be described below with reference to the drawings.
[0009] (First embodiment) First, the configuration of a magnetic disk device 1 according to the first embodiment will be described. Fig. 1 is a block diagram showing the configuration of the magnetic disk device 1 according to the first embodiment. In this embodiment, the magnetic disk device 1 is a hybrid recording type magnetic disk device that selectively executes a normal recording type and a shingled recording type. However, the technology described below may be applied to a shingled recording type magnetic disk device or a normal recording type magnetic disk device.
[0010] 1, the magnetic disk device 1 includes a plurality of, for example, 1 to 10 disks (magnetic disks) DK as recording media, a spindle motor (SPM) 20 as a drive motor, a head stack assembly 22, a driver IC 120, a head amplifier integrated circuit (hereinafter, head amplifier IC or preamplifier) 130, a volatile memory 70, a buffer memory (buffer) 80, a non-volatile memory 90, and a system controller 110 which is a one-chip integrated circuit. The magnetic disk device 1 is also connected to a host system (hereinafter, simply referred to as a host) 100.
[0011] Each disk DK is formed to have a diameter of, for example, 97 mm (3.8 inches) and has a recording layer (magnetic recording layer) on both sides. In this embodiment, the magnetic disk device 1 includes 1 to 11 disks DK, but the number of disks DK is not limited to this. Also, the magnetic disk device 1 may include a single disk DK.
[0012] The head stack assembly 22 can control the movement of a head HD mounted on an arm 30 to a target position on the disk DK by driving a voice coil motor (hereinafter referred to as VCM) 24, that is, can seek. The disk DK has, as its data writable areas, a user data area U available for use by the user and a system area S in which information required for system management is written.
[0013] The head HD records and reproduces information on the disk DK. The head HD has a slider as its main body, and is equipped with a write head WHD and a read head RHD mounted on the slider. The write head WHD writes data to the recording layer of the disk DK. The read head RHD reads data from a data track on the recording layer of the disk DK.
[0014] The driver IC 120, under the control of the system controller 110 (more specifically, the MPU 60 described below), controls the driving of the SPM 20 and the VCM 24. The SPM 20 supports and rotates a plurality of disks DK.
[0015] The head amplifier IC 130 includes a read amplifier and a write driver. The read amplifier amplifies a read signal read from the disk DK and outputs it to the system controller 110 (more specifically, to a read / write (R / W) channel 140, described later). The write driver outputs a write current corresponding to a signal output from the R / W channel 140 to the head HD. The read amplifier corresponds to a preamplifier 3R, described later, and the write driver corresponds to a preamplifier 3W, described later.
[0016] The volatile memory 70 is a semiconductor memory in which stored data is lost when the power supply is cut off. The volatile memory 70 stores data and the like required for processing in each section of the magnetic disk device 1. The volatile memory 70 is a random access memory (RAM: Random Access Memory). The volatile memory 70 is, for example, a DRAM (Dynamic Random Access Memory). However, the volatile memory 70 may also be a SDRAM (Synchronous Dynamic Random Access Memory).
[0017] The buffer memory 80 is a semiconductor memory that temporarily records data and the like transmitted and received between the magnetic disk device 1 and the host 100. The buffer memory 80 may be configured integrally with the volatile memory 70. The buffer memory 80 is, for example, a DRAM, a static random access memory (SRAM), a SDRAM, a ferroelectric random access memory (FeRAM), or a magnetoresistive random access memory (MRAM).
[0018] The non-volatile memory 90 is a semiconductor memory that records stored data even when the power supply is cut off. The non-volatile memory 90 is, for example, a NAND type flash ROM (Flash Read Only Memory: FROM). However, the non-volatile memory 90 may also be a NOR type flash ROM.
[0019] The system controller (controller) 110 is realized, for example, by using a large scale integrated circuit (LSI) called a System-on-a-Chip (SoC) in which multiple elements are integrated on a single chip. The system controller 110 includes a read / write (R / W) channel 140, a hard disk controller (HDC) 150, and a microprocessor (MPU) 60. The system controller 110 is electrically connected to a driver IC 120, a head amplifier IC 130, a volatile memory 70, a buffer memory 80, a non-volatile memory 90, and a host 100.
[0020] The R / W channel 140 executes signal processing of read data transferred from the disk DK to the host 100 and write data transferred from the host 100 in response to instructions from the MPU 60. The R / W channel 140 has a circuit or function for modulating write data. The R / W channel 140 also has a circuit for measuring the signal quality of the read data and a circuit for equalizing and decoding the waveform of the read data, or these functions. The R / W channel 140 is electrically connected to, for example, the head amplifier IC 130, the HDC 150, the MPU 60, etc.
[0021] The HDC 150 controls data transfer between the host 100 and the R / W channel 140 in response to instructions from the MPU 60, which will be described later. The HDC 150 is electrically connected to, for example, the R / W channel 140, the MPU 60, the volatile memory 70, the buffer memory 80, the non-volatile memory 90, and the like.
[0022] The MPU 60 is a control unit that controls each part of the magnetic disk device 1, and is a main controller. The MPU 60 controls the VCM 24 via the driver IC 120, and executes servo control for positioning the head HD. The MPU 60 controls the write operation of data to the disk DK, and selects a storage destination for write data transferred from the host 100. The MPU 60 also controls the read operation of data from the disk DK, and controls the processing of read data transferred from the disk DK to the host 100. The MPU 60 is connected to each part of the magnetic disk device 1. The MPU 60 is electrically connected to, for example, the driver IC 120, the R / W channel 140, the HDC 150, and the like.
[0023] The MPU 60 includes a read / write processing unit 61, an error correction unit 65, etc. The MPU 60 executes the processing of each of these units, for example, the read / write processing unit 61, the error correction unit 65, etc., on firmware. The MPU 60 may include each of these units as a circuit.
[0024] The read / write processing unit 61 has a write processing unit 62 and a read processing unit 63. In accordance with a command from the host 100, the write processing unit 62 controls data write processing, and the read processing unit 63 controls data read processing. The write processing unit 62 can execute write processing to write data to the recording layer L of the disk DK. The read processing unit 63 can execute read processing to read data from the recording layer L. The read / write processing unit 61 controls the VCM 24 via the driver IC 120, positions the head HD to a target position (predetermined radial position) on the disk DK, and executes read processing or write processing.
[0025] The error correction unit 65 can recover data in the data area of the track of the disk DK. For example, when the read processing unit 63 detects that a read error has occurred in the data area of the track of the disk DK1, the error correction unit 65 can recover the data in the data area based on the data in the data area and the parity in the parity area, and write the recovered data to the data area.
[0026] The error correction unit 65 executes a process (hereinafter, sometimes referred to as ECC process or error correction process) for correcting errors (mistakes) in error data or error sectors based on an error correction code (ECC). The error correction unit 65 executes ECC process (hereinafter, sometimes referred to as track ECC process or sector ECC process) on the error data or error sectors based on an ECC (hereinafter, sometimes referred to as track ECC) corresponding to the error data of a specific track or an ECC (hereinafter, sometimes referred to as sector ECC) corresponding to the error sector. The ECC process corresponds to error correction or error correction process on a sector basis.
[0027] FIG. 2 is a perspective view showing a part of the magnetic disk device 1, and shows a plurality of disks DK and a plurality of heads HD. As shown in Fig. 2, the direction in which the disk DK rotates in the circumferential direction of the disk DK is referred to as the rotation direction d3. In the example shown in Fig. 2, the rotation direction is shown counterclockwise, but it may be the opposite direction (clockwise). The movement direction d2 of the head HD relative to the disk DK is opposite to the rotation direction d3. The movement direction d2 is the direction in which the head HD sequentially writes and reads data to the disk DK in the circumferential direction, that is, the direction in which the head HD moves relative to the disk DK in the circumferential direction.
[0028] The magnetic disk device 1 includes i disks, disks DK1 to DKi, and j heads, heads HD1 to HDj. In this embodiment, the number of heads HD is twice the number of disks DK (j=2×i). The disks DK1 to DKi are provided coaxially and stacked with a gap between them. The disks DK1 to DKi have the same diameter. Here, terms such as "same," "identical," "matched," and "equivalent" not only mean exactly the same, but also mean different enough to be considered substantially the same. The disks DK1 to DKi may have different diameters.
[0029] Each disc DK has a recording layer L on both sides. For example, disc DK1 has a first recording layer La1 and a second recording layer Lb1 on the opposite side of the first recording layer La1. Disc DK2 has a first recording layer La2 and a second recording layer Lb2 on the opposite side of the first recording layer La2. Disc DKi has a first recording layer Lai and a second recording layer Lbi on the opposite side of the first recording layer Lai. Each first recording layer La may be referred to as a front surface or a recording surface. Each second recording layer Lb may be referred to as a back surface or a recording surface.
[0030] Each recording layer L has a user data area U and a system area S. The first recording layer La1 has a user data area Ua1 and a system area Sa1. The second recording layer Lb1 has a user data area Ub1 and a system area Sb1. The first recording layer La2 has a user data area Ua2 and a system area Sa2. The second recording layer Lb2 has a user data area Ub2 and a system area Sb2. The first recording layer Lai has a user data area Uai and a system area Sai. The second recording layer Lbi has a user data area Ubi and a system area Sbi.
[0031] In the user data area Ua1 (first recording layer La1), the track between the double dashed lines in the figure is designated as track Ta1. In the user data area Ub1 (second recording layer Lb1), the track located on the opposite side of track Ta1 is designated as track Tb1. In the user data area Ua2 (first recording layer La2), the track between the double dashed lines in the figure is designated as track Tc1. In the user data area Ub2 (second recording layer Lb2), the track located on the opposite side of track Tc1 is designated as track Td1. In the user data area Uai (first recording layer Lai), the track between the double dashed lines in the figure is designated as track Te1. In the user data area Ubi (second recording layer Lbi), the track located on the opposite side of track Te1 is designated as track Tf1. In this embodiment, the tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 are located on the same cylinder.
[0032] The head HD faces the disk DK. In this embodiment, one head HD faces each recording layer L of the disk DK. For example, the head HD1 faces the first recording layer La1 of the disk DK1, writes data to the first recording layer La1, and reads data from the first recording layer La1. The head HD2 faces the second recording layer Lb1 of the disk DK1, writes data to the second recording layer Lb1, and reads data from the second recording layer Lb1.
[0033] The head HD3 faces the first recording layer La2 of the disk DK2, and writes data to and reads data from the first recording layer La2. The head HD4 faces the second recording layer Lb2 of the disk DK2, and writes data to and reads data from the second recording layer Lb2. The head HDj-1 faces the first recording layer Lai of the disk DKi, and writes data to and reads data from the first recording layer Lai. The head HDj faces the second recording layer Lbi of the disk DKi, and writes data to and reads data from the second recording layer Lbi.
[0034] 3 is a schematic diagram showing an example of the arrangement of a plurality of servo regions SV and a plurality of data regions DTR of one disk DK according to this embodiment. As shown in FIG. 3, in the radial direction d1 of the disk DK, the direction toward the outer periphery of the disk DK is called the outward direction (outside), and the opposite direction to the outward direction is called the inward direction (inside). In FIG. 3, the user data area U is divided into an inner area IR located inward, an outer area OR located outward, and a middle area MR located between the inner area IR and the outer area OR.
[0035] The disk DK has a plurality of servo areas SV and a plurality of data areas DTR. The plurality of servo areas SV may extend radially in the radial direction of the disk DK and be arranged discretely at a predetermined interval in the circumferential direction. The plurality of servo areas SV may extend linearly from the inner circumference to the outer circumference and be arranged discretely at a predetermined interval in the circumferential direction. The plurality of servo areas SV may extend spirally from the inner circumference to the outer circumference and be arranged discretely at a predetermined interval in the circumferential direction. The plurality of servo areas SV may also be arranged in an island shape in the radial direction and be arranged discretely at a predetermined interval in the circumferential direction.
[0036] Hereinafter, one servo area SV in a given track may be referred to as a "servo sector." Note that a "servo area SV" may also be referred to as a "servo sector SV." A servo sector contains servo data. Hereinafter, "the arrangement of several servo data constituting a servo sector" may also be referred to as a "servo pattern." Note that "servo data written to a servo sector" may also be referred to as a "servo sector."
[0037] Each of the data regions DTR is disposed between the servo regions SV. For example, the data region DTR corresponds to a region between two consecutive servo regions SV in the circumferential direction. Hereinafter, one data region DTR in a given track may be referred to as a "data sector". The "data region DTR" may be referred to as a "data sector DTR". The data sector includes user data. The "user data written in the data sector" may be referred to as a "data sector". The "data sector" may be referred to as "user data". A "pattern consisting of several data" may be referred to as a "data pattern". In the example shown in FIG. 2, the data pattern of a given track is composed of a plurality of servo data (servo sectors) and a plurality of user data (data sectors).
[0038] The servo area SV has a plurality of zone servo areas ZSV, etc. In addition to the zone servo area ZSV, the servo area SV may also include an area including a gap (a deviation in the circumferential position of two zone servo areas), an area including servo data, and a data area DTR, etc. The plurality of zone servo areas ZSV are discretely arranged along the radial direction. Each of the plurality of zone servo areas ZSV extends in the radial direction.
[0039] One zone servo area (servo area) ZSV in a specified track may be referred to as a "zone servo sector" or a "servo sector." Note that a "zone servo area (servo area) ZSV" may be referred to as a "zone servo sector ZSV" or a "servo sector ZSV." "Servo data written in a zone servo sector" may be referred to as a "zone servo sector" or a "servo sector." Hereinafter, "the arrangement of several servo data constituting a zone servo sector" may be referred to as a "zone servo pattern" or a "servo pattern." Hereinafter, one servo area SV in a specified track may be referred to as a "zone pattern sector."
[0040] The "servo area SV" may also be referred to as a "zone pattern sector." "At least one piece of data, etc. written to a zone pattern sector" may also be referred to as a "zone pattern sector." A zone pattern sector includes at least one zone servo sector. Hereinafter, the "data pattern of a zone pattern sector" may also be referred to as a "zone data pattern."
[0041] In the example shown in Fig. 3, the servo area SV has zone servo areas ZSV0, ZSV1, and ZSV2. The zone servo areas ZSV0, ZSV1, and ZSV2 are arranged in a staggered manner in the radial direction. The zone servo areas ZSV0, ZSV1, and ZSV2 may be arranged in a stepped manner in the radial direction.
[0042] The zone servo area ZSV2 is located on the inner side of the zone servo area ZSV1. The zone servo area ZSV0 is located on the outer side of the zone servo area ZSV1. For example, the zone servo area ZSV2 is arranged from the inner area IR to the middle area MR, the zone servo area ZSV1 is arranged from the inner area IR to the outer area OR, and the zone servo area ZSV0 is arranged from the middle area MR to the outer area OR. Hereinafter, in a given servo area SV, a given radial area in which a plurality of zone servo areas ZSV are arranged in the circumferential direction may be referred to as a zone servo boundary area, a double servo area, or a double zone servo area ZB.
[0043] In the example shown in FIG. 3, the primary servo areas SVO and the secondary servo areas SVE are alternately arranged at intervals in the circumferential direction. For example, one secondary servo area SVE is arranged between two primary servo areas SVO that are arranged in succession at intervals in the circumferential direction. In other words, one secondary servo area SVE is arranged between two primary servo areas SVO that are arranged in succession at intervals in the circumferential direction. For example, if consecutive numbers are assigned to all servo areas SV of the disk DK in order, the primary servo area SVO corresponds to the odd-numbered servo area SV, and the secondary servo area SVE corresponds to the even-numbered servo area SV. Note that two or more secondary servo areas SVE may be arranged between two primary servo areas SVO that are arranged in succession at intervals in the circumferential direction.
[0044] The primary servo area SVO and the secondary servo area SVE may be, for example, composed only of a servo area (hereinafter, sometimes referred to as a normal servo area) that reads and demodulates servo data as a whole. Hereinafter, "reading and demodulating servo data" may be referred to as "servo reading". The primary servo area SVO and the secondary servo area SVE may be, for example, composed of a normal servo area and a servo area (hereinafter, sometimes referred to as a short servo area) that servo reads a circumferential range of servo data that is smaller than the circumferential range of servo data servo read in the normal servo area.
[0045] The media cache M is allocated to the disk DK. However, the media cache M does not have to be located on the disk DK. By using the above-mentioned plurality of servo data, it is possible to position the head HD so as to obtain a predetermined off-track amount, and to detect the amount and direction of the head HD's wobble.
[0046] In the description of this embodiment, the number of zones on the disk DK is three, but the number of zones on the disk DK can be changed in various ways. The number of zones on the disk DK may be 30 to 40. Each zone has multiple bands. For example, each zone has several hundred bands.
[0047] Fig. 4 is a schematic diagram showing three tracks STR in the user data area U of the disk DK shown in Fig. 3 where shingled recording processing is performed, and the write head WHD. The user data area U is a shingled recording area. In the user data area U, data is permitted to be written sequentially in band units, that is, shingled recording is permitted. The tracks STR are data tracks.
[0048] As shown in Fig. 4, the write head WHD can sequentially write data to the disk DK in the travel direction d2. The read head RHD shown in Fig. 3 can also sequentially read data written to the disk DK in the travel direction d2.
[0049] A direction in which a plurality of tracks STR are continuously shingled-recorded in a direction parallel to the radial direction d1, that is, a direction in which the track STR to be written next is overlapped with the track STR written previously in the radial direction d1, is referred to as an overwrite direction or a recording progress direction. In the band BAe shown in FIG. 4, the overwrite direction is an inward direction, but the overwrite direction may be an outward direction. For example, the overwrite direction applied to multiple bands BA (multiple zones Z) located on the outer side of a specific radial position may be opposite to the overwrite direction applied to multiple bands BA (multiple zones Z) located on the inner side of a specific radial position.
[0050] Band BAe has a plurality of tracks STR, including tracks STRe, STRe+1, and STRe+2. Tracks STRe, STRe+1, and STRe+2 are continuously overwritten in the overwrite direction in the order of their description. Of tracks STRe, STRe+1, and STRe+2, track STRe corresponds to the track on which data is written first, and track STRe+2 corresponds to the track on which data is written last.
[0051] The track STRe has a track center STCe at the center in the radial direction d1 when no other tracks have been overwritten. The track STRe+1 has a track center STCe+1 at the center in the radial direction d1 when no other tracks have been overwritten. The track STRe+2 has a track center STCe+2 at the center in the radial direction d1 when no other tracks have been overwritten.
[0052] In the example shown in Fig. 4, tracks STRe, STRe+1, and STRe+2 are written at a pitch (shingled recording track pitch) STP. The track center STCe of track STRe and the track center STCe+1 of track STRe+1 are separated by a pitch STP in the radial direction d1. The track center STCe+1 of track STRe+1 and the track center STCe+2 of track STRe+2 are separated by a pitch STP in the radial direction d1. Tracks STRe to STRe+2 may be written at different pitches.
[0053] The width in the radial direction d1 of the area of the track STRe where the track STRe+1 is not overwritten is the same as the width in the radial direction d1 of the area of the track STRe+1 where the track STRe+2 is not overwritten. Note that the width in the radial direction d1 of the area of the track STRe where the track STRe+1 is not overwritten may be different from the width in the radial direction d1 of the area of the track STRe+1 where the track STRe+2 is not overwritten.
[0054] In FIG. 4, for convenience of explanation, each track STR is shown in a rectangular shape, but in reality, each track STR is curved along the circumferential direction. Also, each track STR may be wavy extending in the circumferential direction while fluctuating in the radial direction d1. In FIG. 4, three tracks STR are overwritten, but more than three tracks STR may be overwritten. It is sufficient that a plurality of tracks STR are overwritten in units of band BAe.
[0055] The write processing unit 62 can execute the write process by selecting a shingled recording format in which data is written to a plurality of tracks STR overlapping in the radial direction d1 of the disk DK. In the example shown in Fig. 4, the write processing unit 62 sequentially performs shingled recording on tracks STRe to STRe+2 in band BAe in the inward direction (overwriting direction) at pitch STP.
[0056] The write processing unit 62 writes track STRe+1 inwardly of track STRe at pitch STP, and overwrites track STRe+1 on a part of the inner circumference side of track STRe. The write processing unit 62 writes track STRe+2 inwardly of track STRe+1 at pitch STP, and overwrites track STRe+2 on a part of the inner circumference side of track STRe+1.
[0057] Fig. 5 is a schematic diagram showing three tracks CTR of the media cache M where normal recording processing of the disk DK shown in Fig. 3 is performed, and the write head WHD. The media cache M and the system area S shown in Fig. 3 are normal recording areas. In the media cache M and the system area S, it is permitted to write data randomly, that is, normal recording is permitted. The track CTR is a data track.
[0058] 5, the media cache M has a plurality of tracks CTR including tracks CTRe, CTRe+1, and CTRe+2. For example, the width (track width) of the tracks CTRe, CTRe+1, and CTRe+2 in the radial direction d1 is the same. Note that the track widths of the tracks CTRe to CTRe+2 may be different from each other.
[0059] The track CTRe has a track center CTCe at the center in the radial direction d1, the track CTRe+1 has a track center CTCe+1 at the center in the radial direction d1, and the track CTRe+2 has a track center CTCe+2 at the center in the radial direction d1. In the example shown in Fig. 4, the tracks CTRe, CTRe+1, and CTRe+2 are written at a pitch (normal recording track pitch) CTP. The track center CTCe of the track CTRe and the track center CTCe+1 of the track CTRe+1 are separated by the pitch CTP. The track center CTCe+1 of the track CTRe+1 and the track center CTCe+2 of the track CTRe+2 are separated by the pitch CTP.
[0060] The track CTRe and the track CTRe+1 are separated by a gap GP. The track CTRe+1 and the track CTRe+2 are separated by a gap GP. The tracks CTRe to CTRe+2 may be written at different pitches. In FIG. 5, for convenience of explanation, each track CTR is shown as a rectangle, but in reality, each track CTR is curved along the circumferential direction. Also, each track CTR may be wavy and extend in the circumferential direction while fluctuating in the radial direction d1.
[0061] The write processing unit 62 can select a normal recording format in which data is written to a plurality of tracks CTR at intervals in the radial direction d1 of the disk DK and execute the write processing. In the example shown in Fig. 4, the write processing unit 62 performs normal recording on the track CTRe or a predetermined sector of the track CTRe in a predetermined area of the disk DK by positioning the write head WHD at the track center CTCe.
[0062] The write processing unit 62 positions the write head WHD at a track center CTCe+1 that is spaced inward from the track center CTCe of the track CTRe by the pitch CTP, and performs normal recording on the track CTRe+1 or a predetermined sector of the track CTRe+1. The write processing unit 62 positions the write head WHD at a track center CTCe+2 that is spaced inward from the track center CTCe+1 of the track CTRe+1 by the pitch CTP, and performs normal recording on the track CTRe+2 or a predetermined sector of the track CTRe+2.
[0063] The write processing unit 62 may normally record tracks CTRe, CTRe+1, and CTRe+2 sequentially in a predetermined area of the disk DK, or may normally record randomly in a predetermined sector of track CTRe, a predetermined sector of track CTRe+1, and a predetermined sector of track CTRe+2.
[0064] Fig. 6 is a schematic diagram showing an example of data write processing in a disk DK. As shown in Fig. 6, the user data area U has bands BAa, BAb, and BAc. The bands BAa, BAb, and BAc belong to the same zone (first zone Zu). In the first zone Zu, the bands BAa, BAb, and BAc are intermittently arranged in the overwrite direction in the order of their description.
[0065] The first zone Zu is provided in a first data area of the recording layer L of the disc DK. In this embodiment, the first zone Zu (first data area) is located on the outer periphery side of the user data area U.
[0066] The bands BAa and BAb are adjacent to each other in the radial direction d1, and the bands BAb and BAc are adjacent to each other in the radial direction d1. Band BAa includes tracks STRa1, STRa2, STRa3, ..., STRa(x-2), STRa(x-1), and STRax. Each of the multiple tracks STR is a data track. Tracks STRa1 to STRax are shingled in the overwrite direction in the order of their description. In band BAa, track STRa1 corresponds to the first track to which data is written first, and track STRax corresponds to the last track to which data is written last.
[0067] Band BAb includes tracks STRb1, STRb2, STRb3, ..., STRb(x-2), STRb(x-1), and STRbx. Tracks STRb1 to STRbx are shingled in the overwrite direction in the order of their description. In band BAb, track STRb1 corresponds to the first track to which data is written first, and track STRbx corresponds to the last track to which data is written last.
[0068] Band BAc includes tracks STRc1, STRc2, STRc3, ..., STRc(x-2), STRc(x-1), and STRcx. Tracks STRc1 to STRcx are shingled in the overwrite direction in the order of their description. In band BAc, track STRc1 corresponds to the first track to which data is written first, and track STRcx corresponds to the last track to which data is written last.
[0069] The number of tracks STR in each band BA belonging to the same zone Z is the same. For example, the number of tracks STR in each band BA belonging to the first zone Zu is the same. In other words, the number of tracks STR in each band BA is fixed for each zone Z.
[0070] Fig. 6 shows tracks CTRx-1 and CTRx. In Fig. 6, tracks CTRx-1 and CTRx are normally recorded in the media cache M or the system area S. Tracks CTRx-1 and CTRx are adjacent to each other in the radial direction d1.
[0071] The shingled recording method differs from the normal recording method in that part of the track STR is overwritten, and therefore the MPU 60 manages the tracks of the user data area U in units called bands.
[0072] A guard band is generally provided between adjacent bands BA in the radial direction d1. The guard band includes one or more guard tracks and serves to suppress interference between adjacent bands BA. The guard band makes it possible to perform shingled recording in units of one band BA, and also to separate the range (band BA) to be written sequentially.
[0073] The recording capacity of each band BA in the user data area U is usually determined in advance based on the specifications required by the user. The MPU 60 can record the same amount of data in each band BA. Generally, the recording capacity of each band BA is 128 MiB or 256 MiB.
[0074] Fig. 7 is a schematic diagram showing two tracks STRk, STR(k+1) in a second zone Zw located on the inner side of the first zone Zu in the user data area U. In Fig. 7, the tracks STRk, STR(k+1) are shown as rectangular, but in reality, the tracks STRk, STR(k+1) are curved along the circumferential direction. Also, in Fig. 7, the servo areas of each track STR are omitted.
[0075] 7, the second zone Zw is provided in a second data area located radially shifted from the first data area in the recording layer L of the disc DK. In this embodiment, the second data area is located on the inner periphery side of the first data area.
[0076] Each track STR has a plurality of sectors SC. Each track STR is a data track, and each sector SC is a data sector. The number of sectors SC in each track STR belonging to the same zone Z is the same.
[0077] The track STRk has six sectors: sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, and parity sector SCP0. The data written to the parity sector SCP0 is parity generated based on the multiple sectors SC0, SC1, SC2, SC3, and SC4 of the track STRk. The parity of the parity sector SCP0 is parity for error correction generated by performing an exclusive OR (XOR) operation on the data of the multiple sectors SC0 to SC4.
[0078] Track STR(k+1) has six sectors: sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity sector SCP1. Data written to parity sector SCP1 is parity generated based on multiple sectors SC5, SC6, SC7, SC8, and SC9 of track STR(k+1). The parity of parity sector SCP1 is parity for error correction generated by performing an XOR operation on the data of multiple sectors SC5 to SC9.
[0079] In the figure, the areas indicating sectors SC0, SC1, SC2, SC3, SC4, and parity sector SCP0 are shaded, and the outer periphery of the areas indicating parity sectors SCP0 and SCP1 is indicated by a thick line.
[0080] In the second zone Zw (second data area), all of the sectors SC are assigned to the same track STR. For example, all of the sectors SC0 are assigned to the track STRk, all of the sectors SC1 are assigned to the track STRk, and all of the parity sectors SCP0 are assigned to the track STRk. In this embodiment, the track STRk of the second zone Zw functions as a third data track, and the sector SC0 of the second zone Zw functions as a third data sector.
[0081] In a second data area, such as the second zone Zw, which is located on the inner side of a predetermined radial position, all of the sectors SC are assigned to the same track STR. The predetermined radial position is, for example, the boundary between zones Z. The number of sectors SC in each track STR decreases as the zone Z moves toward the inner side. Compared to the first data area (first zone Zu), the track density is lower or the data recording quality is lower in the second data area. The track density refers to the number of tracks STR per inch in the radial direction d1, and is expressed in TPI (tracks per inch). As described above, the recording layer L may have a second data area (such as a second zone Zw) in which all of the sectors SC are assigned to the same track STR.
[0082] Fig. 8 is a schematic diagram showing two tracks STRk, STR(k+1) in the first zone Zu on the outer circumferential side of the second zone Zw in Fig. 7. In Fig. 8, the tracks STRk, STR(k+1) are shown as rectangular, but in reality, the tracks STRk, STR(k+1) are curved along the circumferential direction. Also, in Fig. 8, the servo areas of each track STR are omitted.
[0083] As shown in Fig. 8, the first zone Zu is provided in the first data area of the recording layer L of the disc DK. Each track STR has a plurality of segments SE. Each segment SE constitutes a part of a corresponding sector SC. Each track STR is a data track, and each sector SC is a data sector. Each track STR belonging to the same zone Z has the same number of segments SE.
[0084] The track STRk has 12 segments: segment SE0a, segment SE1a, segment SE2a, segment SE3a, segment SE4a, segment SEP0a, segment SE5a, segment SE6a, segment SE7a, segment SE8a, segment SE9a, and segment SEP1a.
[0085] The data written to the segment SEP0a is a parity segment generated based on the multiple segments SE0a, SE1a, SE2a, SE3a, and SE4a of the track STRk. The parity segment of the segment SEP0a is a parity segment for error correction generated by performing an XOR operation on the data of the multiple segments SE0a to SE4a.
[0086] The data written to the segment SEP1a is a parity segment generated based on the multiple segments SE5a, SE6a, SE7a, SE8a, and SE9a of the track STRk. The parity segment of the segment SEP1a is a parity segment for error correction generated by performing an XOR operation on the data of the multiple segments SE5a to SE9a.
[0087] The track STR(k+1) has 12 segments: segment SE0b, segment SE1b, segment SE2b, segment SE3b, segment SE4b, segment SEP0b, segment SE5b, segment SE6b, segment SE7b, segment SE8b, segment SE9b, and segment SEP1b.
[0088] The data written to the segment SEP0b is a parity segment generated based on the multiple segments SE0b, SE1b, SE2b, SE3b, and SE4b of the track STR(k+1). The parity segment of the segment SEP0b is a parity segment for error correction generated by performing an XOR operation on the data of the multiple segments SE0b to SE4b.
[0089] The data written to the segment SEP1b is a parity segment generated based on the multiple segments SE5b, SE6b, SE7b, SE8b, and SE9b of the track STR(k+1). The parity segment of the segment SEP1b is a parity segment for error correction generated by performing an XOR operation on the data of the multiple segments SE5b to SE9b.
[0090] Each sector SC is divided into a first segment and a second segment. In this embodiment, each sector SC is divided into a segment SEa provided on a track STRk and corresponding to the first half of the sector SC, and a segment SEb provided on a track STR(k+1) and corresponding to the second half of the sector SC.
[0091] It should be noted that a person skilled in the art would be able to determine that the segments SEa and SEb constitute the same sector SC. In the first zone Zu (first data area), the sectors SC are not all assigned to the same track STR.
[0092] Segment SE0a and segment SE0b adjacent in the radial direction d1 constitute sector SC0. Segment SE1a and segment SE1b adjacent in the radial direction d1 constitute sector SC1. Segment SE2a and segment SE2b adjacent in the radial direction d1 constitute sector SC2. Segment SE3a and segment SE3b adjacent in the radial direction d1 constitute sector SC3. Segment SE4a and segment SE4b adjacent in the radial direction d1 constitute sector SC4. Segment SEP0a and segment SEP0b adjacent in the radial direction d1 constitute parity sector SCP0.
[0093] Segment SE5a and segment SE5b adjacent in the radial direction d1 constitute sector SC5. Segment SE6a and segment SE6b adjacent in the radial direction d1 constitute sector SC6. Segment SE7a and segment SE7b adjacent in the radial direction d1 constitute sector SC7. Segment SE8a and segment SE8b adjacent in the radial direction d1 constitute sector SC8. Segment SE9a and segment SE9b adjacent in the radial direction d1 constitute sector SC9. Segment SEP1a and segment SEP1b adjacent in the radial direction d1 constitute parity sector SCP1.
[0094] In the figure, among sectors SC0, SC1, SC2, SC3, SC4, and parity sector SCP0, the areas showing the multiple segments SEa of track STRk are shaded, and the areas showing the multiple segments SEb of track STR(k+1) are dotted. Also, the outer periphery of the areas showing segments SEP0a, SEP0b, SEP1a, and SEP1b is shown with a thick line. In this embodiment, track STRk of the first zone Zu functions as a first data track, and track STR(k+1) of the first zone Zu functions as a second data track.
[0095] For example, if segments SE0b and SE1b of track STR(k+1) are squeezed toward track STRk during a write process, segments SE0a and SE1a of track STRk are adversely affected. For example, when segment SE0b is squeezed toward track STRk, the center of the radial direction d1 of segment SE0b moves away from the target position in the radial direction d1 (e.g., the track center of track STR(k+1)) toward track STRk, which is an undesirable event. The data of segments SE0a and SE1a is overwritten by the data of segments SE0b and SE1b.
[0096] However, segments SE0b and SE1b are farther away from the adjacent track STR(k+2), not shown. Of sector SC0, segment SE0a is adversely affected by squeezing, but segment SE0b is not. Similarly, of sector SC1, segment SE1a is adversely affected by squeezing, but segment SE1b is not adversely affected by squeezing. The area of each of sectors SC0 and SC1 that is adversely affected by squeezing is not the entire area, but 1 / 2 of the area.
[0097] In addition, in FIG. 7, if sector SC5 of track STR(k+1) is squeezed toward track STRk during a write process, the entire area of sector SC0 of track STRk will be adversely affected.
[0098] The adverse effect of squeezing in each of the sectors SC0 and SC1 in Fig. 8 is reduced to 1 / 2 compared to sector SC0 in Fig. 7. Also, by dividing each sector SC into two and disposing it on two tracks STR, it is possible to contribute to a high TPI.
[0099] For example, if sector SC5 is squeezed 5 nm toward sector SC0 during a write process in the second zone Zw in Figure 7, the error correction unit 65 will not be able to recover the data in sector SC0, and a read error will occur during a read process of sector SC0. In contrast, even if the segments SE0b and SE1b are squeezed 10 nm toward the segments SE0a and SE1a during a write process in the first zone Zu in Fig. 8, the error correction unit 65 can recover the data of the segments SE0a and SE1a. Therefore, the reduction in the squeeze margin can contribute to a higher TPI, and the recording density can be improved.
[0100] As another example, when the six segments SE0b to SE4b and SEP0b of the track STR(k+1) are squeezed toward the track STRk, the segments SE0a to SE4a and SEP0a of the track STRk are adversely affected. If the amount of squeezing is large, read errors occur in the six segments SE0a to SE4a and SEP0a. Even if the error correction unit 65 performs ECC processing, it can only restore a maximum of three segments among the segments SE0a to SE4a and SEP0a. The restoration ability is determined by the hardware configuration and the signal processing ability. There is a limit to the correction ability of the ECC processing.
[0101] FIG. 9 is a block diagram showing a partial configuration of the magnetic disk device 1, and shows the configuration of the write channel 4W and the like. As shown in FIG. 9, the write channel 4W of the R / W channel 140 includes a Run Length Limited (RLL) encoder 4W1, a Low Density Parity Check (LDPC) encoder 4W2, a volatile memory 4W3, and a parity generator 4W4.
[0102] The RLL encoder 4W1 and the LDPC encoder 4W2 function as a data processing unit that processes received data. In this embodiment, the data processing unit performs a process of encoding the received data. The received data is RLL-encoded by the RLL encoder 4W1, and LDPC-encoded by the LDPC encoder 4W2. The parity generation unit 4W4 is configured to perform an XOR operation on the data processed by the data processing units (the RLL encoder 4W1 and the LDPC encoder 4W2).
[0103] The volatile memory 4W3 inside the write channel 4W includes a plurality of storage areas such as a first storage area, a second storage area, a third storage area, and a fourth storage area. The data processed by the data processing unit and the data XORed by the parity generating unit 4W4 are written to the volatile memory 4W3. The volatile memory 4W3 is a RAM and functions as a first memory.
[0104] The data processed by the data processing unit and the data XORed by the parity generation unit 4W4 are temporarily stored in the volatile memory 4W3. For example, the data in the volatile memory 4W3 is transferred to the volatile memory 70. The volatile memory 70 functions as a second memory. The volatile memory 70 includes a plurality of recording areas, such as a first recording area and a second recording area. The volatile memory 70 has a recording capacity capable of recording at least two tracks' worth of data out of a plurality of tracks (a plurality of data tracks). The data processed by the data processing unit and the data XORed by the parity generation unit 4W4 are written to the volatile memory 70.
[0105] The multiple addresses in the volatile memory 70 are linked, and the data for multiple segments SE of the track STRk is retransferred to the volatile memory 4W3 and sent to the write head WHD via the preamplifier 3W of the head amplifier IC 130, and written to the track STRk. The volatile memory 70 continues to hold the data for multiple segments SE of the track STR(k+1). After writing of the data to the track STRk is completed, the write head WHD seeks to the track STR(k+1), and the data for multiple segments SE of the track STR(k+1) is retransferred from the volatile memory 70 to the volatile memory 4W3, sent to the write head WHD via the preamplifier 3W, and written to the track STR(k+1).
[0106] Alternatively, the data may be sent to the write head WHD via the preamplifier 3W without being transferred from the volatile memory 4W3 to the volatile memory 70.
[0107] Data received from the host 100 first enters the buffer memory 80 (cache), and is then sent to the write channel 4W and the volatile memory 70. However, the data received from the host 100 may be sent to the write channel 4W without entering the buffer memory 80.
[0108] FIG. 10 is a block diagram showing a partial configuration of the magnetic disk device 1, and shows the configuration of the read channel 4R, etc. As shown in FIG. 10, the read channel 4R of the R / W channel 140 includes low pass filters (LPF) 4R1a and 4R1b, analog to digital converters (ADC) 4R2a and 4R2b, finite impulse response (FIR) filters 4R3a and 4R3b, Viterbi detectors 4R4a and 4R4b, and LDPC decoders 4R5a and 4R5b.
[0109] The LPF4R1a is connected to the read head RHD1 of the head HD via the preamplifier 3R1 of the head amplifier IC 130. The LPF4R1a can remove noise contained in the first read signal read by the read head RHD1 and amplified by the preamplifier 3R1. The ADC4R2a is connected to the LPF4R1a and can convert the first read signal into a digital signal.
[0110] The FIR filter 4R3a is connected to the ADC 4R2a. The FIR filter 4R3a is a one-dimensional FIR filter. The FIR filter 4R3a can perform waveform equalization processing to equalize the waveform of the first read signal so that the error rate of the first read signal is minimized. The FIR filter 4R3a can output first waveform equalization data.
[0111] The Viterbi decoder 4R4a is connected to the FIR filter 4R3a. The Viterbi decoder 4R4a is a one-dimensional Viterbi decoder. The Viterbi decoder 4R4a can output first decoded data obtained by decoding the first waveform equalization data.
[0112] The LDPC decoder 4R5a is connected to the Viterbi decoder 4R4a. The LDPC decoder 4R5a can perform LDPC code decoding processing (error detection and correction processing) on the first decoded data. The data (signal) processed by the LDPC decoder 4R5a is sent to the HDC 150.
[0113] The LPF4R1b is connected to the read head RHD2 of the head HD via the preamplifier 3R2 of the head amplifier IC 130. The LPF4R1b can remove noise contained in the second read signal that is read by the read head RHD2 and amplified by the preamplifier 3R2. The ADC4R2b is connected to the LPF4R1b and can convert the second read signal into a digital signal.
[0114] The FIR filter 4R3b is connected to the ADC 4R2b. The FIR filter 4R3b is a one-dimensional FIR filter. The FIR filter 4R3b can perform waveform equalization processing to equalize the waveform of the second read signal so that the error rate of the second read signal is minimized. The FIR filter 4R3b can output second waveform equalization data.
[0115] The Viterbi decoder 4R4b is connected to the FIR filter 4R3b. The Viterbi decoder 4R4b is a one-dimensional Viterbi decoder. The Viterbi decoder 4R4b can output second decoded data obtained by decoding the second waveform equalization data.
[0116] The LDPC decoder 4R5b is connected to the Viterbi decoder 4R4b. The LDPC decoder 4R5b can perform LDPC code decoding processing (error detection and correction processing) on the second decoded data. The data (signal) processed by the LDPC decoder 4R5b is sent to the HDC 150.
[0117] The read channel 4R in Fig. 10 is a read channel block capable of simultaneously reading data of two tracks STR. The read channel path including the read head RHD1, LPF 4R1a, ADC 4R2a, FIR filter 4R3a, Viterbi decoder 4R4a, and LDPC decoder 4R5a reads only the track STRk. The read channel path including the read head RHD2, LPF 4R1b, ADC 4R2b, FIR filter 4R3b, Viterbi decoder 4R4b, and LDPC decoder 4R5b reads only the track STR(k+1).
[0118] The internal calculations of the FIR filter 4R3a, the Viterbi decoder 4R4a, the FIR filter 4R3b, and the Viterbi decoder 4R4b are algorithms that take one track into consideration. The internal tap coefficients in the FIR filter 4R3, the signal average value in the metric calculation of the Viterbi decoder 4R4, the noise variance value, and the tap coefficients of the noise whitening filter are optimized so as to minimize the BER (Bit Error Rate).
[0119] Fig. 11 is a schematic diagram showing a part of the two tracks STRk, STR(k+1) and two read heads RHD1, RHD2 in Fig. 8, and is a diagram for explaining the read processing method according to this embodiment. For convenience of explanation, each track STR is shown in a rectangular shape in Fig. 11.
[0120] 11, the size of each sector SC is 4096 bytes or 512 bytes. In this embodiment, each sector SC is divided into two segments SE, and therefore the size of each segment SE is 2048 bytes or 256 bytes.
[0121] In the circumferential direction of the disk DK, the distance between the read heads RHD1 and RHD2 is about 10 bits, which is sufficiently shorter than the length of the segment SE. For example, the data of the segments SE3a and SE3b adjacent to each other in the radial direction d1 can be read simultaneously by the read heads RHD1 and RHD2, and the data of the sector SC3 can be read all at once. The read head RHD1 functions as the first read head, and the read head RHD2 functions as the second read head.
[0122] 11 and 1, the arm 30 supports the read head RHD1 and the read head RHD2. The VCM 24 as an actuator can move the arm 30. The read processing unit 63 can execute a read process for reading data from the recording layer L of the disk DK.
[0123] The read processing unit 63 drives the VCM 24, controls the seek operation of the read heads RHD1 and RHD2, and moves the read head RHD1 to a position facing the track STRk. For example, the read processing unit 63 can simultaneously read data in the segment SE3a of the track STRk and data in the segment SE3b of the track STR(k+1) with the read heads RHD1 and RHD2.
[0124] Thereafter, the read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1 and RHD2, and can move the read head RHD1 to a position facing track STR(k+2). During read processing, the seek operation can be performed in units of two tracks. The read processing unit 63 can simultaneously read data on track STR(k+2) and data on track STR(k+3) adjacent to track STR(k+2) with the read heads RHD1 and RHD2.
[0125] According to the above-mentioned read processing method, the magnetic disk device 1 is equipped with two read heads RHD1 and RHD2. Therefore, data on tracks STRk and STR(k+1) can be read in one rotation of the disk DK. Since data on tracks STRk and STR(k+1) can be read simultaneously, the efficiency of data read processing can be improved.
[0126] For example, if the magnetic disk device 1 has one read head RHD, it will take more than two rotations to read the data on the tracks STRk and STR(k+1). In that case, the time required for the seek operation and rotational delay operation increases, making it difficult to improve the efficiency of the data read process.
[0127] Next, the write processing method according to this embodiment will be explained. Figures 12, 13, and 14 are flowcharts showing the write processing method according to this embodiment. 12, 1, 8, and 9, the arm 30 supports the write head WHD. The write processing unit 62 drives the VCM 24 and can control the seek operation of seeking the write head WHD.
[0128] When the write processing method is started, first, in step ST1, the write processing unit 62 executes a first write processing to write data to a first segment (segment SE0a) constituting a part of a first data sector (sector SC0) of a first data track (track STRk). When executing the first write processing, the write processing unit 62 moves the write head WHD to a position facing the first data track by a seek operation.
[0129] Next, in step ST2, the write processing unit 62 executes a second write process to write data to a first segment (segment SE1a) constituting a part of a second data sector (sector SC1) of the first data track. When executing the second write process, the write processing unit 62 maintains the write head WHD facing the first data track.
[0130] Next, in step ST3, the write processing unit 62 writes data to the remaining multiple segments SEa (segments SE2a, SE3a, SE4a, SEP0a, SE5a, SE6a, SE7a, SE8a, SE9a, and SEP1a) of the first data track.
[0131] In this embodiment, data is written to segment SEP0a after data is written to all of segments SE0a, SE1a, SE2a, SE3a, and SE4a. However, it is also possible to write data to segment SEP0a before writing data to all of segments SE0a, SE1a, SE2a, SE3a, and SE4a.
[0132] When writing the first segment data of the parity sector SCP to the first or second data track before writing all the first segment data belonging to the same group to at least one of the first and second data tracks, the parity generation unit 4W4 can perform an XOR operation on all the first segment data belonging to the above group in advance to complete the first segment data of the parity sector SCP.
[0133] As a specific example, when writing data for segments SE3a, SE4a, and SEP0a to track STRk before writing data for segments SE0a, SE1a, and SE2a to STRk, the parity generation unit 4W4 can first perform an XOR operation on data for segments SE0a, SE1b, SE2b, SE3b, and SE4b belonging to the same group, to complete data for segment SEP0a in parity sector SCP0. Before writing data for segments SE0a, SE1a, and SE2a, the result of XORing the data for segments SE0a, SE1a, and SE2a can be reflected in the data for segment SEP0a. Data can be written to segment SEP0a following writing of data to segment SE4a. This makes it possible to realize a sequential write process in which data is written sequentially to track STRk.
[0134] In track STRk, the segment into which data is written first is segment SE0a, and the segment into which data is written last is segment SEP1a. In track STRk, segment SE0a corresponds to the first segment, and segment SEP1a corresponds to the last segment. Also, the positions of the first segments of the multiple tracks STR are aligned in the radial direction d1 in band units. For example, segment SE0b is adjacent to segment SE0a in the radial direction d1, so segment SE0b is the first segment of track STR(k+1).
[0135] Then, the process proceeds to step ST4, where the write processing unit 62 determines whether the segment to which data is to be written first among the multiple segments SEb of the second data track (track STR(k+1)) is adjacent to the first segment (segment SE0a) of the first data sector.
[0136] If the segment in the second data track to which data is to be written first is the segment (segment SE0b) adjacent to the first segment (segment SE0a) (step ST4), the process proceeds to step ST5.
[0137] In step ST5, the write processing unit 62 performs a seek operation to cause the write head WHD to face the second data track, and performs a rotation wait operation to cause the write head WHD to face a segment (segment SE0b) adjacent to the first segment of the first data sector among the multiple segments SEb of the second data track. The write head WHD is used to write data to the first data track (track STRk) and to write data to the second data track (track STR(k+1)).
[0138] Next, in step ST6, the write processing unit 62 executes a third write process to write data to a second segment (segment SE0b) that constitutes a part of the first data sector (sector SC0) of the second data track (track STR(k+1)).
[0139] 13, 1, 8, and 9, next, in step ST7, the write processing unit 62 writes data to a second segment (segment SE1b) constituting a part of the second data sector (sector SC1) of the second data track. At that time, the write processing unit 62 maintains the write head WHD facing the second data track.
[0140] Thereafter, in step ST8, the write processing unit 62 writes data to the remaining multiple segments SEb (segments SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, SE7b, SE8b, SE9b, and SEP1b) of the second data track. This completes the write processing method.
[0141] On the other hand, in step ST4 (FIG. 12), if the segment in the second data track to which data is written first is not the segment (segment SE0b) adjacent to the first segment (segment SE0a), the process proceeds to step ST11.
[0142] As shown in Figures 14, 1, 8, and 9, in step ST11, the write processing unit 62 performs a seek operation to position the write head WHD opposite the second data track, and performs a rotational wait operation to position the write head WHD opposite a predetermined segment (e.g., segment SE3b) among the multiple segments SEb of the second data track.
[0143] Next, in step ST12, the write processing unit 62 starts writing data to the second data track (track STR(k+1)) from a predetermined segment (segment SE3b).
[0144] Thereafter, writing of data to the second data track is continued. When writing the data of the second segment of the parity sector SCP to the first or second data track before writing all the data of the second segments belonging to the same group to at least one of the first and second data tracks, the parity generation unit 4W4 performs an XOR operation on the data of all the second segments belonging to the group in advance to complete the data of the second segment of the parity sector SCP.
[0145] In this embodiment, before writing data of all segments SE0b, SE1b, SE2b, SE3b, and SE4b of all sectors SC0, SC1, SC2, SC3, and SC4 belonging to the same group to at least one of tracks STRk and STR(k+1), data of segment SEP0b of parity sector SCP0 is written to track STRk or STR(k+1). That is, before writing data of segments SE0b, SE1b, and SE2b to STR(k+1), data of segment SEP0b is written to track STR(k+1). In this case, the parity generation unit 4W4 performs an XOR operation on the data of all segments SE0b, SE1b, SE2b, SE3b, and SE4b belonging to the above group in advance, and completes the data of segment SEP0b of the parity sector SCP0. Before writing the data of segments SE0b, SE1b, and SE2b, the result of the XOR operation on the data of segments SE0b, SE1b, and SE2b can be reflected in the data of segment SEP0b. Data can be written to segment SEP0b following writing of data to segment SE4b. Therefore, a sequential write process in which data is written sequentially to track STR(k+1) can be realized. Next, in step ST13, the write processing unit 62 executes a third write process to write data to a second segment (segment SE0b) that constitutes a part of the first data sector (sector SC0) of the second data track (track STR(k+1)).
[0146] Next, in step ST14, the write processing unit 62 writes data to a second segment (segment SE1b) constituting a part of the second data sector (sector SC1) of the second data track. At that time, the write processing unit 62 maintains the write head WHD facing the second data track.
[0147] Thereafter, in step ST15, the write processing unit 62 writes data to one or more remaining segments SEb (segment SE2b) of the second data track. This completes the write processing method.
[0148] According to the write processing method described above, after writing data to segment SE0a of track STRk, data is written to segment SE1a of track STRk, and then data is written to segment SE0b of track STR(k+1). Data can be written to tracks STRk and STR(k+1) in substantially two rotations of the disk DK. Since data can be written to track STR(k+1) after writing data to track STRk is completed, the efficiency of data write processing can be improved.
[0149] For example, if data is written to segment SE0a of track STRk, then to segment SE0b of track STR(k+1), and then to segment SE1a of track STRk, it will take four or more rotations to write the data to tracks STRk and STR(k+1). The above write process may occur when data sent from the host 100 is written to the disk DK in order. In that case, the time required for the seek operation and rotation wait operation increases, making it difficult to improve the efficiency of the data write process.
[0150] FIG. 15 is a block diagram showing a partial configuration of the magnetic disk device 1, and shows the configuration of the volatile memory 4W3 inside the write channel 4W, etc. As shown in Figures 15, 8, and 9, data is input from the LDPC encoder 4W2 to the volatile memory 4W3 in units of one sector. Note that when the data passes through the RLL encoder 4W1 and the LDPC encoder 4W2, the data is processed in units of one sector. The data is divided into two sectors in units of one sector by the volatile memory 4W3.
[0151] After data DT0a for the first segment (segment SE0a) of the first data sector (sector SC0) is written to the first memory area of the volatile memory 4W3 and data DT0b for the second segment (segment SE0b) of the first data sector is written to the second memory area of the volatile memory 4W3, the write processing unit 62 can execute the first write process (ST1 in FIG. 12).
[0152] Data DT0a and data DT0b are data DT0 for sector SC0. Data DT1a is data for segment SE1a of sector SC1, and data DT1b is data for segment SE1b of sector SC1. Data DT1a and data DT1b are data DT1 for sector SC1.
[0153] During the period from when the data DT0b is written to the second storage area until the third write process is executed (ST6 in FIG. 12), the write processing unit 62 can hold the data DT0b in the second storage area of the volatile memory 4W3. Alternatively, the write processing unit 62 can move the data DT0b from the second storage area of the volatile memory 4W3 to the volatile memory 70. In this example, the write processing unit 62 sequentially sends data DT0a and data DT1a for track STRk to the write head WHD, and sequentially saves data DT0b and data DT1b for track STR(k+1) in the volatile memory .
[0154] Furthermore, the write processing unit 62 can increase the free space of the volatile memory 4W3 inside the write channel 4W. After executing the first write process (ST1 in FIG. 12), the write processing unit 62 can release the first storage area of the volatile memory 4W3 and permit overwriting to the first storage area. When the write processing unit 62 moves the data DT0b from the second storage area of the volatile memory 4W3 to the volatile memory 70, it can permit overwriting to the second storage area. As described above, the free space of the volatile memory 4W3 can be increased. When the write processing unit 62 holds the data DT0b in the second storage area of the volatile memory 4W3 without moving the data DT0b to the volatile memory 70, it is possible to prohibit overwriting of the second storage area.
[0155] The data DT0a, data DT0b, data DT1a, and data DT1b are stored in a plurality of storage areas to which different addresses are assigned in the volatile memory 4W3. An address corresponding to data DT1a is linked to an address corresponding to data DT0a. When performing a write process, the write processing unit 62 can select the addresses in the order in which they were linked, and send the data of the selected addresses to the write head WHD in order. For example, data DT0a can be sent to the write head WHD, and then data DT1a can be sent to the write head WHD. Furthermore, an address corresponding to data DT1b is linked to an address corresponding to data DT0b. The write processing unit 62 can select the addresses in the order in which they were linked, and move the data of the selected addresses to the volatile memory 70 in order. For example, after saving the data DT0b to the volatile memory 70, the data DT1b can be saved to the volatile memory 70. When a write process is executed on track STR(k+1), the data DT0b and data DT1b can be sent to the write head WHD by retransferring the data DT0b and data DT1b to the volatile memory 4W3.
[0156] FIG. 16 is a block diagram showing a partial configuration of the magnetic disk device 1, and shows the configuration of a volatile memory 70 external to the write channel 4W. 16 and 8, the write processing unit 62 can execute the first write process (ST1 in FIG. 12) after the data DT0a of the first segment (segment SE0a) of the first data sector (sector SC0) is written to the first recording area of the volatile memory 70, the data DT0b of the second segment (segment SE0b) of the first data sector is written to the second recording area of the volatile memory 70, and then the data DT0a is moved from the first recording area to the volatile memory 4W3. During the period from when the data DT0b is written to the second recording area until the third write process (ST6 in FIG. 12 or ST13 in FIG. 14) is executed, the write processing unit 62 can hold the data DT0b in the second recording area.
[0157] Furthermore, the write processing unit 62 can increase the free space of the volatile memory 70 external to the write channel 4W. After executing the first write process (ST1 in FIG. 12), the write processing unit 62 can release the first recording area of the volatile memory 70 and permit overwriting of the first recording area. As described above, the free space of the volatile memory 70 can be increased. During the period from when the data DT0b is written to the second recording area until the third write process is executed, the write processing unit 62 can prohibit overwriting of the second recording area.
[0158] The volatile memory 70 has a storage capacity capable of recording at least two tracks' worth of data, and therefore can record data for the tracks STRk and STR(k+1). The write processing unit 62 can cause the write channel 4W to process data for tracks STRk and STR(k+1). The write processing unit 62 can write the data for tracks STRk and STR(k+1) processed by the write channel 4W to the volatile memory 70. After the data for tracks STRk and STR(k+1) is stored in the volatile memory 70, the write processing unit 62 can start write processing of data for tracks STRk and STR(k+1).
[0159] If data for track STRk is stored in the volatile memory 70, writing of data to track STRk can be completed during one rotation of the disk DK. After data for tracks STRk and STR(k+1) is stored in the volatile memory 70, the write processing unit 62 can execute a first sequential write process to move the data for track STRk from the volatile memory 70 to the volatile memory 4W3 and sequentially write the data for track STRk to a plurality of first segments (segments SEa) of track STRk.
[0160] The data of the track STRk includes data of the first segment (segment SE0a) of the first data sector (sector SC0), data of the first segment (segment SE1a) of the second data sector (sector SC1), etc. Each segment SEa (segments SE0a, SE1a, SE2a, SE3a, SE4a, SEP0a, SE5a, SE6a, SE7a, SE8a, SE9a, and SEP1a) constitutes a part of a corresponding one of a plurality of sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity sector SCP1). All of the segments SEa and SEb constituting a corresponding sector SC are not assigned to the track STRk. For example, the segment SE2a constituting the sector SC2 is assigned to the track STRk, but the segment SE2b constituting the sector SC2 is not assigned to the track STRk.
[0161] Furthermore, if data for track STR(k+1) is stored in the volatile memory 70, writing of the data to track STR(k+1) can be completed during one rotation of the disk DK. First, the write processing unit 62 drives the VCM 24, controls the seek operation of the write head WHD, and causes the write head WHD to face track STR(k+1).
[0162] Next, the write processing unit 62 moves data for tracks STRk and STR(k+1) from the volatile memory 70 to the volatile memory 4W3, and then executes the above-mentioned first sequential write process, and then executes a second sequential write process to sequentially write data for track STR(k+1) to multiple segments SEb of track STR(k+1).
[0163] By temporarily storing data for tracks STRk and STR(k+1) in the volatile memory 70, data can be written sequentially to tracks STRk and STR(k+1) in substantially two rotations. Furthermore, if the data in the volatile memory 4W3 can be temporarily stored in the volatile memory 70 or sequentially written to the disk DK, it is easy to ensure free space in the volatile memory 4W3. If a seek operation is required while data is being written to the track STRk, the remaining data to be written to the track STRk is temporarily stored in the volatile memory 70.
[0164] The data of the track STR(k+1) includes data of the second segment (segment SE0b) of the first data sector (sector SC0), data of the second segment (segment SE1b) of the second data sector (sector SC1), etc. Each segment SEb (segments SE0b, SE1b, SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, SE7b, SE8b, SE9b, and SEP1b) constitutes a part of a corresponding one of a plurality of sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity sector SCP1). All of the segments SEa and SEb constituting a corresponding sector SC are not assigned to the track STR(k+1). For example, the segment SE3b constituting the sector SC3 is assigned to the track STR(k+1), but the segment SE3a constituting the sector SC3 is not assigned to the track STR(k+1).
[0165] The data DT0a, data DT0b, data DT1a, data DT1b, etc. are stored in a plurality of areas in the volatile memory 70 to which different addresses are assigned. When storing data for the track STRk in the volatile memory 70, the write processing unit 62 can store the data for the track STRk in a plurality of areas in the volatile memory 70 to which a plurality of first addresses are assigned, and sequentially link the plurality of first addresses. For example, the first address corresponding to the data DT0a is linked to the first address corresponding to the data DT1a, and the first address corresponding to the data DT2a is linked to the first address corresponding to the data DT1a.
[0166] When storing data for track STR(k+1) in the volatile memory 70, the write processing unit 62 can store the data for track STR(k+1) in a plurality of areas in the volatile memory 70 to which a plurality of second addresses are assigned, and sequentially link the plurality of second addresses. For example, the second address corresponding to data DT0b is linked to the second address corresponding to data DT1b, and the second address corresponding to data DT2b is linked to the second address corresponding to data DT1b.
[0167] When executing the first sequential write process, the write processing unit 62 selects the multiple first addresses in the order in which they are linked, moves the data of the selected first addresses in sequence from the volatile memory 70 to the volatile memory 4W3, and sequentially writes the data for track STRk to multiple segments SEa of track STRk in the order in which it was moved from the volatile memory 70 to the volatile memory 4W3.
[0168] When executing the second sequential write process, the write processing unit 62 selects the multiple second addresses in the order in which they are concatenated, sequentially moves the data of the selected second addresses from the volatile memory 70 to the volatile memory 4W3, and sequentially writes the data for track STR(k+1) to multiple segments SEb of track STR(k+1) in the order in which it was moved from the volatile memory 70 to the volatile memory 4W3.
[0169] Next, the process performed by the parity generation unit 4W4 of the write channel 4W will be explained. As shown in Figures 8 and 9, the multiple sectors SC allocated across tracks STRk and STR(k+1) include multiple sectors SC0, SC1, SC2, SC3, and SC4 belonging to a group including sectors SC0 and SC1, and parity sector SCP0 in which parity for recovering data of the multiple sectors SC0, SC1, SC2, SC3, and SC4 belonging to the above group is recorded, and are composed of segments SEa and SEb, respectively.
[0170] The data processing unit (RLL encoder 4W1 and LDPC encoder 4W2) can process data for a plurality of sectors SC0, SC1, SC2, SC3, and SC4 belonging to the above group, and write the data to the volatile memory 4W3.
[0171] The parity generation unit 4W4 performs an XOR operation on the data processed by the data processing unit for a plurality of segments SE0a, SE1a, SE2a, SE3a, and SE4a belonging to the above group, generates data for segment SEP0a of parity sector SCP0, and writes it to the third memory area of the volatile memory 4W3. The parity generation unit 4W4 performs an XOR operation on the data processed by the data processing unit for a plurality of segments SE0b, SE1b, SE2b, SE3b, and SE4b belonging to the above group, generates data for segment SEP0b of parity sector SCP0, and writes it to the fourth memory area of the volatile memory 4W3.
[0172] The data for segments SEP0a and SEP0b of the parity sector SCP0 can be generated while being updated. When the parity generation unit 4W4 generates data for parity sector SCP0 and writes it to the volatile memory 4W3, after the data processing unit processes the data for sector SC0, the parity generation unit 4W4 performs an XOR operation on data for segment SE0a of sector SC0, generates a portion of the data for segment SEP0a of parity sector SCP0 and writes it to the third memory area of the volatile memory 4W3. Next, the parity generation unit 4W4 performs an XOR operation on the data of the segment SE0b of the sector SC0, generates a part of the data of the segment SEP0b of the parity sector SCP0, and writes it to the fourth storage area of the volatile memory 4W3.
[0173] Next, after the data processing unit processes the data for sector SC1, the parity generation unit 4W4 performs an XOR operation on the data for segment SE1a of sector SC1, generates a part of the data for segment SEP0a of parity sector SCP0, and writes it to the third storage area of the volatile memory 4W3. At this time, the data in the third storage area of the volatile memory 4W3 can be updated by adding the result of the XOR operation on the data for segment SE1a to the result of the XOR operation on the data for segment SE0a.
[0174] Next, the parity generation unit 4W4 performs an XOR operation on the data of the segment SE1b of the sector SC1, generates a part of the data of the segment SEP0b of the parity sector SCP0, and writes it to the fourth storage area of the volatile memory 4W3. At this time, the data of the fourth storage area of the volatile memory 4W3 can be updated by adding the result of the XOR operation of the data of the segment SE1b to the result of the XOR operation of the data of the segment SE0b.
[0175] After that, the data processing unit can perform the same processing after processing the data of sectors SC2, SC3, and SC4. This completes the data (parity segment) of the third storage area and the data (parity segment) of the fourth storage area.
[0176] According to the magnetic disk device 1, write processing method, and read processing method according to the first embodiment configured as described above, the magnetic disk device 1 includes a disk DK having a plurality of data tracks, a write head WHD, and a write processing unit 62 capable of executing write processing. The write processing unit 62 can execute a first write processing to write data to a segment SE0a of a track STRk, then execute a second write processing to write data to a segment SE1a of the track STRk, and then execute a third write processing to write data to a segment SE0b of a track STR(k+1). The time period required for the seek operation and the rotational delay operation can be reduced, and the efficiency of the data write processing can be improved.
[0177] The magnetic disk device 1 can simultaneously read data from tracks STRk and STR(k+1) using two read heads RHD1 and RHD2, thereby improving the efficiency of data read processing. In addition, the first embodiment can obtain the various effects described above, and can provide a magnetic disk device 1, a write processing method, and a read processing method that can improve the efficiency of data processing.
[0178] (First Modification of the First Embodiment) Next, a first modified example of the first embodiment will be described. Fig. 17 is a block diagram showing a partial configuration of the magnetic disk device 1 according to this first modified example, and shows the configuration of the write channel 4W, etc. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in this first modified example.
[0179] 17, the head HD has two write heads, a write head WHD1 and a write head WHD2. For example, by moving the write head WHD1 to a position opposite the track STRk, the write head WHD2 can be disposed opposite the track STR(k+1).
[0180] Data can be written simultaneously by write heads WHD1 and WHD2 to segments SE0a and SE0b, which are adjacent in the radial direction d1 of tracks STRk and STR(k+1), and the data of sector SC0 can be written collectively.
[0181] Thereafter, data can be written to tracks STRk and STR(k+1) in the same manner. For example, data can be written simultaneously to segments SE1a and SE1b adjacent in the radial direction d1 by write heads WHD1 and WHD2, and the data of sector SC1 can be written collectively. In this first modified example as well, the same effects as those of the first embodiment can be obtained.
[0182] (Second Modification of the First Embodiment) Next, a second modified example of the first embodiment will be described. Fig. 18 is a schematic diagram showing two tracks STRk and STR(k+1) of the first zone Zu of the magnetic disk device 1 according to the second modified example. Fig. 19 is a block diagram showing a part of the configuration of the magnetic disk device 1 according to the second modified example, and shows the configuration of the volatile memory 70 external to the write channel 4W. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the second modified example.
[0183] In Fig. 18, for convenience of explanation, each track STR is shown in a rectangular shape. In Fig. 18, the servo area of each track STR is omitted. In the figure, among sectors SC0, SC1, SC2, SC3, SC4, and parity sector SCP0, the areas showing a plurality of segments SEa are shaded, and the areas showing a plurality of segments SEb are dotted. In addition, the outer periphery of the areas showing segments SEP0a, SEP0b, SEP1a, and SEP1b is shown with a thick line.
[0184] As shown in Figures 18 and 19, the segments SEa and the segments SEb are arranged in a staggered pattern. In other words, the arrangement of the segments SEa and the segments SEb is switched every time one segment is shifted in the circumferential direction. In each track STR, the segments SEa and the segments SEb are arranged alternately in the circumferential direction.
[0185] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed to the segments in the group to which segment SEP0a belongs (segments SE0a, SE1a, SE2a, SE3a, SE4a, and SEP0a) and the segments in the group to which segment SEP0b belongs (segments SE0b, SE1b, SE2b, SE3b, SE4b, and SEP0b). This makes it possible to avoid a situation in which multiple segments in the same group are adversely affected by the squeeze in a concentrated manner.
[0186] Compared with the first embodiment (FIG. 8), the correction capability of the track ECC using the segments SEP0a and SEP0b of the parity sector SCP0 is less likely to be impaired, so that the ECC process using the parity sector SCP0 can be effectively executed. The success rate of correction by the ECC process is higher if the segment SE that may be written to the first half of the sector SC, segment SEa, and the second half of the sector SC, segment SEb, are distributed.
[0187] The data for segment SEP0a of parity sector SCP0 is generated by XORing the data for multiple segments SE0a, SE1a, SE2a, SE3a, and SE4a. The data for segment SEP0b of parity sector SCP0 is generated by XORing the data for multiple segments SE0b, SE1b, SE2b, SE3b, and SE4b.
[0188] The data for segment SEP1a of parity sector SCP1 is generated by XORing the data for multiple segments SE5a, SE6a, SE7a, SE8a, and SE9a. The data for segment SEP1b of parity sector SCP1 is generated by XORing the data for multiple segments SE5b, SE6b, SE7b, SE8b, and SE9b.
[0189] The write processing unit 62 can, for example, write data for multiple segments (segments SE0a, SE1b, SE2a, SE3b, SE4a, SEP0b, SE5a, SE6b, SE7a, SE8b, SE9a, and SEP1b) in sequence to track STRk, and then write data for multiple segments (segments SE0b, SE1a, SE2b, SE3a, SE4b, SEP0a, SE5b, SE6a, SE7b, SE8a, SE9b, and SEP1a) in sequence to track STR(k+1).
[0190] For example, the write processing unit 62 executes a first write process to write data to a first segment (segment SE0a) constituting a part of a first data sector (sector SC0) of the track STRk (ST1 in FIG. 12). Then, the write processing unit 62 executes a second write process to write data to a first segment (segment SE1b) constituting a part of a second data sector (sector SC1) of the first data track (ST2 in FIG. 12). After that, the write processing unit 62 executes a third write process to write data to a second segment (segment SE0b) constituting a part of the first data sector (sector SC0) of the second data track (track STR(k+1)) (ST6 in FIG. 12 or ST13 in FIG. 14).
[0191] If data for track STRk is stored in the volatile memory 70, writing of data to track STRk can be completed during one rotation of the disk DK. After data for tracks STRk and STR(k+1) is stored in the volatile memory 70, the write processing unit 62 can execute a first sequential write process to move the data for track STRk from the volatile memory 70 to the volatile memory 4W3 and sequentially write the data for track STRk to a plurality of first segments (segments SE) of track STRk.
[0192] The data of the track STRk includes data of the first segment (segment SE0a) of the first data sector (sector SC0), data of the first segment (segment SE1b) of the second data sector (sector SC1), etc. Each segment SE (segments SE0a, SE1b, SE2a, SE3b, SE4a, SEP0b, SE5a, SE6b, SE7a, SE8b, SE9a, and SEP1b) constitutes a part of a corresponding one of a plurality of sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity sector SCP1). All the segments SEa and SEb constituting one corresponding sector SC are not assigned to the track STRk.
[0193] Furthermore, if data for track STR(k+1) is stored in the volatile memory 70, writing of the data to track STR(k+1) can be completed during one rotation of the disk DK. The write processing unit 62 can move data for tracks STRk and STR(k+1) from the volatile memory 70 to the volatile memory 4W3, and then execute the above-mentioned first sequential write process, and then execute a second sequential write process to sequentially write data for track STR(k+1) to multiple segments SE of track STR(k+1).
[0194] The data of the track STR(k+1) includes data of the second segment (segment SE0b) of the first data sector (sector SC0), data of the second segment (segment SE1a) of the second data sector (sector SC1), etc. Each segment SE (segments SE0b, SE1a, SE2b, SE3a, SE4b, SEP0a, SE5b, SE6a, SE7b, SE8a, SE9b, and SEP1a) constitutes a part of a corresponding one of a plurality of sectors SC (sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, parity sector SCP0, sector SC5, sector SC6, sector SC7, sector SC8, sector SC9, and parity sector SCP1). All of the segments SEa and SEb constituting the corresponding sector SC are not assigned to the track STR(k+1).
[0195] The data DT0a, data DT0b, data DT1a, data DT1b, etc. are stored in a plurality of areas in the volatile memory 70 to which different addresses are assigned. When storing data for tracks STRk in the volatile memory 70, the write processing unit 62 can store the data for tracks STRk in a plurality of areas in the volatile memory 70 to which a plurality of first addresses are assigned, and sequentially link the plurality of first addresses. For example, the first address corresponding to data DT0a is linked to the first address corresponding to data DT1b, and the first address corresponding to data DT2a is linked to the first address corresponding to data DT1b.
[0196] When storing data for track STR(k+1) in the volatile memory 70, the write processing unit 62 can store the data for track STR(k+1) in a plurality of areas in the volatile memory 70 to which a plurality of second addresses are assigned, and sequentially link the plurality of second addresses. For example, the second address corresponding to data DT0b is linked to the second address corresponding to data DT1a, and the second address corresponding to data DT2b is linked to the second address corresponding to data DT1a.
[0197] When executing the first sequential write process, the write processing unit 62 selects the multiple first addresses in the order in which they are linked, sequentially moves the data of the selected first addresses from the volatile memory 70 to the volatile memory 4W3, and sequentially writes the data for track STRk to multiple segments SE of track STRk in the order in which it was moved from the volatile memory 70 to the volatile memory 4W3.
[0198] When executing the second sequential write process, the write processing unit 62 selects the multiple second addresses in the order in which they are concatenated, sequentially moves the data of the selected second addresses from the volatile memory 70 to the volatile memory 4W3, and sequentially writes the data for track STR(k+1) to multiple segments SE of track STR(k+1) in the order in which it was moved from the volatile memory 70 to the volatile memory 4W3. In the second modified example, the same effects as those of the first embodiment can be obtained.
[0199] (Third Modification of the First Embodiment) Next, a third modified example of the first embodiment will be described. Fig. 20 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the third modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the third modified example.
[0200] In Fig. 20, for convenience of explanation, each track STR is shown in a rectangular shape. In Fig. 20, the servo area of each track STR is omitted. In the figure, among sector SC0, sector SC2, sector SC4, sector SC6, sector SC8, and parity sector SCP0, the area showing a plurality of first segments (segment SEa) is shaded, and the area showing a plurality of second segments (segment SEb) is dotted. In addition, the outer periphery of the area showing segment SEP0a, segment SEP0b, segment SEP1a, and segment SEP1b is shown by a thick line.
[0201] 20, the data of the segment SEP0a of the parity sector SCP0 is generated by performing an XOR operation on the data of the multiple segments SE0a, SE2a, SE4a, SE6a, and SE8a. The multiple segments SE0a, SE2a, SE4a, SE6a, SE8a, and SEP0a belong to the first group and are arranged on the track STRk.
[0202] The data of the segment SEP0b of the parity sector SCP0 is generated by XORing the data of the multiple segments SE0b, SE2b, SE4b, SE6b, and SE8b. The multiple segments SE0b, SE2b, SE4b, SE6b, SE8b, and SEP0b belong to the second group and are arranged on the track STR(k+1).
[0203] The data of the segment SEP1a of the parity sector SCP1 is generated by XORing the data of the segments SE1a, SE3a, SE5a, SE7a, and SE9a. The segments SE1a, SE3a, SE5a, SE7a, SE9a, and SEP1a belong to the third group and are arranged on the track STRk.
[0204] The data of segment SEP1b of parity sector SCP1 is generated by XORing the data of multiple segments SE1b, SE3b, SE5b, SE7b, and SE9b. Multiple segments SE1b, SE3b, SE5b, SE7b, SE9b, and SEP1b belong to the fourth group and are arranged on track STR(k+1).
[0205] In the track STRk, the multiple segments SE belonging to the first group and the multiple segments SE belonging to the third group are alternately arranged in the circumferential direction. In the track STR(k+1), the multiple segments SE belonging to the second group and the multiple segments SE belonging to the fourth group are alternately arranged in the circumferential direction.
[0206] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed to multiple segments SE in multiple groups. For example, if six segments SE0b to SE5b of track STR(k+1) are squeezed toward track STRk, segments SE0a to SE5a of track STRk will be adversely affected. However, since multiple segments SE0a, SE2a, and SE4a belong to the first group, and multiple segments SE1a, SE3a, and SE5a belong to the third group, the adverse effects of the squeeze can be distributed to the first and third groups.
[0207] Since the multiple segments SE belonging to each group can be distributed in the circumferential direction (track direction), it is possible to prevent the situation where only the multiple segments SE of a specific group are written with excessively close spacing. Furthermore, it is possible to increase the success rate of correction by ECC processing. In the third modified example, the same effects as those of the first embodiment can be obtained.
[0208] (Fourth Modification of the First Embodiment) Next, a fourth modified example of the first embodiment will be described. Fig. 21 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to this fourth modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the third modified example, except for the configuration described in this fourth modified example.
[0209] In Fig. 21, for convenience of explanation, each track STR is shown in a rectangular shape. In Fig. 21, the servo area of each track STR is omitted. In the figure, among sector SC0, sector SC2, sector SC4, sector SC6, sector SC8, and parity sector SCP0, the area showing a plurality of segments SEa is shaded, and the area showing a plurality of segments SEb is dotted. In addition, the outer periphery of the area showing segments SEP0a, SEP0b, SEP1a, and SEP1b is shown by a thick line.
[0210] As shown in Fig. 21, the multiple segments SE belonging to each group are arranged in a staggered pattern. For example, in the first group marked with diagonal lines, the multiple segments SE0a, SE2a, SE4a, SE6a, SE8a, and SEP0a are arranged in a staggered pattern. The technique of FIG. 21 corresponds to a combination of the technique of FIG. 18 and the technique of FIG.
[0211] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed to multiple segments SE in multiple groups. For example, if six segments, segment SE0b, segment SE1b, segment SE2a, segment SE3a, segment SE4b, and segment SE5b, of track STR(k+1) are squeezed toward track STRk, segments SE0a, segment SE1a, segment SE2b, segment SE3b, segment SE4a, and segment SE5a of track STRk will be adversely affected.
[0212] However, since multiple segments SE0a and SE4a belong to the first group, segment SE2b belongs to the second group, multiple segments SE1a and SE5a belong to the third group, and segment SE3b belongs to the fourth group, the adverse effects of squeezing can be distributed among the first to fourth groups.
[0213] Since the multiple segments SE belonging to each group can be distributed in the circumferential direction (track direction) and the radial direction d1, it is possible to prevent only the multiple segments SE of a specific group from being written with excessively close margins. Furthermore, since the segments SE that may be written with close margins can be distributed to the segments SEa in the first half of the sector SC and the segments SEb in the second half of the sector SC, it is possible to increase the success rate of correction by ECC processing. In the fourth modified example, the same effects as those of the first embodiment can be obtained.
[0214] (Fifth Modification of the First Embodiment) Next, a fifth modified example of the first embodiment will be described. Fig. 22 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the fifth modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the fifth modified example.
[0215] In Fig. 22, for convenience of explanation, each track STR is shown in a rectangular shape. In Fig. 22, the servo area of each track STR is omitted. In the figure, among sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, and parity sector SCP0, the area showing a plurality of first segments (segment SEa) is shaded, and the area showing a plurality of second segments (segment SEb) is dotted. In addition, the outer periphery of the area showing segment SEP0a, segment SEP0b, segment SEP1a, and segment SEP1b is shown by a thick line.
[0216] As shown in Fig. 22, when data writing to track STRk is completed and data is subsequently written sequentially to track STR(k+1), it is necessary to start writing data to track STR(k+1) taking into consideration the time period required for the seek operation. For example, the write processing unit 62 can start writing data from segment SE0b, which is a position shifted in the circumferential direction by the number of segments from the beginning of track STR(k+1) (segment SE8b adjacent to segment SE0a) by the number of segments taking into consideration the seek period. In this example, the write start position is shifted by three segments.
[0217] When starting to write data to track STR(k+1), data for track STR(k+1) has been written to the volatile memory 70. The write processing unit 62 first writes data to segment SE0b adjacent to segment SE3a for track STR(k+1), and then writes data to a plurality of segments SE1b, SE2b, SE3b, SE4b, SEP0b, SE5b, SE6b, and SE7b that are successive in the circumferential direction in that order. Next, the write processing unit 62 writes data to a plurality of segments SE8b and SE9b in that order, and finally writes data to segment SEP1b.
[0218] Alternatively, when starting to write data to track STR(k+1), data for segments SEP0b and SEP1b may not be written to the volatile memory 70. In other words, data for segments SEP0b and SEP1b may not be generated in advance. In this case, generation of data for segment SEP0b can be started simultaneously with the process of writing data to segments SE0b, SE1b, SE2b, SE3b, and SE4b of track STR(k+1). Since data for segment SEP0b can be generated while writing data to track STR(k+1), data can be written to segment SEP0b following data writing to segment SE4b. Similarly, generation of data for segment SEP1b can be started simultaneously with the process of writing data to segments SE5b, SE6b, SE7b, SE8b, and SE9b of track STR(k+1).Since data for segment SEP1b can be generated while data is being written to track STR(k+1), data can be written to segment SE9b followed by writing data to segment SEP1b.
[0219] Writing data to track STR(k+1) can be completed while the disk DK rotates once, and writing data to two tracks STRk and STR(k+1) can be completed while the disk DK rotates substantially twice.
[0220] (Sixth Modification of the First Embodiment) Next, a sixth modified example of the first embodiment will be described. Fig. 23 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the sixth modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the sixth modified example.
[0221] In FIG. 22, for convenience of explanation, each track STR is shown in a rectangular shape. In the circumferential direction, the segment SEP0b and the segment SE5a are continuous, and the segment SEP0d and the segment SE5c are continuous. In FIG. 23, the servo area of each track STR is omitted. In the figure, among the sector SC0, the sector SC1, the sector SC2, the sector SC3, the sector SC4, and the parity sector SCP0, the area showing the plurality of segments SEa is given a diagonal line going up to the right, the area showing the plurality of segments SEb is given a dot pattern, the area showing the plurality of segments SEc is given a horizontal stripe, and the area showing the plurality of segments SEd is given a diagonal line going down to the right. In addition, the outer periphery of the area showing the segment SEP0a, the segment SEP0b, the segment SEP0c, the segment SEP0d, the segment SEP1a, the segment SEP1b, the segment SEP1c, and the segment SEP1d is shown by a thick line.
[0222] As shown in Fig. 23, each sector SC is divided into four parts instead of two parts. Each sector SC has a segment SEa corresponding to the first quarter, a segment SEb corresponding to the second quarter, a segment SEc corresponding to the third quarter, and a segment SEd corresponding to the fourth quarter.
[0223] The data of segment SEP0a of parity sector SCP0 is generated by XORing the data of multiple segments SE0a, SE1a, SE2a, SE3a, and SE4a. The data of segment SEP0b of parity sector SCP0 is generated by XORing the data of multiple segments SE0b, SE1b, SE2b, SE3b, and SE4b. The data of segment SEP0c of parity sector SCP0 is generated by XORing the data of multiple segments SE0c, SE1c, SE2c, SE3c, and SE4c. The data of segment SEP0d of parity sector SCP0 is generated by XORing the data of multiple segments SE0d, SE1d, SE2d, SE3d, and SE4d.
[0224] The above-mentioned relationship also applies to sectors SC5 to SC9 and parity sector SCP1. For example, data for segment SEP1a of parity sector SCP1 is generated by XORing data for multiple segments SE5a, SE6a, SE7a, SE8a, and SE9a.
[0225] In sector SC0, segments SE0a and SE0b are spaced one segment apart in the circumferential direction, and segments SE0c and SE0d are spaced one segment apart in the circumferential direction. Segments SE0a and SE0c are adjacent to each other in the radial direction d1, and segments SE0b and SE0d are adjacent to each other in the radial direction d1.
[0226] Two segments SE belonging to the same sector SC in Fig. 23 are not consecutive in the circumferential direction. The arrangement of the segments SE in Fig. 23 can disperse the sector SC in the circumferential direction, compared to the arrangement of the segments SE in Fig. 8. Therefore, the adverse effects of squeezing can be dispersed among multiple sectors SC.
[0227] Unlike the example of Fig. 23, two or more segments SE belonging to another sector may be arranged between two segments SE belonging to the same sector SC in the circumferential direction. Also, each sector SC is not limited to being divided into four, but may be divided into eight or sixteen. In the sixth modified example, the same effects as those of the first embodiment can be obtained.
[0228] (Seventh Modification of the First Embodiment) Next, a seventh modified example of the first embodiment will be described. Fig. 24 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the seventh modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 according to the sixth modified example, except for the configuration described in the seventh modified example.
[0229] In FIG. 24, for convenience of explanation, each track STR is shown in a rectangular shape. In the circumferential direction, the segment SE5b and the segment SE6a are continuous, and the segment SE5d and the segment SE6c are continuous. In FIG. 24, the servo area of each track STR is omitted. In the figure, among the sector SC0, the sector SC2, the sector SC4, the sector SC6, the sector SC8, and the parity sector SCP0, the area showing the plurality of segments SEa is shaded with an upward slanting line, the area showing the plurality of segments SEb is shaded with a dot pattern, the area showing the plurality of segments SEc is shaded with horizontal stripes, and the area showing the plurality of segments SEd is shaded with an downward slanting line. In addition, the outer periphery of the area showing the segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c, and SEP1d is shown with a thick line.
[0230] 24, the data of the segment SEP0a of the parity sector SCP0 is generated by performing an XOR operation on the data of the multiple segments SE0a, SE2a, SE4a, SE6a, and SE8a. The multiple segments SE0a, SE2a, SE4a, SE6a, SE8a, and SEP0a belong to the first group and are arranged in the track STRk.
[0231] The data of the segment SEP0b of the parity sector SCP0 is generated by performing an XOR operation on the data of the multiple segments SE0b, SE2b, SE4b, SE6b, and SE8b. The multiple segments SE0b, SE2b, SE4b, SE6b, SE8b, and SEP0b belong to the second group and are arranged in the track STRk.
[0232] The data of the segment SEP0c of the parity sector SCP0 is generated by XORing the data of the multiple segments SE0c, SE2c, SE4c, SE6c, and SE8c. The multiple segments SE0c, SE2c, SE4c, SE6c, SE8c, and SEP0c belong to the third group and are arranged on the track STR(k+1).
[0233] The data of the segment SEP0d of the parity sector SCP0 is generated by XORing the data of the multiple segments SE0d, SE2d, SE4d, SE6d, and SE8d. The multiple segments SE0d, SE2d, SE4d, SE6d, SE8d, and SEP0d belong to the fourth group and are arranged on the track STR(k+1).
[0234] In the track STRk, a plurality of segments SEa belonging to the first group and a plurality of segments SEb belonging to the second group are alternately arranged in the circumferential direction, and one segment SE that does not belong to the first to fourth groups is interposed between the segments SEa and SEb. In the track STR(k+1), a plurality of segments SEc belonging to the third group and a plurality of segments SEd belonging to the fourth group are alternately arranged in the circumferential direction, and one segment SE that does not belong to the first to fourth groups is interposed between the segments SEc and SEd.
[0235] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed among multiple segment SEs in multiple groups. In addition, since multiple segment SEs belonging to each group can be distributed in the circumferential direction (track direction), it is possible to avoid a situation in which only multiple segment SEs in a specific group are written with excessively close spacing. In the seventh modified example, the same effects as those of the first embodiment can be obtained.
[0236] (Eighth Modification of the First Embodiment) Next, an eighth modified example of the first embodiment will be described. Fig. 25 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to this eighth modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the sixth modified example, except for the configuration described in this eighth modified example.
[0237] In FIG. 25, for convenience of explanation, each track STR is shown in a rectangular shape. In the circumferential direction, the segment SEP0d and the segment SE5a are continuous, and the segment SEP0b and the segment SE5c are continuous. In FIG. 25, the servo area of each track STR is omitted. In the figure, among the sector SC0, the sector SC1, the sector SC2, the sector SC3, the sector SC4, and the parity sector SCP0, the area showing the plurality of segments SEa is given a diagonal line going up to the right, the area showing the plurality of segments SEb is given a dot pattern, the area showing the plurality of segments SEc is given a horizontal stripe, and the area showing the plurality of segments SEd is given a diagonal line going down to the right. In addition, the outer periphery of the area showing the segment SEP0a, the segment SEP0b, the segment SEP0c, the segment SEP0d, the segment SEP1a, the segment SEP1b, the segment SEP1c, and the segment SEP1d is shown by a thick line.
[0238] As shown in FIG. 25, the plurality of segments SEa are arranged in a staggered pattern, the plurality of segments SEb are arranged in a staggered pattern, the plurality of segments SEc are arranged in a staggered pattern, and the plurality of segments SEd are arranged in a staggered pattern. Here, attention is paid to a plurality of sectors SC0 to SC4 and parity sector SCP0. Compared with the example of Fig. 23, in the radial direction d1, the arrangement of segment SE1a and segment SE1c is swapped, the arrangement of segment SE1b and segment SE1d is swapped, the arrangement of segment SE3a and segment SE3c is swapped, the arrangement of segment SE3b and segment SE3d is swapped, the arrangement of segment SEP0a and segment SEP0c is swapped, and the arrangement of segment SEP0b and segment SEP0d is swapped.
[0239] In the track STRk, the segments SEa, SEc, SEb, and SEd are repeatedly arranged in the circumferential direction. In the track STR(k+1), the segments SEc, SEa, SEd, and SEb are repeatedly arranged in the circumferential direction.
[0240] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed to multiple sectors SC. Furthermore, since the segment SE that may be written in a narrow area can be distributed to multiple segments SEa, SEb, SEc, and SEd of the multiple sectors SC, the success rate of correction by ECC processing can be increased. In the eighth modified example, the same effects as those of the first embodiment can be obtained.
[0241] (Ninth Modification of the First Embodiment) Next, a ninth modification of the first embodiment will be described. Fig. 26 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the ninth modification. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the seventh modification, except for the configuration described in the ninth modification.
[0242] In FIG. 26, for convenience of explanation, each track STR is shown in a rectangular shape. In the circumferential direction, the segment SE5b and the segment SE6c are continuous, and the segment SE5d and the segment SE6a are continuous. In FIG. 26, the servo area of each track STR is omitted. In the figure, among the sector SC0, the sector SC2, the sector SC4, the sector SC6, the sector SC8, and the parity sector SCP0, the area showing the plurality of segments SEa is shaded with an upward slanting line, the area showing the plurality of segments SEb is shaded with a dot pattern, the area showing the plurality of segments SEc is shaded with horizontal stripes, and the area showing the plurality of segments SEd is shaded with an downward slanting line. In addition, the outer periphery of the area showing the segments SEP0a, SEP0b, SEP0c, SEP0d, SEP1a, SEP1b, SEP1c, and SEP1d is shown with a thick line.
[0243] As shown in Fig. 26, when paying attention to a plurality of sectors SC0, SC2, SC4, SC6, and SC8 and a parity sector SCP0, a plurality of segments SEa are arranged in a staggered manner, a plurality of segments SEb are arranged in a staggered manner, a plurality of segments SEc are arranged in a staggered manner, and a plurality of segments SEd are arranged in a staggered manner.Compared with the example of Fig. 24, in the radial direction d1, the arrangement of segments SE2a and SE2c is swapped, the arrangement of segments SE2b and SE2d is swapped, the arrangement of segments SE6a and SE6c is swapped, the arrangement of segments SE6b and SE6d is swapped, the arrangement of segments SEP0a and SEP0c is swapped, and the arrangement of segments SEP0b and SEP0d is swapped. The technique of FIG. 26 corresponds to a combination of the technique of FIG. 24 and the technique of FIG.
[0244] Even if a squeeze occurs during a write process, the adverse effects of the squeeze can be distributed to multiple sectors SC. Furthermore, since the segment SE that may be written in a narrow area can be distributed to multiple segments SEa, SEb, SEc, and SEd of the multiple sectors SC, the success rate of correction by ECC processing can be increased. In the present ninth modified example, the same effects as those of the first embodiment can be obtained.
[0245] (Tenth Modification of the First Embodiment) Next, a tenth modified example of the first embodiment will be described. Fig. 27 is a schematic diagram showing two tracks STRk and STR(k+1) in the first zone Zu of the magnetic disk device 1 according to the tenth modified example. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the tenth modified example.
[0246] In Fig. 27, for convenience of explanation, each track STR is shown in a rectangular shape. In Fig. 27, the servo area of each track STR is omitted. In the figure, among sector SC0, sector SC1, sector SC2, sector SC3, sector SC4, and parity sector SCP0, the area showing a plurality of segments SEa is marked with a diagonal line going up to the right, the area showing a plurality of segments SEb is marked with a dot pattern, and the area showing a plurality of segments SEc is marked with horizontal stripes. In addition, the outer periphery of the area showing segments SEP0a, SEP0b, SEP0c, SEP1a, SEP1b, and SEP1c is shown with a thick line.
[0247] As shown in Fig. 27, each sector SC is divided into three parts instead of two parts. Each sector SC has a segment SEa corresponding to the first third, a segment SEb corresponding to the second third, and a segment SEc corresponding to the third third.
[0248] The track STRk has 12 segments: segment SE0a, segment SE1a, segment SE2a, segment SE3a, segment SE4a, segment SEP0a, segment SE5a, segment SE6a, segment SE7a, segment SE8a, segment SE9a, and segment SEP1a.
[0249] The track STR(k+1) has 12 segments: segment SE0b, segment SE1b, segment SE2b, segment SE3b, segment SE4b, segment SEP0b, segment SE5b, segment SE6b, segment SE7b, segment SE8b, segment SE9b, and segment SEP1b.
[0250] The track STR(k+2) has 12 segments: segment SE0c, segment SE1c, segment SE2c, segment SE3c, segment SE4c, segment SEP0c, segment SE5c, segment SE6c, segment SE7c, segment SE8c, segment SE9c, and segment SEP1c.
[0251] The data for segment SEP0a of parity sector SCP0 is generated by XORing the data for multiple segments SE0a, SE1a, SE2a, SE3a, and SE4a. The data for segment SEP0b of parity sector SCP0 is generated by XORing the data for multiple segments SE0b, SE1b, SE2b, SE3b, and SE4b. The data for segment SEP0c of parity sector SCP0 is generated by XORing the data for multiple segments SE0c, SE1c, SE2c, SE3c, and SE4c. In the present tenth modified example, the same effects as those of the first embodiment can be obtained.
[0252] Second embodiment Next, a second embodiment will be described. Fig. 28 is a block diagram showing a partial configuration of a magnetic disk device 1 according to the second embodiment, and shows the configuration of a read channel 4R, etc. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the first embodiment, except for the configuration described in the second embodiment.
[0253] As shown in Fig. 28, the read channel 4R of the R / W channel 140 includes two-dimensional FIR filters 4R3c and 4R3d, a two-dimensional Viterbi decoder 4R4, and an LDPC decoder 4R5, instead of the FIR filters 4R3a and 4R3b, the Viterbi decoders 4R4a and 4R4b, and the LDPC decoders 4R5a and 4R5b. By using the read channel 4R, data of two tracks STRk and STR(k+1) can be read simultaneously. The above "two-dimensional" means that data for two tracks can be processed simultaneously.
[0254] The two-dimensional FIR filter 4R3c functions as a first two-dimensional FIR filter and is connected to the ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3c performs a first waveform equalization process to equalize the waveform of composite data obtained by combining a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2 so that the error rate (BER) of data written to the track STRk is minimized, and outputs first waveform equalization data that is the result of performing the first waveform equalization process on the composite data.
[0255] The two-dimensional FIR filter 4R3d functions as a second two-dimensional FIR filter and is connected to the ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3d performs a second waveform equalization process to equalize the waveform of composite data obtained by combining a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2 so that the error rate (BER) of the data written to the track STR(k+1) is minimized, and outputs second waveform equalized data that is the result of performing the second waveform equalization process on the composite data.
[0256] The read head RHD1 can read not only data on track STRk but also data on track STR(k+1). The read head RHD2 can read not only data on track STR(k+1) but also data on track STRk. By performing subtraction processing in the two-dimensional FIR filter 4R3c to subtract the second read signal from the first read signal, only the data on track STRk can be extracted. By performing subtraction processing in the two-dimensional FIR filter 4R3d to subtract the first read signal from the second read signal, only the data on track STR(k+1) can be extracted. A good BER can be obtained when reading data due to the ITIC (Inter track Interference Cancellation) effect.
[0257] The two-dimensional Viterbi decoder 4R4 is connected to the two-dimensional FIR filter 4R3c and the two-dimensional FIR filter 4R3d. The first waveform equalization data and the second waveform equalization data are input to the two-dimensional Viterbi decoder 4R4. The two-dimensional Viterbi decoder 4R4 can output decoded data obtained by simultaneously decoding the first waveform equalization data and the second waveform equalization data. The internal calculation of the two-dimensional Viterbi decoder 4R4 can be performed by an algorithm that takes into account two tracks STRk and STR(k+1). The signal average value, the noise variance value, and the tap coefficient of the noise whitening filter in the metric calculation of the two-dimensional Viterbi decoder 4R4 are provided for each path metric that takes into account the two tracks, and are optimized so that the BER of each track is minimized.
[0258] The LDPC decoder 4R5 is connected to the two-dimensional Viterbi decoder 4R4. The LDPC decoder 4R5 can execute a decoding process of the LDPC code on the decoded data input from the two-dimensional Viterbi decoder 4R4.
[0259] In the second embodiment configured as above, the same effects as in the first embodiment can be obtained, and a good BER can be obtained when reading data.
[0260] (Third embodiment) Next, a third embodiment will be described. FIG. 29 is a block diagram showing a part of the configuration of the magnetic disk device 1 according to the third embodiment, and shows the configuration of the read channel 4R. FIG. 30 is a plan view showing an example of the geometric arrangement of the write head WHD and the three read heads RHD1, RHD2, and RHD3 in the third embodiment. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the second embodiment, except for the configuration described in the third embodiment.
[0261] As shown in Figures 29 and 30, the third zone Zv is located in the third data area between the first data area (first zone Zu) and the second data area (second zone Zw) of the recording layer L of the disc DK in the radial direction d1.
[0262] The head HD includes three read heads RHD1, RHD2, and RHD3 that each read data from the recording layer L of the disk DK. The positions of the read heads RHD1, RHD2, and RHD3 are shifted from each other in the seek direction. The read head RHD1 functions as a first read head, the read head RHD2 functions as a second read head, and the read head RHD3 functions as a third read head. The head HD may include four or more read heads RHD. The read heads RHD1, RHD2, and RHD3 can simultaneously read data of two tracks STRk and STR(k+1) in the third zone Zv, for example. The read heads RHD1, RHD2, and RHD3 and the write head WHD are supported by an arm 30.
[0263] When simultaneously reading data on tracks STRk and STR(k+1), the read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1, RHD2, and RHD3, and moves the read head RHD1 to a position facing the track STRk. For example, the center of gravity RC1 of the read head RHD1 is positioned at the track center STC of the track STRk.
[0264] In the third zone Zv, the skew angle of the read head RHD1 becomes large, and the read head RHD2 may not be able to read the data of the track STR(k+1) sufficiently. Therefore, the read head RHD3 can be used to read the data of the track STR(k+1). The center of gravity RC3 of the read head RHD3 is closer to the track center STC of the track STR(k+1) than the center of gravity RC2 of the read head RHD2. The read heads RHD1 and RHD2 can read the data of the track STRk, and the read heads RHD3 and RHD2 can read the data of the track STR(k+1). The write head WHD has a center of gravity WC.
[0265] The read channel 4R further includes an LPF 4R1c and an ADC 4R2c. The LPF 4R1c is connected to the read head RHD3 of the head HD via a preamplifier 3R3 of the head amplifier IC 130. The LPF 4R1c can remove noise contained in the third read signal read by the read head RHD3 and amplified by the preamplifier 3R3. The ADC 4R2c is connected to the LPF 4R1c and can convert the third read signal into a digital signal.
[0266] The two-dimensional FIR filter 4R3c is connected to the ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3c performs a first waveform equalization process to equalize the waveform of first composite data obtained by combining a first read signal read by the read head RHD1 and a second read signal read by the read head RHD2 so that the error rate (BER) of data written to the track STRk is minimized, and outputs first waveform equalization data that is the result of performing the first waveform equalization process on the first composite data.
[0267] The two-dimensional FIR filter 4R3d is connected to the ADCs 4R2c and 4R2b. The two-dimensional FIR filter 4R3d performs a second waveform equalization process to equalize the waveform of second composite data obtained by combining a second read signal read by the read head RHD2 and a third read signal read by the read head RHD3 so that the error rate (BER) of data written to the track STR(k+1) is minimized, and outputs second waveform equalization data that is the result of performing the second waveform equalization process on the second composite data.
[0268] The third embodiment configured as above can also provide the same effects as the first embodiment. The magnetic disk device 1 includes three read heads RHD1, RHD2, and RHD3. Even if the recording layer L of the disk DK includes a third data area (third zone Zv) where the skew angle of the read head RHD1 is large, data on two tracks can be read simultaneously by using the read heads RHD1, RHD2, and RHD3.
[0269] (Fourth embodiment) Next, a fourth embodiment will be described. Fig. 31 is a block diagram showing a partial configuration of a magnetic disk device 1 according to the fourth embodiment, and shows the configuration of a read channel 4R, etc. The magnetic disk device 1 is configured similarly to the magnetic disk device 1 of the third embodiment, except for the configuration described in the fourth embodiment.
[0270] As shown in FIG. 31, the head amplifier IC130 includes a selection circuit 3Ra instead of the preamplifier 3R3. The read channel 4R does not include an LPF 4R1c and an ADC 4R2c. The read heads RHD1, RHD2, and RHD3 are connected to the input terminals of the selection circuit 3Ra, and the preamplifiers 3R1 and 3R2 are connected to the output terminals of the selection circuit 3Ra. The selection circuit 3Ra is a three-input, two-output circuit. The two-dimensional FIR filter 4R3c is connected to the ADCs 4R2a and 4R2b, and the two-dimensional FIR filter 4R3d is connected to the ADCs 4R2a and 4R2b.
[0271] When simultaneously reading data on tracks STRk and STR(k+1), the read processing unit 63 drives the VCM 24 to control the seek operation of the read heads RHD1, RHD2, and RHD3, and moves the read head RHD1 to a position facing the track STRk. For example, the center of gravity RC1 of the read head RHD1 is positioned at the track center STC of the track STRk.
[0272] Next, the read processing unit 63 selects a first selected read head which is the read head RHD1, and a second selected read head which is the read head closest to the track STR(k+1) among the read heads RHD2 and RHD3 according to the skew angle of the read head RHD1. In this embodiment, the second selected read head is the read head RHD3.
[0273] The read processing unit 63 can simultaneously read data of the segment SE of the track STRk and data of the segment SE of the track STR(k+1) with the first and second selected read heads (read heads RHD1 and RHD3). The two segments SE that are simultaneously read are adjacent to each other in the radial direction d1.
[0274] The fourth embodiment configured as above can also provide the same effects as the first embodiment. According to the magnetic disk device 1 and the read processing method, the read processing unit 63 can select two read heads from the three read heads RHD1, RHD2, and RHD3 by controlling the driving of the selection circuit 3Ra. Since the read processing can be performed using two preamplifiers 3R1 and 3R2 instead of three preamplifiers, it is possible to reduce power consumption. Furthermore, it is possible to reduce the use of electronic components such as LSIs (large scale integrated circuits), which can contribute to reducing manufacturing costs.
[0275] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims.
[0276] For example, the write process is performed on two tracks STRk and STR(k+1) that are consecutive in the radial direction d1, or on three consecutive tracks STRk, STR(k+1), and STR(k+2), but the tracks on which the write process is performed do not have to be consecutive in the radial direction d1. For example, in the example of FIG. 8, data may be written to track STR(k+2) instead of track STR(k+1). In the example of FIG. 27, data may be written to track STR(k+3), which is adjacent to track STR(k+2), instead of track STR(k+2).
[0277] Of the two segments in the same sector SC, the track STR on which one segment is located and the track STR on which the other segment is located may be separated by 50 tracks in the radial direction d1. However, during a read process, it is necessary to keep the data of one of the segments held in the volatile memory 70. From the viewpoint of increasing the free space of the volatile memory 70, it is preferable that the multiple segments in the same sector SC are distributed across multiple tracks STR that are consecutive in the radial direction d1.
[0278] It is preferable that multiple segments of the same sector SC are adjacent and continuous in the radial direction d1. A segment that is adversely affected by squeezing can be paired with a segment that is not adversely affected by squeezing. This allows the data quality of the sector SC to be averaged. This also reduces the occurrence of read errors, allowing the frequency of ECC processing to be reduced.
[0279] The error correction unit 65 does not have to be provided outside the R / W channel 140. For example, the LDPC decoders 4R5a and 4R5b of the read channel 4R inside the R / W channel 140 may have the function of the error correction unit 65. In that case, the magnetic disk device 1 can be formed without the error correction unit 65.
[0280] The ECC processing using parity (track ECC processing) may be performed inside the R / W channel 140, rather than outside the R / W channel 140. Compared to the read channel 4R shown in FIG. 10 (first embodiment), the read channel 4R shown in FIG. 32 further comprises a volatile memory 4R6a, a parity generation unit 4R7a, a volatile memory 4R6b, and a parity generation unit 4R7b.
[0281] The volatile memory 4R6a is connected between the LDPC decoder 4R5a and the HDC 150. The volatile memory 4R6a is a random access memory, and is an SRAM in this case. The parity generation unit 4R7a is connected to the volatile memory 4R6a. When the read processing unit 63 detects an error in the data read from the track STRk, the volatile memory 4R6a and the parity generation unit 4R7a can recover the data of the sector in which the read error occurred by using the result of the XOR operation of the sector group in the track STRk in which there was no read error in the sector ECC.
[0282] The volatile memory 4R6b is connected between the LDPC decoder 4R5b and the HDC 150. The volatile memory 4R6b is a random access memory, and is an SRAM in this case. The parity generation unit 4R7b is connected to the volatile memory 4R6b. When the read processing unit 63 detects an error in the data read from the track STR(k+1), the volatile memory 4R6b and the parity generation unit 4R7b can recover the data of the sector in which the read error occurred by using the result of the XOR operation of the sector group in the track STR(k+1) in which there was no read error in the sector ECC.
[0283] The above-mentioned technique is not limited to hybrid recording type magnetic disk devices, but may also be applied to shingled recording type magnetic disk devices or normal recording type magnetic disk devices. [Explanation of symbols]
[0284] 1...magnetic disk device, 60...MPU, 61...read / write processing unit, 62...write processing unit, 63...read processing unit, 100...host, 110...system controller, 120...driver IC, 130...head amplifier IC, 140...R / W channel, 150...HDC, 70...volatile memory, 24...VCM, 30...arm, 4W...write channel, 4W1...RLL encoder, 4W2...LDPC encoder, 4W3...volatile memory, 4W4...parity generator component, 4R...read channel, 4R1...LPF, 4R2...ADC, 4R3a, 4R3b...FIR filter, 4R3c, 4R3d...2D FIR filter, 4R4...2D Viterbi decoder, 3Ra...selection circuit, DK...disk, L...recording layer, Z...zone, STR...track, SC...sector, SCP...parity sector, SE...segment, WHD...write head, RHD...read head, DT...data, d1...radial direction, d2...traveling direction, d3...rotational direction.
Claims
1. a disk having a plurality of data tracks, including a first data track and a second data track, in a recording layer; a write head for writing data to the recording layer of the disk; a write processing unit capable of executing a write process for writing data to the recording layer, The write processing unit is executing a first write process for writing data to a first segment constituting a part of a first data sector of the first data track; after executing the first write process, executing a second write process to write data to a first segment constituting a part of a second data sector of the first data track; after executing the second write process, a third write process is executed to write data to a second segment constituting a part of the first data sector of the second data track; Magnetic disk device.
2. the write head is used to write data to the first data track and to write data to the second data track, 2. The magnetic disk drive according to claim 1.
3. an arm supporting the light head; and an actuator for moving the arm, The write processing unit is driving the actuator to control a seek operation of the write head; When performing the first write process, the write head is moved to a position facing the first data track by the seek operation; maintaining the write head facing the first data track when performing the second write operation; when performing the third write process, the write head is moved to a position facing the second data track by the seek operation; 3. The magnetic disk drive according to claim 2.
4. a write channel including a data processing unit that processes received data, and a first memory that includes a first storage area and a second storage area and to which the data processed by the data processing unit is written; A second memory into which the data processed by the data processing unit is written, The write processing unit is executing the first write process after the first segment of data of the first data sector is written to the first storage area and the second segment of data of the first data sector is written to the second storage area; holding the data in the second storage area or moving the data from the second storage area to the second memory during the period from when the data is written to the second storage area until when the third write process is executed; 2. The magnetic disk drive according to claim 1.
5. the first memory is a random access memory; The write processing unit is After executing the first write process, the first storage area of the first memory is released and overwriting of the first storage area is permitted; When the data is stored in the second storage area, overwriting of the second storage area is prohibited; when the data is moved from the second storage area to the second memory, overwriting the data in the second storage area is permitted; 5. The magnetic disk drive according to claim 4.
6. a write channel including a data processing unit that processes received data and a first memory to which the data processed by the data processing unit is written; a second memory including a first recording area and a second recording area, into which data processed by the data processing unit is written; The write processing unit is the first segment of data of the first data sector is written to the first recording area, the second segment of data of the first data sector is written to the second recording area, and then the data is moved from the first recording area to the first memory, and then the first write process is executed; causing the second recording area to hold the data from when the data is written to the second recording area until when the third write process is executed; 2. The magnetic disk drive according to claim 1.
7. the second memory is a random access memory; The write processing unit is After the first write process is performed, the first recording area in the second memory is released and overwriting of the first recording area is permitted; prohibiting overwriting of the second recording area from the time the data is written to the second recording area until the third write process is executed; 7. The magnetic disk drive according to claim 6.
8. a write channel including a data processing unit that processes received data and a first memory to which the data processed by the data processing unit is written; a second memory having a recording capacity capable of recording data for at least two data tracks among the plurality of data tracks and into which data processed by the data processing unit is written; The write processing unit is causing the write channel to process data for the first and second data tracks; writing data of the first and second data tracks processed by the write channel into the second memory; after the data of the first and second data tracks is stored in the second memory, a write process of the data to the first and second data tracks is started.
2. The magnetic disk drive according to claim 1.
9. The write processing unit is a first sequential write process is executed to move the data of the first data track from the second memory to the first memory after the data of the first and second data tracks is stored in the second memory, and to sequentially write the data of the first data track to a plurality of first segments of the first data track; the data for the first data track includes data for the first segment of the first data sector and data for the first segment of the second data sector; Each of the first segments constitutes a part of a corresponding one of a plurality of data sectors; all segments constituting the corresponding one data sector are not assigned to the first data track; 9. The magnetic disk drive according to claim 8.
10. The data processing unit performs processing to encode the received data.
9. The magnetic disk drive according to claim 4, 6 or 8.
11. The write processing unit is performing the first sequential write process after moving the data of the first and second data tracks from the second memory to the first memory, and then performing a second sequential write process to sequentially write the data of the second data tracks to a plurality of second segments of the second data track; the data for the second data track includes data for the second segment of the first data sector and data for the second segment constituting a part of the second data sector; each of the second segments constitutes a part of the corresponding one of the data sectors; all segments constituting the corresponding one data sector are not assigned to the second data track; 10. The magnetic disk drive according to claim 9.
12. Each of the data sectors is divided into the first segment and the second segment. The magnetic disk drive according to claim 11.
13. The write processing unit is When storing the data of the first data track in the second memory, the data of the first data track is stored in a plurality of areas of the second memory to which a plurality of first addresses are assigned, and the plurality of first addresses are sequentially linked; When storing the data of the second data track in the second memory, the data of the second data track is stored in a plurality of areas of the second memory to which a plurality of second addresses are assigned, and the plurality of second addresses are sequentially linked; When performing the first sequential write process, the plurality of first addresses are selected in a concatenated order, data of the selected first addresses are moved from the second memory to the first memory in sequence, and data of the first data track is sequentially written to the plurality of first segments of the first data track in the order of moving the data from the second memory to the first memory; when performing the second sequential write process, the plurality of second addresses are selected in the order in which they were linked, data of the selected second addresses are moved in order from the second memory to the first memory, and data of the second data track is sequentially written to the plurality of second segments of the second data track in the order in which the data was moved from the second memory to the first memory; The magnetic disk drive according to claim 11.
14. a write channel including a data processing unit that processes the received data, a parity generating unit that performs an XOR operation on the data processed by the data processing unit, and a first memory that includes a third storage area and a fourth storage area and to which the data processed by the data processing unit and the data XORed by the parity generating unit are written; the plurality of sectors allocated across the first and second data tracks include a plurality of data sectors belonging to a group including the first data sector and the second data sector, and a parity sector in which parity for recovering data of the plurality of data sectors belonging to the group is recorded, and the plurality of sectors are respectively composed of a first segment and a second segment; the data processing unit processes the data of the plurality of data sectors belonging to the group and writes the data to the first memory; The parity generation unit performing an XOR operation on a plurality of first segments of data belonging to the group among the data processed by the data processing unit, generating the first segments of data of the parity sector, and writing the data to the third storage area; performing an XOR operation on a plurality of second segments of data belonging to the group among the data processed by the data processing unit, generating the second segments of data of the parity sector, and writing the data to the fourth storage area; 2. The magnetic disk drive according to claim 1.
15. When the parity generation unit generates data for the parity sector and writes the data to the first memory, after the data processing unit processes the data for the first data sector, the parity generation unit: performing an XOR operation on the data of the first segment of the first data sector, generating a part of the data of the first segment of the parity sector, and writing the part to the third storage area; Next, an XOR operation is performed on the data of the second segment of the first data sector to generate a part of the data of the second segment of the parity sector and write the part to the fourth storage area.
15. The magnetic disk drive according to claim 14.
16. when writing the data of the second segment of the parity sector to the first or second data track before writing all the data of the second segment belonging to the group to at least one of the first and second data tracks, the parity generation unit performs an XOR operation on the data of all the second segments belonging to the group in advance to complete the data of the second segment of the parity sector; 15. The magnetic disk drive according to claim 14.
17. the plurality of data tracks further includes a third data track; the first and second data tracks are provided in a first data area of the recording layer; the third data track is provided in a second data area of the recording layer, the second data area being radially shifted from the first data area, the entire third data sector is assigned to the third data track; 2. The magnetic disk drive according to claim 1.
18. a disk having a plurality of data tracks, including a first data track and a second data track, in a recording layer; a first read head, a second read head, and a third read head each for reading data from the recording layer of the disk; an arm supporting the first to third read heads; An actuator for moving the arm; a read processing unit capable of executing a read process for reading data from the recording layer, the first data track has a first segment constituting a portion of a first data sector; the second data track has a second segment that constitutes a part of the first data sector and is adjacent to the first segment in the radial direction; The read processing unit includes: driving the actuator to control a seek operation of the first to third read heads to move the first read head to a position facing the first data track; selecting a first selected read head which is the first read head and a second selected read head which is the read head closest to the second data track among the second and third read heads according to a skew angle of the first read head; simultaneously reading data of the first segment of the first data track and data of the second segment of the second data track with the first and second selected read heads; Magnetic disk device.
19. a read channel having a first two-dimensional FIR filter and a second two-dimensional FIR filter; the first two-dimensional FIR filter performs a first waveform equalization process to equalize a waveform of composite data obtained by combining a first read signal read by the first selected read head and a second read signal read by the second selected read head so as to minimize an error rate of data written to the first data track, and outputs first waveform equalization data; the second two-dimensional FIR filter performs a second waveform equalization process for equalizing a waveform of the composite data so that an error rate of the data written to the second data track is minimized, and outputs second waveform equalized data.
20. The magnetic disk drive according to claim 18.
20. the read channel further includes a two-dimensional Viterbi decoder that outputs decoded data obtained by simultaneously decoding the first waveform equalization data and the second waveform equalization data.
20. The magnetic disk drive according to claim 19.
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