Indication device

Abstract

To provide a display device in which the image in the area where the sensor is built is not cut off within the display area. [Solution] The display device according to the present invention includes a display panel including a display area and a sensor area formed within the display area and provided with a sensor display area and a sensor transparent area defined by gate wiring and data wiring, and a sensor module arranged on the back of the display panel so as to be aligned with the sensor area, wherein a plurality of sensor subpixels that display different colors from each other are arranged in the sensor area, and the plurality of sensor subpixels are arranged along the sensor display area and gate wiring.

Description

[Technical Field]

[0001] The present invention relates to a display device, and more particularly to a camera-integrated display device with improved lifespan. [Background technology]

[0002] As information technology develops, various forms of small and thin display devices have been proposed, including liquid crystal display devices, organic light-emitting display devices, plasma display devices, and micro LED display devices.

[0003] In such a display device, a camera is incorporated inside to provide users with a variety of functions. The display device has a camera hole for housing the camera. However, in this case, since no image is displayed in the area where the camera hole is formed, there was a problem in that the image displayed on the display device was cut off midway, which was perceived by the user. [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] The present invention aims to provide a display device in which the image in the area where the sensor is built-in is not cut off within the display area.

[0005] Another objective of the present invention is to provide a display device that can maximize the light-emitting area in the region where the sensor is built in, thereby preventing a shortened lifespan due to excessive current. [Means for solving the problem]

[0006] To achieve the aforementioned objectives, the display device according to the present invention includes a display panel including a display area and a sensor area formed within the display area and provided with a sensor display area and a sensor transparent area defined by gate wiring and data wiring, and a sensor module positioned on the back of the display panel so as to be aligned with the sensor area, wherein the sensor area is provided with a plurality of sensor subpixels that display different colors from each other, and the plurality of sensor subpixels are arranged along the sensor display area and gate wiring.

[0007] Each sensor subpixel includes a first to third sensor subpixel that displays one color from red, green, and blue. The sensor display area has at least one first sensor subpixel and at least one second sensor subpixel, and the third sensor subpixel is positioned along the gate wiring. In this case, the third sensor subpixel can be positioned overlapping with at least one of the gate wirings positioned at the upper and lower edges of the sensor display area. Furthermore, the third sensor subpixel can be positioned overlapping with at least one of the gate wirings positioned at the upper and lower edges of the sensor transparent area.

[0008] At least one first sensor subpixel is placed in the sensor display area, and the second and third sensor subpixels can be placed along the gate wiring. In this case, the second and third sensor subpixels can be placed overlapping with the gate wiring located at the upper and lower edges of the sensor display area, respectively, and the second and third sensor subpixels can also be placed overlapping with the gate wiring located at the upper and lower edges of the sensor transparent area.

[0009] A sensor subpixel arranged along a gate wiring includes a substrate, a thin-film transistor placed on the substrate, a light-emitting element placed on the thin-film transistor, a shielding layer placed on the light-emitting element to block light output to adjacent sensor subpixels, and a lens placed between the shielding layers on the shielding layer. A sensor subpixel arranged in a sensor display area may have the same structure as a sensor subpixel arranged along a gate wiring.

[0010] In this invention, the sensor area consists of a sensor display area where an image is displayed and a transparent sensor area. Therefore, the sensor area can detect external light at the same time as the image is displayed. Consequently, compared to conventional configurations in which the sensor is placed in a notch or a hole is formed in the display area, it is possible to prevent a reduction in the area of ​​the display area or interruption of the image.

[0011] Furthermore, in the display device according to the present invention, the light-emitting area in the sensor area is increased by forming sensor subpixels superimposed on the gate wiring. Therefore, even if the amount of current applied to the sensor subpixels is reduced, the difference in brightness between the display area and the sensor area can be minimized, and a reduction in the lifespan of the display device can be prevented.

[0012] Furthermore, since the amount of current applied to the sensor subpixels can be reduced in this invention, a low-power display device that can reduce power consumption can be realized. [Brief explanation of the drawing]

[0013] [Figure 1] This is a schematic block diagram showing the display device according to the present invention. [Figure 2] This is a block diagram schematically showing the subpixels shown in Figure 1. [Figure 3]It is a circuit diagram conceptually showing sub-pixels of a display device according to the present invention. [Figure 4] It is an exploded perspective view schematically showing a display device according to an embodiment of the present invention. [Figure 5] It is a plan view briefly showing a display panel of a display device according to an embodiment of the present invention. [Figure 6] It is a diagram conceptually showing a display area and a sensor area of a display device. [Figure 7] It is a diagram briefly showing a display area and a sensor area of a display device according to an embodiment of the present invention. [Figure 8] It is a diagram specifically showing the structure of sensor sub-pixels of a display device according to an embodiment of the present invention. [Figure 9A] It is a diagram briefly showing a sensor area of a display device according to another embodiment of the present invention. [Figure 9B] It is a diagram briefly showing a sensor area of a display device according to another embodiment of the present invention.

Mode for Carrying Out the Invention

[0014] Advantages, features of the present invention, and methods for achieving them will become clear by referring to embodiments described in detail together with the drawings. However, the present invention is not limited to the embodiments disclosed below and can be embodied in various different forms. However, this embodiment is provided to make the disclosure of the present invention complete and to enable those with ordinary knowledge in the technical field to which the present invention pertains to fully understand the scope of the invention, and the present invention is defined by the scope of the claims.

[0015] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary and the present invention is not limited thereto. Throughout the specification, the same reference numerals indicate the same components. Further, in the description of the present invention, when it is determined that a specific description of related known technologies obscures the gist of the present invention, the detailed description thereof is omitted. When "comprises", "includes", "has", "holds", "becomes", etc. are described in this specification, other parts can be added unless "only" is also described. Further, when a component is described in the singular form, it can be interpreted in the plural form unless otherwise explicitly stated.

[0016] Also, when interpreting components, even without an explicit description, it shall be considered to include an error range.

[0017] For example, when explaining the positional relationship between two components by "above", "on the upper part", "on the lower part", "sideways", etc., if "directly" or "immediately" is not described, one or more other components can also be located between the two components. <00,00104> Also, in the description of the time relationship, for example, when explaining the temporal front-back relationship by "after", "subsequent to", "next", "before", etc., if "directly" or "immediately" is not described, discontinuous cases can be included.

[0019] Also, terms such as "first" and "second" are used to distinguish components, but the components are not limited to such terms. Therefore, the first component mentioned below can also be the second component within the technical idea of the present invention.

[0020] In describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc., may be used. However, such terms are used solely to distinguish components and do not limit their nature, order, sequence, number, etc. When it is stated that one component is “linked,” “joined,” or “connected” to another component, it should be understood that both components may be directly linked, joined, or connected, but that another component may be interposed between each component, and each component may be “linked,” “joined,” or “connected” through that other component.

[0021] In the present invention, "display device" can include a display device in the narrow sense, such as a display module that includes a display panel and a drive unit for driving the display panel. It can also include a set electronic device or set device, such as a notebook computer, television, computer monitor, or automotive equipment or other forms of vehicle equipment, which are final products equipped with a display module, or a mobile electronic device such as a smartphone or electronic pad.

[0022] Therefore, the display device in the present invention can include the display device itself in the narrow sense, such as a display module, as well as application products equipped with a display module, or even a set device which is the final product.

[0023] The present invention will be described in detail below with reference to the drawings.

[0024] Figure 1 is a schematic block diagram showing a display device 100 according to the first embodiment of the present invention, and Figure 2 is a schematic block diagram showing the subpixel SP shown in Figure 1.

[0025] As shown in Figure 1, the display device 100 includes an image processing unit 102, a timing control unit 104, a gate drive unit 106, a data drive unit 107, a power supply unit 108, and a display panel 109.

[0026] The video processing unit 102 outputs timing signals to drive any device along with the external video signal. For example, the timing signals output from the video processing unit 102 may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.

[0027] The timing control unit 104 receives timing signals and other signals along with the video signal from the video processing unit 102. Based on the video signal and timing signals input from the video processing unit 102, the timing control unit 104 generates video data DATA, a gate control signal GDC for controlling the operation timing of the gate drive unit 106, and a data control signal DDC for controlling the operation timing of the data drive unit 107. The generated gate control signal GDC is output to the gate drive unit 106, and the generated video data DATA and data control signal DDC are output to the data drive unit 107.

[0028] The gate drive unit 106 generates gate signals (gate voltage, scan signal) using the gate control signal GDC from the timing control unit 104, and applies the generated gate signals to multiple gate wirings GL1 to GLm of the display panel 109. At this time, the gate drive unit 106 can be in the form of an IC (Integrated Circuit), but is not limited to this.

[0029] The gate drive unit 106 may be a gate-in-panel (GIP) type, which is located on the substrate of the display panel 109.

[0030] The data drive unit 107 generates a data signal (data voltage) using the video data DATA and data control signal DDC supplied from the timing control unit 104, and applies the generated data signal to multiple data wires DL1 to DLn of the display panel 109. The data drive unit 107 samples and latches the digital video data DATA from the timing control unit 104 and converts it into an analog data signal based on gamma voltage. The data drive unit 107 can be in the form of an IC, but is not limited to this.

[0031] The power supply unit 108 outputs a high potential voltage Vdd and a low potential voltage Vss, etc., and supplies them to the display panel 109. The high potential voltage Vdd is supplied to the display panel 109 through the first power supply wiring EVDD, and the low potential voltage Vss is supplied to the display panel 109 through the second power supply wiring EVSS. At this time, the voltage output from the power supply unit 108 may also be output to the gate drive unit 106 and the data drive unit 107 and used to drive them.

[0032] The display panel 109 displays images using the gate signal from the gate drive unit 106, the data signal from the data drive unit 107, and the high potential voltage Vdd and low potential voltage Vss from the power supply unit 108.

[0033] The display panel 109 includes multiple subpixels SP, multiple gate lines GL1 to GLm, and multiple data lines DL1 to DLn. The multiple subpixels SP may include red R subpixels, green G subpixels, and blue B subpixels, or they may include white W subpixels, red R subpixels, green G subpixels, and blue B subpixels. In this case, the white W, red R, green G, and blue B subpixels SP may all have the same area, or they may have different areas.

[0034] As shown in Figure 2, one subpixel SP can be connected to the gate wiring GL1, data wiring DL1, first power wiring EVDD, and second power wiring EVSS. The configuration of the pixel circuit determines the driving method of the subpixel SP, as well as the number of transistors and capacitors in the subpixel SP. For example, the subpixel SP may be a 2T1C structure containing two transistors and one capacitor. In other embodiments, the subpixel SP may be one of the following structures: 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, or 8T2C.

[0035] Figure 3 is a schematic circuit diagram showing the subpixel SP of an organic electroluminescent display device 100 according to a first embodiment of the present invention.

[0036] As shown in Figure 3, the organic electroluminescent display device according to the present invention includes gate wiring GL, data wiring DL, and power wiring PL that intersect with each other and define subpixels SP, and a switching thin-film transistor Ts, a driving thin-film transistor Td, a storage capacitor Cst, and an organic light-emitting element D are arranged in the subpixels SP.

[0037] The switching thin-film transistor Ts is connected to the gate wiring GL and data wiring DL, the driving thin-film transistor Td and storage capacitor Cst are connected between the switching thin-film transistor Ts and the power wiring PL, and the organic light-emitting element D is connected to the driving transistor Td.

[0038] In an organic electroluminescent display device with such a structure, when a switching thin-film transistor Ts is turned on by a gate signal applied to the gate wiring GL, a data signal applied to the data wiring DL is applied via the switching thin-film transistor Ts to the gate electrode of the driving thin-film transistor Td and to one electrode of the storage capacitor Cst.

[0039] The driving thin-film transistor Td is turned on by a data signal applied to its gate electrode. As a result, a current proportional to the data signal flows from the power supply wiring PL through the driving thin-film transistor Td to the organic light-emitting element D, and the organic light-emitting element D emits light with a brightness proportional to the current flowing through the driving thin-film transistor Td.

[0040] At this time, the storage capacitor Cst is charged with a voltage proportional to the data signal, so that the voltage of the gate electrode of the drive thin-film transistor Td is kept constant for one frame.

[0041] In the first embodiment shown in Figure 3, the subpixel SP is equipped with only two thin-film transistors Td and Ts and one capacitor Cst, but in other embodiments, the subpixel SP may be equipped with three or more thin-film transistors and two or more capacitors.

[0042] The following describes in detail an embodiment of the present invention with reference to the drawings.

[0043] Figure 4 is a schematic exploded perspective view showing a display device 100 according to the first embodiment of the present invention, and Figure 5 is a simplified plan view showing the display panel PNL of the display device 100 according to the first embodiment of the present invention.

[0044] As shown in Figures 4 and 5, the display device 100 according to the first embodiment of the present invention includes a display panel PNL, a sensor module SM, a circuit board CB, a cover window CW, and a frame FRA.

[0045] The display panel PNL includes a display area AA where the image is actually displayed, and a non-display area NA located outside of display area AA.

[0046] Display area AA contains a pixel area P that includes multiple subpixels SP1, SP2, and SP3. In this case, the multiple subpixels SP1, SP2, and SP3 can each contain a red R subpixel, a green G subpixel, and a blue B subpixel, respectively. Furthermore, pixel area P may also contain a white W subpixel.

[0047] Although not shown in Figure 4, display area AA has multiple gate lines and multiple data lines, and subpixels SP1, SP2, and SP3 are placed in the intersection areas of the gate lines and data lines. Each of the subpixels SP1, SP2, and SP3 has a thin-film transistor, which is a switching element, and a display element that actually realizes the image.

[0048] The display element can include various types of display elements. For example, the display element may be an organic electroluminescent display element, a liquid crystal display element, a quantum dot display element, a micro LED display element, or a mini LED display element.

[0049] Although not shown in Figure 5, the non-display area NA can be configured with a gate drive unit and a data drive unit that apply various signals to subpixels SP1, SP2, and SP3. The gate drive unit applies gate signals to subpixels SP1, SP2, and SP3 through gate wiring, and the data drive unit applies data signals to subpixels SP1, SP2, and SP3 through data wiring. In this case, the gate drive unit may be a GIP (Gate-In-Panel) in which the gate drive circuit is formed directly on the substrate of the display panel PNL.

[0050] The sensor module SM can be positioned on the back of the display panel PNL. The sensor module SM can be superimposed on the display area AA of the display panel PNL. The sensor module SM can represent any configuration that utilizes external inputs input via the display panel PNL. For example, the sensor module SM could be a camera, an ambient light sensor, a fingerprint sensor, etc.

[0051] The display device 100 according to the first embodiment of the present invention is a UDC (Under Display Camera) or UDIR (Under Display IR) display device in which a sensor module SM is positioned below the display panel PNL.

[0052] In conventional display devices, a notch is formed in a portion of the upper edge of the display area AA, and then optical sensors such as cameras and infrared sensors are placed in this notch. However, in this case, the notch is formed by removing a portion of the upper edge of the display area AA, which not only reduces the area of ​​the display area AA but also results in an unattractive appearance.

[0053] To solve this problem, a display device has been proposed in which a hole is formed in the display area AA, and then an optical sensor is placed in the hole. However, in this case, since the hole is an area where no image is displayed, there were problems such as the image being interrupted in the hole.

[0054] On the other hand, in the display device 100 of the present invention, the sensor module SM is mounted below the display panel PNL, which prevents a reduction in the display area and interruptions in the image.

[0055] The circuit board CB can be placed on the back of the display panel PNL. The circuit board CB may be a printed circuit board (PCB) or a flexible printed circuit board (FPCB).

[0056] The cover window CW can be positioned across the entire surface of the display panel PNL. The cover window CW can cover the entire surface of the display panel PNL and protect it from external impacts.

[0057] A cover window (CW) can be formed from, but is not limited to, a transparent plastic material, a glass material, or a tempered glass material. For example, a cover window (CW) may be sapphire glass, Gorilla Glass, or a laminated structure thereof. A cover window (CW) may also include one of the following materials: polyethylene terephthalate (PET), polycarbonate (PC), polyethersulfone (PES), polyethylene naphthalate (PEN), and polynorbornene (PNB). A cover window (CW) can also be formed from tempered glass, considering scratch resistance and clarity.

[0058] The frame FRA receives the display panel PNL and supports the cover window CW. The frame FRA also receives the sensor module SM and the circuit board CB. The frame FRA secures the display panel PNL, the sensor module SM, and the circuit board CB to the display device 100 and protects them from external impacts.

[0059] A sensor area SA is formed on the display panel PNL. The sensor area SA is aligned with the sensor module SM and transmits external stimuli, such as light, directly to the sensor module SM. In particular, in this invention, multiple subpixels for displaying images are provided in the sensor area SA, so that external light is transmitted to the sensor module SM and an image is displayed on the screen at the same time.

[0060] Figure 6 is an enlarged plan view of area A in Figure 5, conceptually illustrating the display area AA and the sensor area SA.

[0061] As shown in Figure 6, the display area AA includes multiple pixel areas P, and each pixel area P includes multiple subpixels SP1, SP2, and SP3. The subpixels SP1, SP2, and SP3 may, but are not limited to, red, green, and blue subpixels, respectively.

[0062] The sensor area SA may include a sensor display area DA and a sensor transparency area TA. The sensor display area DA is the area within the sensor area where an image is displayed, and the sensor transparency area TA is a transparent area through which external stimuli, such as external light, are transmitted and input to the sensor module SM. Multiple sensor subpixels DSP1, DSP2, and DSP3 are arranged in the sensor display area DA. The sensor subpixels DSP1, DSP2, and DSP3 may be, but are not limited to, red, green, and blue subpixels, respectively.

[0063] In Figure 6, the sensor region SA is configured with one sensor display region DA and three sensor transparent regions TA, but the present invention is not limited to this configuration. The sensor region SA can also be configured with two or three sensor display regions DA and one or two sensor transparent regions TA.

[0064] The subpixels SP1, SP2, SP3 of display area AA and the sensor subpixels DSP1, DSP2, DSP3 of sensor display area DA can take on various shapes. For example, in Figure 6, the subpixels SP1, SP2, SP3 and the sensor subpixels DSP1, DSP2, DSP3 are triangular or rhombic, but are not limited to these shapes.

[0065] Thus, in the UDC or UDIR structured display device 100 according to the first embodiment of the present invention, the sensor area SA is composed of a sensor display area DA on which an image is displayed and a transparent sensor transparent area TA. Therefore, the sensor area SA can detect external light at the same time as an image is displayed. Consequently, compared to conventional configurations in which a sensor is placed in a notch or a hole is formed in the display area, it is possible to prevent a reduction in the area of ​​the display area or interruption of the image.

[0066] However, the UDC or UDIR structured display device 100 according to the first embodiment of the present invention had the following problems.

[0067] In the UDC or UDIR structured display device 100 according to the first embodiment of the present invention, an image is also displayed in the sensor area SA to prevent image interruption. However, in order to prevent image interruption, the brightness of the display area AA and the sensor area SA must be kept approximately the same so that the user cannot perceive a difference in brightness. However, in the UDC or UDIR structured display device 100 according to the first embodiment of the present invention, since the sensor area SA has a sensor display area DA on which an image is displayed and a sensor transparent area TA that senses light, in order to make the brightness of the sensor area SA the same as the brightness of the display area AA, the brightness of the sensor display area DA must be set higher than the brightness of the pixel area P of the display area AA.

[0068] For example, if the sensor area SA consists of one sensor display area DA and three sensor transparent areas TA, the brightness of the sensor display area DA must be three times the brightness of the pixel area P of the display area AA. If the sensor area SA consists of three sensor display areas DA and one sensor transparent area TA, the brightness of the sensor display area DA must be 1.3 times the brightness of the pixel area P of the display area AA. If the sensor area SA consists of two sensor display areas DA and one sensor transparent area TA, the sensor area SA may cause problems in light sensing. Therefore, it is desirable that the sensor area SA in the display device 100 is substantially composed of one sensor display area DA and three sensor transparent areas TA.

[0069] Thus, in order to increase the brightness of the sensor display area DA of the sensor area SA compared to the brightness of the pixel area P of the display area AA, it is necessary to significantly increase the amount of current supplied to the sensor display area DA of the sensor area SA (for example, supplying three times the current compared to the pixel area P). However, such an increase in current has the problem of shortening the lifespan of the light-emitting element in the sensor area SA.

[0070] To solve this problem, the display device according to the second embodiment of the present invention provides a structure that maximizes the area of ​​the sensor display area DA of the sensor area SA, improving the brightness of the sensor area SA while not reducing the transmittance of the sensor transparent area TA.

[0071] Figure 7 is a simplified diagram showing the display area AA and sensor area SA in the display panel PNL of the display device 100 according to the second embodiment of the present invention. The same parts as in the first embodiment will not be described.

[0072] As shown in Figure 7, the display device according to the second embodiment of the present invention includes a display area AA and a non-display area NA located outside the display area AA.

[0073] Display area AA includes a sensor area SA corresponding to the sensor module SM, but display area AA excluding sensor area SA includes multiple pixel areas P, and sensor area SA includes multiple first sensor display areas DA1, multiple second sensor display areas DA2, and multiple sensor transparent areas TA. The multiple pixel areas P, multiple first sensor display areas DA1, multiple second sensor display areas DA2, and multiple sensor transparent areas TA can be defined by multiple gate lines GL1 to GL6 and multiple data lines DL1 to DL6.

[0074] In display area AA, multiple gate wirings GL1 to GL6 are arranged horizontally, and multiple data wirings DL1 to DL6 that intersect with the gate wirings GL1 to GL6 are arranged vertically.

[0075] For example, the multiple gate wirings GL1 to GL6 include a first gate wiring GL1, a second gate wiring GL2, and a third gate wiring GL3 that are adjacent to each other without the intervening pixel area P, a first sensor display area DA1, or a sensor transparent area TA, and a fourth gate wiring GL4, a fifth gate wiring GL5, and a sixth gate wiring GL6 that are adjacent to each other without the intervening pixel area P, a first sensor display area DA1, or a sensor transparent area TA, and a pixel area P, a first sensor display area DA1, or a sensor transparent area TA can be placed between the third gate wiring GL3 and the fourth gate wiring GL4.

[0076] Furthermore, the multiple data lines DL1 to DL6 include the first data line DL1 to the sixth data line DL6, and between two adjacent data lines DL1 to the sixth data line DL6, a pixel area P, a first sensor display area DA1, or a sensor transparent area TA can be placed, respectively.

[0077] Each pixel region P in display region AA contains multiple subpixels SP1, SP2, and SP3. For example, the multiple subpixels SP1, SP2, and SP3 may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3 corresponding to red, green, and blue, respectively.

[0078] In the sensor area SA, the first sensor display area DA1 and the second sensor display area DA2 are areas for displaying images, and the sensor transparent area TA in the sensor area SA is an area for transmitting light to the sensor module SM.

[0079] For example, the first sensor display area DA1 is positioned to the left or right of the sensor transparent area TA, and the second sensor display area DA2 is positioned above or below the sensor transparent area TA, and may be superimposed on the first gate wiring GL1, the second gate wiring GL2, and the third gate wiring GL3.

[0080] The first sensor display area DA1 and the second sensor display area DA2 include multiple sensor subpixels DSP1, DSP2, and DSP3.

[0081] For example, a plurality of sensor subpixels DSP1, DSP2, and DSP3 may include a first sensor subpixel DSP1 and a second sensor subpixel DSP2 located in the first sensor display area DA1, corresponding to red and green, respectively, and a third sensor subpixel DSP3 located in the second sensor display area DA2, corresponding to blue. That is, the first sensor subpixel DSP1 and the second sensor subpixel DSP2 may be located below the first gate wiring GL1, the second gate wiring GL2, and the third gate wiring GL3, and the third sensor subpixel DSP3 may be superimposed on the first gate wiring GL1, the second gate wiring GL2, and the third gate wiring GL3.

[0082] The multiple subpixels SP1, SP2, SP3 and multiple sensor subpixels DSP1, DSP2, DSP3 shown in Figure 7 schematically represent the aperture ratio, which is the ratio of the light-emitting region corresponding to the area where light is emitted in each subpixel and sensor subpixel.

[0083] Although not shown in Figure 7, each of the multiple subpixels SP1, SP2, SP3 and the multiple sensor subpixels DSP1, DSP2, DSP3 is equipped with an electrically connected thin-film transistor and a light-emitting element. The thin-film transistor is electrically connected to gate wiring GL1 to GL6 and data wiring DL1 to DL6, and is turned on by the scanning signal input via the gate wiring GL1 to GL6, and can supply the data signal input via the data wiring DL1 to DL6 to the light-emitting element.

[0084] For the sake of explanation, Figure 7 does not show the connections of multiple subpixels SP1, SP2, SP3 and multiple sensor subpixels DSP1, DSP2, DSP3 to multiple data lines DL1 to DL6, but only the connections of multiple subpixels SP1, SP2, SP3 and multiple sensor subpixels DSP1, DSP2, DSP3 to multiple gate lines GL1 to GL6.

[0085] For example, the first, second, and third gate wirings GL1, GL2, and GL3 may be connected to the first, second, and third subpixels SP1, SP2, and SP3 of the pixel region P, respectively, and to the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 of the first and second sensor display regions DA1 and DA2, respectively. In this case, the first, second, and third gate wirings GL1, GL2, and GL3 may be arranged adjacent to each other above (or below) the pixel region P, the first sensor display region DA1, and the sensor transparent region TA, while the first, second, and third subpixels SP1, SP2, and SP3 of the pixel region P and the first and second sensor subpixels DSP1 and DSP2 of the first sensor display region DA1 may be arranged below (or above) the first, second, and third gate wirings GL1, GL2, and GL3. The electrical connections between the first, second, and third gate wirings GL1, GL2, GL3 and the first, second, and third subpixels SP1, SP2, SP3, as well as the electrical connections between the first, second, and third gate wirings GL1, GL2, GL3 and the first, second, and third sensor subpixels DSP1, DSP2, DSP3, may be made through contact holes formed in the insulating layer.

[0086] The first sensor display area DA1 below the first, second, and third gate wirings GL1, GL2, and GL3 contains the first sensor subpixel DSP1 and the second sensor subpixel DSP2, while the second sensor display area DA2 superimposed on the first, second, and third gate wirings GL1, GL2, and GL3 contains the third sensor subpixel DSP3.

[0087] The first, second, and third gate wirings GL1, GL2, and GL3 are positioned above the first sensor display area DA1 and the sensor transparent area TA. Since the first, second, and third gate wirings GL1, GL2, and GL3 are made of opaque metal, this area is an opaque region through which light does not pass. Therefore, even if the third sensor subpixel DSP3 is placed in the second sensor display area DA2 superimposed on the first, second, and third gate wirings GL1, GL2, and GL3, the area of ​​the sensor transparent area TA does not decrease, and the amount of light input to the sensor module through the sensor transparent area TA does not decrease.

[0088] The pixel area P of display area AA and the first sensor display area DA1 of sensor area SA are formed with the same area. Three first, second, and third subpixels SP1, SP2, and SP3 are arranged in pixel area P, while two first and second sensor subpixels DSP1 and DSP2 are arranged in the first sensor display area DA1 of sensor area SA. Therefore, the area of ​​each of the first and second sensor subpixels DSP1 and DSP2 can be made larger than the area of ​​each of the first, second, and third subpixels SP1, SP2, and SP3. As a result, the amount of light emitted by the first and second sensor subpixels DSP1 and DSP2 increases, so the brightness of the first and second sensor subpixels DSP1 and DSP2 can be improved without increasing the current.

[0089] For example, by making the vertical lengths of the first and second sensor subpixels DSP1 and DSP2 in the first sensor display area DA1 larger than the vertical lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, the areas of the first and second sensor subpixels DSP1 and DSP2 in the first sensor display area DA1 can be made larger than the areas of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P.

[0090] The third sensor subpixel DSP3 is positioned in the second sensor display area DA2, which is superimposed on the first, second, and third gate wirings GL1, GL2, and GL3. The third sensor subpixel DSP3 is positioned between the sensor display areas DA and can extend along the first, second, and third gate wirings GL1, GL2, and GL3.

[0091] For example, by making the lateral length of the third sensor subpixel DSP3 in the second sensor display area DA2 larger than the lateral lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, the area of ​​the third sensor subpixel DSP3 in the second sensor display area DA2 can be made larger than the areas of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P.

[0092] On the other hand, in the second embodiment shown in Figure 7, the multiple subpixels SP1, SP2, SP3 of the pixel region P and the multiple sensor subpixels DSP1, DSP2, DSP3 of the first and second sensor display regions DA1, DA2 are in the shape of a strip or rectangle extending along the horizontal direction aligned with the multiple gate wirings GL1, GL2, GL3. However, the multiple subpixels SP1, SP2, SP3 and the multiple sensor subpixels DSP1, DSP2, DSP3 of the present invention are not limited to such shapes. For example, in other embodiments, the multiple subpixels SP1, SP2, SP3 of the pixel region P and the first sensor subpixel DSP1 and second sensor subpixel DSP2 of the first sensor display region DA1 may be triangular or rhombic, and the third sensor subpixel DSP3 of the second sensor display region DA2 may be in the shape of a strip or rectangle extending along the horizontal direction.

[0093] In other embodiments, the third sensor subpixel DSP3 may be triangular or rhombus-shaped. In this case, a portion of the third sensor subpixel DSP3 (for example, three vertices (triangle) or two vertices (rhombus)) may protrude into the sensor transparent area TA outside the second sensor display area DA2, which is superimposed on multiple gate wirings GL1, GL2, and GL3.

[0094] Figure 8 is a cross-sectional view along II' of Figure 7, and specifically shows the structure of the third sensor subpixel DSP3 of the display device 100 according to the second embodiment of the present invention. The first, second and third subpixels SP1, SP2, SP3 and the first sensor subpixel DSP1 and second sensor subpixel DSP2 have the same structure as the third sensor subpixel DSP3, except that they do not overlap the first, second and third gate wirings GL1, GL2, GL3, and are therefore replaced in Figure 8.

[0095] As shown in Figure 8, a first buffer layer 142 is placed on the substrate 140. The substrate 140 may be made of a rigid material such as glass, or a flexible plastic material.

[0096] If the substrate 140 is composed of a plastic material, the substrate 140 can be formed from at least one of the following: polyimide, polymethyl methacrylate, polyethylene terephthalate, polyethersulfone, and polycarbonate, but is not limited to these materials.

[0097] For example, if the substrate 140 is made of polyimide, it can be composed of multiple polyimides, and inorganic layers can be further arranged between the polyimides, but it is not limited to this.

[0098] The first buffer layer 142 is formed over the entire substrate 140 and can improve the adhesion between the layer formed on the substrate 140 and the substrate 140, and can block alkaline components and other substances from flowing out of the substrate 140. In addition, the first buffer layer 142 can slow down the diffusion of moisture and oxygen that have penetrated the substrate 140.

[0099] The first buffer layer 142 is made of SiN x or SiO x It may be a single layer or a multilayer. If the first buffer layer 142 is a multilayer, SiN x and SiOx These may be formed alternately. The first buffer layer 142 may be omitted depending on the type and material of the substrate 140, the structure and type of the thin-film transistor, etc.

[0100] A thin-film transistor T is formed on the first buffer layer 142. For the sake of explanation, only the driving thin-film transistor is shown among the various thin-film transistors that can be arranged, but other thin-film transistors such as switching thin-film transistors can also be included. Also, although a top-gate type thin-film transistor is shown in Figure 8, the thin-film transistor is not limited to this and may have other structures such as a bottom-gate type.

[0101] The thin-film transistor T includes a semiconductor layer 112 disposed on a first buffer layer 142, a gate insulating layer 144 formed on the semiconductor layer 112, a gate electrode 114 disposed on the gate insulating layer 144, a first interlayer insulating layer 146 formed on the gate electrode 114, and a source electrode 115 and a drain electrode 116 disposed on the first interlayer insulating layer 146.

[0102] The semiconductor layer 112 can be formed from a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of low-temperature polysilicon (LTPS) with high mobility, but is not limited to this.

[0103] Furthermore, the semiconductor layer 112 can be formed from an oxide semiconductor. For example, it can be formed from any one of indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO), but is not limited to these. The semiconductor layer 112 includes a central channel region 112a and doped layers on both sides, namely the source region 112b and the drain region 112c.

[0104] The gate insulating layer 144 is made of SiO x ya SiN xThis may be a single layer or multiple layers made of inorganic materials, but is not limited to these.

[0105] The gate electrode 114 is made of metal. For example, the gate electrode 114 may be a single layer or a multilayer made of one of the following materials or an alloy thereof: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0106] The first interlayer insulating layer 146 is made of an organic material such as photoacrylic, or SiO x ya SiN x The first interlayer insulating layer 146 may be a single layer or a multilayer made of inorganic materials. Furthermore, the first interlayer insulating layer 146 may be a multilayer made of an organic layer and an inorganic layer, but is not limited to this.

[0107] The source electrode 115 and drain electrode 116 may be a single layer or a multilayer made of one of the following materials or an alloy thereof: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). The source electrode 115 and drain electrode 116 can contact the source region 112b and drain region 112c of the semiconductor layer 112 through contact holes formed in the gate insulating layer 144 and the first interlayer insulating layer 146, respectively.

[0108] The semiconductor layer 112, gate electrode 114, source electrode 115, and drain electrode 116 constitute a thin-film transistor T.

[0109] Although not shown in Figure 8, a bottom shield metal layer can be placed on the substrate 140 below the semiconductor layer 112. The bottom shield metal layer is intended to minimize the back channel phenomenon caused by trapped charges on the substrate 140 and prevent afterimages or degradation of transistor performance. It may be a single layer or a multilayer made of titanium (Ti), molybdenum (Mo), or an alloy thereof, but is not limited to these.

[0110] First, second, and third gate wirings GL1, GL2, and GL3 are arranged on the gate insulating layer 144. The first, second, and third gate wirings GL1, GL2, and GL3 are made of the same metal as the gate electrode 114, but they can also be made of a different metal.

[0111] Furthermore, the first, second, and third gate wirings GL1, GL2, and GL3 may be placed on a different layer from the gate electrode 114, for example, on the first buffer layer 142 or on the first interlayer insulating layer 146.

[0112] In Figure 8, the first, second, and third gate wirings GL1, GL2, and GL3 and the gate electrode 114 are arranged at a certain distance apart, but the first, second, and third gate wirings GL1, GL2, and GL3 and the gate electrode 114 can also be formed as a single unit.

[0113] A planarization layer 148 is formed on the substrate 140 on which the thin-film transistor T is placed. The planarization layer 148 can be formed from an organic material such as photoacrylic, but is not limited to this, and may be a multilayer including an inorganic layer and an organic layer.

[0114] A light-emitting diode D is placed on the planarization layer 148. The light-emitting diode D consists of a first electrode 132, a light-emitting layer 134, and a second electrode 136.

[0115] The first electrode 132 is disposed on the planarization layer 148 and is electrically connected to the drain electrode 116 of the thin film transistor T through a contact hole formed in the planarization layer 148. The first electrode 132 can be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. Also, the first electrode 132 can be formed of a transparent metal oxide material layer such as ITO or IZO.

[0116] When the display device 100 is a top emission type, the first electrode 132 can further include an opaque conductive material in order to function as a reflective electrode that reflects light. When the display device 100 is a bottom emission type, the first electrode 132 can use a transparent conductive material that transmits light, such as ITO or IZO.

[0117] A bank layer BNK is formed at the boundary of each sub-pixel on the planarization layer 148. The bank layer BNK can be a partition wall that defines the sub-pixel. The bank layer BNK can partition each sub-pixel and prevent light of a specific color from adjacent sub-pixels from being mixed and emitted.

[0118] The bank layer BNK is SiN x or SiO x and can include at least one of inorganic insulating materials such as these, or organic insulating materials such as BCB (benzocyclobutene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or a photosensitive agent containing a black (or dark color) pigment, but is not limited thereto.

[0119] The light emitting layer 134 is formed on the upper surface of the first electrode 132 in the display area AA, the inclined surface of the bank layer BNK, and a partial area of the upper surface of the bank layer BNK, and can extend to the non-display area NA.

[0120] The light-emitting layer 134 is formed on each of the R, G, and B subpixels and may include an R light-emitting layer that emits red light, a G light-emitting layer that emits green light, and a B light-emitting layer that emits blue light. For example, the light-emitting layer 134 may include, but is not limited to, an organic light-emitting layer or an inorganic light-emitting layer, such as a nano-sized material layer, a quantum dot, a micro-LED light-emitting layer, or a mini-LED light-emitting layer.

[0121] The light-emitting layer 134 can be formed not only with an organic light-emitting layer, but also with an electron injection layer and a hole injection layer for injecting electrons and holes into the organic light-emitting layer, an electron transport layer, a hole blocking layer, an electron blocking layer, and a hole transport layer for transporting the injected electrons and holes to the light-emitting layer, respectively, but is not limited to these.

[0122] The second electrode 136 is placed on the light-emitting layer 134 and may be a single layer or a multilayer made of metal or a metal alloy. The second electrode 136 may also be made of a transparent metal oxide such as ITO or IZO, but is not limited to this.

[0123] If the display device 100 is a top-emission type, the second electrode 136 can be formed using a light-transmitting translucent conductive material. For example, the second electrode 136 can be formed from at least one of the following alloys: LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag.

[0124] If the display device 100 is a bottom emission type, the second electrode 136 is a reflective electrode that reflects light and can be formed using an opaque conductive material. For example, the second electrode 136 can be formed from at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.

[0125] Furthermore, the light-emitting diode D can be in a tandem structure. The tandem structure includes multiple light-emitting layers, and charge generation layers can be included between the light-emitting layers. The charge generation layers are for adjusting the charge balance between the multiple organic layers and can be multilayer structures including a first charge generation layer and a second charge generation layer. The charge generation layers can include N-type charge generation layers and P-type charge generation layers, and may include, but are not limited to, light-emitting layers doped with alkali metals such as Li, Na, K, and Cs, or alkaline earth metals such as Mg, Sr, Ba, and Ra.

[0126] A sealing layer 160 is formed in the display area AA and the non-display area NA to seal the light-emitting diode D. If the light-emitting diode D is exposed to moisture or oxygen, pixel shrinkage, where the light-emitting area shrinks, or defects such as black spots appearing within the light-emitting area may occur. In addition, moisture and oxygen oxidize the electrodes made of metal. The sealing layer 160 blocks the penetration of moisture and oxygen from the outside, preventing defects in the light-emitting element D and all electrodes.

[0127] The sealing layer 160 can consist of a first sealing layer 162, a second sealing layer 164, and a third sealing layer 166, but is not limited to this, and can consist of two or more layers.

[0128] The first sealing layer 162 and the third sealing layer 166 are made of SiO x ,SiON,SiN x It can be made into a single layer or multiple layers of inorganic materials such as SiO x ,SiON,SiN x Organic materials can be further included between these inorganic materials, but the invention is not limited to this. The second sealing layer 164 can be made of epoxy resin.

[0129] A second buffer layer 171 is placed on the sealing layer 160, and a light-shielding layer BM is placed on top of that. The second buffer layer 171 is made of SiN x or SiO xIt may be a single layer or a multi-layer. The light-shielding layer BM absorbs light. Specifically, the light-shielding layer BM blocks or absorbs the light output to the adjacent first and second sensor display areas DA1 and DA2 and the sensor transparent area TA, preventing color mixing. The light-shielding layer BM may be made of black resin, Cr or CrO x It may be composed of metallic materials such as those mentioned above, but is not limited to them.

[0130] A second interlayer insulating layer 172 is formed on the second buffer layer 171 on which the light-shielding layer BM is formed. A touch element TOUCH is placed on the second interlayer insulating layer 172. The touch element TOUCH is placed in the display area and can sense touch input. The touch element TOUCH can sense touch information from the user's finger or from an external source such as a stylus.

[0131] The second interlayer insulating layer 172 prevents chemicals such as the phenothing solution and etching solution used when forming the touch component TOUCH from penetrating the light-emitting diode D, and also prevents moisture and oxygen from penetrating the light-emitting diode D from the outside. In addition, the second interlayer insulating layer 172 can prevent the multiple touch electrodes 184 located on top from being disconnected by external impacts, and can block interference signals that may occur when driving the touch component TOUCH.

[0132] The second interlayer insulating layer 172 is made of an organic material such as photoacrylic, or SiN x Alternatively, it may be a single layer or a multilayer made of an inorganic material such as SiO2. Furthermore, the second interlayer insulating layer 172 may be a multilayer made of an organic layer and an inorganic layer, but is not limited to this.

[0133] The touch component TOUCH includes a plurality of touch connection electrodes 182 arranged on a second interlayer insulating layer 172, a first protective layer 174 formed on the touch connection electrodes 182, a plurality of touch electrodes 184 arranged on the first protective layer 174, and a second protective layer 176 arranged on the plurality of touch electrodes 184.

[0134] Multiple touch electrodes 184 are electrically connected to multiple touch connection electrodes 182 via contact holes formed in the second interlayer insulating layer 172. Although not shown in Figure 8, each touch connection electrode 182 electrically connects to multiple adjacent touch electrodes 184.

[0135] The touch connection electrodes 182 and 184 may be made of transparent metal oxides such as ITO or IZO, and may be a single layer or a multilayer made of any one of the following: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0136] The second protective layer 176 can be formed from an organic material such as photoacrylic, but is not limited to this, and may be a multilayer including an inorganic layer and an organic layer.

[0137] A lens is placed on the second protective layer 176, but if the display device 100 is a bottom emission type, the lens may be placed below the light-emitting diode D or on the bottom surface of the substrate 140. The lens is placed in the region between the light-shielding layers BM where light is actually emitted.

[0138] The lens may be a convex lens that bulges in the upward direction from which light is emitted. If the display device 100 is a bottom emission type, the lens may be a convex lens that bulges in the downward direction.

[0139] The lenses positioned in the third sensor subpixel DSP3 (or the first sensor subpixel DSP1 and the second sensor subpixel DSP2) and each of the subpixels SP1, SP2, and SP3 refract and output the light from the corresponding subpixel's light-emitting diode D. At this time, the light that passes through the lens is refracted in the forward direction, and the brightness of the display device 100 is increased by the lens.

[0140] The lens can be made of a polymer resin that exhibits light transmission. For example, the lens can be made of at least one polymer resin selected from acrylic resin, polyimide, polyamide, polycarbonate, polystyrene, and polyethylene terephthalate, but is not limited to these.

[0141] A third protective layer 178 is formed on the lens. The third protective layer 178 may consist of at least one layer made of an organic or inorganic material, or it may consist of multiple layers of an inorganic layer and an organic layer, but is not limited thereto.

[0142] On the other hand, Figure 8 illustrates a display device 100 equipped with a brightness-enhancing lens as an example, but the present invention is not limited to such a structure. For example, the present invention can also be applied to a display device 100 that does not have a brightness-enhancing lens. Furthermore, the subpixels SP1, SP2, SP3, the first sensor subpixel DSP1, and the second sensor subpixel DSP2 may not be equipped with brightness-enhancing lenses, while the third sensor subpixel DSP3 may be equipped with a brightness-enhancing lens.

[0143] As described above, in the display device 100 according to the second embodiment of the present invention, the light-emitting area in the sensor area SA is increased by forming a third sensor subpixel DSP3 in the second sensor display area DA2 superimposed on the gate wirings GL1, GL2, and GL3. As a result, by increasing the light-emitting area, even if the amount of current applied to the sensor subpixels DSP1, DSP2, and DSP3 is reduced, the difference in brightness between the display area AA and the sensor area SA can be minimized, and the lifespan of the display device 100 can be prevented from decreasing.

[0144] On the other hand, the sensor subpixel DSP1, DSP2, and DSP3 of the present invention can be configured in various ways. Below, a display device in which the sensor subpixel DSP1, DSP2, and DSP3 are configured in various ways will be described.

[0145] Figures 9A and 9B show the display devices 200 according to the third and fourth embodiments of the present invention, respectively. The arrangement structure of subpixels SP1, SP2, and SP3 in the display area AA of the display device 200 according to the third and fourth embodiments is the same as the arrangement structure of subpixels SP1, SP2, and SP3 in the display area AA of the display device 100 according to the second embodiment in Figure 7. Therefore, Figures 9A and 9B show only the arrangement of sensor subpixels DSP1, DSP2, and DSP3 in the sensor area SA in a simplified manner.

[0146] As shown in Figure 9A, in the display device 200 according to the third embodiment of the present invention, the sensor area SA includes first and second sensor display areas DA1 and DA2 and a sensor transparent area TA. Two second sensor subpixels DSP2 are arranged in the first sensor display area DA1, a first sensor subpixel DSP1 is arranged in the second sensor display area DA2 superimposed on the gate wiring GL above the first sensor display area DA1, and a third sensor subpixel DSP3 is arranged in the second sensor display area DA2 superimposed on the gate wiring GL below the first sensor display area DA1. In other words, in the display device 200 according to the third embodiment of the present invention, a plurality of first-color sensor subpixels are arranged in the first sensor display area DA1, and second-color and third-color sensor subpixels are arranged in the second sensor display areas DA2 above and below the first sensor display area DA1, respectively.

[0147] In this case, by placing two second sensor subpixels DSP2 in the first sensor display area DA1 above or below the gate wiring GL, and extending the first sensor subpixel DSP1 and third sensor subpixel DSP3, which are placed in the second sensor display area DA2 superimposed on the gate wiring GL, from a position corresponding to the first sensor display area DA1 to a position corresponding to the sensor transparent area TA, the area of ​​the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be maximized, and the amount of light emitted from the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be increased. Furthermore, by minimizing the amount of current supplied to the first, second, and third sensor subpixels DSP1, DSP2, and DSP3, the lifespan of the display device 200 can be improved.

[0148] For example, by making the lateral length of the second sensor subpixel DSP2 in the first sensor display area DA1 the same as the lateral lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, and making the lateral lengths of the first and third sensor subpixels DSP1 and DSP3 in the second sensor display area DA2 larger than the lateral lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, the respective areas of the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be made larger than the respective areas of the first, second, and third subpixels SP1, SP2, and SP3.

[0149] The first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can correspond to red, green, and blue, respectively.

[0150] Furthermore, as shown in Figure 9B, in the display device 200 according to the fourth embodiment of the present invention, the sensor area SA includes first and second sensor display areas DA1 and DA2 and a sensor transparent area TA, two second sensor subpixels DSP2 are arranged in the first sensor display area DA1, the first and second sensor subpixels DSP1 and DSP2 are arranged in the second sensor display area DA2 superimposed on the gate wiring GL above the first sensor display area DA1, and a third sensor subpixel DSP3 is arranged in the second sensor display area DA2 superimposed on the gate wiring GL below the first sensor display area DA1. In other words, in the display device 200 according to the fourth embodiment of the present invention, a plurality of first-color sensor subpixels are arranged in the first sensor display area DA1, first-color and second-color sensor subpixels are arranged in the second sensor display area DA2 above the first sensor display area DA1, and a third-color sensor subpixel is arranged in the second sensor display area DA2 below the first sensor display area DA1.

[0151] In this case, by arranging three second sensor subpixels DSP2 in the first sensor display area DA1 above or below the gate wiring GL and the second sensor display area DA2 above the gate wiring GL, and by extending the first sensor subpixel DSP1 and the third sensor subpixel DSP3, which are located in the second sensor display area DA2 superimposed on the gate wiring GL, from a position corresponding to the first sensor display area DA1 to a position corresponding to the sensor transparent area TA, the area of ​​the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be maximized, and the amount of light emitted from the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be increased. Furthermore, by minimizing the amount of current supplied to the first, second, and third sensor subpixels DSP1, DSP2, and DSP3, the lifespan of the display device 200 can be improved.

[0152] For example, by making the lateral length of at least one of the two second sensor subpixels DSP2 in the first sensor display area DA1 the same as the lateral lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, and by making the lateral lengths of the first and third sensor subpixels DSP1 and DSP3 in the second sensor display area DA2 larger than the lateral lengths of the first, second, and third subpixels SP1, SP2, and SP3 in the pixel area P, the respective areas of the first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can be made larger than the respective areas of the first, second, and third subpixels SP1, SP2, and SP3.

[0153] The first, second, and third sensor subpixels DSP1, DSP2, and DSP3 can correspond to red, green, and blue, respectively.

[0154] Thus, in the display device 200 according to the third and fourth embodiments of the present invention, the area of ​​the first, second, and third sensor subpixels can be maximized by arranging multiple sensor subpixels corresponding to one color in the first sensor display area DA1 and arranging sensor subpixels of the remaining color in the second sensor display area DA2 superimposed on the gate wiring. Therefore, the first, second, and third sensor subpixels of the present invention can be arranged in a variety of ways as long as their area can be maximized.

[0155] On the other hand, the above description gives an example of a display device in which sensor subpixels overlap with gate wiring along the gate wiring only in the sensor area, but the present invention is not limited to such a structure. For example, in the present invention, subpixels of display area AA can also be arranged to overlap with gate wiring.

[0156] In this way, by arranging subpixels to overlap the gate wiring, which is an opaque region, the aperture ratio of the display device can be significantly improved. In particular, by providing a lens in the subpixel, the light emitted by the light-emitting element can be directed only to the front of the display device, thus preventing color mixing with subpixels arranged in the pixel region, even when subpixels are arranged to overlap the gate wiring.

[0157] Although embodiments of the present invention have been described in more detail above with reference to the drawings, the present invention is not necessarily limited to these embodiments. The invention can be modified and implemented in various ways without departing from the technical concept. Therefore, the embodiments disclosed herein are for illustrative purposes only and do not limit the technical concept of the present invention; they do not limit the scope of the technical concept. Accordingly, the embodiments described above should be understood as illustrative in all respects and not limiting. [Explanation of Symbols]

[0158] 112... Semiconductor layer, 114... Gate electrode, 115... Source electrode, 116... Drain electrode, 132... First electrode, 134... Light-emitting layer, 136... Second electrode, 140... Substrate, 142... Buffer layer, 144... Gate insulating layer, 146... Interlayer insulating layer, 148... Planarization layer, 160... Sealing layer, 182... Touch connection electrode, 184... Touch electrode, BM... Light-shielding layer, D... Light-emitting element, LENS... Lens layer, SA... Sensor area

Claims

1. A display panel including a display area having a sensor area, wherein the sensor area includes a first sensor display area, a second sensor display area, and a sensor transparent area. On the back of the display panel, a sensor module is arranged to correspond to the sensor area, The first sensor display area and a plurality of sensor subpixels arranged in the second sensor display area are included, The transparent region of the sensor is defined by a plurality of gate lines and a plurality of data lines. The second sensor display area is a display device superimposed on the plurality of gate wirings.

2. The plurality of gate wirings include a first gate wiring, a second gate wiring, and a third gate wiring positioned above the first sensor display area and the sensor transparent area. The display device according to claim 1, wherein the plurality of sensor subpixels include a first sensor subpixel, a second sensor subpixel, and a third sensor subpixel connected to the first gate wiring, the second gate wiring, and the third gate wiring, respectively.

3. The display device according to claim 2, wherein the first sensor subpixel, the second sensor subpixel, and the third sensor subpixel each correspond to red, green, and blue, respectively.

4. The first sensor display area is configured to include the first sensor subpixel and the second sensor subpixel. The display device according to claim 2, wherein the third sensor subpixel is arranged in the second sensor display area.

5. The display device according to claim 4, wherein the third sensor subpixel is superimposed on the plurality of gate wirings.

6. The display device according to claim 5, wherein the third sensor subpixel extends from a position corresponding to the first sensor display area to a position corresponding to the sensor transparent area.

7. Multiple second sensor subpixels are formed, and one or more of the multiple second sensor subpixels are arranged in the first sensor display area. The second sensor display area, which is superimposed on the plurality of gate wirings above the first sensor display area, has the first sensor subpixels arranged in it. The display device according to claim 2, wherein the third sensor subpixel is arranged in the second sensor display area which is superimposed on the plurality of gate wirings below the first sensor display area.

8. The display device according to claim 7, wherein the first sensor subpixel and the third sensor subpixel each superimpose the gate wiring.

9. Multiple second sensor subpixels are formed, and one or more of the multiple second sensor subpixels are arranged in the first sensor display area. The second sensor display area, which is superimposed on the plurality of gate wirings above the first sensor display area, has the first sensor subpixels arranged in it. The third sensor subpixel is arranged in the second sensor display area, which is superimposed on the plurality of gate wirings below the first sensor display area. The display device according to claim 2, wherein the width of at least one of the first sensor subpixel and the third sensor subpixel is greater than the width of the second sensor subpixel.

10. Each of the aforementioned plurality of sensor subpixels is, circuit board and A thin-film transistor arranged on the substrate, The display device according to claim 1, further comprising a light-emitting diode disposed on the thin-film transistor.

11. Each of the aforementioned plurality of sensor subpixels is, A blocking layer disposed on the light-emitting diode, the blocking layer blocking light output from adjacent sensor subpixels among the plurality of sensor subpixels, The display device according to claim 10, further comprising a lens corresponding to the opening of the barrier layer.

12. The display device according to claim 10, wherein the sensor subpixels arranged in the first sensor display area have the same structure as the sensor subpixels arranged in the second sensor display area.

13. The display device according to claim 11, wherein each of the plurality of sensor subpixels further comprises a touch sensing member disposed between the shielding layer and the lens.

14. A substrate containing multiple pixels defined by multiple gate lines and multiple data lines, This includes a plurality of subpixels arranged in each of the plurality of pixels, A display device wherein at least one of the plurality of subpixels is superimposed on at least one of the plurality of gate wirings.

15. Each of the aforementioned subpixels is A thin-film transistor arranged on the substrate, A light-emitting diode arranged on the thin-film transistor, A shielding layer is placed on the light-emitting diode and blocks light emitted from adjacent subpixels among the plurality of subpixels, The display device according to claim 14, further comprising a lens corresponding to the opening of the shielding layer.

16. The display device according to claim 14, wherein the substrate includes a sensor area for displaying images and transmitting light to a sensor module.

17. A display panel including multiple signal lines and having an active area and a sensing area, The display panel includes a sensor module corresponding to the sensing area, The active region includes a plurality of pixels, and each of the plurality of pixels includes a plurality of subpixels. The sensing region includes a first sensor display region, a second sensor display region, and a sensor transparent region, and each of the first sensor display region and the second sensor display region includes sensor subpixels. A display device wherein the area of ​​at least one of the sensor subpixels is larger than the area of ​​at least one of the plurality of subpixels in the active region.

18. The display device according to claim 17, wherein the sensor subpixel in the second sensor display area is superimposed on at least one of the plurality of signal wirings.

19. The display device according to claim 17, wherein the width of the sensor subpixel in the second sensor display area is greater than the width of at least one of the plurality of subpixels in the active area.

20. The width of the sensor subpixel in the second sensor display area is greater than the width of the sensor subpixel in the first sensor display area. The display device according to claim 19, wherein the sensor subpixels in the first sensor display area and the second sensor display area emit light of different colors from each other.

21. The display device according to claim 19, wherein a plurality of sensor subpixels are formed in the first sensor display area, and the number of sensor subpixels in the first sensor display area is greater than the number of sensor subpixels in the second sensor display area.

22. The display device according to claim 21, wherein a plurality of the second sensor display areas are formed, and the widths of the sensor subpixels in the second sensor display areas are different from each other.

23. The display device according to claim 17, wherein a plurality of the second sensor display areas are formed, and the sensor subpixels in adjacent second sensor display areas emit light of different colors from each other.

24. At least one of the sensor subpixels includes a lens, The plurality of signal lines include a plurality of gate lines and a plurality of data lines, The display device according to claim 17, wherein at least a portion of the sensor subpixels in the second sensor display area are superimposed on at least one of the sensor subpixels in the first sensor display area along a direction parallel to one of the plurality of data wirings.

25. The display device according to claim 24, wherein a plurality of the aforementioned sensor transparent regions are formed, and the sensor subpixels in the second sensor display region are arranged across adjacent sensor transparent regions in a plan view.

26. The transparent region of the sensor transmits external light to the sensor module. The display device according to claim 25, wherein the number of the sensor transparent areas is greater than the number of the first sensor display area and the second sensor display area.

27. The number of subpixels in one pixel is greater than the number of sensor subpixels in the first sensor display area. The area of ​​one pixel is the same as the area of ​​the first sensor display area. The display device according to claim 25, wherein each sensor subpixel in the first sensor display area emits light having a brightness greater than the brightness of the light emitted from each subpixel.

28. The sensor subpixel in the second sensor display area is superimposed on two signal lines that intersect each other among the plurality of signal lines. The display device according to claim 17, wherein the sensor subpixels in the first sensor display area do not overlap the plurality of signal wirings.

29. The display device according to claim 17, wherein the sensor module includes at least one of a camera, an illuminance sensor, and a fingerprint sensor.

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