Off-chip driver, pull-up driver and pull-down driver

Abstract

This disclosure provides an external chip driver (OCD), a pull-up driver for the OCD, and a pull-down driver for the OCD. The pull-up driver includes a main current source circuit and a main base circuit. The main current source circuit is connected between the connection pad and a high reference voltage. The main current source circuit provides a main current value in response to a main control signal. A matching resistor value is associated with the main current value. The main base circuit is connected in parallel to the main current source circuit and determines a basic value for the matching resistor.

Description

Technical Field

[0001] This disclosure relates to an external chip driver and a driving circuit, and more specifically, particularly to an external chip driver and driving circuit for providing matching resistance values. Prior Technology

[0002] Generally, semiconductor devices (such as memory devices or drivers) require a set resistor value to determine at least one instruction pin of the semiconductor device. The set resistor value is set through an external matching resistor value provided by an off-chip driver (OCD).

[0003] Figure 1 illustrates an external chip driver (OCD) and a semiconductor device. Referring to Figure 1, the OCD 10 is connected to the semiconductor device SD via a PDIO pad. The OCD 10 includes pull-up drivers 11_1 to 11_3 and pull-down drivers 12_1 to 12_3. In response to control signal SUP1, pull-up driver 11_1 is activated to provide a first pull-up resistor value. In response to control signal SUP2, pull-up driver 11_2 is activated to provide a second pull-up resistor value. In response to control signal SUP3, pull-up driver 11_3 is activated to provide a third pull-up resistor value. In response to control signal SDN1, pull-down driver 12_1 is activated to provide a first pull-down resistor value. In response to control signal SDN2, pull-down driver 12_2 is activated to provide a second pull-down resistor value. In response to control signal SDN3, pull-down driver 12_3 is activated to provide a third pull-down resistor value. Therefore, OCD 10 provides a matching resistance value MR on the connection pad PDIO based on at least one of the resistance values ​​from the pull-up drivers 11_1 to 11_3 and the pull-down drivers 12_1 to 12_3. The matching resistance value MR is set by an external device. Therefore, the matching resistance value MR of OCD 10 is matched with the semiconductor device SD or an external device.

[0004] Regarding mass production yield requirements, to address the misalignment issue in the fabrication (fab) process, the OCD 10 requires the parallel use of more pull-up and pull-down drivers. Therefore, the capacitance value on the PDIO connector pads increases. This increased capacitance value can reduce the response speed of the semiconductor device (SD). Summary of the Invention

[0005] This disclosure provides an external chip driver (OCD) and a driving circuit. The OCD and driving circuit provide a wide range of matching resistor values ​​and low capacitance values.

[0006] This disclosure provides a pull-up driver for providing a matching resistor value in an external chip driver (OCD). The pull-up driver includes a main current source circuit and a main base circuit. The main current source circuit is connected between a connection pad and a high reference voltage. The main current source circuit provides a main current value in response to a main control signal. The matching resistor value is associated with the main current value. The main base circuit is connected in parallel to the main current source circuit and determines the basic value of the matching resistor.

[0007] This disclosure provides a pull-down driver for an external chip driver (OCD) that provides a matching resistor value. The pull-down driver includes a main current source circuit and a main base circuit. The main current source circuit is connected between a connection pad and a low reference voltage. The main current source circuit provides a main current value in response to a main control signal. The matching resistor value is associated with the main current value. The main base circuit is connected in parallel to the main current source circuit and determines a basic value for the matching resistor.

[0008] This disclosure provides a drive circuit for providing a matching resistor value. The drive circuit includes an external chip driver (OCD) and control circuitry. The OCD includes a connection pad and a pull-up driver. The pull-up driver is connected between the connection pad and a high reference voltage. The pull-up driver provides a main pull-up current value and determines a basic pull-up value for the matching resistor in response to a main pull-up control signal. The matching resistor value is associated with the main pull-up current value. The control circuitry is connected to the pull-up driver. The control circuitry provides a main pull-up control signal to the pull-up driver in response to a command.

[0009] Based on the above, each component in the OCD and driver circuitry provides a matching resistor value. Each component adjusts its matching resistor value from a base value based on the main current value. Therefore, the OCD and driver circuitry offer a wide range of matching resistor values. This reduces the number of parallel connections required for pull-up drivers and / or pull-down circuits. Consequently, the OCD and driver circuitry have low capacitance values ​​on the connection feet.

[0010] To make the above content easier to understand, several embodiments accompanying the drawings are described in detail below. Simple Explanation of the Diagram

[0011] This document includes accompanying drawings to provide a further understanding of the disclosure, and the drawings are incorporated in and form a part of this specification. The drawings illustrate exemplary embodiments of the disclosure and, together with this description, serve to explain the principles of the disclosure. Figure 1 shows the external chip driver (OCD) and semiconductor device. Figure 2 shows a schematic diagram of the pull-up driver and semiconductor device of an OCD according to an embodiment of the present disclosure. Figure 3 shows a schematic diagram of the pull-up driver of the OCD according to an embodiment of the present disclosure. Figure 4 shows a trend graph of the matching resistance values ​​according to an embodiment of this disclosure. Figures 5A to 5D show schematic diagrams of the pull-up driver of an OCD according to an embodiment of the present disclosure. Figure 6 shows a schematic diagram of the pull-up driver of the OCD according to an embodiment of the present disclosure. Figures 7A to 7H show schematic diagrams of the pull-up driver of an OCD according to an embodiment of the present disclosure. Figure 8 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. Figure 9 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. Figure 10 shows a trend graph of the matching resistance values ​​according to an embodiment of this disclosure. Figures 11A to 11D show schematic diagrams of a pull-down driver for an OCD according to an embodiment of the present disclosure. Figure 12 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. Figures 13A to 13H show schematic diagrams of a pull-down driver for an OCD according to an embodiment of the present disclosure. Figure 14 shows a schematic diagram of an OCD according to an embodiment of the present disclosure. Implementation

[0012] This disclosure can be understood by referring to the following detailed description in conjunction with the figures described below. It should be noted that, for clarity and ease of understanding, the various figures in this disclosure show a portion of an electronic device, and some components in the figures may not be drawn to scale. Furthermore, the number and dimensions of each device shown in the figures are merely illustrative and are not intended to limit the scope of this disclosure.

[0013] Certain terms are used in the description and accompanying requests to refer to specific components. As those skilled in the art will understand, electronic device manufacturers may use different names to refer to components. This document is not intended to distinguish between components with different names but the same function. In the following description and in the requests, the terms “include,” “comprise,” and “have” are used in an open-ended manner and should therefore be construed as meaning “including but not limited to…”. Thus, when the terms “include,” “comprise,” and / or “have” are used in the description of this disclosure, it indicates the presence of a corresponding feature, area, step, operation, and / or component, but is not limited to the presence of one or more corresponding features, areas, steps, operations, and / or components.

[0014] It should be understood that when an element is referred to as "coupled to," "connected to," or "conducted to," the element can be directly connected to the other element and a direct electrical connection is established, or an intermediate element can exist between the element and the other element to relay the electrical connection (indirect electrical connection). In contrast, when an element is referred to as "directly coupled to," "directly conducted to," or "directly connected to," no intermediate element exists.

[0015] Figure 2 illustrates a schematic diagram of a pull-up driver and semiconductor device for an external chip driver (OCD) according to an embodiment of this disclosure. Referring to Figure 2, in this embodiment, the pull-up driver 110 of the OCD 100 provides a matching resistor value MR. The pull-up driver 110 provides a matching resistor value MR on a connection pad PDIO. The pull-up driver 110 is connected to a semiconductor device SD (e.g., a memory device or driver) through the connection pad PDIO. The pull-up driver 110 includes a main current source circuit 111 and a main base circuit 112. The main current source circuit 111 is connected between the connection pad PDIO and a high reference voltage VDD. The main current source circuit 111 provides a main current value MI_M in response to a main control signal VCP_M. The matching resistor value MR is associated with the main current value MI_M. The main base circuit 112 is connected in parallel to the main current source circuit 111. In other words, the main base circuit 112 is also connected between the connection pad PDIO and the high reference voltage VDD. The main base circuit 112 determines a basic value BV_M for the matching resistor value MR.

[0016] In this embodiment, before adjusting the matching resistor value MR, the matching resistor value MR is equal to the basic value BV_M. When the main current value MI_M is provided, the equivalent resistance value of the main current source circuit 111 decreases as the main current value MI_M increases. Therefore, the matching resistor value MR decreases from the basic value BV_M. The equivalent resistance value of the main current source circuit 111 increases as the main current value MI_M decreases. Therefore, the matching resistor value MR increases. For example, the basic value BV_M is the maximum value of the matching resistor value MR.

[0017] It should be noted that the OCD 100 provides a matching resistor value MR and adjusts the matching resistor value MR from the basic value BV_M according to the main current value MI_M. Therefore, the OCD 100 provides a matching resistor value MR with a wide range. Furthermore, the OCD provides a matching resistor value MR with a wide range, which reduces the number of parallel connections of the pull-up drivers. The number of pull-up drivers 110 is less than the number of pull-up drivers 11_1 to 11_3 in Figure 1. The OCD 100 can use a single pull-up driver 110 to provide a matching resistor value MR with a wide range. Therefore, the OCD 100 has a low capacitance value on the PDIO connection foot.

[0018] Figure 3 shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of this disclosure. Referring to Figure 3, in this embodiment, the pull-up driver 110 includes a main current source circuit 111 and a main base circuit 112. In this embodiment, the main current source circuit 111 includes a first main transistor MPC. A first terminal of the first main transistor MPC is connected to a high reference voltage VDD. A second terminal of the first main transistor MPC is connected to a connection pad PDIO. The control terminal of the first main transistor MPC receives a main control signal VCP_M. The first main transistor MPC operates in the triode region and saturation region based on the main control signal VCP_M and the voltage value on the connection pad PDIO. Therefore, the main control signal VCP_M is an analog signal. The first main transistor MPC generates a main current value MI_M in response to the voltage value of the main control signal VCP_M. In this embodiment, the voltage value of the main control signal VCP_M is between the high reference voltage VDD and the low reference voltage.

[0019] In this embodiment, the main basic circuit 112 includes a second master transistor (MPD). A first terminal of the second master transistor (MPD) is connected to a first terminal of the first master transistor, and a second terminal of the second master transistor (MPD) is connected to a control terminal of the second master transistor (MPD) and a second terminal of the first master transistor (MPC). The second master transistor (MPD) is connected in a diode configuration between the connection pad PDIO and the high reference voltage VDD. When the voltage value on the connection pad PDIO is lower than the difference between the high reference voltage VDD and the threshold voltage value of the second master transistor (MPD) (i.e., "VDD-Vtp"), the second master transistor (MPD) operates in the saturation region. The second master transistor (MPD) generates a basic value BV_M.

[0020] In this embodiment, each of the first master transistor MPC and the second master transistor MPD may be implemented by a P-type field-effect transistor (FET), but this disclosure is not limited to this.

[0021] Figure 4 shows a trend graph of the matching resistance value according to an embodiment of this disclosure. Referring to Figures 3 and 4, Figure 4 shows the relationship between the main control signal VCP_M, the main current value MI_M, and the matching resistance value MR. In this embodiment, the second main transistor MPD generates a base value BV_M. When the first main transistor MPC is turned off according to the main control signal VCP_M, the matching resistance value MR is equal to the base value BV_M. When the voltage value of the main control signal VCP_M increases, the main current value MI_M increases. The equivalent resistance value of the main current source circuit 111 decreases. Therefore, the matching resistance value MR decreases from the base value BV_M.

[0022] It should be noted that the OCD 100 provides a wide range of matching resistor values ​​MR based on the voltage value of the main control signal VCP_M via a pull-up driver 110. Therefore, the area of ​​the OCD 100 is smaller than that of the OCD 10 shown in Figure 1. Furthermore, the main base circuit 112 determines the base value BV_M. The second main transistor MPD is designed to determine the base value BV_M based on design requirements. Therefore, the OCD 100 provides the matching resistor value MR within the design range.

[0023] Figure 5A shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 5A, in this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP. <1> In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The configuration of the main current source circuit 111 and the main basic circuit 112 has been clearly explained in the embodiments shown in Figures 2 and 3, and therefore will not be repeated here.

[0024] In this embodiment, the main pull-up switch MP <1> Connected to the main current source circuit 111, the main basic circuit 112, and the connecting feet PDIO. Main pull-up switch MP <1> In response to the main switch signal PUP_M, the main current source circuit 111 and the main basic circuit 112 are connected to the connection foot pad PDIO. For example, the main pull-up switch MP <1> This can be implemented using a P-type FET, but this disclosure is not limited to this. Main pull-up switch MP <1> It disconnects in response to a high voltage level in the main switch signal PUP_M. When the main pull-up switch MP... <1> When disconnected, the pull-up driver 210 does not provide a matching resistance value MR to the connection foot pad PDIO. The main pull-up switch MP... <1> It turns on in response to a low voltage level in the main switch signal PUP_M. When the main pull-up switch MP... <1> When switched on, the pull-up driver 210 provides a matching resistor value MR to the connection foot pad PDIO. In this embodiment, the main switch signal PUP_M is a digital signal.

[0025] Figure 5B shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 5B, in this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP. <1> In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The main current source circuit 111, the main basic circuit 112, and the main pull-up switch MPD are also included. <1> The configuration has been clearly explained in the embodiments shown in Figures 2, 3 and 5A, so it will not be repeated here.

[0026] In this embodiment, resistor RP is connected between the connection foot PDIO and the pull-up driver 210. Resistor RP is used to suppress electrostatic discharge in the pull-up driver 210. Furthermore, when the main pull-up switch MP... <1> When powered on, the pull-up driver 210 and resistor RP together provide the matching resistance value MR.

[0027] Figure 5C shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 5C, in this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP. <1> To MP <n>"n" is a positive integer greater than "2". In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The configuration of the main current source circuit 111 and the main basic circuit 112 has been clearly explained in the embodiments shown in Figures 2 and 3, and therefore will not be repeated here.

[0028] In this embodiment, the main pull-up switch MP <1> To MP <n>Connect them in series. For example, the main pull-up switch MP <1> To MP <n>Each of these can be implemented by a P-type FET, but this disclosure is not limited to this. Main pull-up switch MP <1> To MP <n>It disconnects in response to a high voltage level in the main switch signal PUP_M. When the main pull-up switch MP... <1> To MP <n>When disconnected, the pull-up driver 210 does not provide a matching resistance value MR to the connection foot pad PDIO. The main pull-up switch MP... <1> To MP <n>It turns on in response to a low voltage level in the main switch signal PUP_M. When the main pull-up switch MP... <1> To MP <n>When switched on, the pull-up driver 210 provides a matching resistance value MR to the connection foot pad PDIO. This disclosure is not limited by the number of series connections of the main pull-up switch.

[0029] Figure 5D shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 5D, in this embodiment, the pull-up driver 210 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP. <1> To MP <n>In this embodiment, the main current source circuit 111 includes a first main transistor MPC. The main basic circuit 112 includes a second main transistor MPD. The main current source circuit 111, the main basic circuit 112, and the main pull-up switch MPD are also included. <1> To MP <n>The configuration has been clearly explained in the embodiments shown in Figures 2, 3 and 5C, so it will not be repeated here.

[0030] In this embodiment, resistor RP is connected between the connection foot PDIO and the pull-up driver 210. Resistor RP is used to suppress electrostatic discharge in the pull-up driver 210. Furthermore, when the main pull-up switch MP... <1> To MP <n>When powered on, the pull-up driver 210 and resistor RP together provide the matching resistance value MR.

[0031] Figure 6 shows a schematic diagram of the pull-up driver of an OCD according to an embodiment of the present disclosure. Referring to Figure 6, in this embodiment, the pull-up driver 310 of the OCD 300 includes a main current source circuit 111, a main basic circuit 112, and a main pull-up switch MP. <1> Auxiliary current source circuit 313, auxiliary basic circuit 314 and auxiliary pull-up switch MP' <1> Main current source circuit 111, main basic circuit 112, and main pull-up switch MP <1> The configuration has been clearly illustrated in the embodiments shown in Figures 2, 3, and 5A, and will therefore not be repeated here. The auxiliary current source circuit 313 is connected between the connecting foot pad PDIO and the high reference voltage VDD. The auxiliary current source circuit 313 provides an auxiliary current value MI_T in response to the auxiliary control signal VCP_T. The matching resistor value MR is adjusted using the auxiliary current value MI_T.

[0032] In this embodiment, the auxiliary current source circuit 313 includes a first auxiliary transistor MPC'. The first terminal of the first auxiliary transistor MPC' is connected to the high reference voltage VDD. The second terminal of the first auxiliary transistor MPC' is connected via an auxiliary pull-up switch MP'. <1> The connection is made to the PDIO connector. The control terminal of the first auxiliary transistor MPC' receives the auxiliary control signal VCP_T. The first auxiliary transistor MPC' operates in the transistor region and saturation region based on the auxiliary control signal VCP_T and the voltage value on the PDIO connector. The external system voltage is determined by a voltage range (e.g., 0.5 × VDD to 0.8 × VDD). Therefore, based on the external system voltage, the auxiliary control signal VCP_T is adjusted according to the current required by the first auxiliary transistor MPC'. Therefore, the auxiliary control signal VCP_T is an analog signal. The first auxiliary transistor MPC' generates an auxiliary current value MI_T in response to the voltage value of the auxiliary control signal VCP_T. In this embodiment, the voltage value of the auxiliary control signal VCP_T is between the high reference voltage VDD and the low reference voltage.

[0033] The auxiliary basic circuit 314 includes a second auxiliary transistor MPD'. The first terminal of the second auxiliary transistor MPD' is connected to the first terminal of the first auxiliary transistor MPC'. The second terminal of the second auxiliary transistor MPD' is connected to both the control terminal of the second auxiliary transistor MPD' and the second terminal of the first auxiliary transistor MPC'. The second auxiliary transistor MPD' is connected in a diode configuration between the connecting foot PDIO and the high reference voltage VDD. Therefore, the second auxiliary transistor MPD' operates in the saturation region. The second auxiliary transistor MPD' generates a basic value BV_T. The basic value BV_T is determined by the voltage value on the connecting foot PDIO and the auxiliary pull-up switch MP'. <1> The voltage value at both ends and the size of the second auxiliary transistor MPD' are determined. In this embodiment, each of the first auxiliary transistor MPC' and the second auxiliary transistor MPD' can be implemented by a P-type FET, but this disclosure is not limited to this.

[0034] The auxiliary basic circuit 314 is connected in parallel to the auxiliary current source circuit 313. The auxiliary basic circuit 314 determines the auxiliary basic value BV_T of the matching resistor value. The matching resistor value MR is also adjusted through the auxiliary basic value BV_T.

[0035] In some embodiments, the auxiliary basic circuit 314 may be omitted.

[0036] In this embodiment, the auxiliary pull-up switch MP' <1> Connected to the auxiliary current source circuit 313, the auxiliary basic circuit 314, and the connecting foot pad PDIO. When the auxiliary pull-up switch MP'... <1> When the auxiliary switch signal PUP_T is turned on in response to a low voltage level, the auxiliary current source circuit 313 and the auxiliary basic circuit 314 are connected to the connection foot pad PDIO. Therefore, the matching resistor value MR is adjusted using the auxiliary basic value BV_T and the auxiliary current value MI_T. When the auxiliary pull-up switch MP'... <1> When disconnected in response to a high voltage level of the auxiliary switch signal PUP_T, the auxiliary current source circuit 313 and the auxiliary basic circuit 314 are not connected to the connection foot pad PDIO. Therefore, the matching resistor value MR is not adjusted through the auxiliary basic value BV_T and the auxiliary current value MI_T. In this embodiment, the auxiliary switch signal PUP_T is a digital signal.

[0037] Figure 7A shows a schematic diagram of the pull-up driver of the OCD according to an embodiment of the present disclosure. Referring to Figures 6 and 7A, in this embodiment, in the pull-up driver 310A, the main current source circuit 111, the main basic circuit 112, and the main pull-up switch MP are... <1> It can act as the main pull-up circuit PU_M. Auxiliary current source circuit 313, auxiliary basic circuit 314, and auxiliary pull-up switch MP' are also included. <1> It can act as an auxiliary pull-up circuit PU_T.

[0038] Figure 7B shows a schematic diagram of the pull-up driver of the OCD according to an embodiment of the present disclosure. In this embodiment, compared with Figure 7A, the pull-up driver 310B shown in Figure 7B further includes a resistor RP1. The resistor RP1 is connected between the connection pad PDIO and the main pull-up circuit PU_M. The resistor RP1 is used to suppress electrostatic discharge in the main pull-up circuit PU_M.

[0039] Figure 7C shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 7A, the pull-up driver 310C shown in Figure 7C further includes a resistor RP2. The resistor RP2 is connected between the connection foot PDIO and the auxiliary pull-up circuit PU_T. The resistor RP2 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T.

[0040] Figure 7D shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 7A, the pull-up driver 310D shown in Figure 7D further includes resistors RP1 and RP2. Resistor RP1 is connected between the connecting foot PDIO and the main pull-up circuit PU_M. Resistor RP1 is used to suppress electrostatic discharge in the main pull-up circuit PU_M. Resistor RP2 is connected between the connecting foot PDIO and the auxiliary pull-up circuit PU_T. Resistor RP2 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T.

[0041] Figure 7E shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 7A, the pull-up driver 310E shown in Figure 7E further includes a resistor RP0. The first terminal of resistor RP0 is connected to the auxiliary pull-up circuit PU_T and the main pull-up circuit PU_M. The second terminal of resistor RP0 is connected to the connection pad PDIO. Resistor RP0 is used to suppress electrostatic discharge in the auxiliary pull-up circuit PU_T and the main pull-up circuit PU_M.

[0042] Figure 7F shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 7B, the pull-up driver 310F shown in Figure 7F further includes a resistor RP0.

[0043] Figure 7G shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 7C, the pull-up driver 310G shown in Figure 7G further includes a resistor RP0.

[0044] Figure 7H shows a schematic diagram of a pull-up driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 7D, the pull-up driver 310H shown in Figure 7H further includes a resistor RP0.

[0045] Figure 8 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. Referring to Figure 8, in this embodiment, the pull-down driver 410 of the OCD 400 provides a matching resistor value MR. The pull-down circuit 410 includes a main current source circuit 411 and a main base circuit 412. The main current source circuit 411 is connected between the connection pad PDIO and the low reference voltage VSS. The main current source circuit 411 provides a main current value MI_M in response to the main control signal VCN_M. The matching resistor value MR is associated with the main current value MI_M. The main base circuit 412 is connected in parallel to the main current source circuit 411. In other words, the main base circuit 412 is also connected between the connection pad PDIO and the low reference voltage VSS. The main base circuit 412 determines a basic value BV_M for the matching resistor value MR.

[0046] In this embodiment, before adjusting the matching resistor value MR, the matching resistor value MR is equal to the basic value BV_M. When the main current value MI_M is provided, the equivalent resistance value of the main current source circuit 411 decreases as the main current value MI_M increases. Therefore, the matching resistor value MR decreases from the basic value BV_M. The equivalent resistance value of the main current source circuit 411 increases as the main current value MI_M decreases. Therefore, the matching resistor value MR increases. For example, the basic value BV_M is the maximum value of the matching resistor value MR.

[0047] The pull-down driver 410 provides a matching resistor value MR and adjusts the matching resistor value MR from the basic value BV_M according to the main current value MI_M. Therefore, the pull-down driver 410 provides a matching resistor value MR with a wide range. Furthermore, the OCD provides a matching resistor value MR with a wide range. This reduces the number of parallel connections in the pull-down circuit. The pull-down driver 410 can use a single pull-down circuit 410 to provide a matching resistor value MR with a wide range. Therefore, the OCD 400 has a low capacitance value on the PDIO connector.

[0048] Figure 9 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. Referring to Figure 9, in this embodiment, the pull-down circuit 410 includes a main current source circuit 411 and a main base circuit 412. In this embodiment, the main current source circuit 411 includes a first master transistor MNC. A first terminal of the first master transistor MNC is connected to a connection pad PDIO. A second terminal of the first master transistor MNC is connected to a low reference voltage VSS. The control terminal of the first master transistor receives a main control signal VCN_M. The first master transistor MNC operates in the transistor region and saturation region based on the main control signal VCN_M and the voltage value on the connection pad PDIO. The external system voltage is determined by a voltage range (e.g., 0.5 × VDD to 0.8 × VDD). Therefore, based on the external system voltage, the main control signal VCN_M is adjusted according to the current required by the first master transistor MNC. Therefore, the main control signal VCN_M is an analog signal. The first master transistor MNC generates a main current value MI_M in response to the voltage value of the main control signal VCN_M. In this embodiment, the voltage value of the main control signal VCN_M is between the high reference voltage VDD and the low reference voltage VSS.

[0049] In this embodiment, the main basic circuit 412 includes a second master transistor MND. A first terminal of the second master transistor MND is connected to a control terminal of the second master transistor MND and a first terminal of the first master transistor MNC. A second terminal of the second master transistor MND is connected to a second terminal of the first master transistor MNC. The second master transistor MND is connected via a diode connection between the connection pad PDIO and the low reference voltage VSS. When the voltage value on the connection pad PDIO is higher than the threshold voltage value of the second master transistor MND, the second master transistor MND operates in the saturation region. The second master transistor MND generates a basic value BV_M.

[0050] In this embodiment, each of the first master transistor MNC and the second master transistor MND may be implemented by an N-type field-effect transistor (FET), but this disclosure is not limited thereto.

[0051] Figure 10 shows a trend graph of the matching resistance value according to an embodiment of this disclosure. Referring to Figures 9 and 10, Figure 10 shows the relationship between the main control signal VCN_M, the main current value MI_M, and the matching resistance value MR. In this embodiment, the second main transistor MND generates a base value BV_M. When the first main transistor MNC is turned off according to the main control signal VCN_M, the matching resistance value MR is equal to the base value BV_M. When the voltage value of the main control signal VCN_M increases, the main current value MI_M increases. The equivalent resistance value of the main current source circuit 411 decreases. Therefore, the matching resistance value MR decreases from the base value BV_M.

[0052] Figure 11A shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 11A, in this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412, and a main pull-down switch MN. <1> In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The configuration of the main current source circuit 411 and the main basic circuit 412 has been clearly explained in the embodiments shown in Figures 8 and 9, and therefore will not be repeated here.

[0053] In this embodiment, the main pull-down switch MN <1> Connected to the main current source circuit 411, the main basic circuit 412, and the connecting feet PDIO. Main pull-down switch MN <1> In response to the main switch signal PDN_M, the main current source circuit 411 and the main basic circuit 412 are connected to the connection foot pad PDIO. For example, the main pull-down switch MN <1> This can be implemented using an N-type FET, but this disclosure is not limited to it. Main pull-down switch MN <1> It disconnects in response to a low voltage level in the main switch signal PDN_M. When the main pull-down switch MN... <1> When disconnected, the pull-down circuit 510 does not provide a matching resistance value MR to the connection foot PDIO. The main pull-down switch MN... <1> It is turned on in response to a high voltage level in the main switch signal PDN_M. When the main pull-down switch MN... <1> When switched on, the pull-down circuit 510 provides a matching resistance value MR to the connection foot pad PDIO. In this embodiment, the main switch signal PDN_M is a digital signal.

[0054] Figure 11B shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 11B, in this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412, and a main pull-down switch MN. <1> In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The main current source circuit 411, the main basic circuit 412, and the main pull-down switch MN are also included. <1> The configuration has been clearly explained in the embodiments shown in Figures 8, 9 and 11A, so it will not be repeated here.

[0055] In this embodiment, resistor RN is connected between the connecting foot PDIO and the pull-down circuit 510. Resistor RN is used to suppress electrostatic discharge in the pull-down circuit 510. Furthermore, when the main pull-down switch MN... <1> When switched on, the pull-down driver 410 and resistor RN together provide the matching resistance value MR.

[0056] Figure 11C shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 11C, in this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412, and a main pull-down switch MN. <1> To MN <m>"m" is a positive integer greater than "2". In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The configuration of the main current source circuit 411 and the main basic circuit 412 has been clearly explained in the embodiments shown in Figures 8 and 9, and therefore will not be repeated here. This disclosure is not limited by the number of series connections of the main pull-down switch.

[0057] In this embodiment, the main pull-down switch MN <1> To MN <m>Connect them in series. For example, the main pull-down switch MN <1> To MN <m>Each of these can be implemented by an N-type FET, but this disclosure is not limited to this. Main pull-down switch MN <1> To MN <m>It disconnects in response to a low voltage level in the main switch signal PDN_M. When the main pull-down switch MN... <1> To MN <m>When disconnected, the pull-down circuit 510 does not provide a matching resistance value MR to the connection foot PDIO. The main pull-down switch MN... <1> To MN <m>It turns on in response to a low voltage level of the main switch signal PDN_M. When the main pull-down switch MN... <1> To MN <m>When connected, the pull-down circuit 510 provides a matching resistance value MR to the connection foot pad PDIO.

[0058] Figure 11D shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 11D, in this embodiment, the pull-down circuit 510 includes a main current source circuit 411, a main basic circuit 412, and a main pull-down switch MN. <1> To MN <m>In this embodiment, the main current source circuit 411 includes a first main transistor MNC. The main basic circuit 412 includes a second main transistor MND. The main current source circuit 411, the main basic circuit 412, and the main pull-down switch MN are also included. <1> To MN <m>The configuration has been clearly explained in the embodiments shown in Figures 8, 9 and 11C, so it will not be repeated here.

[0059] In this embodiment, resistor RN is connected between the connecting foot PDIO and the pull-down circuit 510. Resistor RN is used to suppress electrostatic discharge in the pull-down circuit 510. Furthermore, when the main pull-down switch MN... <1> To MN <m>When switched on, the pull-down driver 510 and resistor RN together provide the matching resistance value MR.

[0060] Figure 12 shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figure 12, in this embodiment, the pull-down circuit 610 of the OCD 600 includes a main current source circuit 411, a main basic circuit 412, and a main pull-down switch MN. <1> Auxiliary current source circuit 613, auxiliary basic circuit 614, and auxiliary pull-down switch MN' <1> Main current source circuit 411, main basic circuit 412, and main pull-down switch MN <1> The configuration has been clearly illustrated in the embodiments shown in Figures 8, 9, and 11A, and will therefore not be repeated here. The auxiliary current source circuit 613 is connected between the connecting foot pad PDIO and the low reference voltage VSS. The auxiliary current source circuit 613 provides an auxiliary current value MI_T in response to the auxiliary control signal VCN_T. The matching resistor value MR is adjusted by the auxiliary current value MI_T.

[0061] In this embodiment, the auxiliary current source circuit 613 includes a first auxiliary transistor MNC'. The first terminal of the first auxiliary transistor MNC' is connected to an auxiliary pull-down switch MN'. <1> The first auxiliary transistor MNC' is connected to the PDIO connector. The second terminal of the first auxiliary transistor MNC' is connected to the low reference voltage VSS. The control terminal of the first auxiliary transistor MNC' receives the auxiliary control signal VCN_T. The first auxiliary transistor MNC' operates in the transistor region and saturation region based on the auxiliary control signal VCN_T and the voltage value on the PDIO connector. The external system voltage is determined by a voltage range (e.g., 0.5 × VDD to 0.8 × VDD). Therefore, based on the external system voltage, the auxiliary control signal VCN_T is adjusted according to the current required by the first auxiliary transistor MNC'. Therefore, the auxiliary control signal VCN_T is an analog signal. The first auxiliary transistor MNC' generates an auxiliary current value MI_T in response to the voltage value of the auxiliary control signal VCN_T. In this embodiment, the voltage value of the auxiliary control signal VCN_T is between the high reference voltage VDD and the low reference voltage VSS.

[0062] The auxiliary basic circuit 614 includes a second auxiliary transistor MND'. A first terminal of the second auxiliary transistor MND' is connected to a control terminal of the second auxiliary transistor MND' and a first terminal of the first auxiliary transistor MNC'. A second terminal of the second auxiliary transistor MND' is connected to a second terminal of the first auxiliary transistor MNC'. The second auxiliary transistor MND' is connected in a diode configuration between the connection pad PDIO and the low reference voltage VSS. When the voltage value on the connection pad PDIO is higher than the threshold voltage value of the second auxiliary transistor MND', the second auxiliary transistor MND' operates in the saturation region. The second auxiliary transistor MND' generates a basic value BV_T. In this embodiment, each of the first auxiliary transistor MNC' and the second auxiliary transistor MND' may be implemented by an N-type FET, but this disclosure is not limited thereto.

[0063] The auxiliary basic circuit 614 is connected in parallel to the auxiliary current source circuit 613. The auxiliary basic circuit 614 determines the auxiliary basic value BV_T of the matching resistor value. The matching resistor value MR is also adjusted through the auxiliary basic value BV_T.

[0064] In some embodiments, the auxiliary basic circuit 614 may be omitted.

[0065] In this embodiment, the auxiliary pull-down switch MN' <1> Connected to the auxiliary current source circuit 613, the auxiliary basic circuit 614, and the connecting foot pad PDIO. When the auxiliary pull-down switch MN'... <1> When the auxiliary switch signal PDN_T is turned on in response to a high voltage level, the auxiliary current source circuit 613 and the auxiliary basic circuit 614 are connected to the connecting foot pad PDIO. Therefore, the matching resistor value MR is adjusted using the auxiliary basic value BV_T and the auxiliary current value MI_T. When the auxiliary pull-down switch MN'... <1> When disconnected in response to a low voltage level of the auxiliary switch signal PDN_T, the auxiliary current source circuit 613 and the auxiliary basic circuit 614 are not connected to the connection foot pad PDIO. Therefore, the matching resistor value MR is not adjusted through the auxiliary basic value BV_T and the auxiliary current value MI_T. In this embodiment, the auxiliary switch signal PDN_T is a digital signal.

[0066] Figure 13A shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. Referring to Figures 12 and 13A, in this embodiment, in the pull-down driver 610A, the main current source circuit 411, the main basic circuit 412, and the main pull-down switch MN are... <1> It can serve as the main pull-down circuit DN_M. It includes auxiliary current source circuit 613, auxiliary basic circuit 614, and auxiliary pull-down switch MN'. <1> It can be used as an auxiliary pull-down circuit DN_T.

[0067] Figure 13B shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 13A, the pull-down driver 610B shown in Figure 13B further includes a resistor RN1. The resistor RN1 is connected between the connection foot PDIO and the main pull-down circuit DN_M. The resistor RN1 is used to suppress electrostatic discharge in the main pull-down circuit DN_M.

[0068] Figure 13C shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 13A, the pull-down driver 610C shown in Figure 13C further includes a resistor RN2. The resistor RN2 is connected between the connection foot PDIO and the auxiliary pull-down circuit DN_T. The resistor RN2 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T.

[0069] Figure 13D shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 13A, the pull-down driver 610D shown in Figure 13D further includes resistors RN1 and RP2. Resistor RN1 is connected between the connecting foot PDIO and the main pull-down circuit DN_M. Resistor RN1 is used to suppress electrostatic discharge in the main pull-down circuit DN_M. Resistor RN2 is connected between the connecting foot PDIO and the auxiliary pull-down circuit DN_T. Resistor RN2 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T.

[0070] Figure 13E shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 13A, the pull-down driver 610E shown in Figure 13E further includes a resistor RN0. The first terminal of resistor RN0 is connected to the auxiliary pull-down circuit DN_T and the main pull-down circuit DN_M. The second terminal of resistor RN0 is connected to the connection foot pad PDIO. Resistor RN0 is used to suppress electrostatic discharge in the auxiliary pull-down circuit DN_T and the main pull-down circuit DN_M.

[0071] Figure 13F shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 13B, the pull-down driver 610F shown in Figure 13F further includes a resistor RN0.

[0072] Figure 13G shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of this disclosure. In this embodiment, compared to Figure 13C, the pull-down driver 610G shown in Figure 13G further includes a resistor RN0.

[0073] Figure 13H shows a schematic diagram of a pull-down driver for an OCD according to an embodiment of the present disclosure. In this embodiment, compared to Figure 13D, the pull-down driver 610H shown in Figure 13H further includes a resistor RN0.

[0074] Figure 14 shows a schematic diagram of a drive circuit according to an embodiment of this disclosure. Referring to Figure 14, in this embodiment, the drive circuit 20 includes an OCD 700 and a control circuit 800. The OCD 700 includes a connection pad PDIO and a pull-up driver 710. The pull-up driver 710 is connected between the connection pad PDIO and the high reference voltage VDD. The pull-up driver 710 responds to the main control signal VCP_M (i.e., the main pull-up control signal) by providing a main current value MI_MP (i.e., the main pull-up current value) and determining a basic value BV_MP (i.e., the pull-up basic value) of the matching resistor value MR, wherein the matching resistor value MR is associated with the main current value MI_MP. In this embodiment, the pull-up driver 710 may be implemented by one of the pull-up driver 110 shown in Figure 2, the pull-up driver 210 shown in Figures 5A to 5D, the pull-up driver 310 shown in Figure 6, and the pull-up drivers 310A to 310H shown in Figures 7A to 7H, therefore the pull-up driver 710 will not be repeated here. In this embodiment, the control circuit 800 is connected to the pull-up driver 710. The control circuit 800 provides a main control signal VCP_M to the pull-up driver 710 in response to the command CMD. The main control signal VCP_M is an analog signal.

[0075] The OCD 700 also includes a pull-down circuit 720. The pull-down circuit 720 is connected between the connection foot pad PDIO and the low reference voltage VSS. The pull-down circuit 720 responds to the main control signal VCN_M (i.e., the main pull-down control signal) by providing a main current value MI_MN (i.e., the main pull-down current value) and determining a basic value BV_MN (i.e., the pull-down base value) for the matching resistor value MR. In this embodiment, the pull-down circuit 720 may be implemented by one of the pull-down circuit 410 shown in FIG. 8, the pull-down circuit 510 shown in FIGS. 11A to 11D, the pull-down circuit 610 shown in FIG. 12, and the pull-down drivers 610A to 610H shown in FIGS. 7A to 7H; therefore, the pull-down circuit 720 will not be repeated here. In this embodiment, a control circuit 800 is connected to the pull-down circuit 720. The control circuit 800 responds to the command CMD by providing the main control signal VCN_M to the pull-down circuit 720. The main control signal VCN_M is an analog signal.

[0076] In this embodiment, the basic value BV_M is determined by the basic values ​​BVP and BVN. The matching resistor value MR is adjusted from the basic value BV_M based on the main current values ​​MI_MP and MI_MN.

[0077] For example, the pull-up driver 710 can be implemented by the pull-up driver 210 shown in FIG. 5A. The pull-down circuit 720 can be implemented by the pull-down circuit 510 shown in FIG. 11A. Therefore, the control circuit 800 provides a main switch signal PUP_M to the pull-up driver 710 and a main switch signal PDN_M to the pull-down circuit 720. Each of the main switch signals PUP_M and PDN_M is a digital signal.

[0078] In this embodiment, the control circuit 800 includes switch control circuits 810 and 820 and a matching control circuit 830. When the command CMD is an adjustment command (e.g., a zero quotient (ZQ) calibration command, a slew rate adjustment command, or a duty cycle adjustment command), the matching control circuit 830 provides a main control signal VCP_M to the pull-up driver 710 and a main control signal VCN_M to the pull-down circuit 720. Therefore, the pull-up driver 710 generates a first equivalent resistance value, a main current value MI_MP, and a base value BV_MP. The pull-down circuit 720 generates a second equivalent resistance value based on the main current value MI_MN and the base value BV_MN. Furthermore, the switch control circuit 810 provides a main switch signal PUP_M to the pull-up driver 710. The switch control circuit 820 provides a main switch signal PUP_M to the pull-down circuit 720. Therefore, a first equivalent resistance value and a second equivalent resistance value are provided to the connecting foot pad PDIO. The matching resistor value MR on the connecting foot pad PDIO can be determined.

[0079] In some embodiments, one of the pull-up driver 710 and the pull-down circuit 720 may be omitted, depending on requirements. For example, if the pull-down circuit 720 is omitted, the OCD 700 provides a matching resistor value MR and adjusts the matching resistor value MR from the base value BV_MP based on the main current value MI_MP. For example, if the pull-up driver 710 is omitted, the OCD 700 provides a matching resistor value MR and adjusts the matching resistor value MR from the base value BV_MN based on the main current value MI_MN.

[0080] In summary, the OCD provides a matching resistor value and adjusts it from a base value based on the main current value. Therefore, the OCD and driver circuitry offer a wide range of matching resistor values. Furthermore, the wide range of matching resistor values ​​reduces the number of parallel connections required for pull-up drivers and / or pull-down circuits. Consequently, the OCD and driver circuitry have low capacitance values ​​on the connection feet.

[0081] It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of this disclosure. In summary, this disclosure is intended to cover various modifications and variations that fall within the scope of the appended claims and their equivalents.

[0082] 10, 100, 300, 400, 600, 700: External drivers for the chip 11_1, 11_2, 11_3, 110, 210, 310, 310A, 310B, 310C, 310D, 310E, 310F, 310G, 310H, 710: Pull-up drivers 12_1, 12_2, 12_3, 610A, 610B, 610C, 610D, 610E, 610F, 610G, 610H: Pull-down drivers 20: Drive circuit 111, 411: Main current source circuit 112, 412: Main basic circuit 313, 613: Auxiliary current source circuit 314, 614: Auxiliary basic circuits 410, 510: Pull-down circuit / pull-down driver 610, 720: Pull-down circuits 800: Control Circuit 810, 820: Switch control circuit 830: Matching control circuit BVN, BVP, BV_M: Basic values BV_T: Auxiliary basic value / basic value CMD: command DN_M: Main pull-down circuit DN_T: Auxiliary pull-down circuit PDIO: Connecting feet PDN_M, PUP_M: Main switch signals PDN_T, PUP_T: Auxiliary switch signals PU_M: Main pull-up circuit PU_T: Auxiliary pull-up circuit MI_M, MI_MN, MI_MP: Main current values MI_T: Auxiliary current value MN <1> MN <2> ~MN <m>Main pull-down switch MN' <1> Auxiliary pull-down switch MNC, MPC: First master transistor MNC', MPC': First auxiliary transistor MND, MPD: Second master transistor MND', MPD': Second auxiliary transistor MP <1> MP <2> ~MP <n>Main pull-up switch MP' <1> Auxiliary pull-up switch MR: Matching resistor value RN, RN0, RN1, RN2, RP, RP0, RP1, RP2: Resistors SD: Semiconductor Device SDN1, SDN2, SDN3, SUP1, SUP2, SUP3: Control signals VCN_M, VCP_M: Main control signals VCN_T, VCP_T: Auxiliary control signals VDD: High reference voltage VSS: Low reference voltage< / n> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / m> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n>

Claims

1. A pull-up driver for providing a matching resistor value to an external chip driver, comprising: A main current source circuit, connected between the connecting foot pad and the high reference voltage, is configured to provide a main current value in response to a main control signal, wherein the matching resistor value is associated with the main current value; a main base circuit, connected in parallel to the main current source circuit, is configured to generate a basic value for the matching resistor value; And a main pull-up switch, connected to the main current source circuit, the main basic circuit and the connecting feet, and configured to connect the main current source circuit and the main basic circuit to the connecting feet in response to a main switch signal.

2. The pull-up driver as claimed in claim 1, wherein the main current source circuit includes: A first master transistor, the first terminal of which is connected to the high reference voltage, the second terminal of which is connected to the connecting foot pad, and the control terminal of which receives the main control signal.

3. The pull-up driver as claimed in claim 2, wherein the main base circuitry includes: The second master transistor has a first terminal connected to the first terminal of the first master transistor, and a second terminal connected to the control terminal of the second master transistor and the second terminal of the sub-first master transistor.

4. The pull-up driver as claimed in claim 3, wherein the second master transistor operates in the saturation region.

5. The pull-up driver as claimed in claim 2, wherein the first master transistor operates in the transistor region.

6. The pull-up driver as described in claim 1, further comprising: A resistor, wherein the pull-up driver is connected to the connection foot through the resistor to suppress electrostatic discharge in the pull-up driver.

7. The pull-up driver as claimed in claim 1, wherein the pull-up driver further comprises: An auxiliary current source circuit, connected between the connecting foot and the high reference voltage, is configured to provide an auxiliary current value in response to an auxiliary control signal, wherein the matching resistor value is adjusted through the auxiliary current value.

8. A pull-down driver for providing a matching resistor value to an external chip driver, comprising: A main current source circuit, connected between the connecting feet and the low reference voltage, is configured to provide a main current value in response to a main control signal, wherein the matching resistor value is associated with the main current value; And the main basic circuit, which is connected in parallel to the main current source circuit and is configured to determine the basic value of the matching resistor value.

9. The pull-down driver as claimed in claim 8, wherein the main current source circuitry includes: A first master transistor, the first terminal of which is connected to the connecting foot pad, the second terminal of which is connected to the low reference voltage, and the control terminal of which receives the master control signal.

10. The pull-down driver as claimed in claim 9, wherein the main base circuitry includes: The second master transistor has a first terminal connected to the control terminal of the second master transistor and the first terminal of the first master transistor, and a second terminal connected to the second terminal of the first master transistor.

11. The pull-down driver as claimed in claim 10, wherein the second master transistor operates in the saturation region.

12. The pull-down driver as claimed in claim 9, wherein the first master transistor operates in either the saturation region or the transistor region.

13. The pull-down driver as described in claim 8, further comprising: A main pull-down switch is connected to the main current source circuit, the main basic circuit, and the connecting feet, and is configured to connect the main current source circuit and the main basic circuit to the connecting feet in response to a main switch signal.

14. The pull-down driver as described in claim 8, further comprising: A resistor, wherein the pull-down driver is connected to the connection feet through the resistor to suppress electrostatic discharge in the pull-down driver.

15. The pull-down driver as described in claim 8, further comprising: An auxiliary current source circuit is connected between the connecting foot and the low reference voltage and is configured to provide an auxiliary current value in response to an auxiliary control signal, wherein the matching resistor value is adjusted through the auxiliary current value.

16. An external chip driver for providing a matching resistance value, comprising: Connect the foot pads; The system includes: a pull-up driver connected between the connector feet and a high reference voltage, configured to provide a main pull-up current value in response to a main pull-up control signal and determine a basic pull-up value for the matching resistor value, wherein the matching resistor value is associated with the main pull-up current value; and a control circuit connected to the pull-up driver and configured to provide the main pull-up control signal to the pull-up driver in response to a command, wherein the pull-up driver includes: a main current source circuit connected between the connector feet and the high reference voltage and configured to provide a main pull-up current value in response to the main pull-up control signal; a main basic circuit connected in parallel to the main current source circuit and configured to generate the basic pull-up value for the matching resistor value; and a main switch connected to the main current source circuit and the connector feet and configured to connect the main current source circuit and the main basic circuit to the connector feet in response to a main switch signal provided by the control circuit.

17. The off-chip driver as claimed in claim 16, wherein the pull-up driver further comprises: An auxiliary current source circuit, connected between the connecting foot and the high reference voltage, is configured to provide an auxiliary current value in response to an auxiliary control signal provided by the control circuit, wherein the matching resistor value is adjusted through the auxiliary current value.

18. The off-chip driver as described in claim 16, further comprising: A pull-down driver includes: a main current source circuit connected between the connection feet and a low reference voltage and configured to provide a main pull-down current value in response to a main pull-down control signal provided by the control circuit; and a main base circuit connected in parallel to the main current source circuit and configured to determine a pull-down base value for the matching resistor value.

19. The off-chip driver as claimed in claim 18, wherein each of the master pull-up control signal and the master pull-down control signal is an analog signal.

20. The off-chip driver as claimed in claim 16, wherein the master switch signal is a digital signal.

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