Multicast message copying method, and switch chip, storage medium and electronic apparatus

Abstract

Provided in the embodiments of the present disclosure are a multicast message copying method, and a switch chip, a storage medium and an electronic apparatus. The method comprises: receiving and caching a multicast message to be copied, wherein said multicast message comprises a packet descriptor of said multicast message and a load of said multicast message; acquiring and copying the packet descriptor of said multicast message, so as to obtain N target packet descriptors; scheduling the N target packet descriptors; and when each scheduled target packet descriptor to be sent is sent, acquiring the load of said cached multicast message, splicing the target packet descriptor to be sent with the load, so as to obtain a target multicast message, and sending the target multicast message.

Description

Multicast message duplication method, switching chip, storage medium and electronic device

[0001] This disclosure claims priority to the Chinese patent application filed with the China Patent Office on July 31, 2023, with application number 202310968425.0 and invention name “Multicast message replication method, switching chip, storage medium and electronic device”, the entire content of which is incorporated by reference in this disclosure. Technical Field

[0002] The embodiments of the present disclosure relate to the field of communications, and in particular to a multicast message replication method, a switching chip, a storage medium, and an electronic device. Background Art

[0003] Multicast technology is a network communication technology that connects a single sender to multiple receivers. With the widespread adoption of applications like streaming media and video conferencing, multicast technology plays a vital role in improving network efficiency, bandwidth utilization, and user experience, and its application is becoming increasingly widespread. Therefore, multicast performance has become a crucial performance indicator for switching and forwarding systems, especially for Ethernet switching chips, which serve as the core of switching systems.

[0004] In the implementation of multicast technology, an original multicast message enters the switch chip through an ingress port. Multiple copies are generated within the switch chip and then sent out through at least one or more egress ports. During this process, one original multicast message is replicated into multiple copies. Because multiple copies are generated by the replication process, bandwidth expansion occurs within the chip and results in large bursts of traffic. As shown in Figure 1, after 32 copies of an original multicast message with a traffic flow of 10 Gbps, the internal bandwidth expands to an average of 320 Gbps over a longer time unit. However, when examining the replication process over a shorter time unit, the traffic flow in a short period of time is significantly greater than 320 Gbps. This process is called a traffic burst. These large, short-term traffic bursts require higher operating frequencies for the switch chip, increasing chip design requirements and requiring additional buffers to accommodate the bursts. For egress ports, these large traffic bursts can easily cause port congestion and packet loss, leading to network instability and high jitter, which in turn negatively impacts network Quality of Service (QoS).

[0005] To address this issue, related technologies have developed methods for limiting outbound traffic using leaky bucket or token bucket algorithms. These methods optimize port congestion handling strategies by applying back pressure or dropping incoming packets, thereby mitigating the impact of network jitter. However, these methods forcefully limit outbound traffic, further increasing the buffer capacity required to accommodate more replicated packets and thus reducing port congestion. However, these methods still result in packet drops, which in turn affects QoS. Furthermore, unnecessary packet drops waste the chip's multicast packet replication performance.

[0006] Regarding the problem in related technologies that a switching chip requires a large amount of cache capacity to store the copied multicast messages when copying multicast messages, no effective solution has been proposed yet.

[0007] Summary of the Invention

[0008] The embodiments of the present disclosure provide a multicast message replication method, a switching chip, a storage medium, and an electronic device to at least solve the problem in the related art that a switching chip requires a large cache capacity to store the replicated multicast message when performing multicast message replication.

[0009] According to one embodiment of the present disclosure, a method for replicating a multicast message is provided, comprising: receiving and caching a multicast message to be replicated, wherein the multicast message to be replicated includes a packet descriptor of the multicast message to be replicated and a payload of the multicast message to be replicated; obtaining and replicating the packet descriptor of the multicast message to be replicated to obtain N target packet descriptors, wherein the similarity between each of the N target packet descriptors and the packet descriptor is greater than a preset threshold; scheduling the N target packet descriptors; and when sending each scheduled target packet descriptor to be sent, obtaining the cached payload of the multicast message to be replicated, concatenating the target packet descriptor to be sent with the payload to obtain a target multicast message, and sending the target multicast message.

[0010] According to one embodiment of the present disclosure, a switching chip is provided, comprising: a first storage module, configured to cache the payload of a received multicast message to be copied, wherein the multicast message to be copied includes a packet descriptor of the multicast message to be copied and the payload of the multicast message to be copied; a replication engine, configured to obtain and copy the packet descriptor of the multicast message to be copied to obtain N target packet descriptors; a scheduler, configured to schedule the N target packet descriptors; and a processing module, configured to obtain the cached payload of the multicast message to be copied when sending each scheduled target packet descriptor to be sent, splice the target packet descriptor to be sent with the payload, obtain a target multicast message, and send the target multicast message.

[0011] According to another embodiment of the present disclosure, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when running.

[0012] According to another embodiment of the present disclosure, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments.

[0013] According to another embodiment of the present disclosure, a computer program product is provided, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and the computer program is configured to execute the steps of any of the above method embodiments when running.

[0014] Through the present disclosure, when copying a multicast message to be copied, the payload of the multicast message to be copied, which occupies a large amount of cache capacity, is stored, and only the packet descriptor of the multicast message to be copied is copied, and then each target packet descriptor and payload obtained after the copy are spliced ​​and sent, thereby avoiding copying the entire multicast message to be copied, resulting in a large amount of cache capacity required to store the copied multicast message. The above technical solution solves the problem in the related art that a switching chip requires a large amount of cache capacity to store the copied multicast message when copying the multicast message, and achieves the technical effect of reducing the cache capacity in the switching chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a schematic diagram of burst traffic in the related art;

[0016] FIG2 is a hardware structure block diagram of a mobile terminal according to a method for copying a multicast message according to an embodiment of the present disclosure;

[0017] FIG3 is a flow chart of a method for replicating a multicast message according to an embodiment of the present disclosure;

[0018] FIG4 is a structural block diagram of a switching chip according to an embodiment of the present disclosure (I);

[0019] FIG5 is a schematic diagram of adaptive replication traffic according to an embodiment of the present disclosure;

[0020] FIG6 is a block diagram of a switch chip according to an embodiment of the present disclosure (II);

[0021] 7 is a schematic diagram of the relationship between a buffer depth and a multicast message sending time interval according to an embodiment of the present disclosure;

[0022] FIG8 is a structural block diagram (III) of a switching chip according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings and in conjunction with embodiments.

[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0025] The method embodiments provided in the embodiments of the present disclosure can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a mobile terminal as an example, Figure 2 is a hardware structure block diagram of a mobile terminal according to a multicast message replication method of an embodiment of the present disclosure. As shown in Figure 2, the mobile terminal may include one or more (only one is shown in Figure 2) processors 202 (the processor 202 may include but is not limited to a microprocessor (Central Processing Unit, MCU) or a programmable logic device (Field Programmable Gate Array, FPGA) and a memory 204 configured to store data, wherein the above-mentioned mobile terminal may also include a transmission device 206 and an input and output device 208 configured to have a communication function. It can be understood by those skilled in the art that the structure shown in Figure 2 is only for illustration and does not limit the structure of the above-mentioned mobile terminal. For example, the mobile terminal may also include more or fewer components than those shown in Figure 2, or have a configuration different from that shown in Figure 2.

[0026] The memory 204 can be configured to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the multicast message replication method in the embodiment of the present disclosure. The processor 202 executes various functional applications and data processing by running the computer program stored in the memory 204, that is, implementing the above-mentioned method. The memory 204 may include a high-speed random access memory and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 204 may further include a memory remotely located relative to the processor 202, and these remote memories may be connected to the mobile terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0027] The transmission device 206 is configured to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by the mobile terminal's communications provider. In one embodiment, the transmission device 206 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission device 206 may be a radio frequency (RF) module configured to communicate with the Internet wirelessly.

[0028] For better understanding, the application environment of the present disclosure is described below:

[0029] Ethernet switching chips require the ability to replicate a single multicast message into multiple copies and send them to corresponding outbound ports. This process, known as multicast replication, increases the amount of traffic within the chip by several times, leading to large bursts of traffic within a short period of time and requiring additional buffer space to accommodate the sudden influx of messages. This process can easily lead to port congestion, packet loss, and network instability, negatively impacting network QoS.

[0030] To address the related problems in the related art, this embodiment provides a method for replicating a multicast message, including but not limited to being applied to a switching chip. FIG3 is a flow chart of a method for replicating a multicast message according to an embodiment of the present disclosure. As shown in FIG3 , the process includes the following steps S302-S308:

[0031] Step S302: receiving and buffering a multicast message to be copied, wherein the multicast message to be copied includes a packet descriptor of the multicast message to be copied and a payload of the multicast message to be copied;

[0032] It should be noted that when the original multicast message enters the chip from the ingress port of the switching chip, it will be processed by the packet processing module, and then the data cache module will receive and cache the processed multicast message (ie the multicast message to be copied).

[0033] In an exemplary embodiment, caching the multicast message to be copied includes: caching the payload of the multicast message to be copied in a first storage module, and caching the packet descriptor of the multicast message to be copied in a second storage module.

[0034] It should be noted that the data cache module includes: a first storage module and a second storage module.

[0035] Step S304: Acquire and copy the packet descriptor of the multicast message to be copied to obtain N target packet descriptors;

[0036] It should be noted that copying the packet descriptor of the multicast message to be copied involves partially copying the packet descriptor of the copied multicast message. For example, the contents of the target field in the packet descriptor are modified, and the contents of all characters in the packet descriptor except the target field are copied to obtain the target packet descriptor. The similarity between the packet descriptor and the target packet descriptor is within a target range.

[0037] As an optional example, the above step S304 is executed by a replication engine in the switching chip, that is, the replication engine generates N target packet descriptors according to the packet descriptor of the multicast message to be replicated.

[0038] Step S306: Scheduling the N target packet descriptors;

[0039] As an optional example, the above step S304 is executed by a scheduler in the switching chip, and the scheduler schedules the N target packet descriptors to obtain a scheduling result, and then sends the N target packet descriptors to the processing module according to the scheduling result.

[0040] Step S308: When sending each scheduled target packet descriptor to be sent, obtain the cached payload of the multicast message to be copied, concatenate the target packet descriptor to be sent with the payload to obtain a target multicast message, and send the target multicast message.

[0041] As an optional example, the above step S308 is executed by the processing module in the switching chip, that is, after obtaining the target packet descriptor sent by the scheduler, the processing module needs to obtain the cached payload of the multicast message to be copied, and splice the target packet descriptor with the payload of the multicast message to be copied to obtain the target multicast message and send the target multicast message.

[0042] In the above steps S302-S308, when copying the multicast message to be copied, the payload of the multicast message to be copied, which occupies a large cache capacity, is stored, and only the packet descriptor of the multicast message to be copied is copied. Then, each target packet descriptor and payload obtained after the copy are spliced ​​and sent, thereby avoiding copying the entire multicast message to be copied, resulting in a large cache capacity required to store the copied multicast message. The above technical solution solves the problem in the related art that the switching chip needs a large cache capacity to store the copied multicast message when copying the multicast message, and achieves the technical effect of reducing the cache capacity in the switching chip.

[0043] In an exemplary embodiment, the packet descriptor of the multicast message to be copied carries a copy index related to the multicast address of the multicast message to be copied, that is, the above-mentioned copying of the packet descriptor of the multicast message to be copied can be achieved in the following manner: determining N port identifiers corresponding to the copy index from the multicast member table, wherein the multicast member table has a set of port identifiers corresponding to different copy indexes, and the N target multicast messages are sent through N ports corresponding to the N port identifiers; copying the packet descriptor N-1 times to obtain N packet descriptors; wherein the i-th target packet descriptor is obtained in the following manner to obtain the N target packet descriptors, wherein i is an integer greater than or equal to 1 and less than or equal to N: replacing the copy index in the i-th packet descriptor in the N packet descriptors with the i-th port identifier in the N port identifiers to obtain the i-th target packet descriptor.

[0044] It should be noted that in the multicast replication module, in order to ensure that the N target packet descriptors obtained after replication can be stored in the queue, the replication engine needs to check the remaining depth of the queue before copying the packet descriptor. When the remaining depth of the queue can cache the N target packet descriptors after replication, the replication engine uses the replication index in the packet descriptor to check the multicast member table, determine the N port identifiers corresponding to the replication index, and then complete the replication of the packet descriptor of the multicast message to be copied based on the N port identifiers.

[0045] It should be noted that it takes a certain amount of processing time for the replication engine to copy an original packet descriptor into N target packet descriptors. Since the replication engine will copy multiple copies of the original packet descriptor, in order to ensure replication efficiency, the replication engine first caches multiple copies of the original packet descriptor. After the replication engine completes copying the previous original packet descriptor, it immediately calls out a new copy of the original packet descriptor from the descriptor cache in the multicast replication module for replication.

[0046] In an exemplary embodiment, the above-mentioned caching of the multicast message to be copied includes: caching the payload of the multicast message to be copied, and writing the cache address of the payload of the multicast message to be copied into the packet descriptor of the multicast message to be copied; the above-mentioned splicing of the target packet descriptor to be sent with the payload includes: obtaining the payload of the multicast message to be copied from the cache address carried by the target packet descriptor to be sent, and splicing the target packet descriptor to be sent with the payload of the multicast message to be copied.

[0047] That is, in this embodiment, after caching the payload of the multicast message to be copied, the data cache module writes the cache address of the payload of the multicast message to be copied into the packet descriptor of the multicast message to be copied, and then sends the packet descriptor carrying the cache address to the multicast replication module. The replication engine in the multicast replication module replicates the packet descriptor to obtain N target packet descriptors. Then, after the processing module obtains the target packet descriptor sent by the scheduler, it determines the cache address of the payload of the multicast message to be copied from the target packet descriptor, obtains the payload of the multicast message to be copied based on the cache address in the data cache module, concatenates the target packet descriptor with the payload of the multicast message to be copied, obtains the target multicast message, and sends the target multicast message. It should be noted that the scheduler is located in the multicast replication module.

[0048] In an exemplary embodiment, after copying the packet descriptor of the multicast message to be copied, the method further includes: storing the obtained N target packet descriptors in one or more queues.

[0049] That is to say, after the copy engine generates N packet descriptors based on the packet descriptor, it needs to store the N target packet descriptors in one or more queues, and send the copied target packet descriptors to the corresponding queues for caching while copying, waiting for scheduling by the scheduler.

[0050] In an exemplary embodiment, scheduling the N target packet descriptors includes: sending the N target packet descriptors stored in the one or more queues to the processing module respectively according to the scheduling results, wherein the processing module executes the steps of obtaining the cached payload of the multicast message to be copied, splicing the target packet descriptor to be sent with the payload, obtaining the target multicast message and sending the target multicast message.

[0051] In an exemplary embodiment, the processing module is further configured to send the target multicast message to a port corresponding to the target multicast message according to the scheduling result.

[0052] In an exemplary embodiment, the steps of copying the packet descriptor of the multicast message to be copied and storing the obtained N target packet descriptors in one or more queues are performed by a replication engine, and the step of scheduling the N target packet descriptors is performed by a scheduler. The replication engine, the scheduler and the processing module are located in a switching chip, and the switching chip is configured to copy and send multicast messages.

[0053] In an exemplary embodiment, the N target packet descriptors stored in the one or more queues are sent to the processing module respectively according to the scheduling result, including: determining the scheduling result of the N target packet descriptors, wherein the scheduling result includes: sending the sending time interval of each target packet descriptor to the processing module; obtaining the corresponding target packet descriptor from the one or more queues according to the scheduling result, and sending the target packet descriptor to the processing module.

[0054] It should be noted that the target packet descriptor transmission interval is the interval between sending the target descriptor and the previous target packet descriptor describing the target packet to the processing module. That is, after sending the previous target packet descriptor to the processing module, the target packet descriptor must be sent after the corresponding transmission interval. In other words, the scheduler needs to obtain the corresponding target packet descriptor from the queue at the corresponding time based on the scheduling result and then send the target packet descriptor to the processing module.

[0055] In an exemplary embodiment, determining the scheduling results of the N target packet descriptors may be achieved by following the steps S11-S13:

[0056] Step S11: determining a time interval for receiving two adjacent multicast messages to be copied;

[0057] As an optional example, the above-mentioned receiving time interval is the time interval between two adjacent multicast messages to be replicated received by the data cache module.

[0058] In an exemplary embodiment, step S11 may be implemented through steps S111-S112:

[0059] Step S111: determining a main frequency of a switching chip and a packet forwarding rate of a multicast message to be copied, wherein the packet forwarding rate indicates the number of data packets transmitted by the switching chip per unit time, and the switching chip is configured to copy and send multicast messages;

[0060] Step S112: Divide the main frequency of the switching chip by the packet forwarding rate to obtain the receiving time interval.

[0061] It should be noted that the receiving time interval t=F / R, where F is the main frequency of the switching chip and R is the packet forwarding rate.

[0062] In an exemplary embodiment, the packet forwarding rate of the multicast message to be copied can be determined by: determining a first average flow rate of the multicast message to be copied and a message size of the multicast message to be copied; dividing the first average flow rate by the message size to obtain the packet forwarding rate of the multicast message to be copied.

[0063] As an optional example, the first average flow of the multicast messages to be copied can be counted through the ingress port of the switching chip, or through the packet processing module. It should be noted that the first average flow is the average flow of multiple multicast messages to be copied within a preset time.

[0064] As an optional example, the message size of the multicast message to be copied is (L+20)*8)B, where L is the packet length of the multicast message to be copied, and 20B is the frame structure data of the Ethernet frame, including a 12B frame interval and an 8B frame preamble.

[0065] Then, the packet forwarding rate of the multicast message to be copied is R=FA / ((L+20)*8), where FA is the first average flow.

[0066] Step S12: determining an average number of copies of the packet descriptor, wherein the average number of copies is an average number of target packet descriptors obtained after copying the packet descriptor;

[0067] In an exemplary embodiment, the average number of copies of a packet descriptor can be determined by: determining a first average flow rate of the multicast message to be copied, and a second average flow rate of the copied multicast message; dividing the second average flow rate by the first average flow rate to obtain the average number of copies of the packet descriptor.

[0068] It should be noted that the second average traffic is the average traffic of multiple groups of replicated multicast messages, and each group of replicated multicast messages is obtained by replicating one multicast message to be replicated.

[0069] As an optional example, the second average traffic may be obtained by counting the outbound ports of the switching chip, or by counting the processing module.

[0070] That is, the number of copies Count=FB / FA, where FB is the second average flow rate and FA is the first average flow rate.

[0071] Step S13: Divide the receiving time interval by the average number of copies to obtain the sending time interval of each target packet descriptor.

[0072] That is, the sending time interval tc = t / Count, where t is the receiving time interval and Count is the average number of copies.

[0073] That is to say, in this embodiment, through the above scheme, the number of copies of the multicast message can be determined based on the statistics of the ingress traffic of the multicast message to be copied and the egress traffic of the copied message, and then the time interval for the scheduler to send the target packet descriptor to the processing module can be determined based on the number of copies and the receiving time interval between the two multicast messages to be copied, thereby achieving the function of adaptive multicast replication and avoiding the scenario of large traffic bursts.

[0074] In an exemplary embodiment, determining the scheduling results of the N target packet descriptors may also be achieved by following the steps S21-S22:

[0075] Step S21: Obtaining the main frequency and target data bit width of the switching chip, and obtaining the start rate and step rate for sending target packet descriptors to the processing module, wherein the target data bit width is the data bit width for the switching chip to copy and send multicast messages;

[0076] It should be noted that the start rate and step rate at which the scheduler sends the target packet descriptor to the processing module are configured for the target object.

[0077] Step S22: When determining the sending time interval of each target packet descriptor, determine the remaining capacity of the memory in the processing module, and determine the sending time interval of the target packet descriptor according to the remaining capacity of the memory, the main frequency, the target data bit width, the startup rate and the step rate.

[0078] In an exemplary embodiment, determining the sending time interval of the target packet descriptor according to the remaining capacity of the memory, the main frequency, the target data bit width, the startup rate and the step rate includes: calculating the sending time interval by the following formula: t = f*W / (Fi+Fstep*r*d), wherein t is the sending time interval, f is the main frequency, W is the target data bit width, Fi is the startup rate, Fstep is the step rate, r is the group play maximum factor, and d is the remaining capacity of the memory.

[0079] It should be noted that Fi+Fstep*r*d must be less than Fmax, where Fmax is the maximum rate for sending target packet descriptors to the processing module. The units of start rate, step rate, and maximum rate are bps or pps.

[0080] It should be noted that the above scheduler controls the process of scheduling packet descriptors according to the remaining capacity of the memory in the processing module, thereby achieving adaptive replication of multicast messages and avoiding the occurrence of short-term traffic bursts.

[0081] Obviously, the embodiments described above are only part of the embodiments of the present disclosure, not all of the embodiments. In order to better understand the above method, the above process is described below in conjunction with the embodiments, but it is not intended to limit the technical solutions of the embodiments of the present disclosure. Optional:

[0082] In an exemplary embodiment, Figure 4 illustrates the chip architecture for implementing multicast replication and transmission functions within a switching chip. Optionally, after an original multicast message enters the chip from an inbound port, it is processed by the packet processing module and then sent to the multicast replication processing section shown in Figure 4 . In Figure 4 , the processed original multicast message is first sent to the data cache module, which caches the data portion of the multicast message. The packet descriptor of the multicast message is then sent to the multicast replication module. The packet descriptor contains information such as the message storage address and replication index.

[0083] In the multicast replication module, in order to ensure that all copied packet descriptors can be stored in the queue, the replication engine first checks the remaining depth of the destination queue before copying. When the remaining depth of the destination queue is able to cache the copied packet descriptor, the replication engine uses the packet descriptor as an index to query the multicast member table, and then completes the replication of the multicast message descriptor according to the query table content, and while copying, sends the copied packet descriptor to the corresponding queue for caching, waiting for scheduling by the scheduler. It takes a certain amount of processing time for the replication engine to copy one original packet descriptor into multiple copies. In order to ensure the efficiency of the replication, multiple original packet descriptors are first cached. After the replication engine completes the copy of the previous original packet descriptor, a new original packet descriptor is immediately called out from the descriptor cache for copying. In addition, the copied packet descriptors stored in the queue cache also need to be scheduled and sent to the subsequent processing module according to the scheduling results.

[0084] In the processing module, based on the received replicated multicast packet descriptor, the message data is read from the corresponding address in the data cache module and concatenated with the packet descriptor content to obtain the replicated multicast message. The processing module then sends the replicated message to the corresponding outbound port, completing the multicast message replication process. During this process, only one copy of the message data, which accounts for a larger portion of the multicast message, is stored in the data cache module. During the replication process, only the packet descriptor of the multicast message is manipulated, significantly reducing the cache space occupied by the replicated multicast message.

[0085] It should be noted that, based on the chip architecture shown in FIG4, in order to solve the scenario of large traffic bursts shown in FIG1, the present disclosure proposes an adaptive multicast replication method, which can be implemented in two optional ways. The following describes the two implementations in detail:

[0086] Implementation 1: The achieved message replication effect is shown in Figure 5. The adaptively replicated multicast messages in Figure 5 are evenly distributed over time. If the original multicast message traffic is 10 Gbps, 32 copies are required. The resulting multicast message rate is 320 Gbps, preventing a burst exceeding 320 Gbps in a short period of time.

[0087] In this embodiment, the ingress traffic of the original multicast message (i.e., the first average traffic in the above embodiment) and the egress traffic of the replicated message (i.e., the second average traffic in the above embodiment) are detected separately. The interval between replicated messages is dynamically adjusted based on the data from both, thereby achieving adaptive multicast replication and avoiding scenarios with large traffic bursts. Ingress traffic can be detected at the ingress of the switching chip or can be counted by the upper-level packet processing module before being transmitted. Similarly, egress traffic can be detected at the egress of the switching chip or counted by the processing module before being transmitted.

[0088] It should be noted that the specific calculation method of traffic control is as follows: the source packet (i.e., the original multicast message) flow FA is obtained from the inlet traffic statistics; the outlet traffic size FB is obtained from the later-stage outlet traffic statistics. Thus, the number of copies Count = FB / FA can be obtained; in order to obtain the time interval t between two source packets, it is first necessary to calculate the source packet forwarding rate R, based on the packet length L of the source packet, the unit is B, and the calculation is as follows R = FA / ((L+20)*8). The 20B is the frame structure data of the Ethernet frame, including the 12B frame interval and the 8B frame preamble. According to the system main frequency F of the chip, and the source packet forwarding rate R, the time interval t = F / R can be obtained, and then the packet sending interval tc = t / Count after the copy is calculated.

[0089] In the chip structure shown in Figure 4, the interval time for the control scheduler to call out the copied packet descriptors from queues 1 to n is used to control the time interval for the processing module to send out the copied messages, so that the copied messages are evenly distributed in time, thereby avoiding the occurrence of large traffic bursts.

[0090] Taking an actual system as an example, assuming the ingress traffic is 10 Gbps, the egress traffic is 320 Gbps, the original multicast packet length is 64 bytes, and the system frequency is 1.4 GHz, the following can be obtained based on the above calculation process:

[0091] Number of copies Count = 320 Gbps / 10 Gbps = 32;

[0092] Source packet forwarding rate R = 10 Gbps / ((64 + 20) * 8) = 15 Mpps;

[0093] Source packet time interval t = 1.4 GHz / 15 Mpps = 93 CIk;

[0094] The packet transmission interval of the replicated message is tc=93 / 32=3CIk; that is, under the system clock main frequency, a multicast message is sent every three clock rising edges, so that the traffic after multicast replication reaches an average of 320Gbps.

[0095] Implementation method 2: By monitoring the packet descriptor cache capacity of the processing module, the interval at which the scheduler in the multicast replication module sends replicated packet descriptors is adaptively adjusted to achieve the goal of regulating and absorbing burst traffic, thereby avoiding the occurrence of large traffic bursts. The specific chip architecture is shown in Figure 6:

[0096] Compared to the structure in Figure 4 , the processing module adds a small buffer (i.e., the memory in the above embodiment) configured to buffer packet descriptors sent by the scheduler. The remaining capacity of this buffer is reported in real time to the scheduler in the multicast replication module. This small buffer not only absorbs burst-scheduled packet descriptors but also provides feedback information for the scheduler to adjust the scheduling interval, thereby achieving egress traffic control.

[0097] Applying the above architecture to the chip yields the system's main frequency f, the data bit width W of the multicast replication message, and the remaining cache capacity depth d returned by the small cache in the processing module. To achieve adaptive replication, the scheduler also requires configuration of the following parameters: the multicast start rate Fi (in bps or pps), the maximum multicast rate Fmax (in bps or pps), the multicast step rate Fstep (in bps or pps), and the multicast amplification factor r. bps represents the network transmission rate, which measures the number of bits of data transmitted per second, and pps represents the number of packets transmitted per second.

[0098] Based on the above parameters, the formula for calculating the multicast packet sending interval t is as follows:

[0099] t = f*W / (Fi + Fstep*r*d), where Fi + Fstep*r*d must be less than Fmax;

[0100] The minimum value of the packet descriptor time interval t can be determined from f*W / Fmax, thereby limiting the maximum packet transmission rate and avoiding short-term traffic bursts. During the replication process, the group broadcast large factor r and the remaining cache depth d jointly contribute to the step rate Fstep, which in turn acts on the multicast startup rate Fi. At the beginning of replication, the remaining cache depth d is at its maximum, and Fi + Fstep*r*d is also at its maximum. At this time, the packet transmission interval t is at its minimum. The scheduler sends the packet descriptor to the processing module based on this time t. The processing module then retrieves the original multicast message from the data cache module, generates a replicated multicast message, and sends it to the outbound port. The rate at which the replicated packet descriptors are read from the small cache is constant.

[0101] FIG7 illustrates a schematic diagram of the relationship between the cache depth in the processing module and the time interval for sending multicast packets. As shown in FIG7 , as the multicast replication process proceeds, if the packet descriptor cache depth d in the processing module gradually decreases, the corresponding value of Fi+Fstep*r*d also gradually decreases, and the corresponding scheduler's packet sending time interval t gradually increases, which correspondingly reduces the number of packet descriptors sent to the processing module per unit time. The reduction in the number of packet descriptors sent by the scheduler to the processing module reduces the remaining capacity of the queue cache of the replication module, which in turn reduces the replication of packet descriptors by the replication engine. In particular, if the Fi rate is less than the minimum flow rate at the exit, then the write speed of the small cache storing packet descriptors in the processing module will be less than the read speed, thereby ensuring that the small cache is not filled.

[0102] The scheduler controls the packet descriptor scheduling process based on the cache capacity of the processor's small cache, achieving adaptive replication of multicast messages and avoiding short bursts of traffic. Furthermore, this architecture only copies the packet descriptors of the multicast messages during replication. The multicast source packet data is read from the data cache module and assembled into a multicast message only when it is finally sent to the processing module. This process reduces cache consumption during the multicast replication process.

[0103] In short, the present disclosure provides a chip architecture and method for solving the problem of large bursts of multicast replication traffic. The improved chip architecture can reduce the demand for cache capacity during the multicast replication process. In addition, by adopting an adaptive method to replicate multicast messages, the generation of short-term large bursts of traffic is reduced from the source. In addition, the reduction of large bursts of traffic also helps the processing module reduce the cache capacity used to accommodate replicated messages, saving valuable cache resources on the chip. In addition, the reduction of large bursts of traffic is more conducive to reducing the occurrence of outbound port message discards and port congestion, improving network QoS and thus improving user experience.

[0104] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present disclosure, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as a read-only memory / random access memory (ROM / RAM), a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present disclosure.

[0105] In this embodiment, a switching chip is also provided. The switching chip is configured to implement the above-mentioned embodiments and preferred implementations. Details already described are omitted for clarity. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the switching chip described in the following embodiments is preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0106] FIG8 is a structural block diagram of a switching chip according to an embodiment of the present disclosure. As shown in FIG8 , the switching chip includes:

[0107] A first storage module 82 is configured to cache a payload of a received multicast message to be copied, wherein the multicast message to be copied includes a packet descriptor of the multicast message to be copied and the payload of the multicast message to be copied;

[0108] The replication engine 84 is configured to obtain and replicate the packet descriptor of the multicast message to be replicated, thereby obtaining N target packet descriptors;

[0109] a scheduler 86 configured to schedule the N target packet descriptors;

[0110] The processing module 88 is configured to obtain the cached payload of the multicast message to be copied when sending each scheduled target packet descriptor to be sent, splice the target packet descriptor to be sent with the payload, obtain the target multicast message, and send the target multicast message.

[0111] The above-mentioned switching chip, when copying the multicast message to be copied, stores the payload of the multicast message to be copied, which occupies a large cache capacity, and only copies the packet descriptor of the multicast message to be copied, and then splices and sends each target packet descriptor and payload obtained after the copy, thereby avoiding copying the entire multicast message to be copied, resulting in the need for more cache capacity to store the copied multicast message. The above-mentioned technical solution solves the problem in the related technology that the switching chip needs more cache capacity to store the copied multicast message when copying the multicast message, and achieves the technical effect of reducing the cache capacity in the switching chip.

[0112] In an exemplary embodiment, the packet descriptor carries a replication index related to the multicast address of the multicast message to be replicated, and the replication engine 84 is further configured to determine N port identifiers corresponding to the replication index from a multicast member table, wherein the multicast member table has a set of port identifiers corresponding to different replication indexes, and the N target multicast messages are sent through N ports corresponding to the N port identifiers; the packet descriptor is replicated N-1 times to obtain N packet descriptors; wherein the i-th target packet descriptor is obtained in the following manner to obtain the N target packet descriptors, wherein i is an integer greater than or equal to 1 and less than or equal to N: the replication index in the i-th packet descriptor in the N packet descriptors is replaced with the i-th port identifier in the N port identifiers to obtain the i-th target packet descriptor.

[0113] In an exemplary embodiment, the switching chip further includes: a second storage module configured to cache a packet descriptor of the multicast message to be copied.

[0114] In an exemplary embodiment, the first storage module 82 is also configured to write the cache address of the payload of the multicast message to be copied into the packet descriptor of the multicast message to be copied; the processing module 88 is also configured to obtain the payload of the multicast message to be copied from the cache address carried by the target packet descriptor to be sent, and splice the target packet descriptor to be sent with the payload of the multicast message to be copied.

[0115] In an exemplary embodiment, the replication engine 84 is further configured to store the obtained N target packet descriptors in one or more queues after copying the packet descriptor of the multicast message to be copied; the scheduler 86 is further configured to send the N target packet descriptors stored in the one or more queues to the processing module respectively according to the scheduling results.

[0116] In an exemplary embodiment, the processing module 88 is further configured to send the target multicast message to a port corresponding to the target multicast message according to the scheduling result.

[0117] In an exemplary embodiment, the scheduler 86 is further configured to determine the scheduling results of the N target packet descriptors, wherein the scheduling results include: a time interval for sending the target packet descriptors to the processing module; obtaining corresponding target packet descriptors from the one or more queues according to the scheduling results, and sending the target packet descriptors to the processing module.

[0118] In an exemplary embodiment, the scheduler 86 is also configured to determine the receiving time interval for receiving two adjacent multicast messages to be copied; and determine the average number of copies of the packet descriptor, wherein the average number of copies is the average number of target packet descriptors obtained after copying the packet descriptors; and divide the receiving time interval by the average number of copies to obtain the sending time interval of the target packet descriptor.

[0119] In an exemplary embodiment, the scheduler 86 is also configured to determine the main frequency of the switching chip and the packet forwarding rate of the multicast message to be copied, wherein the packet forwarding rate is used to indicate the number of data packets transmitted by the switching chip per unit time, and the switching chip is configured to copy and send multicast messages; the main frequency of the switching chip is divided by the packet forwarding rate to obtain the receiving time interval.

[0120] In an exemplary embodiment, the scheduler 86 is further configured to determine a first average flow of the multicast message to be copied and a message size of the multicast message to be copied; and divide the first average flow by the message size to obtain a packet forwarding rate of the multicast message to be copied.

[0121] In an exemplary embodiment, the scheduler 86 is also configured to determine a first average flow rate of the multicast message to be copied and a second average flow rate of the copied multicast message; and divide the second average flow rate by the first average flow rate to obtain the average number of copies of the packet descriptor.

[0122] In an exemplary embodiment, the scheduler 86 is further configured to obtain the main frequency and target data bit width of the switching chip, and to obtain the start rate and step rate for sending the target packet descriptor to the processing module, wherein the target data bit width is the data bit width of the switching chip for copying and sending multicast messages, and the switching chip is configured to copy and send multicast messages; when determining the sending time interval of each target packet descriptor, the remaining capacity of the memory in the processing module is determined, and the sending time interval of the target packet descriptor is determined based on the remaining capacity of the memory, the main frequency, the target data bit width, the start rate and the step rate.

[0123] In an exemplary embodiment, the scheduler 86 is further configured to calculate the sending time interval by the following formula: t = f*W / (Fi+Fstep*r*d), wherein t is the sending time interval, f is the main frequency, W is the target data bit width, Fi is the start rate, Fstep is the step rate, r is the group playback factor, and d is the remaining capacity of the memory.

[0124] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0125] An embodiment of the present disclosure further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when run.

[0126] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0127] An embodiment of the present disclosure further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0128] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0129] An embodiment of the present disclosure further provides a computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and the computer program is configured to execute the steps of any of the above method embodiments when running.

[0130] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0131] Obviously, those skilled in the art should understand that the modules or steps of the present disclosure described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present disclosure is not limited to any particular combination of hardware and software.

[0132] The foregoing description is merely a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Those skilled in the art will readily appreciate that various modifications and variations of the present disclosure are possible. Any modifications, equivalent substitutions, or improvements made within the principles of the present disclosure shall be included within the scope of protection of the present disclosure.

Claims

1. A method for copying a multicast message, comprising: Receiving and buffering a multicast message to be copied, wherein the multicast message to be copied includes a packet descriptor of the multicast message to be copied and a payload of the multicast message to be copied; Acquire and copy the packet descriptor of the multicast message to be copied to obtain N target packet descriptors; Scheduling the N target packet descriptors; When each scheduled target packet descriptor to be sent is sent, the cached payload of the multicast message to be copied is obtained, the target packet descriptor to be sent is concatenated with the payload to obtain the target multicast message and the target multicast message is sent.

2. The method according to claim 1, wherein: The packet descriptor carries a replication index related to the multicast address of the multicast message to be replicated, wherein replicating the packet descriptor of the multicast message to be replicated includes: Determine N port identifiers corresponding to the replication index from a multicast member table, wherein the multicast member table includes a set of port identifiers corresponding to different replication indexes, and the N target multicast messages are sent through the N ports corresponding to the N port identifiers; The packet descriptor is copied N-1 times to obtain N packet descriptors; The i-th target packet descriptor is obtained in the following manner to obtain the N target packet descriptors, wherein i is an integer greater than or equal to 1 and less than or equal to N: The copy index in the ith packet descriptor among the N packet descriptors is replaced with the ith port identifier among the N port identifiers to obtain the ith target packet descriptor.

3. The method according to claim 1, wherein: Cache multicast messages to be replicated, including: The payload of the multicast message to be copied is cached in the first storage module, and the packet descriptor of the multicast message to be copied is cached in the second storage module.

4. The method according to claim 1, wherein: Caching the multicast message to be copied, comprising: caching the payload of the multicast message to be copied, and writing the cache address of the payload of the multicast message to be copied into the packet descriptor of the multicast message to be copied; The target packet descriptor to be sent is concatenated with the payload, including: obtaining the payload of the multicast message to be copied from the cache address carried by the target packet descriptor to be sent, and concatenating the target packet descriptor to be sent with the payload of the multicast message to be copied.

5. The method according to claim 1, wherein: After copying the packet descriptor of the multicast message to be copied, the method further comprises: storing the obtained N target packet descriptors into one or more queues; Scheduling the N target packet descriptors, including: sending the N target packet descriptors stored in the one or more queues to the processing module according to the scheduling result, wherein the processing module executes the cache acquisition. The steps of copying the payload of the multicast message to be copied, splicing the target packet descriptor to be sent with the payload, obtaining the target multicast message and sending the target multicast message.

6. The method according to claim 5, wherein: The processing module is further configured to send the target multicast message to a port corresponding to the target multicast message according to the scheduling result.

7. The method according to claim 5, wherein: The steps of copying the packet descriptor of the multicast message to be copied and storing the obtained N target packet descriptors in one or more queues are executed by a replication engine, and the step of scheduling the N target packet descriptors is executed by a scheduler. The replication engine, the scheduler and the processing module are located in a switching chip, and the switching chip is configured to copy and send multicast messages.

8. The method according to claim 5, wherein: Sending the N target packet descriptors stored in the one or more queues to the processing module respectively according to the scheduling result, including: Determine the scheduling results of the N target packet descriptors, wherein the scheduling results include: a sending time interval for sending each target packet descriptor to the processing module; Obtain a corresponding target packet descriptor from the one or more queues according to the scheduling result, and send the target packet descriptor to the processing module.

9. The method according to claim 8, wherein: Determining the scheduling results of the N target packet descriptors includes: Determine a time interval for receiving two adjacent multicast messages to be replicated; and Determining an average number of copies of the packet descriptor, wherein the average number of copies is an average number of copies of the target packet descriptor obtained after copying the packet descriptor; The receiving time interval is divided by the average number of copies to obtain the sending time interval of each target packet descriptor.

10. The method according to claim 9, wherein: Determining the time interval for receiving two adjacent multicast messages to be replicated includes: Determining the main frequency of the switching chip and determining the packet forwarding rate of the multicast message to be copied, wherein the packet forwarding rate is used to indicate the number of data packets transmitted by the switching chip per unit time, and the switching chip is configured to copy and send the multicast message; The receiving time interval is obtained by dividing the main frequency of the switching chip by the packet forwarding rate.

11. The method according to claim 10, wherein: Determine the packet forwarding rate of the multicast message to be replicated, including: Determine a first average flow rate of the multicast message to be copied and a message size of the multicast message to be copied; The first average flow is divided by the message size to obtain a packet forwarding rate of the multicast message to be copied.

12. The method according to claim 9, wherein: Determine the average number of copies of a packet descriptor, including: Determine a first average flow rate of the multicast message to be copied and a second average flow rate of the copied multicast message; Divide the second average flow by the first average flow to obtain the average number of copies of the packet descriptor.

13. The method according to claim 8, wherein: Determining the scheduling results of the N target packet descriptors includes: Obtaining the main frequency and target data bit width of the switching chip, and obtaining the start rate and step rate of sending the target packet descriptor to the processing module, wherein the target data bit width is the data bit width of the switching chip for copying and sending multicast messages, and the switching chip is set to copy and send multicast messages; When determining the sending time interval of each target packet descriptor, the remaining capacity of the memory in the processing module is determined, and the sending time interval of the target packet descriptor is determined according to the remaining capacity of the memory, the main frequency, the target data bit width, the startup rate and the step rate.

14. The method according to claim 13, wherein: Determining the sending time interval of the target packet descriptor according to the remaining capacity of the memory, the main frequency, the target data bit width, the startup rate and the step rate, including: The sending time interval is calculated by the following formula: t=f*W / (Fi+Fstep*r*d), wherein t is the sending time interval, f is the main frequency, W is the target data bit width, Fi is the startup rate, Fstep is the step rate, r is the group playback factor, and d is the remaining capacity of the memory.

15. A switching chip, comprising: A first storage module is configured to cache a payload of a received multicast message to be copied, wherein the multicast message to be copied includes a packet descriptor of the multicast message to be copied and the payload of the multicast message to be copied; A replication engine is configured to obtain and replicate the packet descriptor of the multicast message to be replicated, to obtain N target packet descriptors; A scheduler, configured to schedule the N target packet descriptors; The processing module is configured to obtain the cached payload of the multicast message to be copied when sending each target packet descriptor to be sent after scheduling, splice the target packet descriptor to be sent with the payload, obtain the target multicast message and send the target multicast message.

16. A computer-readable storage medium having a computer program stored therein, wherein: When the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 14 are implemented.

17. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in any one of claims 1 to 14 when executing the computer program.

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