Tin plating solution for solder bump
A tin electroplating solution with nucleation accelerators and grain growth inhibitors addresses the challenge of forming uniform solder bumps in flip-chip packaging, improving electrical performance and reliability by minimizing defects.
WO2025173987A1 Publication Date: 2025-08-21KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY +1
5 Cites 1 Cited by
Patent Information
- Application Number
- PCT/KR2025/001806
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-13
- Filing Date
- 2025-02-07
- Publication Date
- 2025-08-21
AI Technical Summary
Technical Problem
Conventional wire bonding methods limit high chip integration and electrical performance in electronic devices, while flip-chip packaging faces challenges in forming uniform solder bumps with minimal voids and defects.
Method used
A tin electroplating solution comprising tin ions, an electrolyte, a nucleation accelerator, and a grain growth inhibitor, along with specific additives, is used to form uniform solder bumps with minimal defects, including nucleation promoters and inhibitors to control particle growth.
Benefits of technology
The solution enables the formation of excellent plating film structures on solder bumps, minimizing cracks, underplating, and voids, thereby enhancing the electrical characteristics and reliability of flip-chip packages.
✦ Generated by Eureka AI based on patent content.
Abstract
One embodiment of the present invention provides a tin electroplating solution and a method for forming tin solder bumps using same. The tin electroplating solution according to an embodiment of the present invention includes a novel nucleation accelerator and a particle growth inhibitor, enabling the formation of uniform tin solder bumps with few voids, and thus has excellent performance.
Need to check novelty before this filing date? Find Prior Art