Light detection device

Abstract

There is provided a light detection device, including: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

Description

LIGHT DETECTION DEVICECROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of Japanese Priority Patent Application JP 2024-186022 filed October 22, 2024, the entire contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a light detection device.Background

[0003] When strong light enters a photodiode while a floating diffusion region holds signal charges, charges (hereinafter, referred to as noise charges) generated by stray light corresponding to the amount of incident light are mixed into the floating diffusion region. In this way, the floating diffusion region holds charges obtained by superimposing the noise charges on the signal charges. As a result, the pixel signal generated by the voltage level of the floating diffusion region contains the components of noise charges, which deteriorates the image quality of the captured image. Solutions to such deterioration of image quality by the noise charges have been proposed (see Patent Literatures 1 and 2).

[0004] In Patent Literature 1, after reading a pixel signal while the floating diffusion region holds charges obtained by superimposing noise charges on signal charges, a pixel signal is read while the floating diffusion region holds only the noise charges, and the difference between these pixel signals is taken to cancel out the components of the noise charges.

[0005] In Patent Literature 2, a second discharge transistor is provided separately from a first discharge transistor that discharges charges accumulated in a photodiode, signal charges and noise charges are accumulated in a MEM while the second discharge transistor is off to read a pixel signal in a first state, only noise charges are accumulated in the MEM while the second discharge transistor is on to read a pixel signal in a second state, and the difference between these pixel signals is taken to cancel out the components of the noise charges.

[0006] Japanese Patent Application Laid-open No. 2017-076899Japanese Patent Application Laid-open No. 2021-125716Summary

[0007] In Patent Literature 1, the timing for reading the pixel signal corresponding to the charges obtained by superimposing noise charges on signal charges and the timing for reading the pixel signal corresponding to only the noise charges do not match, and the noise charges at the two timings are not necessarily equal. Therefore, it is not possible to completely cancel out the noise charges and there is a possibility that the image quality of the captured image deteriorates.

[0008] In Patent Literature 2, the second discharge transistor is necessary in addition to the first discharge transistor, which makes it difficult to miniaturize pixels and reduces the degree of freedom of the layout of pixels and pixel circuits.

[0009] In this regard, the present disclosure provides a light detection device capable of completely cancelling out noise charges and miniaturizing pixels.

[0010] According to the present disclosure, there is provided a light detection device, including: a first pixel that includes a first photoelectric conversion device that accumulates charges corresponding to an amount of incident light, and a first charge holding unit that holds signal charges transferred from the first photoelectric conversion device and noise charges caused by parasitic light intensity; a second pixel that includes a second photoelectric conversion device that accumulates charges corresponding to an amount of incident light, and a second charge holding unit that holds the noise charges without holding signal charges transferred from the second photoelectric conversion device; and a signal line that transmits a first pixel signal corresponding to the signal charges and the noise charges held in the first charge holding unit and a second pixel signal corresponding to the noise charges held in the second charge holding unit at different timings.

[0011] The light detection device may further include a floating diffusion region that holds the signal charges and the noise charges transferred from the first charge holding unit or the noise charges transferred from the second charge holding unit at a different timing from that of the first charge holding unit.

[0012] The light detection device may further include: a pixel circuit that generates a first pixel signal corresponding to the signal charges and the noise charges transferred from the first charge holding unit to the floating diffusion region and a second pixel signal corresponding to the noise charges transferred from the second charge holding unit to the floating diffusion region at different timings; and a signal processing circuit that generates a digital signal corresponding to a difference between the first pixel signal and the second pixel signal.

[0013] The light detection device may further include: a first floating diffusion region that holds the signal charges and the noise charges transferred from the first charge holding unit; and a second floating diffusion region that holds the noise charges transferred from the second charge holding unit.

[0014] The light detection device may further include: a first pixel circuit that generates a first pixel signal corresponding to the signal charges and the noise charges transferred to the first floating diffusion region; a second pixel circuit that generates a second pixel signal corresponding to the noise charges transferred to the second floating diffusion region at a different timing from that of the first pixel circuit; and a signal processing circuit that generates a digital signal corresponding to a difference between the first pixel signal and the second pixel signal.

[0015] The first pixel may include a first discharge transistor that is temporarily turned on after an exposure period of the first photoelectric conversion device ends and before reading of the first pixel signal starts and discharges the charges accumulated in the first photoelectric conversion device to a reference voltage node, and the second pixel may include a second discharge transistor that remains on during an exposure period of the second photoelectric conversion device and a period of reading the second pixel signal and discharges the charges accumulated in the second photoelectric conversion device to the reference voltage node.

[0016] The light detection device may further include: a first pixel group that includes two or more first pixels arranged in a first direction; and a second pixel group that includes two or more second pixels arranged in the first direction, the first pixel group and the second pixel group being arranged in a second direction crossing the first direction.

[0017] The light detection device may further include: a plurality of first pixel groups arranged in the second direction; and a plurality of second pixel groups arranged in the second direction.

[0018] Each of the plurality of first pixel groups and each of the plurality of second pixel groups may be arranged alternately in the second direction.

[0019] The light detection device may further include a plurality of pixel groups arranged in the second direction, each of the plurality of pixel groups including two or more first pixels or second pixels arranged in the first direction, each of the plurality of pixel groups operating as either the first pixel group or the second pixel group in accordance with an external signal, arrangement positions of the first pixel group and the second pixel group arranged alternately in the second direction being switched for each frame.

[0020] A plurality of pixels including two or more first pixels or second pixels may be arranged in a Bayer array in which a pixel block includes the two or more pixels of the same color included in the first pixel group and the second pixel group arranged adjacent to each other in the second direction.

[0021] The light detection device may further include a plurality of on-chip lenses that collects incident light onto each pixel in the pixel block or collects incident light onto each pixel block.

[0022] Each of the plurality of on-chip lenses may be divided into a plurality of on-chip lenses corresponding to each pixel in the pixel block and each pixel in the pixel block is an image plane phase difference pixel.

[0023] Two or more first pixel groups arranged adjacent to each other along the second direction and two or more second pixel groups arranged adjacent to each other along the second direction may be arranged alternately along the second direction.

[0024] One second pixel group may be arranged between the two or more first pixel groups arranged adjacent to each other in the second direction.

[0025] The noise charges may be cancelled by taking a difference between each of the plurality of first pixel signals output from each of the two or more first pixel groups and the corresponding second pixel signal output from the one second pixel group.

[0026] During the exposure period of the second pixel and the period of reading the second pixel signal, the second discharge transistor in the second pixel may remain on and the second pixel signal may be output to the signal line while a transfer transistor in the second pixel and a pixel transistor to be used for generating the second pixel signal are off.

[0027] The light detection device may further include a semiconductor layer in which a plurality of photoelectric conversion regions, a plurality of charge holding units, and a plurality of pixel separation regions are arranged, a plurality of photoelectric conversion devices being arranged in the plurality of photoelectric conversion regions, the plurality of photoelectric conversion devices including the first photoelectric conversion device and the second photoelectric conversion device, the plurality of charge holding units including the first charge holding unit and the second charge holding unit, the plurality of pixel separation regions separating the plurality of photoelectric conversion regions, at least some pixel separation regions of the plurality of pixel separation regions having a length in a depth direction shallower than a length in the depth direction of the plurality of photoelectric conversion regions.

[0028] The pixel separation region located on a transfer path that transfers the charges accumulated in each of the plurality of photoelectric conversion devices to the corresponding charge holding unit may have a length in the depth direction shallower than a length in the depth direction of the semiconductor layer of the pixel separation region that is not located on the transfer path.

[0029] The light detection device may further include an insulation layer disposed on a surface of the semiconductor layer opposite to a light-incident surface, at least the pixel separation regions located on the transfer path, of the plurality of pixel separation regions, being arranged so as not to come into contact with the insulation layer. According to the present disclosure, there is provided a light detection device, including a first pixel, a second pixel, and a wire. The first pixel, includes a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor. The second pixel includes a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor. The wire connects a gate of the first transistor to a gate of the second transistor. The light detection device may also include a floating diffusion region configured to hold one of an output of the first charge holding unit and an output of the second charge holding unit. The light detection device may also include a pixel circuit configured to generate a first pixel signal corresponding to one of the output of the first charge holding unit and a second pixel signal corresponding to the output of the second charge holding unit and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal. The light detection device may also include a first floating diffusion region configured to store an output of the first charge holding unit and a second floating diffusion region configured to store an output of the second charge holding unit. The light detection device may also include a first pixel circuit configured to generate a first pixel signal corresponding to the first floating diffusion region, a second pixel circuit that generates a second pixel signal corresponding to the second floating diffusion region, and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal. The light detection device may also include a first pixel group including two or more first pixels arranged in a first direction and a second pixel group including two or more second pixels arranged in the first direction. The first pixel group and the second pixel group may be arranged in a second direction crossing the first direction. The light detection device may also include a plurality of first pixel groups arranged in the second direction and a plurality of second pixel groups arranged in the second direction. At least one first pixel group of the plurality of first pixel groups and at least one second pixel group of the plurality of second pixel groups may be arranged alternately in the second direction. A plurality of pixels may be arranged in a Bayer array in which two or more pixels of a same color are arranged adjacently. The light detection device may also include at least one of: a plurality of on-chip lenses, where each on-chip lens is positioned over a respective pixel in a pixel block, and an on-chip lens positioned over the pixel block. Each of the plurality of on-chip lenses may correspond to a respective pixel in the pixel block and one or more pixels in the pixel block may be image plane phase difference pixels. Two or more first pixels may be arranged along a direction and two or more second pixels may be arranged along the direction. One second pixel may be arranged between the two or more first pixels in the direction. The noise charges may be cancelled by taking a difference between first pixel signals output from each of the two or more first pixels and a corresponding second pixel signal output from the one second pixel. During an exposure period of the second pixel and a period of reading a pixel signal output by the second pixel, the second discharge transistor may remain on and the pixel signal may be output to a signal line while a transfer transistor of the second pixel and a pixel transistor may be configured to generate the pixel signal are off. The light detection device may also include a semiconductor layer in which a plurality of photoelectric conversion regions, a plurality of charge holding units, a plurality of pixel separation regions, and a plurality of photoelectric conversion devices are arranged. The plurality of photoelectric conversion devices may be arranged within the plurality of photoelectric conversion regions, the plurality of photoelectric conversion devices may include a first photoelectric conversion device and a second photoelectric conversion device, the plurality of charge holding units may include a first charge holding unit and a second charge holding unit, the plurality of pixel separation regions may separate the plurality of photoelectric conversion regions, and at least one pixel separation region of the plurality of pixel separation regions may have a length in a depth direction less than a length of the plurality of photoelectric conversion regions in the depth direction. A first pixel separation region of the plurality of pixel separation regions may be located on a transfer path that transfers charges accumulated in each of the plurality of photoelectric conversion devices to a corresponding charge holding unit. The first pixel separation region may have a length in the depth direction less than a length in the depth direction of a pixel separation region not located on the transfer path. The light detection device may also include an insulation layer disposed on a surface of the semiconductor layer opposite to a light-incident surface. One or more pixel separation regions located on the transfer path may not be in contact with the insulation layer. According to the present disclosure, there is provided a pixel array including a first pixel, a second pixel, and a wire. The first pixel includes a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor. The second pixel includes a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor. The wire connects a gate of the first transistor to a gate of the second transistor. According to the present disclosure, there is provided a semiconductor device including a first pixel, a second pixel, and a wire. The first pixel, includes a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor. The second pixel, includes a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor. The wire connecting a gate of the first transistor to a gate of the second transistor.

[0030] Fig. 1 is a block diagram showing a schematic configuration of an electronic apparatus 2 including a light detection device 1 according to the present disclosure.Fig. 2 is a block diagram showing a schematic configuration of the light detection device 1 according to the present disclosure.Fig. 3 is a perspective view of the light detection device 1 according to the present disclosure.Fig. 4 is a circuit diagram of a pixel 10 and a pixel circuit 20 according to this embodiment.Fig. 5 is a plan layout diagram of the light detection device 1 according to this embodiment.Fig. 6 is a cross-sectional view taken along the line A-A f in Fig. 5.Fig. 7 is a flowchart showing a processing operation of the light detection device 1 according to this embodiment.Fig. 8 is a plan layout diagram showing an example in which a first pixel group (first pixel column) 31 and a second pixel group (second pixel column) 33 are arranged alternately in a second direction Y, the first pixel group 31 including a plurality of first pixels 10a arranged in a first direction X, the second pixel group 33 including a plurality of second pixels 10b arranged in the first direction X.Fig. 9 is a timing chart of the light detection device 1 according to this embodiment.Fig. 10 is a potential diagram of the first pixel 10a and the second pixel 10b in the light detection device 1 according to this embodiment.Fig. 11 is a timing chart of the light detection device 1 according to a first modification of this embodiment.Fig. 12 is a cross-sectional view of a photoelectric conversion region 42 and a charge holding unit MEM in the light detection device 1 according to this embodiment.Fig. 13 is a cross-sectional view of the photoelectric conversion region 42 and the charge holding unit MEM in the light detection device 1 according to one Comparative Example.Fig. 14 is a plan layout diagram of the light detection device 1 according to a second modification of this embodiment.Fig. 15 is a cross-sectional view taken along the line A-A f in Fig. 14.Fig. 16 is a circuit diagram of the pixel 10 and the pixel circuit 20 in the light detection device 1 according to a third modification of this embodiment.Fig. 17 is a diagram describing interlaced drive performed by the light detection device 1 according to this embodiment.Fig. 18 is a diagram showing a first example of pixel arrangement of the light detection device 1 according to this embodiment.Fig. 19 is a diagram showing a second example of the pixel arrangement of the light detection device 1 according to this embodiment.Fig. 20 is a diagram showing a third example of the pixel arrangement of the light detection device 1 according to this embodiment.Fig. 21 is a diagram showing a fourth example of the pixel arrangement of the light detection device 1 according to this embodiment.Fig. 22 is a diagram showing a fifth example of the pixel arrangement of the light detection device 1 according to this embodiment.Fig. 23 is a diagram showing a sixth example of the pixel arrangement of the light detection device 1 according to this embodiment.Fig. 24 is a diagram showing representative arrangement examples of first pixel rows and second pixel rows in the second direction Y.Fig. 25 is a block diagram depicting an example of schematic configuration of a vehicle control system.Fig. 26 is a diagram of assistance in explaining an example of installation positions of an outside-vehicle information detecting section and an imaging section.

[0031] A light detection device according to an embodiment will be described below with reference to the drawings. Although the main components of the light detection device will be described below, the light detection device can include components or functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0032] Fig. 1 is a block diagram showing a schematic configuration of an electronic apparatus 2 including the light detection device 1 according to at least one embodiment of the present disclosure. The electronic apparatus 2 may be configured to perform predetermined signal processing on image data generated by the light detection device 1. As shown in Fig. 1, the electronic apparatus 2 may include an imaging lens 3, the light detection device 1, a processing unit 4, a control unit 5, and a recording unit 6.

[0033] The imaging lens 3 collects incident light and guide the collected light into the light detection device 1. The light detection device 1 may be, for example, a complementary metal-oxide-semiconductor (CMOS) image sensor, and may perform photoelectric conversion on incident light to capture image data. The image data output from the light detection device 1 may be input to the processing unit 4 via a transmission line 7. The processing unit 4 may perform predetermined image processing on the image data output from the light detection device 1.

[0034] The recording unit 6 may record the image data from the light detection device 1. The recording unit 6 may be disposed in a server or the like connected via a network.

[0035] The control unit 5 may control the imaging timing of the light detection device 1, and the like via a control line 8. For example, the control unit 5 may control the start and end of imaging of the light detection device 1 in accordance with the operation of a shutter operation member (not shown).

[0036] Fig. 2 is a block diagram showing a schematic configuration of the light detection device 1 according to at least one embodiment of the present disclosure. As shown in Fig. 2, the light detection device 1 may include a pixel array unit 11, a vertical drive circuit 12, a column signal processing circuit 13, a horizontal drive circuit 14, an output circuit 15, and a control circuit 16.

[0037] The pixel array unit 11 may for example include a plurality of pixels 10 arranged in a first direction X and a second direction Y. The detailed configuration of the pixel 10 will be described later. In the present specification, the first direction X is referred to as a row direction or a horizontal direction, and the second direction Y is referred to as a column direction or a vertical direction in some cases. However, the first direction X and the second direction Y only need to intersect, and their specific directions are not limited.

[0038] The pixel array unit 11 may include a plurality of row selection lines 17 arranged for each pixel group (pixel row) including two or more pixels 10 arranged in the first direction X and a plurality of vertical signal lines VSL arranged for each pixel group (pixel column) including two or more pixels 10 arranged in the second direction Y. The plurality of row selection lines 17 may extend in the first direction X and may be arranged in the second direction Y. The plurality of vertical signal lines VSL may extend in the second direction Y and may be arranged in the first direction X. The plurality of pixels 10 may output the pixel signal corresponding to the charges generated by photoelectric conversion to the corresponding vertical signal line VSL.

[0039] The plurality of row selection lines 17 may be connected to the vertical drive circuit 12. The vertical drive circuit 12 may be configured to sequentially drive the plurality of row selection lines 17 using, for example, a shift register. As a result, for each pixel row of the pixel array unit 11, the pixel signals of the plurality of pixels 10 may be output in parallel to the plurality of vertical signal lines VSL.

[0040] The plurality of vertical signal lines VSL may be connected to the column signal processing circuit 13. The column signal processing circuit 13 may include a plurality of AD converters 18 that perform analog-to-digital conversion (hereinafter, AD conversion) on the plurality of pixel signals transmitted via the plurality of vertical signal lines VSL. In addition, the column signal processing circuit 13 may perform correlated double sampling (CDS) processing of detecting the difference between the signal level of the reset level of each pixel 10 and the pixel signal level corresponding to the charges generated by photoelectric conversion, or the like in some cases.

[0041] The horizontal drive circuit 14 may sequentially output horizontal scanning pulses with different phases to sequentially select the plurality of AD converters 18 in the column signal processing circuit 13. As a result, the digital pixel signals obtained by the AD conversion by the plurality of AD converters 18 may be sequentially output and input to the output circuit 15.

[0042] The output circuit 15 may be configured to perform various types of digital signal processing on the digital pixel signal and output the obtained signal. The specific content of the digital signal processing performed by the output circuit 15 is arbitrary, and may be, for example, black level adjustment or column variation correction. The above-mentioned CDS processing may be performed in some implementations.

[0043] The control circuit 16 may control the operation timings of the vertical drive circuit 12, the column signal processing circuit 13, and / or the horizontal drive circuit 14. Further, the control circuit 16 may supply a reference signal to be used for AD conversion to the column signal processing circuit 13. Note that a circuit that generates a reference signal may be provided separately from the control circuit 16 in some implementations.

[0044] The light detection device 1 according to the present disclosure can be formed on one semiconductor substrate. Alternatively, the light detection device 1 according to the present disclosure can be divided and formed on a plurality of semiconductor substrates. Fig. 3 is a perspective view of the light detection device 1 according to at least one embodiment of the present disclosure. The light detection device 1 shown in Fig. 3 includes a first substrate 21 and a second substrate 22 stacked on each other. The first substrate 21 and the second substrate 22 are each, for example, a semiconductor substrate, and are joined by copper-copper connection (CCC), a via, or a bump to transmit signals.

[0045] The first substrate 21 may be disposed in the direction in which light enters. For example, at least part of the pixel array unit 11 in Fig. 2 (e.g., the pixel 10) may be disposed on the first substrate 21. For example, at least part of the components other than the pixel array unit 11 in Fig. 2 (e.g., a pixel circuit 20 such as a pixel transistor and a logic circuit 23) may be disposed on the second substrate 22.

[0046] In order to improve the sensitivity of the light detection device 1, it is desirable to make the area of the photoelectric conversion device of each pixel 10 as large as possible. In this regard, a photoelectric conversion device and a transfer transistor may be disposed on the first substrate 21 and pixel transistors other than the transfer transistor may be disposed on the second substrate 22 together with the logic circuit 23.

[0047] Note that the circuit devices and the like disposed on the first substrate 21 and the second substrate 22 are arbitrary and various modifications are possible. Further, the light detection device 1 according to one or more embodiments of the present disclosure may have a stacked structure in which three or more semiconductor substrates are stacked.

[0048] In the light detection device according to this embodiment for example, the plurality of pixels 10 may share one floating diffusion region FD and one pixel circuit 20. Fig. 4 is a circuit diagram of the pixel 10 and the pixel circuit 20 according to this embodiment. Fig. 4 shows an example in which a total of four pixels 10, i.e., two in the first direction (e.g., row direction) X and two in the second direction (e.g., column direction) Y, share one floating diffusion region FD and one pixel circuit 20. Note that the plurality of pixels 10 whose number is other than four may share one floating diffusion region FD and one pixel circuit 20.

[0049] Each pixel 10 may include a photoelectric conversion device PD, a plurality of transfer transistors Q1, Q2, and Q3, and a discharge transistor (OFG_1 transistor Q4 or OFG_2 transistor Q5). Fig. 4 shows an example in which a plurality of transfer transistors includes a TRY transistor Q1, a TRX transistor Q2, and a TRG transistor Q3, but the number of transfer transistors provided in each pixel 10 is arbitrary.

[0050] The gates of two OFG_1 transistors Q4 of a first pixel group 31 including two pixels 10 (first pixels 10a) adjacent to each other in the first direction X (e.g., row direction) may be connected to an OFG_1 wire 32. The gates of two OFG_2 transistors Q5 of a second pixel group 33 including two pixels 10 (second pixels 10b) may be connected to an OFG_2 wire 34. The first pixel group 31 and the second pixel group 33 may be arranged adjacent to each other in the second direction Y. Each of the OFG_1 wire 32 and the OFG_2 wire 34 may extend in the first direction X, and the OFG_1 wire 32 and the OFG_2 wire 34 may be arranged such that they are spaced apart from each other in the second direction Y. The OFG_1 wire 32 and the OFG_2 wire 34 may be individually driven. In the present specification, the signal on the OFG_1 wire 32 is referred to as an OFG_1 signal, and the signal on the OFG_2 wire 34 is referred to as an OFG_2 signal. A plurality of first pixel groups 31 and a plurality of second pixel groups 33 may be arranged alternately along the second direction Y.

[0051] In the present specification, the two pixels 10 connected to the OFG_1 wire 32 are referred to as the first pixels 10a and the two pixels 10 connected to the OFG_2 wire 34 are referred to as the second pixels 10b. The first pixel 10a may include a first photoelectric conversion device PD1 and a first charge holding unit MEM1 that holds the signal charges transferred from the first photoelectric conversion device PD1 and the noise charges caused by parasitic light intensity. The second pixel 10b may include a second photoelectric conversion device PD2 and a second charge holding unit MEM2 that holds the noise charges caused by parasitic light intensity without holding the signal charges transferred from the second photoelectric conversion device PD2. In the present specification, the first charge holding unit MEM1 and the second charge holding unit MEM2 are collectively referred to as the charge holding unit MEM.

[0052] The first pixel 10a may include the OFG_1 transistor Q4 (hereinafter, the OFG_1 transistor Q4). The gate of the OFG_1 transistor Q4 may be connected to the OFG_1 wire 32. The OFG_1 transistor Q4 may be temporarily turned on after the exposure period of the first photoelectric conversion device PD1 ends and before the reading of the first pixel signal starts, and may discharge the charges accumulated in the first photoelectric conversion device PD1 to a reference voltage node OFD.

[0053] The second pixel 10b may include the OFG_2 transistor Q5 (hereinafter, the OFG_2 transistor Q5). The gate of the OFG_2 transistor Q5 may be connected to the OFG_2 wire 34. During the exposure period of the second photoelectric conversion device PD2 and the period of reading the second pixel signal, the OFG_2 transistor Q5 may remain on and may discharge the charges accumulated in the second photoelectric conversion device PD2 to the reference voltage node OFD.

[0054] The four TRG transistors Q3 in the four pixels 10 (two first pixels 10a and two second pixels 10b) may be connected to a common floating diffusion region FD via a common FD wire 35. The floating diffusion region FD may for example hold signal charges and noise charges transferred from the first charge holding unit MEM1 and / or the noise charges transferred from the second charge holding unit MEM2 at a different timing from that of the first charge holding unit MEM1. The voltage of the floating diffusion region FD can be variably controlled by an FDB signal. When the level of the FDB signal becomes high, the voltage level of the floating diffusion region FD may temporarily rise, preventing the reverse flow of the charges held in the floating diffusion region FD.

[0055] The pixel circuit 20 may be connected to the floating diffusion region FD. The pixel circuit 20 may generate a first pixel signal corresponding to the signal charges and noise charges transferred to the floating diffusion region FD and a second pixel signal corresponding to the noise charges transferred to the floating diffusion region FD at different timings. The pixel circuit 20 may include a reset transistor (hereinafter, RST transistor) Q6, an amplifier transistor (hereinafter, AMP transistor) Q7, and a selection transistor (hereinafter, SEL transistor) Q8. The vertical signal line VSL may be connected to the source of the SEL transistor Q8. The vertical signal line VSL may be provided for each pixel group (pixel column) extending in the second direction Y. The column signal processing circuit 13 as shown in Fig. 2 is connected to the vertical signal line VSL. The column signal processing circuit 13 may generate a digital signal corresponding to the difference between the first pixel signal and the second pixel signal.

[0056] The vertical signal line VSL may transmit the first pixel signal corresponding to the signal charges and noise charges held in the first charge holding unit MEM1 and the second pixel signal corresponding to the noise charges held in the second charge holding unit MEM2 at different timings.

[0057] Fig. 5 is a plan layout diagram of the light detection device 1 according to this embodiment. Fig. 6 is a cross-sectional view taken along the line A-A f in Fig. 5. Fig. 5 shows a planar layout of 2 ~ 2 pixels 10. As shown in Fig. 5, a first row region 41 in which the three transfer transistors (TRY, TRX, TRG) Q1 to Q3 and the floating diffusion region FD are symmetrically arranged in the first direction X (row direction), a second row region 43 in which the two photoelectric conversion regions (PD) 42, the AMP transistor Q7, and the OFG_1 transistor Q4 are symmetrically arranged in the first direction X, a third row region 44 in which the three transfer transistors (TRY, TRX, TRG) and the floating diffusion region FD are symmetrically arranged in the first direction X, and a fourth row region 45 in which the two photoelectric conversion regions (PD) 42, the SEL transistor Q8, and the OFG_2 transistor Q5 are symmetrically arranged in the first direction X are provided. The photoelectric conversion region 42 is a region where the photoelectric conversion device PD is formed.

[0058] In the first row region 41, the charge holding unit MEM is provided to overlap with the three transfer transistors (TRY, TRX, TRG) Q1 to Q3 in a plan view. More specifically, the first row region 41 includes the floating diffusion region FD disposed at substantially the center in the first direction X and the TRY transistor Q1, the TRX transistor Q2, and the TRG transistor Q3 that are symmetrically arranged on both sides in the first direction X with the floating diffusion region FD sandwiched therebetween.

[0059] The second row region 43 includes the AMP transistor Q7 disposed at substantially the center in the first direction X and the OFG_1 transistor Q4 arranged on both sides in the first direction X with the AMP transistor Q7 sandwiched therebetween. The third row region 44 is configured similarly to the first row region 41.

[0060] The fourth row region 45 includes the SEL transistor Q8 disposed at substantially the center in the first direction X and the TRY transistor Q1, the TRX transistor Q2, and the TRG transistor Q3 that are symmetrically arranged on both sides in the first direction X with the SEL transistor Q8 sandwiched therebetween.

[0061] A first pixel separation region 46 is disposed between the first row region 41 and the second row region 43. A second pixel separation region 47 is disposed between the second row region 43 and the third row region 44. A third pixel separation region 48 is disposed between the third row region 44 and the fourth row region 45. A fourth pixel separation region 49 is disposed between the fourth row region 45 and the first row region 41 of the pixel column adjacent thereto in the second direction.

[0062] A penetrating region 42a that penetrates the photoelectric conversion region 42 and a non-penetrating region 42b that does not penetrate the photoelectric conversion region 42 are provided in the first to fourth pixel separation regions 46 to 49. The first to third pixel separation regions 46 to 48 are formed using a metal material having a light-shielding property, such as tungsten.

[0063] As shown in the cross-sectional view of Fig. 6, the light detection device 1 according to this embodiment includes a semiconductor layer 51 in which the photoelectric conversion region 42 is disposed, a color filter layer 52 and an on-chip lens layer 53, which are disposed on the light-incident surface side of the semiconductor layer 51, and a wiring layer 54 disposed on the surface of the semiconductor layer 51 opposite to the light-incident surface. The light detection device 1 according to this embodiment may include one substrate or have a stacked structure in which two or more substrates are joined by Cu-Cu bonding or the like as shown in Fig. 3.

[0064] The penetrating region 42a or the non-penetrating region 42b is disposed in the first to third pixel separation regions 46 to 48 between the two photoelectric conversion regions 42 disposed in the semiconductor layer 51. The non-penetrating region 42b is provided on the charge transfer path from the photoelectric conversion region 42 to transfer transistorQ1. The charges accumulated in the photoelectric conversion region 42 are transferred to the transfer transistor Q1 through the gap between the non-penetrating regions 42b. By providing the non-penetrating region 42b, the charge transfer becomes easier. Meanwhile, noise charges caused by parasitic light intensity are more likely to be transferred to the charge holding unit MEM. In this regard, the penetrating region 42a may be disposed in some cases in the first to third pixel separation regions 46 to 48 that are not located on the charge transfer path.

[0065] A SiN layer 55 is disposed along the end surface of the semiconductor layer 51 on the side of the wiring layer 54. The SiN layer 55 functions as a stopper layer during trench formation for forming the penetrating region 42a. During the production process, there is a risk that the trench for the penetrating region 42a penetrates the SiN layer 55, and providing the penetrating region 42a reduces the yield.

[0066] In this way, providing the penetrating region 42a reduces the yield although noise charges caused by parasitic light intensity can be reduced.

[0067] Fig. 7 is a flowchart showing a processing operation of the light detection device 1 according to at least one embodiment. Initially, all of the pixels 10 in the pixel array unit 11 may start exposure simultaneously (Step S1). The OFG_1 transistor Q4 in the first pixel 10a may be an the off-state, and the first photoelectric conversion device PD1 in the first pixel 10a may accumulate charges obtained by photoelectric conversion. The OFG_2 transistor Q5 in the second pixel 10b may be in the on-state, and the charges obtained by photoelectric conversion by the second photoelectric conversion device PD2 in the second pixel 10b may be discharged to the reference voltage node OFD via the OFG_2 transistor Q5 without being accumulated in the second photoelectric conversion device PD2.

[0068] When the exposure period ends, all of the pixels 10 may transfer the charges from the first photoelectric conversion device PD1 and the second photoelectric conversion device PD2 to the first charge holding unit MEM1 or the second charge holding unit MEM2 at the same timing (Step S2). As a result, the charges accumulated in the first photoelectric conversion device PD1 may be held in the first charge holding unit MEM1, and the charges accumulated in the second photoelectric conversion device PD2 may not be held in the second charge holding unit MEM2.

[0069] Next, the charges held in the first charge holding unit MEM1 or the second charge holding unit MEM2 may be transferred to the floating diffusion region FD at a timing different for each pixel row (Step S3). The charge holding time of the first charge holding unit MEM1 and the second charge holding unit MEM2 may differ for each pixel row, the first charge holding unit MEM1 may hold the signal charges accumulated in the first photoelectric conversion device PD1 and the noise charges caused by parasitic light intensity, and the second charge holding unit MEM2 may hold the noise charges caused by parasitic light intensity.

[0070] Next, the pixel circuit 20 may generate the first pixel signal and second pixel signal corresponding to the charges transferred to the floating diffusion region FD at the timing different for each pixel row, and sequentially output them to the vertical signal line VSL (Step S4).

[0071] Next, the column signal processing circuit 13 may generate a digital signal from which noise charges have been canceled out by taking the difference between the first pixel signal and the second pixel signal (Step S5).

[0072] Fig. 8 is a plan layout diagram showing an example in accordance with at least one embodiment of the present disclosure. In the embodiment illustrated in Fig. 8, the first pixel group (first pixel column) 31 and the second pixel group (second pixel column) 33 are arranged alternately in the second direction Y, the first pixel group 31 including the plurality of first pixels 10a arranged in the first direction X, the second pixel group 33 including the plurality of second pixels 10b arranged in the first direction X. Between the first pixel group 31 and the second pixel group 33 adjacent to each other in the second direction Y, the processing of taking the difference between the first pixel signal and second pixel signal output from the first pixel 10a and the second pixel 10b is performed in the column signal processing circuit 13.

[0073] Although not shown in Fig. 8, the plurality of vertical signal lines VSL extending in the second direction Y is arranged, and the first pixel signal and the second pixel signal are transmitted at different timings for each of the plurality of vertical signal lines VSL.

[0074] As described later, the arrangement of the first pixel group 31 in which the plurality of first pixels 10a is arranged and the second pixel group 33 in which the plurality of second pixels 10b is arranged is not necessarily limited to that shown in Fig. 8.

[0075] Fig. 9 is a timing chart of the light detection device 1 according to the embodiment described above in relation to Fig. 8. Times t1 to t9 correspond to the exposure period in which all of the pixels 10 in the pixel array unit 11 perform exposure at the same timing and times t10 to t17 correspond to the reading period in which the pixel signal is read for each pixel row.

[0076] The OFG_1 transistor Q4 is kept on during the period between the times t9 to t10, which is between the exposure period and the reading period, and kept off during the other periods. The OFG_2 transistor Q5 is kept on in all periods (times t1 to t17) of the exposure period and the reading period.

[0077] At the time t1, the TRG transistor Q3 and the RST transistor Q6of each pixel 10 are turned on. As a result, the charges held in the first charge holding unit MEM1 and the second charge holding unit MEM2 connected to the TRG transistor Q3 are discharged to a reference voltage node VDD via the RST transistor Q6.

[0078] At the time t3, the TRG transistor Q3 of each pixel 10 is turned off, and then the RST transistor Q6 is turned off.

[0079] At the time t4, the TRX transistor Q2 and the TRG transistor Q3 of each pixel 10 are turned on, and the potential of the FDB signal becomes high. As a result, the voltage level of the floating diffusion region FD increases, which prevents the reverse flow of the charges held in the floating diffusion region FD.

[0080] At the time t5, the TRX transistor Q2 of each pixel 10 is turned off, and shortly after, the TRG transistor Q3 is turned off. Shortly after, the potential of the FDB signal becomes low.

[0081] At the time t6, both the TRX transistor Q2 and the TRY transistor Q1 of each pixel 10 are turned on. As a result, the charges accumulated in the first photoelectric conversion device PD1 of the first pixel 10a are transferred to the first charge holding unit MEM1. Further, since the charges obtained by photoelectric conversion by the second photoelectric conversion device PD2 of the second pixel 10b are continuously discharged to the reference voltage node OFD via the OFG_2 transistor Q5, no charges are transferred from the second photoelectric conversion device PD2 to the second charge holding unit MEM2 even if both the TRX transistor Q2 and the TRY transistor Q1 are turned on.

[0082] At the time t8, the TRY transistor Q1 of each pixel 10 is turned off, and shortly after, the TRX transistor Q2 is turned off. After that, at the time t9, the OFG_1 transistor Q4 is turned on. As a result, the charges accumulated in the first photoelectric conversion device PD1 of the first pixel 10a are discharged to the reference voltage node OFD via the OFG_1 transistor Q4.

[0083] At the time t10, the OFG_1 transistor Q4 of the first pixel 10a is turned off. After the time t10, each transfer transistor, the RST transistor Q6, and the SEL transistor Q8 are turned on at the time shifted for each pixel row. The times t10 to t17 in Fig. 9 indicate the reading timing for a pixel row. At the time t11, the SEL transistor Q8 of the pixel 10 to be read is turned on. At the time t12, the RST transistor Q6 is turned on. As a result, the charges held in the floating diffusion region FD are discharged to the reference voltage node VDD via the RST transistor Q6. As a result, the first pixel signal or second pixel signal at the reset level is output to the vertical signal line VSL.

[0084] At the time t14, both the TRX transistor Q2 and the TRG transistor Q3 of the pixel 10 to be read are turned on, and the potential of the FDB signal becomes high. As a result, the charges held in the first charge holding unit MEM1 or the second charge holding unit MEM2 in the pixel row to be read are transferred to the floating diffusion region FD, and the first pixel signal or second pixel signal at the signal level is output to the vertical signal line VSL. The first pixel signal includes the components of signal charges and noise charges, whereas the second pixel signal includes the components of noise charges without including the components of signal charges.

[0085] A reason for switching the gate voltage of the TRX transistor Q2 in two stages at the times t4 to t5 and the times t14 to t16 may be to improve the saturation charge density.

[0086] Fig. 10 is a potential diagram of the first pixel 10a and the second pixel 10b in the light detection device 1 according to the embodiment described above in relation to Figs. 8 and 9. Fig. 10 illustrates the potentials at the times t2, t7, t12, and t15 in Fig. 9. The upper stage of Fig. 10 shows the potential diagram of the first pixel 10a and the lower stage shows the potential diagram of the second pixel 10b.

[0087] At the time t2, the first photoelectric conversion device PD1 in the first pixel 10a accumulates the charges obtained by photoelectric conversion. Meanwhile, the charges obtained by photoelectric conversion by the second photoelectric conversion device PD2 in the second pixel 10b are discharged to the reference voltage node OFD via the OFG_2 transistor Q5 without being accumulated. Further, at the time t2, since both the TRG transistor Q3 and the RST transistor Q6 are turned on, the charges held in the first charge holding unit MEM1, the second charge holding unit MEM2, and the floating diffusion region FD are discharged to the reference voltage node VDD via the RST transistor Q6.

[0088] At the time t7, since the TRX transistor Q2 and the TRY transistor Q1 are turned on, the charges accumulated in the first photoelectric conversion device PD1 in the first pixel 10a are transferred to the first charge holding unit MEM1. Meanwhile, since no charges are accumulated in the second photoelectric conversion device PD2 in the second pixel 10b, substantially no charges are transferred to the second charge holding unit MEM2 even if the TRX transistor Q2 and the TRY transistor Q1 are turned on.

[0089] At the time t12, the RST transistor Q6 of the pixel row to be read is turned on. As a result, the charges held in the floating diffusion region FD are discharged to the reference voltage node VDD via the RST transistor Q6. Further, noise charges caused by parasitic light intensity are superimposed on the first charge holding unit MEM1 and the second charge holding unit MEM2.

[0090] At the time t15, the TRX transistor Q2 and the TRY transistor Q1 are turned on and the potential of the FDB signal becomes high. As a result, the charges held in the first charge holding unit MEM1 of the first pixel 10a in the pixel row to be read are transferred to the floating diffusion region FD, and the first pixel signal at the signal level is generated. The charges held in the first charge holding unit MEM1 are synthesized charges of the charges obtained by photoelectric conversion by the first photoelectric conversion device PD1 and the noise charges. Further, the charges held in the second charge holding unit MEM2 of the second pixel 10b in the pixel row to be read are transferred to the floating diffusion region FD, and the second pixel signal at the signal level is generated. The charges held in the second charge holding unit MEM2 are noise charges.

[0091] (First modification) Fig. 11 is a timing chart of the light detection device 1 according to a first modification of this embodiment. The light detection device 1 according to the first modification further reduces the power consumption of the second pixel 10b in the exposure period. In the light detection device 1 according to the first modification, during the exposure period in which all of the pixels 10 perform exposure, all of the transfer transistors of the second pixel 10b are turned off, the level of the FDB signal is fixed to low, and the RST transistor Q6 is turned off.

[0092] In the second pixel 10b, since the OFG_2 transistor Q5 is constantly in the on-state, no charges are accumulated in the second photoelectric conversion device PD2, and no charges are transferred from the second photoelectric conversion device PD2 to the second charge holding unit MEM2 even if the TRY, TRX, TRG transistors are turned on. Therefore, it is unnecessary to turn on the TRY, TRX, and TRG transistors and make the potential of the FDB signal high. Further, since no charges are accumulated in the second photoelectric conversion device PD2, it is unnecessary to turn on the RST transistor Q6 to discharge the charges of the second photoelectric conversion device PD2. Thus, in the first modification, the power consumption in the exposure period is reduced by turning off the TRY, TRX, and TRG transistors and the RST transistor Q6 and making the potential of the FDB signal low in the exposure period. Note that the timing of the reading period in Fig. 11 is the same as that in Fig. 9.

[0093] (Charge capture unit) In the light detection device 1 according to at least one embodiment, no charge capture unit is provided below the charge holding unit MEM of each pixel 10. The charge capture unit has a function of capturing charges accumulated in the photoelectric conversion region 42 and transferring the charges to the OFG transistor. By providing a charge capture unit, the efficiency for discharging charges can be improved but there is a problem that the saturation charge density Qs decreases. Note that the photoelectric conversion region 42 and the charge holding unit correspond to the first photoelectric conversion device PD1 and the first charge holding unit MEM1, which are provided in the above-mentioned first pixel 10a, or the second photoelectric conversion device PD2 and the second charge holding unit MEM2, which are provided in the second pixel 10b.

[0094] Fig. 12 is a cross-sectional view of the photoelectric conversion region 42 and the charge holding unit MEM in the light detection device 1 according to at least one embodiment. The photoelectric conversion region 42 includes a first diffusion region 60 including an n+ region 56, an n region 57, a p region 58, and a p+ region 59. The first diffusion region 60 forming the photoelectric conversion region 42 extends from the upper surface of the semiconductor layer 51 to the bottom surface. Similarly, the charge holding unit MEM includes a second diffusion region 65 including an n+ region 61, an n region 62, a p region 63, and a p+ region 64. The second diffusion region 65 forming the charge holding unit MEM extends from the upper surface of the semiconductor layer 51 to the bottom surface.

[0095] As described above, the charge holding unit MEM according to this embodiment is disposed in the entire region in the depth direction of the semiconductor layer 51, and no charge capture unit is present. Therefore, it is possible to increase the saturation charge density Qs.

[0096] Fig. 13 is a cross-sectional view of the photoelectric conversion region 42 and the charge holding unit MEM in the light detection device 1 according to at least one embodiment. The cross-sectional structure of the photoelectric conversion region 42 according to the embodiment is common to the cross-sectional structure of the photoelectric conversion region 42 according to this embodiment. Meanwhile, a charge capture unit 66 is disposed below the charge holding unit MEM according to the embodiment. The charge capture unit 66 has, for example, a third diffusion region 69 including a p region 67 and a p+ region 68. The charges (electrons) obtained by photoelectric conversion by the photoelectric conversion region 42 are captured by the charge capture unit 66 and transferred to the OFG transistor. By providing the charge capture unit 66, the efficiency for discharging charges is improved, but the structure of the semiconductor layer 51 is complicated and the volume of the charge holding unit MEM decreases, thereby decreasing the saturation charge density Qs.

[0097] In the light detection device 1 according to this embodiment, since the charge holding unit MEM having the volume larger than that in one Comparative Example is provided, it is possible to increase the saturation charge density Qs. Further, since the light detection device 1 according to this embodiment does not include the charge capture unit 66, it is possible to simplify the structure and make the production easier. In the light detection device 1 according to this embodiment, since the noise charges can be cancelled, it is unnecessary to provide the charge capture unit 66 to discharge the noise charges.

[0098] (Non-penetrating region 42b) Fig. 14 is a plan layout diagram of the light detection device 1 according to a second modification of this embodiment. Fig. 15 is a cross-sectional view taken along the line A-A f in Fig. 14.

[0099] The light detection device 1 according to the second modification is characterized in that the first to third pixel separation regions 46 to 48 are formed by the non-penetrating region 42b and the penetrating region 42a is not provided.

[0100] Forming the first to third pixel separation regions 46 to 48 by the non-penetrating region 42b eliminates the problem that the trench for forming the non-penetrating region 42b penetrates the SiN layer 55 disposed on the end surface of the semiconductor layer 51, which improves the yield.

[0101] Note that in the case of forming all of the first to third pixel separation regions 46 to 48 by the non-penetrating region 42b, there is a possibility that noise charges caused by parasitic light intensity enter the charge holding unit MEM via the gap between the end surface of the semiconductor layer 51 opposite to the light-incident surface and the non-penetrating region 42b. In this embodiment, since noise charges can be cancelled by taking the difference between the first pixel signal corresponding to the signal charges and noise charges held in the first charge holding unit MEM1 and the second pixel signal corresponding to the noise charges held in the second charge holding unit MEM2, it is possible to prevent the image quality of the captured image from deteriorating.

[0102] (Pixel circuit 20 not sharing floating diffusion region FD) Although an example in which the plurality of pixels 10 shares one floating diffusion region FD and one pixel circuit 20 has been shown in Fig. 4, the floating diffusion region FD and the pixel circuit 20 may be provided for each pixel 10 in the light detection device 1 according to at least one embodiment.

[0103] Fig. 16 is a circuit diagram of the pixel 10 and the pixel circuit 20 of the light detection device 1 according to a third modification of this embodiment. In the third modification, the floating diffusion region FD and the pixel circuit 20 are provided for each pixel 10 and the two pixels 10 adjacent to each other in the first direction X (e.g., row direction) share the vertical signal line VSL. More specifically, the light detection device 1 according to the third modification includes two first pixels 10a connected to the OFG_1 wire 32 and two second pixels 10b connected to the OFG_2 wire 34. The two first pixels 10a and the two second pixels 10b are connected to the common vertical signal line VSL.

[0104] Although not shown in Fig. 16, the plurality of vertical signal lines VSL is arranged along the first direction X, and four pixels 10 are connected, similarly to Fig. 16, to each vertical signal line VSL for each pixel row.

[0105] Each of the two first pixels 10a includes the first photoelectric conversion device PD1, the OFG_1 transistor Q4, the TRY transistor Q1, the TRX transistor Q2, and the TRG transistor Q3. For each first pixel 10a, a first pixel circuit 20a is provided. The first pixel circuit 20a includes the AMP transistor Q7, the SEL transistor Q8, the RST transistor Q6, the floating diffusion region FD, and the first charge holding unit MEM1. Hereinafter, the floating diffusion region FD of the first pixel 10a will be referred to as a first floating diffusion region FD1 in some cases. The first floating diffusion region FD1 holds the signal charges and noise charges transferred from the first charge holding unit MEM1. The first pixel circuit 20a generates a first pixel signal corresponding to the signal charges and noise charges transferred to the first floating diffusion region FD1.

[0106] Each of the two second pixels 10b includes the second photoelectric conversion device PD2, the OFG_2 transistor Q5, the TRY transistor Q1, the TRX transistor Q2, and the TRG transistor Q3. For each second pixel 10b, a second pixel circuit 20b is provided. The second pixel circuit 20b includes the AMP transistor Q7, the SEL transistor Q8, the RST transistor Q6, the floating diffusion region FD, and the second charge holding unit MEM2. Hereinafter, the floating diffusion region FD of the second pixel 10b will be referred to as a second floating diffusion region FD2 in some cases. The second floating diffusion region FD2 holds the noise charges transferred from the second charge holding unit MEM2. The second pixel circuit 20b generates a second pixel signal corresponding to the noise charges transferred to the second floating diffusion region FD2. The column signal processing circuit 13 generates a digital signal corresponding to the difference between the first pixel signal and the second pixel signal.

[0107] In the third modification, since the floating diffusion region FD is not shared, the number of times the charges of the floating diffusion region FD are reset can be reduced and the frame rate can be increased.

[0108] (Interlaced drive) The light detection device 1 according to at least one embodiment may perform interlaced drive. Fig. 17 is a diagram describing interlaced drive performed by the light detection device 1 according to this embodiment. In the case of performing interlaced drive, for each frame, whether to cause each pixel 10 in each pixel row to operate as the first pixel 10a or the second pixel 10b is alternately switched. In the example of Fig. 17, each pixel 10 in the odd-numbered pixel rows is caused to operate as the first pixel 10a and each pixel 10 in the even-numbered pixel rows is caused to operate as the second pixel 10b in the Nth (N is an integer of 0 or more) frame. In the (N+1)th frame, each pixel 10 in the odd-numbered pixel rows is caused to operate as the second pixel 10b and each pixel 10 in the even-numbered pixel rows is caused to operate as the first pixel 10a. In the (N+2)th frame and subsequent frames, for each frame, whether to cause each of the odd-numbered pixel rows and each of the even-numbered pixel rows to operate as the first pixel 10a or the second pixel 10b is alternately switched.

[0109] In the case of causing each pixel row to operate as the first pixel 10a, the first pixel 10a may only supply the OFG_1 signal to the OFG wire in Fig. 4, which is connected to the pixel row. Similarly, in the case of causing each pixel row to operate as the second pixel 10b, the second pixel 10b may only supply the OFG_2 signal to the OFG wire connected to the pixel row.

[0110] In the example of Fig. 17, in the (N+1)th frame, the first pixel signal corresponding to the signal charges and noise charges is output from each pixel 10 in the odd-numbered pixel rows and the second pixel signal corresponding to the noise charges is output from each pixel 10 in the odd-numbered pixel rows. The column signal processing circuit 13 generates a digital signal based on the difference signal between the first pixel signal of each pixel 10 in the odd-numbered pixel rows and the second pixel signal in each pixel 10 in the even-numbered pixel rows. Therefore, a captured image based on the signal charges acquired in the odd-numbered pixel rows may be obtained (image IMG1 in Fig. 17).

[0111] Further, in the Nth frame, the first pixel signal corresponding to the signal charges and noise charges is output from each pixel 10 in the even-numbered pixel rows and the second pixel signal corresponding to the noise charges is output from each pixel 10 in the odd-numbered pixel rows. The column signal processing circuit 13 generates a digital signal based on the difference signal between the first pixel signal of each pixel 10 in the even-numbered pixel rows and the second pixel signal of each pixel 10 in the odd-numbered pixel rows. Therefore, a captured image based on the signal charges acquired in the even-numbered pixel rows may be obtained (image IMG2 in Fig. 17).

[0112] The image IMG1 and the image IMG2 may in some implementations have a resolution equal to half of the resolution in the second direction Y of the pixel array unit 11, but a captured image IMG3 with a full-resolution is generated by synthesizing the image IMG1 and the image IMG2 because they are offset by one pixel row.

[0113] In this way, since each pixel 10 in each pixel row is alternately switched for each frame between operating as the first pixel 10a or the second pixel 10b, a captured image with a resolution compressed to half of the resolution in the second direction Y in each frame, and a captured image with a full-resolution can be generated by synthesizing the captured images of the adjacent two frames. Furthermore, the noise charges caused by parasitic light intensity can be cancelled, and thus, it is possible to improve the image quality of the captured image.

[0114] (Variations in pixel arrangement) The light detection device 1 according to this embodiment is capable of imaging light in various wavelength ranges. The light detection device 1 according to this embodiment may include two or more pixels 10 that image light having two or more different wavelength ranges, or may include two or more pixels 10 that images light having the same wavelength range.

[0115] Fig. 18 is a diagram showing a first example of the pixel arrangement of the light detection device 1 according to this embodiment. The light detection device 1 according to the first example acquires a monochrome captured image. In the first example, each pixel 10 in the odd-numbered pixel rows operates as the first pixel 10a and each pixel 10 in the even-numbered pixel rows operates as the second pixel 10b. Note that each pixel 10 in the odd-numbered pixel rows may be caused to operate as the second pixel 10b and each pixel 10 in the even-numbered pixel rows may be caused to operate as the first pixel 10a.

[0116] Fig. 19 is a diagram showing a second example of the pixel arrangement of the light detection device 1 according to at least one embodiment of the present disclosure. The light detection device 1 according to the second example adopts the Bayer array using, as a unit, a pixel block in which 2 ~ 2 pixels 10 have the same color. Since the four pixels 10 of the same color are arranged in close proximity, the dynamic range can be expanded. In the second example, each pixel 10 in the odd-numbered pixel rows operates as the first pixel 10a and each pixel 10 in the even-numbered pixel rows operates as the second pixel 10b. Note that each pixel 10 in the odd-numbered pixel rows may be caused to operate as the second pixel 10b and each pixel 10 in the even-numbered pixel rows may be caused to operate as the first pixel 10a.

[0117] Fig. 20 is a diagram showing a third example of the pixel arrangement of the light detection device 1 according to this embodiment. The light detection device 1 according to the third example adopts the Bayer array in which the color is changed for each pixel 10. In the third example, each pixel 10 in the odd-numbered pixel rows operates as the first pixel 10a and each pixel 10 in the even-numbered pixel rows operates as the second pixel 10b. Note that each pixel 10 in the odd-numbered pixel rows may be caused to operate as the second pixel 10b and each pixel 10 in the even-numbered pixel rows may be caused to operate as the first pixel 10a. In the third example, two or more first pixel groups arranged adjacent to each other along the second direction Y and two or more second pixel groups arranged adjacent to each other along the second direction Y are arranged alternately along the second direction Y.

[0118] Fig. 21 is a diagram showing a fourth example of the pixel arrangement of the light detection device 1 according to this embodiment. The light detection device 1 according to the fourth example has pixel arrangement similar to that in Fig. 19 and includes an on-chip lens 50 for each pixel 10. Each of the odd-numbered pixel rows operates as the first pixel 10a and each of the even-numbered pixel rows operates as the second pixel 10b, similarly to Fig. 19.

[0119] Fig. 22 is a diagram showing a fifth example of the pixel arrangement of the light detection device 1 according to this embodiment. The light detection device 1 according to the fifth example has pixel arrangement similar to those in Fig. 19 and Fig. 21, but the on-chip lens 50 is provided for each pixel block including 2 ~ 2 pixels 10 of the same color. By making the on-chip lens 50 have the size corresponding to four pixels, the pixel block including the four pixels 10 can be treated as one pixel 10. For example, photoelectric conversion can be performed for each pixel 10 at the time of high illuminance, and photoelectric conversion can be performed for each pixel block including the four pixels 10 at the time of low illuminance. This enables a wider dynamic range. Further, the two right and left pixels 10 that the light collected by the same on-chip lens 50 enters can be used as image plane phase difference pixels.

[0120] Although Fig. 22 shows an example in which the color differs for each pixel block including 2 ~ 2 pixels 10, all of the pixels 10 may receive light having the same wavelength range. In this case, for example, it is possible to detect a phase difference of a monochrome image.

[0121] Fig. 23 is a diagram showing a sixth example of the pixel arrangement of the light detection device 1 according to this embodiment. The light detection device 1 according to the sixth example has pixel arrangement similar to those in Fig. 19 and Fig. 21, but the on-chip lens 50 is provided for every two pixels 10 that are adjacent to each other in the first direction X (row direction) and have the same color. The light collected by the same on-chip lens 50 enters the two pixels 10 and the phase difference thereof is detected. In this way, the two pixels 10 that the light collected by the same on-chip lens 50 enters can be used as image plane phase difference pixels.

[0122] Although Fig. 23 shows an example in which the color differs for each pixel block including 2 ~ 2 pixels 10, all of the pixels 10 may receive light having the same wavelength range. In this case, for example, it is possible to detect a phase difference of a monochrome image.

[0123] Although Fig. 17 to Fig. 23 show various examples in which the pixel row that operates as the first pixel 10a and the pixel row that operates as the second pixel 10b are arranged alternately in the second direction Y (column direction), the pixel row that operates as the first pixel 10a (hereinafter, first pixel row) and the pixel row that operates as the second pixel 10b (hereinafter, second pixel row) do not necessarily need to be arranged alternately in the second direction Y. For example, a plurality of first pixel rows and one second pixel row may be associated with each other, and a difference between the first pixel signal output from each first pixel row and the second pixel signal output from the corresponding second pixel row may be taken. That is, one second pixel group 33 may be arranged between two or more first pixel groups 31 arranged adjacent to each other in the second direction Y.

[0124] Fig. 24 is a diagram showing representative arrangement examples (hereinafter, first to third arrangement examples 30a to 30c) of the first pixel row and the second pixel row in the second direction Y.

[0125] The first arrangement example 30a shows an example in which the first pixel row and the second pixel row are arranged alternately in the second direction Y similarly to Fig. 17 to Fig. 23.

[0126] The second arrangement example 30b shows an example in which two first pixel rows and one second pixel row are associated with each other and arranged in the second direction Y. Noise charges are cancelled by taking the difference between the first pixel signal generated by each of the two first pixel rows and the second pixel signal generated by the second pixel row.

[0127] The second arrangement example 30b allows the number of second pixel rows to be reduced to half as compared with the first arrangement example 30a and the resolution in the second direction Y to double. Meanwhile, since a plurality of first pixel rows shares one second pixel row, the effect of reducing the parasitic light intensity is lower than that in the first arrangement example 30a.

[0128] The third arrangement example 30c shows an example in which three pixel rows that operate as the first pixels 10a (three first pixel row) and one pixel row that operates as the second pixel 10b (one second pixel row) are arranged in the second direction Y. The noise charges are cancelled by taking the difference between the first pixel signal output from each of the three first pixel rows and the second pixel signal output from the one second pixel row.

[0129] The third arrangement example 30c allows the resolution in the second direction Y to be improved s compared with the second arrangement example 30b, but it becomes more susceptible to the influence of the noise charges caused by parasitic light intensity because three first pixel rows share one second pixel row.

[0130] As described above, the light detection device 1 according to an embodiment includes the first pixel 10a that outputs the first pixel signal corresponding to signal charges and noise charges and the second pixel 10b that outputs the second pixel signal corresponding to noise charges without including signal charges, and therefore, a captured image free from the influence of noise charges caused by parasitic light intensity can be generated by taking the difference between the first pixel signal and the second pixel signal, thereby improving the image quality.

[0131] By keeping the OFG_1 transistor Q4 included in the first pixel 10a on during only the exposure period and the reading period, the first pixel signal can be easily generated. Further, by keeping the OFG_2 transistor Q5 included in the second pixel 10b constantly on, the second pixel signal can be easily generated.

[0132] <Application examples to moving object> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as an apparatus mounted on any type of moving objects such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, and a robot.

[0133] Fig. 25 is a block diagram depicting an example of schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to an embodiment of the present disclosure can be applied.

[0134] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the example depicted in Fig. 25, the vehicle control system 12000 includes a driving system control unit 12010, a body system control unit 12020, an outside-vehicle information detecting unit 12030, an in-vehicle information detecting unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output section 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0135] The driving system control unit 12010 controls the operation of devices related to the driving system of the vehicle in accordance with various kinds of programs. For example, the driving system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0136] The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lamps such as a headlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lamps, or the like of the vehicle.

[0137] The outside-vehicle information detecting unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected with an imaging section 12031. The outside-vehicle information detecting unit 12030 makes the imaging section 12031 image an image of the outside of the vehicle, and receives the imaged image. On the basis of the received image, the outside-vehicle information detecting unit 12030 may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.

[0138] The imaging section 12031 is an optical sensor that receives light, and which outputs an electric signal corresponding to a received light amount of the light. The imaging section 12031 can output the electric signal as an image, or can output the electric signal as information about a measured distance. In addition, the light received by the imaging section 12031 may be visible light, or may be invisible light such as infrared rays or the like.

[0139] The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is, for example, connected with a driver state detecting section 12041 that detects the state of a driver. The driver state detecting section 12041, for example, includes a camera that images the driver. On the basis of detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver, or may determine whether the driver is dozing.

[0140] The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device on the basis of the information about the inside or outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, following driving based on a following distance, vehicle speed maintaining driving, a warning of collision of the vehicle, a warning of deviation of the vehicle from a lane, or the like.

[0141] In addition, the microcomputer 12051 can perform cooperative control intended for automated driving, which makes the vehicle to travel automatedly without depending on the operation of the driver, or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like on the basis of the information about the outside or inside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040.

[0142] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information about the outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlamp so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit 12030.

[0143] The sound / image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying information to an occupant of the vehicle or the outside of the vehicle. In the example of Fig. 25, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are illustrated as the output device. The display section 12062 may, for example, include at least one of an on-board display and a head-up display.

[0144] Fig. 26 is a diagram depicting an example of the installation position of the imaging section 12031.

[0145] In Fig. 26, the imaging section 12031 includes imaging sections 12101, 12102, 12103, 12104, and 12105.

[0146] The imaging sections 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging section 12101 provided to the front nose and the imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle 12100. The imaging sections 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging section 12104 provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle 12100. The imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

[0147] Incidentally, Fig. 26 depicts an example of photographing ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided to the front nose. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging sections 12102 and 12103 provided to the sideview mirrors. An imaging range 12114 represents the imaging range of the imaging section 12104 provided to the rear bumper or the back door. A bird fs-eye image of the vehicle 12100 as viewed from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104, for example.

[0148] At least one of the imaging sections 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera constituted of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0149] For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km / hour). Further, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that makes the vehicle travel automatedly without depending on the operation of the driver or the like.

[0150] For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects on the basis of the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display section 12062, and performs forced deceleration or avoidance steering via the driving system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.

[0151] At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether or not there is a pedestrian in imaged images of the imaging sections 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the imaged images of the imaging sections 12101 to 12104 as infrared cameras and a procedure of determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the imaged images of the imaging sections 12101 to 12104, and thus recognizes the pedestrian, the sound / image output section 12052 controls the display section 12062 so that a square contour line for emphasis is displayed so as to be superimposed on the recognized pedestrian. The sound / image output section 12052 may also control the display section 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.

[0152] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging section 12031 or the like, of the configurations described above.

[0153] Note that the present technology may also take the following configurations. (1) A light detection device, including: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor. (2) The light detection device according to (1), further including a floating diffusion region configured to hold one of an output of the first charge holding unit and an output of the second charge holding unit. (3) The light detection device according to any one of (1) to (2), further including: a pixel circuit configured to generate a first pixel signal corresponding to one of the output of the first charge holding unit and a second pixel signal corresponding to the output of the second charge holding unit; and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal. (4) The light detection device according to any one of (1) to (3), further including: a first floating diffusion region configured to store an output of the first charge holding unit; and a second floating diffusion region configured to store an output of the second charge holding unit. (5) The light detection device according to any one of (1) to (4), further including: a first pixel circuit configured to generate a first pixel signal corresponding to the first floating diffusion region; a second pixel circuit that generates a second pixel signal corresponding to the second floating diffusion region; and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal. (6) The light detection device according to any one of (1) to (5), further including: a first pixel group including two or more first pixels arranged in a first direction; and a second pixel group including two or more second pixels arranged in the first direction, wherein the first pixel group and the second pixel group are arranged in a second direction crossing the first direction. (7) The light detection device according to any one of (1) to (6), further including: a plurality of first pixel groups arranged in the second direction; and a plurality of second pixel groups arranged in the second direction. (8) The light detection device according to any one of (1) to (7), wherein at least one first pixel group of the plurality of first pixel groups and at least one second pixel group of the plurality of second pixel groups are arranged alternately in the second direction. (9) The light detection device according to any one of (1) to (8), wherein a plurality of pixels are arranged in a Bayer array in which two or more pixels of a same color are arranged adjacently. (10) The light detection device according to any one of (1) to (9), further including at least one of: a plurality of on-chip lenses, wherein each on-chip lens is positioned over a respective pixel in a pixel block; and an on-chip lens positioned over the pixel block. (11) The light detection device according to any one of (1) to (10), wherein each of the plurality of on-chip lenses corresponds to a respective pixel in the pixel block and one or more pixels in the pixel block are image plane phase difference pixels. (12) The light detection device according to any one of (1) to (11), wherein two or more first pixels are arranged along a direction and two or more second pixels are arranged along the direction. (13) The light detection device according to any one of (1) to (12), wherein one second pixel is arranged between the two or more first pixels in the direction. (14) The light detection device according to any one of (1) to (13), wherein the noise charges are cancelled by taking a difference between first pixel signals output from each of the two or more first pixels and a corresponding second pixel signal output from the one second pixel. (15) The light detection device according to any one of (1) to (14), wherein during an exposure period of the second pixel and a period of reading a pixel signal output by the second pixel, the second discharge transistor remains on and the pixel signal is output to a signal line while a transfer transistor of the second pixel and a pixel transistor configured to generate the pixel signal are off. (16) The light detection device according to any one of (1) to (15), further including a semiconductor layer in which a plurality of photoelectric conversion regions, a plurality of charge holding units, a plurality of pixel separation regions, and a plurality of photoelectric conversion devices are arranged, wherein: the plurality of photoelectric conversion devices are arranged within the plurality of photoelectric conversion regions, the plurality of photoelectric conversion devices include a first photoelectric conversion device and a second photoelectric conversion device, the plurality of charge holding units include a first charge holding unit and a second charge holding unit, the plurality of pixel separation regions separate the plurality of photoelectric conversion regions, and at least one pixel separation region of the plurality of pixel separation regions has a length in a depth direction less than a length of the plurality of photoelectric conversion regions in the depth direction. (17) The light detection device according to any one of (1) to (16), wherein a first pixel separation region of the plurality of pixel separation regions is located on a transfer path that transfers charges accumulated in each of the plurality of photoelectric conversion devices to a corresponding charge holding unit, and wherein the first pixel separation region has a length in the depth direction less than a length in the depth direction of a pixel separation region not located on the transfer path. (18) The light detection device according to any one of (1) to (17), further including an insulation layer disposed on a surface of the semiconductor layer opposite to a light-incident surface, wherein one or more pixel separation regions located on the transfer path are not in contact with the insulation layer. (19) A pixel array, including: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor. (20) A semiconductor device, including: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

[0154] The aspects of the present disclosure are not limited to the above-mentioned individual embodiments and include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-mentioned content. That is, various additions, modifications, and partial deletions are possible without departing from the conceptual idea and essence of the present disclosure derived from the content defined in the claims and their equivalents.

[0155] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

[0156] 1 light detection device 2 electronic apparatus 3 imaging lens 4 processing unit 5 control unit 6 recording unit 7 transmission line 8 control line 10 pixel 10a first pixel 10b second pixel 11 pixel array unit 12 vertical drive circuit 13 column signal processing circuit 14 horizontal drive circuit 15 output circuit 16 control circuit 17 row selection line 18 AD converter 20 pixel circuit 20a first pixel circuit 20b second pixel circuit 21 first substrate 22 second substrate 23 logic circuit 30c first to third arrangement examples 31 first pixel group 32 wire 33 second pixel group 34 wire 35 FD wire 41 first row region 42 photoelectric conversion region 42a penetrating region 42b non-penetrating region 43 second row region 44 third row region 45 fourth row region 46 first pixel separation region 47 second pixel separation region 48 third pixel separation region 49 fourth pixel separation region 50 on-chip lens 51 semiconductor layer 52 color filter layer 53 on-chip lens layer 54 wiring layer 55 SiN layer 56 region 57 n region 58 p region 59 region 60 first diffusion region 61 region 62 n region 63 p region 64 region 65 second diffusion region 66 charge capture unit 67 p region 68 region 69 third diffusion region

Claims

1. A light detection device, comprising: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

2. The light detection device according to claim 1, further comprising a floating diffusion region configured to hold one of an output of the first charge holding unit and an output of the second charge holding unit.

3. The light detection device according to claim 2, further comprising: a pixel circuit configured to generate a first pixel signal corresponding to one of the output of the first charge holding unit and a second pixel signal corresponding to the output of the second charge holding unit; and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal.

4. The light detection device according to claim 1, further comprising: a first floating diffusion region configured to store an output of the first charge holding unit; and a second floating diffusion region configured to store an output of the second charge holding unit.

5. The light detection device according to claim 4, further comprising: a first pixel circuit configured to generate a first pixel signal corresponding to the first floating diffusion region; a second pixel circuit that generates a second pixel signal corresponding to the second floating diffusion region; and a signal processing circuit configured to generate a digital signal corresponding to a difference between the first pixel signal and the second pixel signal.

6. The light detection device according to claim 1, further comprising: a first pixel group including two or more first pixels arranged in a first direction; and a second pixel group including two or more second pixels arranged in the first direction, wherein the first pixel group and the second pixel group are arranged in a second direction crossing the first direction.

7. The light detection device according to claim 6, further comprising: a plurality of first pixel groups arranged in the second direction; and a plurality of second pixel groups arranged in the second direction.

8. The light detection device according to claim 7, wherein at least one first pixel group of the plurality of first pixel groups and at least one second pixel group of the plurality of second pixel groups are arranged alternately in the second direction.

9. The light detection device according to claim 1, wherein a plurality of pixels are arranged in a Bayer array in which two or more pixels of a same color are arranged adjacently.

10. The light detection device according to claim 1, further comprising at least one of: a plurality of on-chip lenses, wherein each on-chip lens is positioned over a respective pixel in a pixel block; and an on-chip lens positioned over the pixel block.

11. The light detection device according to claim 10, wherein each of the plurality of on-chip lenses corresponds to a respective pixel in the pixel block and one or more pixels in the pixel block are image plane phase difference pixels.

12. The light detection device according to claim 1, wherein two or more first pixels are arranged along a direction and two or more second pixels are arranged along the direction.

13. The light detection device according to claim 12, wherein one second pixel is arranged between the two or more first pixels in the direction.

14. The light detection device according to claim 13, wherein the noise charges are cancelled by taking a difference between first pixel signals output from each of the two or more first pixels and a corresponding second pixel signal output from the one second pixel.

15. The light detection device according to claim 1, wherein during an exposure period of the second pixel and a period of reading a pixel signal output by the second pixel, the second discharge transistor remains on and the pixel signal is output to a signal line while a transfer transistor of the second pixel and a pixel transistor configured to generate the pixel signal are off.

16. The light detection device according to claim 1, further comprising a semiconductor layer in which a plurality of photoelectric conversion regions, a plurality of charge holding units, a plurality of pixel separation regions, and a plurality of photoelectric conversion devices are arranged, wherein: the plurality of photoelectric conversion devices are arranged within the plurality of photoelectric conversion regions, the plurality of photoelectric conversion devices include a first photoelectric conversion device and a second photoelectric conversion device, the plurality of charge holding units include a first charge holding unit and a second charge holding unit, the plurality of pixel separation regions separate the plurality of photoelectric conversion regions, and at least one pixel separation region of the plurality of pixel separation regions has a length in a depth direction less than a length of the plurality of photoelectric conversion regions in the depth direction.

17. The light detection device according to claim 16, wherein a first pixel separation region of the plurality of pixel separation regions is located on a transfer path that transfers charges accumulated in each of the plurality of photoelectric conversion devices to a corresponding charge holding unit, and wherein the first pixel separation region has a length in the depth direction less than a length in the depth direction of a pixel separation region not located on the transfer path.

18. The light detection device according to claim 17, further comprising an insulation layer disposed on a surface of the semiconductor layer opposite to a light-incident surface, wherein one or more pixel separation regions located on the transfer path are not in contact with the insulation layer.

19. A pixel array, comprising: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

20. A semiconductor device, comprising: a first pixel, including: a first photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a first charge holding unit that holds the signal charges accumulated by the first photoelectric conversion device and noise charges caused by parasitic light intensity, and a first discharge transistor; a second pixel, including: a second photoelectric conversion device that accumulates signal charges corresponding to an amount of incident light, a second charge holding unit that holds the noise charges without holding the signal charges accumulated by the second photoelectric conversion device, and a second discharge transistor; and a wire connecting a gate of the first transistor to a gate of the second transistor.

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