Radar sensor assembly, method, computer program product

Abstract

The invention relates to a radar sensor assembly (10) for capturing an environment, comprising: - an input interface (110), which is designed for receiving an input signal (1), - a digital-analogue sequencer (120), which is designed to sequence the input signal (1) to form a digital transmission signal (2), - an analogue-digital sequencer (140), which is designed to sequence the digital radar echo signal (6) to form a digital output signal (7), and - an output interface (150), which is designed to emit the digital output signal (7), wherein at least the input interface (110), the digital-analogue sequencer (120), the analogue-digital sequencer (140) and the output interface (150) are provided by a single field-programmable gate array (100). The invention further relates to a method, to a computer program product and to a computer-readable storage medium.

Description

The invention relates to a radar sensor assembly, to a method for operating a sensor assembly, to a computer program product and to a computer-readable storage medium. Radar technology plays an indispensable role in accurately detecting and interpreting environmental data. In particular in combination with assistance systems, radar sensors allow reliable 360-degree detection of the environment around a vehicle and thus significantly improve road traffic safety. The same applies to the use of radar sensors in the field of traffic safety technology, where they are used in stationary and mobile traffic safety systems. This necessitates a wide range of requirements for the development, production and field use of radar sensors. The requirements result in complex signal path architectures having to be provided. It is therefore an object of the present invention to cover as many of the requirements as possible. In particular, it is an object of the invention to provide a radar sensor assembly, a method for operating a radar sensor assembly, a computer-implemented method and a computer-readable storage medium which allow production and reliable operation of a radar sensor assembly, in particular in an efficient manner. The above object is achieved by a radar sensor assembly, by a method, by a computer program product and by a computer-readable storage medium. Further features and details of the invention result from the dependent claims, the description, and the drawings. In this case, features and details which are described in the context of the radar sensor assembly according to the invention are of course also applicable in the context of the method according to the invention and / or in the context of the computer program product according to the invention and / or in the context of the computer-readable storage medium according to the invention and vice versa in each case, and so the disclosure relating to the individual aspects of the invention always mutually relates, or may relate, to the other aspects of the invention. According to the invention, provision is made for a radar sensor assembly for detecting an environment, comprising: - an input interface, which is designed to receive an input signal, - a digital-analog sequencer, which is designed to sequence the input signal into a digital transmission signal, - a digital-to-analog converter, which is designed to convert the digital transmission signal into an analog transmission signal, - a radar front end, which is designed to emit a radar signal corresponding to the analog transmission signal into the environment and to receive an analog radar echo signal, - an analog-to-digital converter, which is designed to convert the analog radar echo signal into a digital radar echo signal, - an analog-digital sequencer, which is designed to sequence the digital radar echo signal into a digital output signal, and - an output interface, which is designed to emit the digital output signal, wherein at least the input interface, the digital-analog sequencer, the analog-digital sequencer and the output interface are provided by a single field-programmable gate array. In other words, provision is made for a device for sensing information about an environment, in particular of a vehicle, which comprises at least one input for accepting input information, a DA sequencer for transferring the input information into transmission information, a DA converter for converting the transmission information into analog information, a radar transceiver for transmitting radar radiation corresponding to the analog information and receiving the echo caused by the radar radiation in the environment, an AD converter for converting the echo into digital radar echo information, an AD sequencer for transferring the digital radar echo information into digital output information, and an output for transmitting the digital output information, wherein at least the input, the DA sequencer, the AD sequencer and the output are provided by a single field-programmable gate array. A radar sensor assembly can be understood to be a group of elements which are intended to be assembled together and to form a functional unit. Provision can be made for the components of the radar sensor assembly to be arranged in a housing. Alternatively or in addition, provision can likewise be made for at least one component, in particular those components which are not arranged on the field-programmable gate array (also referred to as FPGA), to be arranged in the assembly at a distance from said array. In particular, the radar front end can thus be arranged flexibly for detecting the environment, in particular on a vehicle and / or in a mobile or stationary traffic safety system. The radar sensor assembly can be understood to be part of a radar sensor. The radar sensor can comprise further devices, in particular at least a processor, a main memory or a network interface. The processor can be designed to evaluate the radar echo signal, in particular processed to form the output signal. Alternatively or in addition, the output signal can be evaluated at least partially in the field-programmable gate array. The processor can furthermore be designed to provide an input signal. The evaluation can comprise converting the radio echo signal into environmental information. The main memory of a radar sensor can be understood to be a central memory area, which is designed for the intermediate storage of data and can be connected to the processor in particular via a fast data bus and / or a specific interface. Detecting the environment can include object recognition. Objects can be, in particular, vehicles, pedestrians, bicycles and other obstacles in the environment, in particular the environment of a vehicle and / or of a mobile or stationary traffic safety system. Furthermore, the detection of the environment can also comprise a distance measurement and / or an angular measurement. In other words, provision can be made for measuring a distance and / or an angle to an object. The detection of the environment can likewise comprise measuring at least one speed. Furthermore, provision can be made for the detection to be designed to be an allround detection (in particular 360°) of the environment. The detection of the environment can be used as input data for an assistance system of a vehicle and / or of a mobile or stationary traffic safety system. An input interface can be understood to be a point which allows external data, signals or information to be received. Provision can be made for the input interface to be designed at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. The input interface can be designed to receive data from a processor. The processor can be part of a radar sensor which comprises the radar sensor assembly. The digital-analog sequencer is designed to sequence the input signal into a digital transmission signal. In other words, the input signal is converted into a transmission signal which is specific to the radar front end. The transmission signal can be adapted to the radar front end. Provision can be made for the digital-analog sequencer to be designed at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. Provision can be made for a plurality of digital-analog sequencers to operate in parallel. A digital-to-analog converter (DAC) can be understood to be an electronic device or circuit which converts digital signals into analog signals. The conversion can comprise converting a digital value into a corresponding analog voltage or current intensity. The digital-to-analog converter can be designed to be a circuit, in particular an integrated circuit (IC). Provision can be made for a plurality of digital-to-analog converters, in particular connected in parallel, to be provided in order to convert even complex digital transmission signals into corresponding analog transmission signals. The radar front end is designed to emit a radar signal corresponding to the analog transmission signal into the environment and to receive an analog radar echo signal. For this purpose, at least one antenna can be provided on the radar front end in order to emit and / or absorb electromagnetic radiation. Furthermore, a separate receiving and transmitting antenna can be provided in each case. An analog-to-digital converter (ADC) can be understood to be an electronic device or circuit which converts analog signals into digital signals. The conversion can comprise converting an analog voltage into a corresponding digital value. The analog-to-digital converter can be designed to be a circuit, in particular an IC. Provision can be made for a plurality of analog-to-digital converters, in particular connected in parallel, to be provided in order to convert even complex analog radar echo signals into corresponding digital radar echo signals. The analog-digital sequencer is designed to sequence the digital radar echo signal into a digital output signal. In other words, the digital radar echo signal is converted into an output signal in which information about the environment, contained in the echo signal, is processed, in particular temporally. Provision can be made for the digital-analog sequencer to be designed at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. Provision can be made for a plurality of analog-digital sequencers to operate in parallel. The output interface can be understood to be a point which allows data, signals or information, in particular the output signal, to be transmitted. Provision can be made for the output interface to be designed at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. The output interface can be designed to transmit data to the processor of the radar sensor. A field-programmable gate array can be understood to be an IC which is designed to load a logic circuit as data and behave according to the logic of the circuit data. The field-programmable gate array can be designed to be a single chip. Providing the input interface, the digitalanalog sequencer, the analog-digital sequencer, the output interface and any further components can be understood to mean that a configuration file of the field-programmable gate array contains specifications for interconnecting the logic of the field-programmable gate array in such a way that the switching logic of these components are mapped by the field-programmable gate array. Overall, the radar sensor assembly according to the invention offers the advantage of versatile use in development, production and in the field, in particular in that it supports the development process, can be produced in a quality-assuring manner and can be operated reliably. A three-stage signal path architecture results from the described construction. The FGPA provides at least the input interface, the digital-analog sequencer, the analog-digital sequencer and the output interface, and processes exclusively digital signals. The digital-to-analog converter and analog-to-digital converter form the interface to the analog-operating radar front end. This results in three complexes of the circuit: The first corresponds to the digital logic and is implemented in the field-programmable gate array. The second complex maps the analog and mixed signal chain of the radar sensor assembly. The third complex is the radar front end. The routing of the analog and digital signals through the complexes is able to be configured digitally, in particular in the field-programmable gate array. As a result of this three-stage construction, the radar sensor assembly can be operated in a series of operating or test modes, some of which will be described below. As a result, the development process is supported, the production quality is ensured and the reliable operation in the field is always ensured. Provision can be made, within the scope of the invention, for a delay device to be provided, which is designed to receive the digital transmission signal and guide it to the analog-digital sequencer and / or to start the conversion of the analog radar echo signal into the digital radar echo signal at the analog-to-digital converter by sending a start command. Furthermore, provision can be made for the delay device to wait for a predetermined delay duration (also referred to as a delay) before forwarding and / or upon starting. The delay duration can be designed to establish temporal synchronization, in particular between the analog-to-digital converter and the analog-digital sequencer. This achieves the advantage that exactly the correct reception sample of the digital radar echo signal is assigned to each sample of the analog or synthetic radar echo signal. Further processing thereof is thus simplified. Furthermore, provision can be made for the delay device to be provided by the single field-programmable gate array. This offers the advantage that, in particular, the connection to the analog-digital sequencer can take place directly and virtually without delay, and so undesired delays can be reliably avoided. Provision can be made for the delay element to receive signals from the digital-analog sequencer, forward them to the analog-digital sequencer and / or forward the start signal to the analog-to-digital converter, in particular after a delay duration. The delay device can furthermore be designed such that indices of a sequence of samples of the digital transmission signal coincide exactly with corresponding indices of the sequence of the analog and / or digital radar echo signal. In the main memory of the processor, modulation values and associated reception samples then lie on the same indices for further processing. Within the scope of the invention, it is conceivable that provision is made for a multiplexer, which is designed to forward the analog radar echo signal and its phase information or the analog transmission signal of the digital-to-analog converter. Furthermore, provision can be made for these signals to be forwarded to the analog-to-digital converter and / or to a preamplifier which is connected upstream of the analog-to-digital converter. The multiplexer can be designed to select either the analog radar echo signal or the analog transmission signal and to switch it through to the output of the multiplexer. A plurality of multiplexers can also be operated in parallel. Providing a multiplexer offers the advantage that the signal processing as a whole becomes testable and possible errors can thus be identified. The multiplexer can be designed to be its own electrical circuit, in particular an IC, and / or separately from the field-programmable gate array. Provision can be made, within the scope of the invention, for at least the digital-to-analog converter or the analog-to-digital converter to be designed as independent electrical components or as part of a digital-analog module. In other words, provision can be made for the aforementioned components not to be provided by the field-programmable gate array. Furthermore, it is conceivable that provision is made for a preamplifier, which is designed to amplify the analog radar echo signal and to forward it to the analog-to-digital converter. Provision can be made for the preamplifier to be designed to amplify the analog radar echo signal such that, after the amplification, it lies in an operating range of the analog-to-digital converter. This achieves the advantage that the signal quality of the digital radar echo signal provided by the analog-to-digital converter is particularly high and the signal is not cut off or noisy. It is also conceivable for the digital-to-analog converter to be furthermore designed to transmit synthetic analog radar echo signals to the analog-to-digital converter, in particular in an analog simulation mode. In other words, provision can be made for the radar front end to be coupled out of the signal path and for its operation to be simulated. This provides the possibility of testing the operability of the first two complexes separately from the radar front end. The analog simulation mode can be used for this purpose, for example, during the manufacturing prior to the connection to the radar front end. In this way, faulty assemblies can be identified and either repaired or replaced. However, the analog simulation mode can also be used in the field and / or in the error analysis in order to locate the cause of a malfunction. For this purpose, provision can be made for an environment, in particular a road scene, to be digitally calculated in the field-programmable gate array and / or an external processor and fed in as an input signal to the input interface. Furthermore, provision can be made for the digital-to-analog converter to output precalculated analog radar echo signals (that is to say synthetic reception samples) in this case. The precalculated analog radar echo signals can then be supplied to the analog-to-digital converter via the multiplexer and / or the preamplifier. Provision can be made for the delay element to predefine the correct time of the analog-to-digital converter for digitizing. The output signal that is output by the output interface can then be read in by a processor. As a result, the precalculated analog radar echo signals are supplied to the measurement algorithm. Within the scope of the invention, it is optionally possible for the field-programmable gate array to be designed to process, in particular in a digital simulation mode, the input signal exclusively within the field-programmable gate array to form a digital output signal. In other words, the field-programmable gate array can enable a bypass mode in which the signals are forwarded and processed only within the field-programmable gate array and the behavior of the components that are separate from the field-programmable gate array is simulated. In this case, provision can be made for an environment, in particular a road scene, to be digitally calculated in particular by a processor and / or the field-programmable gate array and to be output in particular exclusively via the components provided by the field-programmable gate array. Consequently, in this case all the calculated samples are output again purely digitally and bit-accurately on the output sections, bypassing the digital-to-analog converter and ana-log-to-digital converter, and are read in, in particular at the processor. As a result, the synthetic reception samples are fed back to the measurement algorithm. This mode can be used particularly advantageously, for example, during the development of the algorithm, in the production, but also at a later time, in order to identify and either replace or repair faulty field-programmable gate arrays. Furthermore, provision can be made, within the scope of the invention, for a network interface to be provided, which is designed to feed in, in particular in a reproduction mode, a synthetic and / or recorded radar echo signal which can be transmitted to the analog-to-digital converter in an analog manner via the digital-to-analog converter or is processed digitally, in particular exclusively, within the field-programmable gate array to form a digital output signal. In other words, the network interface can feed a recorded or synthetic environment, in particular a road scene, into the input interface of the FPGA via the main memory of the radar sensor and reproduce it in a analog or digital manner through the signal paths of the measurement algorithm at the correct time. Provision can be made for it to be possible for the output signal to be read out via the network interface in addition to the output interface. In this way, the operability of further devices, in particular those downstream of the radar front end, can be checked. With regard to the present invention, it is conceivable for the field-programmable gate array to be furthermore designed to impress, in particular in a signal test mode, an input signal, designed as a test function, on the digital-to-analog converter via the input interface, to forward it to the analog-to-digital converter and to extract an output signal, designed as a result function, again via the output interface. Provision can be made for fast Fourier transforms (FFTs) and / or linear regressions to be applied to the measurement value sequence at the output of the analog-to-digital converter. The FFTs are used to determine noise levels in the analog chains and the signal thereof. Noise ratios, electrostatic discharge damage (ESD damage) in semiconductors and non-linearities in operational amplifiers, defective resistors, capacitors and signal path interruptions can thus be determined or identified. The linear regression makes it possible to compare digital-to-analog converters with analog-to-digital converters. The values of the residuals of the linear regression make it possible to quantify the comparison result. Defective and / or cracked capacitors in the signal paths can thus likewise be identified for the most part because, in the event of a fault, they typically show glitches in their measured voltage values due to jumps in capacitance. In this case, the residuals of the linear regressions show values which deviate from the normal case. The above object is furthermore achieved by a method according to the invention for operating a radar sensor assembly for detecting an environment, in particular a radar sensor assembly according to the invention, wherein, in a measurement mode, - an input interface receives an input signal, - a digital-analog sequencer sequences the input signal into a digital transmission signal, - a digital-to-analog converter converts the digital transmission signal into an analog transmission signal, - a radar front end emits a radar signal corresponding to the analog transmission signal into the environment and receives an analog radar echo signal, - an analog-to-digital converter converts the analog radar echo signal into a digital radar echo signal, - an analog-digital sequencer sequences the digital radar echo signal into a digital output signal, and - an output interface emits the digital output signal, wherein at least the input interface, the digital-analog sequencer, the analog-digital sequencer and the output interface are provided by a single field-programmable gate array, and at least one further operating mode, in particular at least an analog simulation mode, a digital simulation mode, a reproduction mode or a signal test mode, is provided for testing at least one component of the radar sensor assembly. The method can be designed to be a computer-implemented method. The method steps can run at least partially simultaneously and / or temporally successively, wherein the sequence of the method steps is not limited by the specified sequence, and so individual steps are able to be carried out in different sequences. Furthermore, individual or all steps can be carried out repeatedly. This results in the same advantages with regard to a method according to the invention as have already been described with regard to a radar sensor assembly according to the invention. Furthermore, it is conceivable, in an analog simulation mode, for the digital-to-analog converter to transmit synthetic analog radar echo signals to the analog-to-digital converter. The analog simulation mode can be used for this purpose, for example, during the manufacturing prior to the connection to the radar front end. In this way, faulty assemblies can be identified and either repaired or replaced. However, the analog simulation mode can also be used in the field and / or in the error analysis in order to locate the cause of a malfunction. For this purpose, provision can be made for an environment, in particular a road scene, to be digitally calculated in the field-programmable gate array and / or an external processor and fed in as an input signal to the input interface. Furthermore, provision can be made for the digital-to-analog converter to output precalculated analog radar echo signals (that is to say synthetic reception samples) in this case. The precalculated analog radar echo signals can then be supplied to the analog-to-digital converter via the multiplexer and / or the preamplifier. Provision can be made for the delay element to predefine the correct time of the analog-to-digital converter for digitizing. The output signal that is output by the output interface can then be read in by a processor. As a result, the precalculated analog radar echo signals are supplied to the measurement algorithm. Within the scope of the invention, it can be advantageous, in a digital simulation mode, for the input signal to be processed exclusively within the field-programmable gate array to form a digital output signal. In other words, the field-programmable gate array can enable a bypass mode in which the signals are forwarded and processed only within the field-programmable gate array and the behavior of the components that are separate from the field-programmable gate array is simulated. In this case, provision can be made for an environment, in particular a road scene, to be digitally calculated in particular by a processor and / or the field-programmable gate array and to be output, in particular exclusively, via the components provided by the field-programmable gate array. Consequently, in this case all the calculated samples are output again purely digitally and bit-accurately on the output sections, bypassing the digital-to-analog converter and analog-to-digital converter, and are read in, in particular at the processor. As a result, the synthetic reception samples are fed back to the measurement algorithm. This operating mode in particular allows the field-programmable gate array to be checked for the correct operability. This mode can be used particularly advantageously, for example, during the development of the measurement algorithm, in the production, but also at a later time, in order to identify and either replace or repair faulty field-programmable gate arrays. Within the scope of the invention, it is conceivable, in a reproduction mode, for a synthetic and / or recorded analog radar echo signal to be fed in via a network interface, impressed on the digital-to-analog converter and forwarded to the analog-to-digital converter or processed digitally, in particular exclusively, within the field-programmable gate array to form a digital output signal. In other words, the network interface can fill the main memory of the radar sensor with a recorded or synthetic environment, in particular a road scene. From there, it can be fed into the input interface of the FPGA and reproduced in an analog and / or digital manner through the signal paths at the correct time, output on the output interface and finally supplied to the measurement algorithm. Provision can be made for it to be possible for the output signal to be read out via the network interface in addition to the output interface, conveyed via the main memory of the radar sensor. In this way, the operability of further devices, in particular those downstream of the radar front end, can be checked. Provision can be made, within the scope of the invention, in a signal test mode, for the field-programmable gate array to impress an input signal, designed as a test function, on the digi-tal-to-analog converter via the input interface, forward it to the analog-to-digital converter and extract it again via the output interface as an output signal designed as a result function. Provision can be made for fast Fourier transforms (FFTs) and / or linear regressions to be applied to the measurement value sequence at the output of the analog-to-digital converter. The FFTs are used to determine noise levels in the analog chains and the signal thereof. Noise ratios, electrostatic discharge damage (ESD damage) in semiconductors and non-linearities in operational amplifiers, defective resistors, capacitors and signal path interruptions can thus be identified. The linear regression makes it possible to compare digital-to-analog converters with analog-to-digital converters. The values of the residuals of the linear regression make it possible to quantify the comparison result. Defective, cracked capacitors in the signal paths can thus likewise be identified for the most part because, in the event of a fault, they typically show glitches in their measured voltage values due to jumps in capacitance. In this case, the residuals of the linear regressions show values which deviate from the normal case. The above object is furthermore achieved by a computer program product according to the invention, comprising commands which, when the program is executed by a computer, in particular by a radar sensor assembly according to the invention, cause the latter to carry out a method according to the invention. This results in the same advantages with regard to a computer program product according to the invention as have already been described with regard to a radar sensor assembly according to the invention and / or a method according to the invention. The above object is furthermore achieved by a computer-readable storage medium comprising commands which, when executed by a computer, in particular by a radar sensor assembly according to the invention, cause the latter to carry out a method according to the invention. This results in the same advantages with regard to a computer-readable storage medium according to the invention as have already been described with regard to a radar sensor assembly according to the invention and / or a method according to the invention and / or a computer program product according to the invention. Further advantages, features and details of the invention will be apparent from the description that follows, in which a number of exemplary embodiments of the invention are described in detail with reference to the drawings. It may be the case here that the features mentioned in the claims and in the description are essential to the invention individually or in any combination. In the drawings: Fig. 1 shows a radar sensor assembly in a measurement mode, Fig. 2 shows a radar sensor assembly in an analog simulation mode, and Fig. 3 shows a radar sensor assembly in a digital simulation mode. Figure 1 shows a radar sensor assembly 10 for detecting an environment. According to the invention, the radar sensor assembly 10 has an input interface 110, which is designed to receive an input signal 1, a digital-analog sequencer 120, which is designed to sequence the input signal 1 into a digital transmission signal 2, a digital-to-analog converter 210, which is designed to convert the digital transmission signal 2 into an analog transmission signal 3, a radar front end 300, which is designed to emit a radar signal 4 corresponding to the analog transmission signal 3 into the environment and to receive an analog radar echo signal 5, an analog-to-digital converter 240, which is designed to convert the analog radar echo signal 5 into a digital radar echo signal 6, an analog-digital sequencer 140, which is designed to sequence the digital radar echo signal 6 into a digital output signal 7, and an output interface 150, which is designed to emit the digital output signal 7. In this case, at least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140 and the output interface 150 are provided by a single field-programmable gate array 100. Overall, the radar sensor assembly 10 according to the invention offers the advantage that it supports development processes, can be produced in a quality-assuring manner and can be operated reliably. A three-stage signal path architecture results from the described construction. The FGPA provides at least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140 and the output interface 150, and processes exclusively digital signals. The digital-to-analog converter 210 and analog-to-digital converter 240 form the interface to the analog-operating radar front end 300. This results in three complexes of the circuit: The first corresponds to the digital logic and is implemented in the field-programmable gate array 100. The second complex maps the analog and mixed signal chain of the radar sensor assembly 10. The third complex is the radar front end 300. The routing of the analog and digital signals through the complexes is able to be configured digitally, in particular in the field-programmable gate array 100. As a result of this three-stage construction, the radar sensor assembly 10 can be operated in a series of operating or test modes, some of which will be described below. As a result, the development process is supported, the manufacturing quality is improved, and safe operation is also always ensured. The different further operating modes II, III, IV, V are explained in conjunction with Figures 2 to 3. The further configurations of the device are explained with reference to Figure 1. These can also relate to the exemplary embodiments illustrated in Figures 2 to 3. Provision can be made, within the scope of the invention, for a delay device 130 to be provided, which is designed to receive the digital transmission signal 2 and guide it to the analogdigital sequencer 140 and / or to start the conversion of the analog radar echo signal 5 into the digital radar echo signal 6 at the analog-to-digital converter 240 by sending a start command. Furthermore, provision can be made for the delay device 130 to wait for a predetermined delay duration, also referred to as a delay, before forwarding and / or upon starting. The delay duration can be designed to establish temporal synchronization, in particular between the analog-to-digital converter 240 and the analog-digital sequencer 140. This achieves the advantage that exactly the correct reception sample of the digital radar echo signal 6 of the analog-digital sequencer 140 is assigned to each sample of the synthetic radar echo signal 8 or analog radar echo signal 5. Further processing thereof is thus simplified. Figure 1 illustrates that the delay device 130 is arranged between the digital-analog sequencer 120 and the analog-digital sequencer 140 and is connected to both. The arrangement can be a logical arrangement within the FPGA programming, which specifies the signal flow. Furthermore, as also illustrated, the delay device 130 can be connected to the analog-to-digital converter 240. The two connections illustrated can be both a connection configured by software and a hardware connection, in particular in the form of at least one conductor track and / or cable. Furthermore, it is conceivable, as illustrated in Figure 1, that provision is made for a multiplexer 220, which is designed to forward the analog radar echo signal 5 and its phase information or the analog transmission signal 3 of the digital-analog converter 210. Furthermore, provision can be made for these signals to be forwarded to the analog-to-digital converter 240 and / or to a preamplifier 230, which is connected upstream of the analog-to-digital converter 240. The multiplexer 220 can be designed to select one from a number of signals, in particular parts of the analog radar echo signal 5 or analog transmission signal 3, and switch it through to the output of the multiplexer 220. Providing a multiplexer 220 offers the advantage that the signal processing as a whole becomes testable and possible faults of the radar sensor assembly 10 can thus be identified. The multiplexer 220 can be designed to be its own electrical circuit, in particular an IC, and / or separately from the field-programmable gate array 100. Furthermore, provision can be made for at least the connection of the multiplexer 220 to the digital-to-analog converter 210, preamplifier 230 or analog-to-digital converter 240 to be designed to be a hardware connection, in particular a conductor track or cable. In Figure 1, the illustration in a separate row is intended to make it clear that provision can be made for at least the digital-to-analog converter 210 or the analog-to-digital converter 240 to be designed to be independent electrical components or to be part of a digital-to-analog module 200. As shown in Figure 1, at least also the multiplexer 220 or the preamplifier 230 can be part of the digital-to-analog module 200. In other words, provision can be made for the aforementioned components not to be provided by the field-programmable gate array 100. It is likewise conceivable, within the scope of the invention, that provision is made for a preamplifier 230, which is designed to amplify the analog radar echo signal 5 and to forward it to the analog-to-digital converter 240. In Figure 1, the preamplifier 230 is arranged between the multiplexer 220 and the analog-to-digital converter 240 and is illustrated connected to them. Provision can be made for the preamplifier 230 to be designed to amplify the analog radar echo signal 5 such that, after the amplification, it lies in an operating range of the analog-to-digital converter 240. This achieves the advantage that the signal quality of the digital radar echo signal provided by the analog-to-digital converter 240 is particularly high and the signal is not cut off or noisy. The radar sensor assembly 10 can have yet further components that are not explicitly illustrated. For example, provision can be made for the components of the radar sensor assembly 10 to be arranged in a housing. Alternatively or in addition, provision can likewise be made for at least one component, in particular those components which are not arranged on the field-programmable gate array 100, to be arranged in the assembly at a distance from said array. The radar sensor assembly 10 can be understood to be part of a radar sensor. The radar sensor can comprise further devices, in particular a processor. The processor can be designed to evaluate the radar echo signal, in particular processed to form the output signal 7. Alternatively or in addition, the output signal 7 can be evaluated at least partially in the field-programmable gate array 100. The processor can furthermore be designed to provide an input signal 1. The evaluation can comprise converting the radio echo signal into environmental information. The signal path in a measurement mode I is illustrated by arrows in Figure 1. The measurement mode I constitutes part of the method for operating the radar sensor assembly 10. Overall, the method, in the measurement mode I, comprises - an input interface 110, which receives an input signal 1, - a digital-analog sequencer 120, which sequences the input signal 1 into a digital transmission signal 2, - a digital-to-analog converter 210, which converts the digital transmission signal 2 into an analog transmission signal 3, - a radar front end 300, which emits a radar signal 4 corresponding to the analog transmission signal 3 into the environment and receives an analog radar echo signal 5, - an analog-to-digital converter 240, which converts the analog radar echo signal 5 into a digital radar echo signal 6, - an analog-digital sequencer 140, which sequences the digital radar echo signal 6 into a digital output signal 7, and - an output interface 150, which emits the digital output signal 7, wherein at least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140, and the output interface 150 are provided by a single field-programmable gate array 100. According to the invention, the method comprises at least one further operating mode II, III, IV, V, in particular at least an analog simulation mode II, a digital simulation mode III, a reproduction mode IV or a signal test mode V, being provided for testing at least one component of the radar sensor assembly 10. The further operating modes II, III, IV, V are described below in the context of Figures 2 to 3. Figure 2 shows, by means of arrows, the situation in an analog simulation mode II, in which the digital-to-analog converter 210 transmits synthetic analog radar echo signals 8 to the an-alog-to-digital converter 240. The digital-to-analog converter 210 can thus be designed to transmit, in an analog simulation mode II, synthetic analog radar echo signals 8 to the analog-to-digital converter 240. This provides the possibility of testing the operability of the first two complexes separately from the radar front end 300. The analog simulation mode II can be used for this purpose, for example, during the manufacturing prior to the connection to the radar front end 300. In this way, faulty assemblies can be identified and either repaired or replaced. However, the analog simulation mode II can also be used in the field and / or in the error analysis in order to locate the cause of a malfunction. For this purpose, provision can be made for an environment, in particular a road scene, to be digitally calculated in the field-programmable gate array 100 and / or an external processor and fed in as an input signal 1 to the input interface 110. Furthermore, provision can be made for the digital-to-analog converter 210 to output precalculated analog radar echo signals 5, that is to say synthetic reception samples, in this case. The precalculated analog radar echo signals 5 can then be supplied to the analog-to-digital converter 240 via the multiplexer 220 and / or the preamplifier 230. Provision can be made for the delay element to specify the correct time of the analog-to-digital converter 240 for digitizing. The output signal 7 that is output by the output interface 150 can then be read in by a processor. As a result, the precalculated analog radar echo signals 5 are supplied to the measurement algorithm. Figure 3 likewise illustrates, using arrows, how, in a digital simulation mode III, the input signal 1 is processed exclusively within the field-programmable gate array 100 to form a digital output signal 7. For this purpose, the field-programmable gate array 100 can be designed to process, in the digital simulation mode III, the input signal 1 exclusively within the field-programmable gate array 100 to form a digital output signal 7. Provision can be made for an environment, in particular a road scene, to be digitally calculated in particular by a processor and / or the field-programmable gate array 100 and to be output, in particular exclusively, via the components provided by the field-programmable gate array 100. Consequently, in this case all the calculated samples are output again purely digitally and bit-accurately to the output sections, bypassing the digital-to-analog converter 210 and analog-to-digital converter 240, and are read in, in particular at the processor. As a result, the synthetic reception samples are fed back to the measurement algorithm. This operating mode in particular allows the field-programmable gate array 100 to be checked for the correct operability. This mode can be used particularly advantageously, for example, during the development, in the production, but also at a later time, in order to identify and either replace or repair faulty field-programmable gate arrays 100. The reproduction mode IV likewise uses the configurations of Figures 2 or 3. The network interface (not shown separately) fills the main memory of the radar sensor with a synthetic radar echo signal 8 or a recorded radar echo signal 9. From there, it is redistributed to the input interface 110 of the FPGA. As a result, the synthetic radar echo signal 8 or the recorded radar echo signal 9 is impressed on the digital-to-analog converter 210, which signal is forwarded from the digital-to-analog converter 210 to the analog-to-digital converter 240 (in particular via the multiplexer 220 and / or the preamplifier 230) or processed digitally, in particular exclusively, within the field-programmable gate array 100 to form a digital output signal 7. The radar sensor can accordingly be designed to receive a synthetic and / or recorded radar echo signal 9, which, according to Figure 2, can be transmitted to the analog-to-digital converter 240 in an analog manner via the digital-to-analog converter 210 or, according to Figure 3, is processed digitally, in particular exclusively, within the field-programmable gate array 100 to form a digital output signal 7. Provision can be made for it to be possible for the output signal 7 to be read out via the network interface in addition or alternatively to the output interface. In this way, the operability of further devices, in particular those downstream of the radar front end 300, can be checked. The signal test mode V likewise uses the configurations of Figures 2 or 3 in that the field-programmable gate array 100 impresses an input signal 1, designed as a test function, on the digital-analog converter 210 via the input interface 110 and the digital-analog sequencer 120, forwards it to the analog-to-digital converter 240 or processes it digitally, in particular exclusively, within the field-programmable gate array 100 to form a digital output signal 7 and extracts it again via the output interface 150. The field-programmable gate array 100 can thus be designed to impress an input signal 1, designed as a test function, on the digital-analog converter 210 via the input interface 110 and the digital-analog sequencer 120, to forward it to the analog-to-digital converter 240 and to extract an output signal 7, designed as a result function, again via the output interface 150. The FFTs are used to determine noise levels in the analog chains of Figure 2 and the signal thereof. Noise ratios, electrostatic discharge damage - ESD damage - in semiconductors and non-linearities in operational amplifiers, defective resistors, capacitors and signal path interruptions can thus be determined or identified. The linear regression makes it possible to compare digital-to-analog converter 210 with ana-log-to-digital converter 240. The values of the residuals of the linear regression make it possible to quantify the comparison result. Defective and / or cracked capacitors in the signal paths can thus likewise be identified for the most part because, in the event of a fault, they typically show glitches in their measured voltage values due to jumps in capacitance. In this case, the residuals of the linear regressions show values which deviate from the normal case. The above explanation of the embodiments describes the present invention exclusively in the context of examples. Of course, individual features of the embodiments can be freely combined with one another, if technically appropriate, without departing from the scope of the present invention. In the figures that follow, the same reference signs are used for the same technical features, even of different exemplary embodiments. List of reference signs 1 input signal 2 digital transmission signal 3 analog transmission signal 4 radar signal 5 analog radar echo signal 6 digital radar echo signal 7 output signal 8 synthetic radar echo signals 9 recorded radar echo signal 10 radar sensor assembly 100 field-programmable gate array 110 input interface 120 digital-analog sequencer 130 delay device 140 analog-digital sequencer 150 output interface 200 digital-to-analog module 210 digital-to-analog converter 220 multiplexer 230 preamplifier 240 analog-to-digital converter 300 I radar front end measurement mode II analog simulation mode III digital simulation mode IV reproduction mode V signal test mode

Claims

Patent claims1. A radar sensor assembly (10) for detecting an environment, comprising:- an input interface (110), which is designed to receive an input signal (1),- a digital-analog sequencer (120), which is designed to sequence the input signal (1) into a digital transmission signal (2),- a digital-to-analog converter (210), which is designed to convert the digital transmission signal (2) into an analog transmission signal (3),- a radar front end (300), which is designed to emit a radar signal (4) corresponding to the analog transmission signal (3) into the environment and to receive an analog radar echo signal (5),- an analog-to-digital converter (240), which is designed to convert the analog radar echo signal (5) into a digital radar echo signal (6),- an analog-digital sequencer (140), which is designed to sequence the digital radar echo signal (6) into a digital output signal (7), and- an output interface (150), which is designed to emit the digital output signal (7), wherein at least the input interface (110), the digital-analog sequencer (120), the analogdigital sequencer (140) and the output interface (150) are provided by a single field-programmable gate array (100).

2. The radar sensor assembly (10) as claimed in claim 1,characterizedin that provision is made for a delay device (130), which is designedto receive the digital transmission signal (2) and guide it to the analog-digital sequencer (140) and / orto start the conversion of the analog radar echo signal (5) into the digital radar echo signal (6) at the analog-to-digital converter (240) by sending a start command.

3. The radar sensor assembly (10) as claimed in claim 1 or 2,characterizedin that provision is made for a multiplexer (220), which is designed to forward the analog radar echo signal (5) and its phase information or the analog transmission signal (3) of the digital-to-analog converter (210).

4. The radar sensor assembly (10) as claimed in one of the preceding claims,characterizedin that at least the digital-to-analog converter (210) or the analog-to-digital converter (240) are designed as independent electrical components or as part of a digital-analog module (200).

5. The radar sensor assembly (10) as claimed in one of the preceding claims, characterizedin that provision is made for a preamplifier (230), which is designed to amplify the analog radar echo signal (5) and to forward it to the analog-to-digital converter (240).

6. The radar sensor assembly (10) as claimed in one of the preceding claims, characterizedin that the digital-to-analog converter (210) is furthermore designed to transmit synthetic radar echo signals (8) to the analog-to-digital converter (240), in particular in an analog simulation mode (II).

7. The radar sensor assembly (10) as claimed in one of the preceding claims, characterizedin that the field-programmable gate array (100) is designed to process, in particular in a digital simulation mode (III), the input signal (1) exclusively within the field-programmable gate array (100) to form a digital output signal (7).

8. The radar sensor assembly (10) as claimed in one of the preceding claims, characterizedin that provision is furthermore made for a network interface, which is designed to feed in, in particular in a reproduction mode (IV), a synthetic radar echo signal (8) and / or recorded radar echo signal (9), which can be transmitted to the analog-to-digital converter (240) in an analog manner via the digital-to-analog converter (210) or is processed digitally, in particular exclusively, within the field-programmable gate array (100) to form a digital output signal (7).

9. The radar sensor assembly (10) as claimed in one of the preceding claims, characterizedin that the field-programmable gate array (100) is furthermore designed to impress, in particular in a signal test mode (V), an input signal (1), designed as a test function, on the digital-to-analog converter (210) via the input interface (110), to forward it to the analog-to-digital converter (240) and to extract an output signal (7), designed as a result function, again via the output interface (150).

10. A method for operating a radar sensor assembly (10) for detecting an environment, in particular as claimed in one of claims 1 to 9, wherein, in a measurement mode (I),- an input interface (110) receives an input signal (1),- a digital-analog sequencer (120) sequences the input signal (1) into a digital transmission signal (2),- a digital-to-analog converter (210) converts the digital transmission signal (2) into an analog transmission signal (3),- a radar front end (300) emits a radar signal (4) corresponding to the analog transmission signal (3) into the environment and receives an analog radar echo signal (5),- an analog-to-digital converter (240) converts the analog radar echo signal (5) into a digital radar echo signal (6),- an analog-digital sequencer (140) sequences the digital radar echo signal (6) into a digital output signal (7), and- an output interface (150) emits the digital output signal (7),wherein at least the input interface (110), the digital-analog sequencer (120), the analogdigital sequencer (140), and the output interface (150) are provided by a single field-programmable gate array (100), andat least one further operating mode (II, III, IV, V), in particular at least an analog simulation mode (II), a digital simulation mode (III), a reproduction mode (IV) or a signal test mode (V), is provided for testing at least one component of the radar sensor assembly (10).

11. A method for operating a radar sensor assembly (10),characterizedin that, in an analog simulation mode (II), the digital-to-analog converter (210) transmits synthetic analog radar echo signals (8) to the analog-to-digital converter (240).

12. A method for operating a radar sensor assembly (10),characterizedin that, in a digital simulation mode (III), the input signal (1) is processed exclusively within the field-programmable gate array (100) to form a digital output signal (7).characterizedin that, in a reproduction mode (IV), a network interface feeds in a synthetic and / or recorded analog radar echo signal (9) and impresses it on the digital-to-analog converter (210), and said signal is forwarded to the analog-to-digital converter (240) oris processed digitally, in particular exclusively, within the field-programmable gate array (100) to form a digital output signal (7).

14. A method for operating a radar sensor assembly (10),characterizedin that, in a signal test mode (V), the field-programmable gate array (100) impresses an input signal (1), designed as a test function, on the digital-to-analog converter (7) via the input interface (110), forwards it to the analog-to-digital converter (240) and extracts it again via the output interface (150) as an output signal (210) designed as a result function.

15. A computer program product comprising commands which, when the program is executed by a computer, in particular by a radar sensor assembly (10) as claimed in one of claims 1 to 9, cause the latter to carry out a method as claimed in one of claims 10 to 14.

16. A computer-readable storage medium comprising commands which, when executed by a computer, in particular by a radar sensor assembly (10) as claimed in one of claims 1 to 9, cause the latter to carry out a method as claimed in one of claims 10 to 14.

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