Device and method for providing safety information

By designing device key memory, master key generator and cryptographic engine in semiconductor devices, the security problem of security information provision in semiconductor devices is solved, and effective protection and secure provision of security information is achieved.

CN111008408BActive Publication Date: 2025-03-18SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN201910771891.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-10-04
Filing Date
2019-08-21
Publication Date
2025-03-18
Estimated Expiration
2039-08-21

AI Technical Summary

Technical Problem

The prior art is difficult to securely provide security information of the demander in semiconductor devices, and it is prone to lead to leakage of security information or inappropriate access.

Method used

Design a semiconductor device, including a device key memory, a master key generator, and a cryptographic engine. The device key provided by the provider is stored through the device key storage, the master key generator generates the demander's master key based on the device key and the demander data, and performs the cryptographic operation based on the master key by the cryptographic engine.

Benefits of technology

It realizes the secure information of the demanders in semiconductor devices, prevents inappropriate access and leakage, and improves the protection level of security information.

✦ Generated by Eureka AI based on patent content.

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Abstract

A semiconductor device for providing security information of a demander includes: a device key memory configured to store a device key provided by a supplier of the semiconductor device; a master key generator configured to generate a master key of the demander based on the device key and demander data provided by the demander by using a first operation shared with the supplier and a second operation shared with the demander; and a cryptographic engine configured to perform cryptographic operations based on the master key.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority benefit of Korean Patent Application No. 10-2018-0118497 filed on October 4, 2018, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Background Art

[0003] It may be necessary to provide security information to prevent improper external access to the product securely. For example, a demander of a component (or part) included in a product (e.g., a manufacturer of the product) may receive a component with its own security information inserted from a supplier of the component, or may provide its own security information to the component during the manufacture of the product. Security information may be relatively securely incorporated into the product, while security information possessed by the demander of the component may be exposed to the supplier of the component and may not be easily changed according to changes in the environment in which the component is used. The demander of the component may easily change its own security information, and due to insecure access to the interface for providing security information, the security information may not be properly protected to prevent improper access to the product. Summary of the invention

[0004] The inventive concept provides an apparatus and method for easily and securely providing security information owned by a demander of a semiconductor device to the semiconductor device.

[0005] According to one aspect of the present invention, there is provided a semiconductor device for providing security information of a demander, the semiconductor device comprising: a device key memory configured to store a device key provided by a supplier of the semiconductor device; a master key generator configured to generate a master key of the demander based on the device key and demander data provided by the demander by using a first operation shared with the supplier and a second operation shared with the demander; and a cryptographic engine configured to perform cryptographic operations based on the master key.

[0006] According to another aspect of the present invention, there is provided a method for operating a semiconductor device for providing security information of a demander, the method comprising: receiving and storing a device key; receiving at least one demander identifier and an encrypted master key of the demander; generating an encryption key based on the device key and at least one demander identifier; generating a master key by decrypting the encrypted master key using the encryption key; and performing cryptographic operations based on the master key.

[0007] According to another aspect of the present invention, a method for providing security information of a demander to a semiconductor device is provided, the method comprising: a supplier of the semiconductor device providing a device key to the semiconductor device; the supplier generating a primary key based on the device key and a primary demander identifier provided by a primary demander; and the supplier providing the primary key to the primary demander.

[0008] According to another aspect of the present invention, a method for providing security information of a demander to a semiconductor device is provided, the method comprising: providing a demander identifier to a supplier of the semiconductor device or a component including the semiconductor device; receiving an encryption key generated based on the demander identifier and a device key provided to the semiconductor device from the supplier of the semiconductor device; encrypting a master key using the encryption key; and providing the demander identifier and the encrypted master key to the semiconductor device.

[0009] According to another aspect of the present invention, there is provided a method for providing security information of a secondary demander to a semiconductor device, which is performed by a primary demander, the method comprising: providing a primary demander identifier to a supplier of the semiconductor device or a component including the semiconductor device; receiving a primary key generated based on the primary demander identifier and a device key provided to the semiconductor device from the supplier; receiving a secondary demander identifier from a secondary demander; generating an encryption key based on the primary key and the secondary demander identifier; and providing the encryption key to the secondary demander.

[0010] According to another aspect of the present invention, a semiconductor device for providing security information of a demander is provided, the semiconductor device comprising: a device key memory configured to store a device key provided by a supplier of the semiconductor device; a master key generator configured to generate a master key of the demander based on the device key and demander data provided by the demander; a master key manager configured to encrypt the master key and decrypt the encrypted master key by using a PUF key generated based on a Physical Unclonable Function (PUF) bit; and a cryptographic engine configured to perform cryptographic operations based on the decrypted master key provided by the master key manager. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Embodiments of the inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 Schematically illustrating an example in which security information of a chip demander is provided to a chip according to some embodiments of the inventive concept;

[0013] FIG. 2A to FIG. 2C It is shown that security information according to some embodiments of the present invention is provided to Figure 1 Examples of chips in the

[0014] Figure 3 is a block diagram illustrating a semiconductor device according to some embodiments of the inventive concept;

[0015] Figure 4 is a diagram showing some embodiments of the present invention. Figure 3 A block diagram of an example of a master key generator;

[0016] Figure 5 are diagrams sequentially illustrating a method of providing security information into a semiconductor device according to some embodiments of the inventive concept;

[0017] Figure 6 is a block diagram illustrating a semiconductor device according to some embodiments of the inventive concept;

[0018] Figure 7 is a diagram showing some embodiments of the present invention. Figure 6 A block diagram of an example of a master key generator;

[0019] Figure 8 are diagrams sequentially illustrating a method of providing security information into a semiconductor device according to some embodiments of the inventive concept;

[0020] Fig. 9 is a block diagram illustrating a semiconductor device according to some embodiments of the inventive concept;

[0021] Fig.10 are diagrams sequentially illustrating a method of providing security information into a semiconductor device according to some embodiments of the inventive concept;

[0022] Fig.11 An entity that performs a method of providing security information according to some embodiments of the inventive concept is shown;

[0023] Fig.12 is a block diagram illustrating a semiconductor device according to some embodiments of the inventive concept;

[0024] Fig.13 is a diagram showing some embodiments of the present invention. Fig.12 A block diagram of an example of a master key manager;

[0025] Fig.14 is a flowchart of a method for providing security information according to some embodiments of the present inventive concept;

[0026] Fig.15 is a flowchart of a method for providing security information according to some embodiments of the inventive concept; and

[0027] Fig.16is a flowchart of a method of providing security information according to some embodiments of the inventive concept. DETAILED DESCRIPTION

[0028] It should be noted that the various aspects of the inventive concept described with respect to one embodiment may be combined in different embodiments, although there is no specific description thereof. That is to say, all embodiments and / or features of any embodiment may be combined in any manner and / or combination. These and other purposes and / or aspects of the inventive concept are explained in detail in the specification set forth below. As used herein, the term "and / or" includes any and all combinations of one or more related listed items. When an expression such as "at least one" precedes a list of elements, the entire list of elements is modified without modifying the individual elements of the list.

[0029] The present inventive concept relates to security, and more particularly, to an apparatus and method for providing security information. Hereinafter, embodiments of the present inventive concept are described in detail with reference to the accompanying drawings.

[0030] Figure 1 Schematically shows an example in which the security information 5 of the demander of the chip 1 is provided to the chip 1. Figure 1 As shown, chip 1 can be combined in module 2, and module 2 can be included in product 3. Chip 1, module 2 and product 3 can be manufactured by different manufacturers respectively. The manufacturers of module 2 and product 3 can be referred to as demanders of chip 1. Specifically, the manufacturer of module 2, which is a demander of chip 1 received from the manufacturer of chip 1, can be referred to as a primary demander, and the manufacturer of product 3, which is a demander of a component including chip 1, i.e., module 2, received from the primary demander, can be referred to as a secondary demander.

[0031] The chip 1 may be manufactured using a semiconductor process and store security information 5 therein. For example, the chip 1 may include a non-volatile memory device for storing security information. Non-limiting examples of the chip 1 may include an electrically erasable programmable read-only memory (EEPROM), a flash memory, a phase change random access memory (PRAM), a resistive RAM (RRAM), a nano floating gate memory (NFGM), a polymer RAM (PoRAM), a magnetic RAM (MRAM), a ferroelectric RAM (FRAM), and a fuse array.

[0032] The module 2 may be a component included in the product 3 and include the chip 1. The manufacturer of the module 2 may produce the module 2 that performs a specific function by using the chip 1 and other materials, and may supply the module 2 to the manufacturer of the product 3. For example, the module 2 may provide a communication interface to the product 3 based on the security information 5 inserted into the chip 1. As a non-limiting example, the module 2 may be connected to a mobile telecommunication system such as a fifth generation (5G) system, a long term evolution (LTE) system, a code division multiple access (CDMA) system, a global system for mobile communications (GSM) system, and / or a communication network such as a wide area network (WAN), a local area network (LAN) or a wireless LAN (WLAN) and / or the Internet of Things (IoT).

[0033] Product 3 may include module 2 as a component thereof and provide useful functions associated with security information 5 in chip 1. Non-limiting examples of product 3 may include stand-alone computing devices such as personal computers (PCs), network servers, tablet computers, e-readers, personal digital assistants (PDAs), portable multimedia players (PMPs), mobile phones, smart phones and / or wearable devices, as well as any object that provides a specific function, such as automobiles, mechanical equipment, production facilities, doors and / or lighting equipment.

[0034] Security information 5 may refer to any information owned by the manufacturer of module 2 or product 3 and needs to be kept confidential from a party other than the owner of security information 5. For example, security information 5 may include information for authenticating module 2, such as an identifier (ID) of module 2, manufacturer information of module 2, certificate, private key, pre-shared key (PSK), etc. Similarly, security information 5 may include information for authenticating product 3, such as an ID of product 3, manufacturer information of product 3, private key, PSK, etc. Keys held by the demander of chip 1, such as private keys and PSK, may be referred to as master keys or client master keys. As a non-limiting example, the master key in security information 5 may be used for authentication operations of module 2 and / or product 3, including remote operations of module 2 and / or product 3, software upgrades, etc. When the manufacturer of module 2 provides these operations, security information 5 held by the manufacturer of module 2 may be provided to chip 1. When the manufacturer of product 3 provides these operations, security information 5 held by the manufacturer of product 3 may be provided to chip 1. In the specification, the chip 1 may be referred to as a semiconductor device, and the master key will be mainly described as an example of the security information 5 provided to the semiconductor device.

[0035] like Figure 1 As shown by the dashed lines in FIG. 1 , the security information 5 may be provided during the manufacture of the chip 1 (P0), the manufacture of the module 2 (P1), and / or the manufacture of the product 3 (P2). FIG. 2A to FIG. 2CAs described, various problems may occur according to the method of providing the security information 5 , but the apparatus and method according to the exemplary embodiments described herein can solve these problems, thereby facilitating securely providing the security information 5 into the chip 1 .

[0036] Figure 2A to Figure 2C Shows that security information 5 is provided to Figure 1 Example of chip 1. In detail, FIG. 2A to FIG. 2C is an example in which the master keys of the product manufacturers 22a, 22b, and 22c are provided as the security information 5, respectively. Figure 1 Detailed Description FIG. 2A to FIG. 2C The examples shown will be omitted below. Figure 1 Description already provided.

[0037] Reference Figure 2A , the master key can be provided to chip 1 by product manufacturer 22a via module 2 included in product 3. First, chip manufacturer 20a can supply chip 1 to module manufacturer 21a (S21a). Chip 1 provided to module manufacturer 21a may not have been provided with the master key yet, but may include an interface for providing the master key. Module manufacturer 21a can provide module 2 including chip 1 to product manufacturer 22a (S22a). Chip 1 included in module 2 may not have been provided with the master key yet, and module 2 may include an additional interface through which product manufacturer 22a can access the interface for providing the master key. Product manufacturer 22a can provide its own master key to the chip through interfaces respectively included in module 2 and chip 1 (S23a).

[0038] according to Figure 2A In the example of , the product manufacturer 22a may provide its own master key directly to the chip 1 without leaking it to the outside. However, in this case, the product manufacturer 22a not only has to have a system for providing the master key, but also may suffer from degradation of the yield of the product 3 due to the step of providing the master key to the chip 1 during the manufacture of the product 3. In addition, when the interface for providing the master key is designed to be easy to use for the convenience of the product manufacturer 22a, the master key may also be easily leaked through the interface.

[0039] Reference Figure 2B , the master key may be provided to the chip 1 by the module manufacturer 21b. First, the chip manufacturer 20b may supply the chip 1 to the module manufacturer 21b (S21b). The chip 1 provided to the module manufacturer 21b may not have been provided with the master key, and may include an interface for providing the master key. The product manufacturer 22b may provide its own master key to the module manufacturer 21b (S22b). Figure 2BOperations S21b and S22b are performed in different orders as shown in FIG. Module manufacturer 21b may provide the master key of product manufacturer 22b to chip 1 via an interface included in chip 1 (S23b). Then, module manufacturer 21b may supply module 2 including chip 1 to which the master key has been provided to product manufacturer 22b (S24b).

[0040] according to Figure 2B In the example of , since product manufacturer 22b is supplied with module 2 including chip 1 provided with its own master key, the yield of product 3 can be increased. However, since the master key of product manufacturer 22b is inevitably provided externally, it may be difficult to prevent module manufacturer 21b from manufacturing more than a predetermined number of modules 2, each module 2 including chip 1 provided with a master key, and external parties such as module manufacturer 21b from leaking the master key. In addition, similar to Figure 2A For example, the master key may be easily leaked through an interface for providing the master key included in the chip 1.

[0041] exist Figure 2A and Figure 2B In the example of , when the entity that generates the master key is separated from the entity that produces module 2 or product 3, the master key may inevitably be exposed to the outside. Figure 2A In the example of , product manufacturer 22a may include a developer of product 3 that generates a master key, and its contract manufacturer. The developer of product 3 may provide the contract manufacturer with the master key to configure the master key, and thus the contract manufacturer of product 3 may cause Figure 2B The example described the same problem.

[0042] Reference Figure 2C , the master key can be provided to chip 1 by chip manufacturer 20c. First, product manufacturer 22c can provide its own master key to chip manufacturer 20c (S21c). When module manufacturer 21c wishes to provide its own master key to chip 1, Figure 2C Unlike the example of , module manufacturer 21c may provide its own master key to chip manufacturer 20c. Chip manufacturer 20c may provide the master key to chip 1 (S22c). The master key may be provided during the manufacture of chip 1, and thus, as with respect to Figure 2A and Figure 2B The interface for providing the master key described in the example may be removed from the chip 1 and / or not included in the chip 1 during the manufacture of the chip 1. The chip manufacturer 20c may supply the chip 1 to which the master key has been provided to the module manufacturer 21c (S23c), and then the module manufacturer 21c may supply the module 2 including the chip 1 to the product manufacturer 22c (S24c).

[0043] according to Figure 2C For example, removing the providing interface from chip 1 may not facilitate leakage of the master key via chip 1. However, since the master key of the product manufacturer 22c inevitably needs to be provided to the outside, such as Figure 2B As in the example of , problems associated therewith may occur. In addition, the chip manufacturer 20c may manufacture chips by using different methods according to various product manufacturers. In this case, since it is impossible to supply a chip provided with a master key of a specific product manufacturer to another product manufacturer, the productivity or production capacity of the manufacturer of the chip 1 may deteriorate.

[0044] As mentioned above FIG. 2A to FIG. 2C As described, various conditions may need to be met when providing the master key. In detail, the master key may need to be securely stored in chip 1 so as not to be leaked to an attacker, and the master key may need to be provided to chip 1 without being exposed to the contract manufacturer of product 3 or module 2. In addition, the chip manufacturer may need to be able to supply the manufactured chip 1 to the demander, that is, the module manufacturer, without restriction. Similarly, the module manufacturer may also need to be able to supply the manufactured module 2 to the product manufacturer without restriction, regardless of the chip 1 supplied by the chip manufacturer. As will be described below with reference to the accompanying drawings, the devices and methods according to exemplary embodiments may meet the above requirements. In the drawings set forth below, an entity such as a device supplier or a demander may refer to a manufacturing system operated by the entity or a computing system (such as a PC, server, etc.) that is part of the manufacturing system. At least some of the operations performed by the entity may be performed by a manufacturing system and / or a computing system.

[0045] Figure 3 is a block diagram showing a semiconductor device 300 according to an exemplary embodiment. In detail, Figure 3 Shown corresponding to Figure 1 The semiconductor device 300 of the chip 1 and the entities outside the semiconductor device 300, namely, the device supplier 30 and the primary demander 31. Figure 3 , the semiconductor device 300 may include a device key memory 310, a master key generator 320, and a cryptographic engine 330. Each component included in the semiconductor device 300 may include hardware and may be referred to as logic. Each component may include software or a combination of hardware and software and may be referred to as a processing unit or a processor.

[0046] The device key memory 310 may receive a device key K_DEV from a device supplier 30 and store the received device key K_DEV. The device key memory 310 may include a non-volatile memory device. According to some embodiments, the device key memory 310 may include a one-time programmable (OTP) memory device, such as a fuse array. The device supplier 30 may refer to an entity that manufactures the semiconductor device 300 and provides the device key K_DEV to the semiconductor device 300 during manufacturing. Therefore, a semiconductor device 300 provided with a device key K_DEV, i.e., including a device key memory 310 storing the device key K_DEV, may be produced.

[0047] The master key generator 320 may receive the device key K_DEV' and the demander data D_DEM from the device key storage 310 and the primary demander 31, respectively, and generate the master key K_MAS' based on the device key K_DEV' and the demander data D_DEM. The primary demander 31, which is a demander of the semiconductor device 300, may refer to an entity that receives the semiconductor device 300 from the device supplier 30, and may correspond to Figure 2A , Figure 2B or Figure 2C The demander data D_DEM received by the master key generator 320 from the primary demander 31 may include data processed when the primary demander 31 communicates with the device supplier 30. For example, Figure 3 As shown, the primary demander 31 can provide the primary demander ID ID1 as its own ID to the equipment supplier 30. The equipment supplier 30 can generate a primary key K_PRI in response based on the device key K_DEV and the primary demander ID ID1, and provide the primary key K_PRI to the primary demander 31. The primary demander 31 can generate demander data D_DEM based on the primary key K_PRI, and provide the demander data D_DEM to the semiconductor device 300. Figure 5 An example of communication between the equipment supplier 30 and the primary demander 31 is described in detail. The master key generator 320 can generate a master key K_MAS' in response to providing demander data D_DEM. In some embodiments, the master key generator 320 can perform the operation of generating the master key K_MAS' once, so as to save processing time and resources of the primary demander 31 and / or the master key generator 320, and prevent the master key K_MAS' generation operation from being leaked to an attacker. Once generated, the master key K_MAS' can be used by the cryptographic engine 330 as needed. For example, after the master key K_MAS' is generated, the master key generator 320 can be fused so that the master key K_MAS' is no longer generated. The following will refer to Figure 4An example of the master key generator 320 is described in more detail.

[0048] The cryptographic engine 330 may perform cryptographic operations based on the master key K_MAS'. The cryptographic engine 330 may refer to any hardware, software, or combination thereof that performs cryptographic operations to perform necessary operations. For example, the cryptographic engine 330 may perform encryption / decryption operations using the master key K_MAS', perform authentication of another party based on the master key K_MAS', or request authentication of the semiconductor device 300, and / or verify data received from outside the semiconductor device 300 based on the master key K_MAS'. In some embodiments, the cryptographic engine 330 may directly receive the master key K_MAS' generated by the master key generator 320. In some embodiments, the cryptographic engine 330 may read the master key K_MAS' from the device key memory 310 that stores the master key K_MAS'. In some embodiments, as will be described below with reference to Fig.11 As described in detail, the cryptographic engine 330 may receive the master key K_MAS′ by requesting the master key K_MAS′ from another component of the semiconductor device 300 .

[0049] Figure 4 is a diagram showing a method according to an exemplary embodiment Figure 3 A block diagram of an example of a master key generator 320 is shown in FIG. Figure 3 As stated, Figure 4 The master key generator 420 may receive the device key K_DEV′ from the device key storage 310 and receive the demander data D_DEM from the primary demander 31 outside the semiconductor device 300. Figure 4 The master key generator 420 may include a key deriver 421 and a decryption processor 422, and the demander data D_DEM may include a primary demander ID ID1 associated with the primary demander 31 and an encryption master key K_MAS PRI Now we will refer to Figure 3 Describe in more detail Figure 4 .

[0050] The key exporter 421 may receive the device key K_DEV' and the primary demander ID ID1 included in the demander data D_DEM, and generate a primary key K_PRI' based on the device key K_DEV' and the primary demander ID ID1. Figure 3The device supplier 30 generates the primary key K_PRI' in a similar manner to the primary key K_PRI generated by the device supplier 30 based on the device key K_DEV and the primary demander identifier ID1. In some embodiments, the device supplier 30 can generate the primary key K_PRI by using a key derivation function (KDF). For example, the device key K_DEV can be cascaded with the primary demander ID ID1, and the cascade result can be fed to the KDF to generate the primary key K_PRI as the output of the KDF. The key exporter 421 can use the same KDF as the KDF used by the device supplier 30 to generate the primary key K_PRI' based on the device key K_DEV' and the primary demander ID ID1. Therefore, the primary key K_PRI provided by the device supplier 30 to the primary demander 31 can be the same as the primary key K_PRI' generated by the key exporter 421.

[0051] The decryption processor 422 may receive the primary key K_PRI' and the encryption master key K_MAS included in the demander data D_DEM. PRI , and decrypt the encrypted master key K_MAS by using the primary key K_PRI' PRI To generate the master key K_MAS'. Figure 3 The primary demander 31 can generate the encrypted master key K_MAS by encrypting its master key K_MAS with the primary key K_PRI. PRI , and encrypt the master key K_MAS PRI Provided to the semiconductor device 300. The decryption processor 422 can generate the encryption master key K_MAS by using the primary demander 31 PRI The master key K_MAS' is generated by a similar or complementary method, that is, a decryption method corresponding to the encryption method performed by the primary demander 31. Since the primary key K_PRI' generated by the key exporter 421 is the same as the primary key K_PRI used by the primary demander 31, the master key K_MAS' can be the same as the master key K_MAS of the primary demander 31.

[0052] Figure 5 1 is a diagram sequentially illustrating a method of providing security information to a semiconductor device 500 according to an exemplary embodiment. In detail, Figure 5 The primary demander 51's master key K_MAS is provided as security information to the corresponding Figure 3 The method of the semiconductor device 500 of the semiconductor device 300 is as follows: Figure 5 The semiconductor device 500 includes Figure 3 Reference will now be made to at least some components of the semiconductor device 300. Figure 3 and Figure 4 Describe in more detail Figure 5 method.

[0053] Reference Figure 5 , the device supplier 50 may provide the device key K_DEV to the semiconductor device 500 (S51). In some embodiments, the device supplier 50 may provide the device key K_DEV to the semiconductor device 500 in a manner unknown to other entities. For example, the device supplier 50 may program the device key K_DEV into a Figure 3 The device key K_DEV may be stored in a mask ROM corresponding to the device key memory 310 of the semiconductor device 500. The mask ROM may be designed to be inaccessible from outside the semiconductor device 500. The device key K_DEV may be generated and managed by the device supplier 50, and in particular, may be generated independently of a demander (e.g., a primary demander 51) of the semiconductor device 500. Therefore, the device supplier 50 may manufacture the semiconductor device 500 without being restricted by the demander of the semiconductor device 500, and therefore, the productivity of the semiconductor device 500 may be improved.

[0054] The primary demander 51 may provide the primary demander ID ID1 to the equipment supplier 50 (S52). The primary demander ID ID1 may refer to unique information that may be used to identify the primary demander 51. For example, the primary demander 51 may generate the primary demander ID ID1 according to a format provided by the equipment supplier 50. The primary demander ID ID1 may be provided from the primary demander 51 to the equipment supplier 50 in various ways. For example, the primary demander ID ID1 may be transmitted from a server operated by the primary demander 51 to a server operated by the equipment supplier 50 via a network. As described below, the primary demander ID ID1 may be independent of the master key K_MAS of the primary demander 51, and even when the equipment supplier 50 knows the primary demander ID ID1, the primary demander ID ID1 may not adversely affect the security of the master key K_MAS.

[0055] The equipment supplier 50 may generate a primary key K_PRI (S53). The equipment supplier 50 may generate the primary key K_PRI based on the device key K_DEV provided to the semiconductor device 500 and the primary demander ID ID1 provided from the primary demander 51. Figure 4 As described above, in some embodiments, the equipment supplier 50 may generate the primary key K_PRI by using a KDF, which may be the same as or similar to the KDF used when the primary key K_PRI′ is generated by the semiconductor device 500 in operation S57 .

[0056] The equipment supplier 50 may provide the primary key K_PRI to the primary demander 51 and supply the semiconductor device 500 thereto (S54). In some embodiments, after the device key K_DEV has been provided to the semiconductor device 500 in operation S51, the semiconductor device 500 may be supplied to the primary demander 51 at a time point before the demander data D_DEM is provided in operation S56. The primary demander 51 may receive the semiconductor device 500 provided with the device key K_DEV from the equipment supplier 50.

[0057] The primary demander 51 can generate the encryption master key K_MAS by using the primary key K_PRI PRI (S55). As a non-limiting example, the primary demander 51 may encrypt the master key K_MAS by using any encryption technology such as symmetric key encryption, asymmetric key encryption, etc., using the primary key K_PRI as an encryption key. The key used to encrypt the master key K_MAS to be provided may be referred to as an encryption key. In some embodiments, the encryption key may be as follows: Figure 5 The primary key K_PRI in the example of Figure 6 The secondary key K_SEC will be described.

[0058] The primary demander 51 may provide the demander data D_DEM to the semiconductor device 500 (S56). Figure 4 The demander data D_DEM may include the primary demander ID ID1 and the encryption master key K_MAS PRI Even when the contract manufacturer of the primary demander 51, for example, the contract manufacturer of the component when the primary demander 51 is the manufacturer of the component including the semiconductor device 500, performs provision of the demander data D_DEM, the master key K_MAS can be protected from being lost due to the encryption of the master key K_MAS. PRI And leaked.

[0059] The semiconductor device 500 may perform an operation of generating a primary key K_PRI' (S57). Figure 4 The key deriver 421 may generate a primary key K_PRI' based on the device key K_DEV' and the primary demander ID ID1 included in the demander data D_DEM. The key deriver 421 may generate the primary key K_PRI', where the device supplier 50 generates the primary key K_PRI in operation S53, for example, by using the same KDF as the KDF used by the device supplier 50. Therefore, both the primary keys K_PRI and K_PRI' may be identical or similar to each other.

[0060] The semiconductor device 500 may perform an operation of generating a master key K_MAS' (S58). Figure 4 The decryption processor 422 can decrypt the encrypted master key K_MAS included in the demander data D_DEM by using the primary key K_PRI' PRI To generate the master key K_MAS'. The decryption processor 422 can generate the master key K_MAS' by using a decryption method corresponding to the method by which the primary demander 51 encrypted the master key K_MAS in operation S55. Since the two primary keys K_PRI and K_PRI' are identical to each other, the master keys K_MAS and K_MAS' can also be consistent with each other. Therefore, the master key K_MAS of the primary demander 51 can be securely provided to the semiconductor device 500 without being disclosed to the equipment supplier 50 and / or possible contract manufacturers of components, and can be fully recovered within the semiconductor device 500.

[0061] Figure 6 is a block diagram showing a semiconductor device 600 according to an exemplary embodiment. In detail, Figure 6 Shown with reference Figure 1 The semiconductor device 600 corresponds to the chip 1 described above. Figure 3 The semiconductor device 300 is different. Figure 6 The semiconductor device 600 may receive the demander data D_DEM from the secondary demander 62. Figure 3 The semiconductor device 300 of the present invention may include a device key memory 610, a master key generator 620, and a cryptographic engine 630. Figure 3 Description already provided.

[0062] When the semiconductor device 600 is supplied to the secondary demander 62 via the primary demander 61, the secondary demander 62 may provide the demander data D_DEM to the semiconductor device 600. The secondary demander 62 may refer to an entity (eg, Figure 2A The primary demander 61 receives the semiconductor device 600 from the device supplier 60, processes the semiconductor device 600, and manufactures a component including the semiconductor device 600 (e.g., Figure 1 Module 2). The equipment supplier 60 may need to be able to supply the semiconductor device 600 to the primary demander 61 without restriction. Similarly, the primary demander 61 may also need to be able to supply the components including the semiconductor device 600 to the secondary demander 62 without restriction. To this end, the primary demander 61 may generate a secondary key K_SEC based on the primary key K_PRI provided by the equipment supplier 60 and the secondary demander ID ID2 provided by the secondary demander 62. The primary demander may provide the secondary key K_SEC together with its own primary demander ID ID1 to the secondary demander 62. Similar to reference Figure 3 The primary demander 31 and the secondary demander 62 can generate demander data D_DEM based on the secondary key K_SEC and provide the demander data D_DEM to the semiconductor device 600. The secondary key K_SEC of the primary demander 61 can be used to perform the communication with the secondary key K_SEC provided by the equipment supplier 30 to the semiconductor device 600. Figure 3 The primary key K_PRI of the primary demander 31 has the same or similar function, and thus the provision of security information can be expanded in the vertical direction. Figure 8 An example of communication between the primary demander 61 and the secondary demander 62 is described in detail.

[0063] The device key storage 610 may store the device key K_DEV provided by the device supplier 60 and provide the stored device key K_DEV' to the master key generator 620. The master key generator 620 may generate a master key K_MAS' based on the device key K_DEV' and the demand data D_DEM in response to providing the demander data D_DEM. Figure 3 Unlike the master key generator 320 described above, Figure 6 The master key generator 620 can generate the secondary key K_SEC' after generating the primary key K_PRI'. Figure 7 An example of the master key generator 620 is described in more detail. The cryptographic engine 630 may perform cryptographic operations based on the master key K_MAS'.

[0064] Figure 7 is a diagram showing a reference according to an exemplary embodiment Figure 6 A block diagram of an example of a master key generator 620 is shown. Figure 6 As stated, Figure 7 The master key generator 720 may receive the device key K_DEV′ from the device key storage 610 and receive the demander data D_DEM from the secondary demander 62 outside the semiconductor device 600. Figure 7 The master key generator 720 may include a key exporter 721 and a decryption processor 722, and the demander data D_DEM may include a primary demander ID ID1, a secondary demander ID ID2 and an encryption master key K_MAS SEC Now refer to Figure 6 Describe in more detail Figure 7 The example above will be omitted here. Figure 4 Description already provided.

[0065] The key deriver 721 may generate a secondary key K_SEC' based on the device key K_DEV' and the primary demander ID ID1 and the secondary demander ID ID2 included in the demander data D_DEM. Figure 6 The device provider 60 generates the primary key K_PRI' in the same or similar manner as the primary key K_PRI generated by the primary demander ID ID1 based on the device key K_DEV. Then, the key exporter 721 can generate the primary key K_PRI' in the same or similar manner as the primary key K_PRI generated by the primary demander ID ID1. Figure 6 The primary demander 61 generates the secondary key K_SEC' in the same or similar manner as the primary key K_PRI and the secondary demander ID ID2 to generate the secondary key K_SEC. In some embodiments, the method by which the equipment supplier 60 generates the primary key K_PRI may be the same or similar to the method by which the primary demander 61 generates the secondary key K_SEC. For example, the same KDF may be used to generate the primary key K_PRI and the secondary key K_SEC. In this case, the key exporter 721 may generate the secondary key K_SEC' by repeating the key generation operation twice via the KDF. Therefore, the secondary key K_SEC provided by the primary demander 61 to the secondary demander 62 may be the same or similar to the secondary key K_SEC' generated by the key exporter 721.

[0066] The decryption processor 722 may receive the secondary key K_SEC' and the encryption master key K_MAS included in the demander data D_DEM. SEC and decrypt the encrypted master key K_MAS by using the secondary key K_SEC' SEC To generate the master key K_MAS'. Figure 6 The secondary demander 62 can generate the encrypted master key K_MAS by encrypting its own master key K_MAS using the secondary key K_SEC provided from the primary demander 61. SEC , and encrypt the master key K_MAS SEC Provided to the semiconductor device 600. The decryption processor 722 can generate the encryption master key K_MAS by using the secondary demander 62 SEC The master key K_MAS' is generated by the decryption method corresponding to the same or similar method (i.e., the encryption method performed by the secondary demander 62). Since the secondary key K_SEC' generated by the key exporter 721 is the same as the secondary key K_SEC used by the secondary demander 62, the master key K_MAS' can be the same as the master key K_MAS of the secondary demander 62.

[0067] Figure 8 8 is a diagram sequentially illustrating a method of providing security information to a semiconductor device 800 according to an exemplary embodiment. In detail, Figure 8The master key K_MAS of the secondary demander 82 is provided as security information to the Figure 6 The semiconductor device 600 corresponds to the method of the semiconductor device 800. The following assumes Figure 8 The semiconductor device 800 includes Figure 6 Reference will now be made to at least some components of the semiconductor device 600. Figure 6 and Figure 7 Detailed Description Figure 8 The method, and the above reference Figure 5 The description provided here may be omitted.

[0068] Reference Figure 8 , the device supplier 80 may provide the device key K_DEV to the semiconductor device 800 (S81). The primary demander 81 may provide the primary demander ID ID1 to the device supplier 80 (S82). The device supplier 80 may generate a primary key K_PRI based on the device key K_DEV and the primary demander ID ID1 (S83). The device supplier 80 may provide the primary key K_PRI to the primary demander 81, and provide the semiconductor device 800 provided with the device key K_DEV to the primary demander 81 (S84).

[0069] The secondary demander 82 may provide the primary demander 81 with the secondary demander ID ID2 (S85). The secondary demander ID ID2 may refer to unique information that may be used to identify the secondary demander 82. For example, the secondary demander 82 may generate the secondary demander ID ID2 according to a format provided by the device supplier 80 and / or the primary demander 81. Similar to the case where the primary demander 81 provides the primary demander ID ID1 to the device supplier 80, the secondary demander ID ID2 may be provided from the secondary demander 82 to the primary demander 81 in various ways. For example, the secondary demander ID ID2 may be transmitted from a server operated by the secondary demander 82 to a server operated by the primary demander 81 via a network. As described below, the secondary demander ID ID2 may be independent of the key K_MAS of the secondary demander 82, and even when the primary demander 81 knows the secondary demander ID ID2, the secondary demander ID ID2 may not adversely affect the security of the master key K_MAS.

[0070] The primary demander 81 may generate a secondary key K_SEC (S86). The primary demander 81 may generate the secondary key K_SEC based on the primary key K_PRI provided by the equipment supplier 80 and the secondary demander ID ID2 provided by the secondary demander 82. Figure 7As described above, in some embodiments, the primary demander 81 can generate the secondary key K_SEC by using a KDF, which can be the same or similar to the KDF used when the semiconductor device 800 generates the secondary key K_SEC' in operation S91. In addition, in some embodiments, the same KDF can be used to generate keys in operations S83, S86, S90, and S91, respectively.

[0071] The primary demander 81 may provide the primary demander ID ID1 and the secondary key K_SEC to the secondary demander 82 and supply the component including the semiconductor device 800 thereto (S87). In some embodiments, after the semiconductor device 800 has been supplied to the primary demander 81 in operation 84, in operation S89, the component including the semiconductor device 800 may be supplied to the secondary demander 82 at a time point before the demander data D_DEM is provided to the semiconductor device 800. The secondary demander 82 may receive the semiconductor device 800 provided with the device key K_DEV from the primary demander 81. As described below, by performing Figure 5 The secondary key K_SEC provided by the primary demander 81 may be used to encrypt the master key K_MAS in the secondary demander 82 and the semiconductor device 800, which has the same or similar function as the primary key K_PRI provided by the equipment supplier 50.

[0072] The secondary demander 82 can generate the encryption master key K_MAS by using the secondary key K_SEC SEC (S88) The secondary demander 82 may encrypt the master key K_MAS by using any encryption technique with the secondary key K_SEC as an encryption key.

[0073] The secondary demander 82 may provide the demander data D_DEM to the semiconductor device 800 (S89). Figure 7 The demander data D_DEM may include a primary demander ID ID1, a secondary demander ID ID2 and an encryption master key K_MAS SEC Even when the provision of the demander data D_DEM is performed by a contract manufacturer of the secondary demander 82, for example, when the secondary demander 82 is a manufacturer of a product including a component, the contract manufacturer of the product, the master key K_MAS can be protected from being lost due to the encryption of the master key K_MAS. SEC And leak.

[0074] The semiconductor device 800 may perform an operation of generating a primary key K_PRI' (S90). Figure 7The key exporter 721 may generate the primary key K_PRI' based on the device key K_DEV' and the primary demander ID ID1 included in the demander data D_DEM by using the method by which the device provider 80 generates the primary key K_PRI in operation S83. Therefore, both the primary keys K_PRI and K_PRI' may be identical to each other.

[0075] The semiconductor device 800 may perform an operation of generating a secondary key K_SEC' (S91). Figure 7 The key deriver 721 may generate the secondary key K_SEC' by using the method in which the primary demander 81 generates the secondary key K_SEC in operation S86. Therefore, both the secondary keys K_SEC and K_SEC' may be identical to each other.

[0076] The semiconductor device 800 may perform an operation of generating a master key K_MAS' (S92). Figure 7 The decryption processor 722 can decrypt the encrypted master key K_MAS included in the demander data D_DEM by using the secondary key K_SEC' SEC To generate the master key K_MAS'. The decryption processor 722 can generate the master key K_MAS' by using a decryption method corresponding to the method by which the secondary demander 82 encrypted the master key K_MAS in operation S88. Since the two secondary keys K_SEC and K_SEC' are identical to each other, the master keys K_MAS and K_MAS' can also be consistent with each other. Therefore, the master key K_MAS of the secondary demander 82 can be securely provided to the semiconductor device 800 without being disclosed to the equipment supplier 80, the primary demander 81 and / or possible contract manufacturers of the product, and can be fully recovered within the semiconductor device 800.

[0077] Fig. 9 is a block diagram showing a semiconductor device 900 according to an exemplary embodiment. In detail, Fig. 9 Show and reference Figure 1 The semiconductor device 900 corresponding to the chip 1 described above. Figure 6 The semiconductor device 600 is different, Fig. 9 The semiconductor device 900 can receive primary demander data D_DEM1 and secondary demander data D_DEM2 from the primary demander 91 and the secondary demander 92, respectively. Figure 6 The semiconductor device 600 of the present invention may include a device key memory 910, a master key generator 920, and a cryptographic engine 930. Figure 6 Description already provided.

[0078] According to some embodiments, the primary demander 91 and the secondary demander 92 may provide components of demander data to the semiconductor device 900. For example, Fig. 9 As shown, the primary demander 91 can provide the primary demander ID ID1 to the equipment supplier 90 and receive the primary key K_PRI therefrom. In addition, the primary demander 91 can receive the secondary demander ID ID2 from the secondary demander 92 and provide the secondary key K_SEC thereto. Figure 6 and Figure 7 As described above, the master key generator 920 of the semiconductor device 900 may need the primary demander ID ID1 and the secondary demander ID ID2 to generate the master key K_MAS'. Fig. 9 In the exemplary embodiment shown in FIG. 1 , the primary demander 91 may provide the primary demander data D_DEM1 including the primary demander ID ID1 to the semiconductor device 900. Therefore, the secondary demander 92 may be provided with a component including the semiconductor device 900 to which the primary demander ID ID1 has been provided, and the secondary demander 92 may provide the component including the secondary demander ID ID2 and the encryption master key K_MAS SEC The secondary demander data D_DEM2 is provided to the semiconductor device 900.

[0079] Fig.10 is a diagram showing, in sequence, the steps of providing security information to a reference according to an exemplary embodiment. Fig. 9 900 is a diagram of a method for describing a semiconductor device. In detail, Fig.10 A method of providing the master key K_MAS of the secondary demander 92 as security information to the semiconductor device 900 is shown. Fig. 9 Detailed Description Fig.10 The method mentioned above can be omitted here Figure 8 Description already provided.

[0080] Reference Fig.10 , the device supplier 90 may provide the device key K_DEV to the semiconductor device 900 (S101). The primary demander 91 may provide the primary demander ID ID1 to the device supplier 90 (S102). The device supplier 90 may generate a primary key K_PRI based on the device key K_DEV and the primary demander ID ID1 (S103). The device supplier 90 may provide the primary key K_PRI to the primary demander 91, and supply the semiconductor device 900 provided with the device key K_DEV to the primary demander 91 (S104).

[0081] The primary demander 91 may provide the primary demander data D_DEM1 to the semiconductor device 900 (S105). The primary demander data D_DEM1 may include the primary demander ID ID1, and the primary demander ID ID1 may be independent of the secondary demander ID ID2 and the master key K_MAS of the secondary demander 92. Therefore, even when the provision of the primary demander data D_DEM1 is performed by a contract manufacturer of the primary demander 91, such as a contract manufacturer of a component including the semiconductor device 900, the security of the secondary demander 92 or the master key K_MAS of the secondary demander 92 may not be restricted. In some embodiments, after the semiconductor device 900 has been supplied to the primary demander 91 in operation S104, the primary demander data D_DEM1 may be provided to the semiconductor device 900 at any point in time before the component including the semiconductor device 900 is supplied to the secondary demander 92 in operation S109.

[0082] The semiconductor device 900 may perform an operation of generating a primary key K_PRI′ (S106). For example, the semiconductor device 900 may include a similar Figure 7 The key exporter included in the semiconductor device 900 may generate a primary key K_PRI' by using the method by which the device supplier 90 generates the primary key K_PRI in operation S103 based on the primary demander ID ID1 included in the primary demander data D_DEM1 in response to the provision of the primary demander data D_DEM1.

[0083] The secondary demander 92 may provide the secondary demander ID ID2 to the primary demander 91 (S107). Then, the primary demander 91 may generate a secondary key K_SEC based on the primary key K_PRI and the secondary demander ID ID2 (S108).

[0084] The primary demander 91 may provide the secondary key K_SEC to the secondary demander 92 and supply the components including the semiconductor device 900 thereto (S109). Since the primary demander data D_DEM1 including the primary demander ID ID1 has been provided to the semiconductor device 900 in operation S105, Figure 8Unlike operation S87 described above, in operation S109, the primary demander 91 may not provide the primary demander ID ID1 to the secondary demander 92. In some embodiments, after the primary demander data D_DEM1 has been provided to the semiconductor device 900 in operation S105, the component including the semiconductor device 900 may be supplied to the secondary demander 92 at a time before the secondary demander data D_DEM2 is provided to the semiconductor device 900 in operation S111. The secondary demander 92 may receive the component including the semiconductor device 900 to which the device key K_DEV and the primary demander ID ID1 have been provided from the primary demander 91.

[0085] The secondary demander 92 can generate the encryption master key K_MAS by using the secondary key K_SEC SEC (S110). Subsequently, in operation S111, the secondary demander 92 may provide the secondary demander data D_DEM2 to the semiconductor device 900. The secondary demander data D_DEM2 may include the secondary demander ID ID2 and the encryption master key K_MAS2. SEC .

[0086] The semiconductor device 900 may perform an operation of generating a secondary key K_SEC' (S112). As described above, the semiconductor device 900 may include a Figure 7 The key exporter 721 of the semiconductor device 900 may generate a secondary key K_SEC' based on the primary key K_PRI' generated in operation S106 and the secondary demander ID ID2 included in the secondary demander data D_DEM2 by using the method by which the primary demander 91 generates the secondary key K_SEC in operation S108 in response to providing the secondary demander data D_DEM2. Thereafter, the semiconductor device 900 may perform an operation of generating a master key K_MAS' by using decryption using the secondary key K_SEC' (S113).

[0087] Fig.11 An entity that performs a method for providing security information according to an exemplary embodiment is shown. As described above with reference to the accompanying drawings, a master key of a demander of a semiconductor device, such as a primary or secondary demander, can be securely provided to the semiconductor device and can be fully recovered in the semiconductor device. Fig.11 As described in detail, the apparatus and method for providing security information according to the exemplary embodiments allow for vertical and horizontal expansion of entities. Figure 6 The semiconductor device 600 is physically described in detail.

[0088] The device supplier 10 may manufacture the semiconductor device 600 without being limited to the first primary demander 11_1 to the nth primary demander 11_n, where n is a positive integer. In other words, the device supplier 10 may manufacture the semiconductor device 600 by supplying the device key K_DEV to the semiconductor device 600 independently of the first primary demander 11_1 to the nth primary demander 11_n. For example, the device supplier 10 may generate the first primary key K_PRI1 based on the device key K_DEV and the first primary demander ID ID11 provided by the first primary demander 11_1, and provide the first primary key K_PRI1 to the first primary demander 11_1. Similarly, the device supplier 10 may generate the nth primary key K_PRIn based on the device key K_DEV and the nth primary demander ID ID1n provided by the nth primary demander 11_n, and provide the nth primary key K_PRIn to the nth primary demander 11_n. In this way, the device supplier 10 can provide the first primary key K_PRI1 to the nth primary key K_PRIn independently of each other, and thus manufacture the semiconductor device 600 without being limited to the first primary demander 11_1 to the nth primary demander 11_n. It should be understood that although the terms first, second, third, etc. may be used herein to describe various elements, the elements should not be limited by these terms; rather, these terms are only used to distinguish one element from another. Therefore, without departing from the scope of the inventive concept, the first element discussed below may be referred to as the second element.

[0089] Similar to the equipment supplier 10, each of the first primary demander 11_1 to the nth primary demander 11_n can receive the semiconductor device 600 from the equipment supplier 10 and manufacture a component including the semiconductor device 600 without being limited to the demander of the component, that is, the first secondary demander 12_1 to the mth secondary demander to 12_m, where m is a positive integer. In other words, each of the first primary demander 11_1 to the nth primary demander 11_n can receive the semiconductor device 600 from the equipment supplier 10 independently of the first secondary demander 12_1 to the mth secondary demander 12_m, and supply the component without being limited to the first secondary demander 12_1 to the mth secondary demander 12_m. For example, the second primary demander 11_2 may generate a first secondary key K_SEC1 based on the second primary key K_PRI2 and the first secondary demander ID ID21 received from the equipment supplier 10 and the first secondary demander 12_1, respectively, and provide the second primary demander ID ID12 and the first secondary key K_SEC1 to the first secondary demander 12_1. In addition, the second primary demander 11_2 may generate a second secondary key K_SEC2 based on the second primary key K_PRI2 and the second secondary demander ID ID22 received from the second secondary demander 12_2, and provide the second primary demander ID ID12 and the second secondary key K_SEC2 to the second secondary demander 12_2. In addition, the second primary demander 11_2 may generate an mth secondary key K_SECm based on the second primary key K_PRI2 and the mth secondary demander ID ID2m received from the mth secondary demander 12_m, and provide the second primary demander ID ID12 and the mth secondary key K_SECm to the mth secondary demander 12_m. In this way, each of the first to nth primary demanders 11_1 to 11_n can provide the first to mth secondary keys K_SEC1 to K_SECm independently of each other, and thus manufacture components including the semiconductor device 600 without being limited to the first to mth secondary demanders 12_1 to 12_m. Fig.11 It is shown up to the secondary demanders (e.g., the first secondary demander 12_1 to the mth secondary demander 12_m), but it can be understood that there may be additional demanders including tertiary demanders below the first secondary demander 12_1 to the mth secondary demander 12_m, and similar to the primary and secondary demanders mentioned above, the upper demanders can communicate with the lower demanders.

[0090] Fig.12 1 is a block diagram showing a semiconductor device 100 according to an exemplary embodiment. Figure 3 The semiconductor device 300 described is different. Fig.12The semiconductor device 100 may further include an additional component for preventing the master key K_MAS′ generated by the master key generator 120 from leaking to the outside of the semiconductor device 100 or being copied. Fig.12 , the semiconductor device 100 may include a device key memory 110, a master key generator 120, a cryptographic engine 130, a master key manager 140, a physical unclonable function (PUF) key generator 150, and a master key memory 160. The above reference may be omitted here. Figure 3 Description already provided.

[0091] Device key storage 110 may store device key K_DEV provided from outside semiconductor device 100 and receive stored device key K_DEV' for storage. Master key generator 120 may receive demander data D_DEM from outside semiconductor device 100 and generate master key K_MAS' based on device key K_DEV' and demander data D_DEM.

[0092] The PUF key generator 150 may generate a PUF key K_PUF based on the PUF bit. The PUF may provide a unique value corresponding to the hardware based on the inherent characteristics of the hardware, and the PUF bit may have such a unique value. For example, even when a plurality of semiconductor devices including the semiconductor device 100 are manufactured using the same semiconductor process, changes may occur at least partially during the manufacturing process, and the PUF bit may be extracted based on these changes. The PUF key generator 150 may generate a PUF key K_PUF depending on the PUF bit. The PUF key K_PUF may not be stored in the semiconductor device 100, but may be generated from the PUF bit by the PUF key generator 150 during runtime. Therefore, the PUF key K_PUF may be prevented from leaking to the outside of the semiconductor device 100 or being copied. In addition, as described below, since the master key K_MAS' is encrypted for storage using the PUF key K_PUF, the master key K_MAS' may also be prevented from leaking to the outside of the semiconductor device 100 or being copied. In some embodiments, the PUF key generator 150 may generate a PUF key K_PUF in response to a request from the master key manager 140 , and provide the PUF key K_PUF to the master key manager 140 .

[0093] The master key manager 140 may generate an encrypted master key K_MAS based on the master key K_MAS′ received from the master key generator 120 and the PUF key K_PUF received from the PUF key generator 150. PUF , and encrypt the master key K_MAS PUFThe master key manager 140 may provide the encrypted master key K_MAS stored in the master key storage 160 for storage. PUF The master key K_MAS" is generated from the PUF key K_PUF received from the PUF key generator 150, and the master key K_MAS" is provided to the cryptographic engine 130. The master key storage 160 may store the encrypted master key K_MAS PUF In some embodiments, the master key storage 160 may include a non-volatile storage device, such as an OTP storage device. Fig.13 Examples of the master key manager 140 and the master key storage 160 are described in detail.

[0094] In some embodiments, the components of the semiconductor device 100 are encrypted with the master key K_MAS PUF At least one component of interest may be included in a secure area SE from which an interface connecting the semiconductor device 100 to the outside is removed and access to the secure area SE from outside the semiconductor device 100 is prohibited. Fig.12 As shown, the cryptographic engine 130, the master key manager 140, the PUF key generator 150, and the master key storage 160 may be included in the secure area SE.

[0095] Fig.13 is a diagram showing a method according to an exemplary embodiment Fig.12 A block diagram of an example of a master key manager 140 is shown above. Fig.12 As stated, Fig.13 The master key manager 140' may receive the PUF key K_PUF and the master key K_MAS', and provide or receive the encrypted master key K_MAS' to or from the master key memory 160'. PUF , and refer to Fig.12 The cryptographic engine 130 described herein provides a master key K_MAS". Fig.13 , the master key manager 140' may include an encryption processor 141 and a decryption processor 142. Now, reference will be made to Fig.12 Describe in more detail Fig.13 .

[0096] The encryption processor 141 may generate an encryption master key K_MAS by encrypting the master key K_MAS′ using the PUF key K_PUF PUFFor example, the encryption processor 141 may request the PUF key generator 150 to generate a PUF key K_PUF in response to receiving the master key K_MAS', and encrypt the master key K_MAS' by using the PUF key K_PUF received from the PUF key generator 150. Then, the encryption processor 141 may generate an encrypted master key K_MAS by using an encryption technique. PUF In some embodiments, the encryption technology used by the encryption processor 141 may not be shared with the demander of the semiconductor device 100. In some embodiments, similar to the above reference Figure 3 The master key generator 320 described above can be used by the encryption processor 141 to generate the encryption master key K_MAS PUF The encryption master key K_MAS′ can be stored and used as needed. PUF For example, when generating the encryption master key K_MAS PUF Thereafter, the cryptographic processor 141 may be disabled (eg, blown) so that the cryptographic master key K_MAS is no longer generated. PUF The encryption processor 141 can encrypt the master key K_MAS PUF Provided to master key storage 160' for storage.

[0097] The decryption processor 142 can decrypt the encrypted master key K_MAS by using the PUF key K_PUF PUF To generate the master key K_MAS". For example, the decryption processor 142 may respond to the Fig.12 The cryptographic engine 130 requests the PUF key generator 150 to generate the PUF key K_PUF and reads the encrypted master key K_MAS from the master key memory 160'. PUF The decryption processor 142 can then decrypt the encrypted master key K_MAS using the PUF key K_PUF by using a decryption technique corresponding to the encryption technique used by the encryption processor 141. PUF In some embodiments, the decryption technology used by the decryption processor 142 may not be shared with the purchaser of the semiconductor device 100 .

[0098] Fig.14 is a flow chart of a method for providing security information according to an exemplary embodiment. In detail, Fig.14 A method of operating a semiconductor device to which security information is provided is shown. For example, Fig.14 The method can be Figure 3 The semiconductor device 300 performs and will now refer to Figure 3 and Figure 4 Describe in more detail.

[0099] Reference Fig.14 , an operation of receiving and storing a device key may be performed ( S10 ). For example, the device key storage 310 may store a device key K_DEV provided by the device provider 30 .

[0100] The operation of receiving the demander ID and the encryption master key (S30) may be performed. For example, the master key generator 320 may receive the demander data D_DEM provided by the primary demander 31, and the demander data D_DEM may include the primary demander ID ID1 and the encryption master key K_MAS PRI The following will refer to Fig.15 An example of operation S30 is described in more detail.

[0101] An operation of generating an encryption key may be performed (S50). For example, the master key generator 320 may generate a primary key K_PRI' as an encryption key based on the device key K_DEV' and the primary demander ID ID1 included in the demander data D_DEM. Fig.15 An example of operation S50 is described in more detail.

[0102] The operation of generating a master key may be performed (S70). For example, the master key generator 320 may decrypt the encrypted master key K_MAS received in operation S30 by using the encryption key generated in operation S50, ie, the primary key K_PRI′. PRI To generate the master key K_MAS'.

[0103] A cryptographic operation may be performed (S90). For example, the cryptographic engine 330 may perform a cryptographic operation based on the master key K_MAS'. Fig.16 As described in detail, in some embodiments, the cryptographic engine 330 may use a master key K_MAS'' generated by encrypting and then decrypting the master key K_MAS', instead of the master key K_MAS' generated in operation S70.

[0104] Fig.15 is a flow chart of a method for providing security information according to an exemplary embodiment. In detail, Fig.15 A portion of a method of providing a master key of a secondary demander is shown as an example of operations S30 and S50, where the secondary demander receives a component from a primary demander of a semiconductor device. Fig.15 Operations S30' and S50' in Figure 6 The semiconductor device 600 performs and will now refer to Figure 6 and Figure 7 describe.

[0105] An operation of receiving a requester ID and an encryption master key may be performed (S30'). Fig.15 , operation S30′ may include operations S32 and S34. An operation (S32) of receiving a primary demander ID may be performed. For example, the master key generator 620 may receive demander data D_DEM provided by the secondary demander 62, and the demander data D_DEM may include the primary demander ID ID1. In addition, as described above with reference to Fig. 9 As described above, in some embodiments, the master key generator 620 may receive demander data provided by the primary demander 61 and including the primary demander ID ID1. An operation of receiving the secondary demander ID and the encryption master key (S34) may be performed. For example, the master key generator 620 may receive demander data D_DEM provided by the secondary demander 62, and the demander data D_DEM may include the secondary demander ID ID2 and the encryption master key K_MAS SEC .

[0106] The operation of generating an encryption key may be performed (S50'). Fig.15 As shown in , operation S50' may include operations S52, S54, and S56. An operation of generating a primary key (S52) may be performed. For example, the master key generator may generate a primary key K_PRI' based on the device key K_DEV' and the primary demander ID ID1. An operation of generating a secondary key (S54) may be performed. For example, the master key generator 620 may generate a secondary key K_SEC' based on the primary key K_PRI' and the secondary demander ID ID2, and the secondary key K_SEC' may be used as an encryption key. Thereafter, an operation of decrypting the encrypted master key (S56) may be performed. For example, the master key generator 620 may encrypt the master key K_MAS using the secondary key generated in operation S54. SEC Decrypt.

[0107] Fig.16 is a flow chart of a method for providing security information according to an exemplary embodiment. In detail, Fig.16 It can be shown in reference Fig.14 Operation S80 is performed between operations S70 and S90 described above to securely maintain the master key. Fig.16 , operation S80 may include operations S82, S84, S86, and S88. For example, by referring to Fig.12 The semiconductor device 100 is described to perform Fig.16 Operation S80 in the embodiment of the present invention and will now refer to Fig.12 Detailed Description Fig.16 .

[0108] An operation of generating a PUF key may be performed (S82). For example, the PUF key generator 150 may generate a PUF key K_PUF from the PUF bits during runtime. In some embodiments, the PUF key generator 150 may generate the PUF key K_PUF in response to a request from the master key manager 140.

[0109] An operation of encrypting the master key using the PUF key may be performed (S84). For example, the master key manager 140 may generate an encrypted master key K_MAS by encrypting the master key K_MAS′ received from the master key generator 120 with the PUF key K_PUF. PUF .

[0110] The operation of storing the encrypted master key may be performed (S86). For example, the master key manager 140 may store the encrypted master key K_MAS generated in operation S84. PUF Provided to the master key memory 160 for storage. Even when the encrypted master key K_MAS stored in the master key memory 160 PUF When exposed to the outside of the semiconductor device 100, the encrypted master key K_MAS generated using the PUF key K_PUF may not be obtained. PUF Get the master key K_MAS.

[0111] An operation of decrypting the encrypted master key using the PUF key may be performed (S88). For example, the master key manager 140 may read the encrypted master key K_MAS from the master key storage 160 in response to a request from the cryptographic engine 130. PUF , and requests the PUF key K_PUF from the PUF key generator 150. The master key manager 140 can decrypt the encrypted master key K_MAS by using the PUF key K_PUF PUF To generate a master key K_MAS”, and provide the master key K_MAS” to the cryptographic engine 130.

[0112] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to limit the meaning or scope of the inventive concept as defined by the appended claims. Although the inventive concept has been specifically shown and described with reference to exemplary embodiments of the present invention, it will be understood by those of ordinary skill in the art that various changes and equivalents may be made in form and detail without departing from the spirit and scope of the inventive concept as defined by the appended claims.

Claims

1. A semiconductor device configured to provide security information of a demander, the semiconductor device comprising: a device key storage configured to store a device key provided by a supplier of the semiconductor device; A master key generator configured to generate a master key of a demander based on a device key and demander data provided by the demander by using a first operation shared with a supplier and a second operation shared with the demander; as well as a cryptographic engine configured to perform cryptographic operations based on the master key, Among them, the demanders are manufacturers of equipment including semiconductor equipment, The demander data includes at least one demander identifier and an encryption master key.

2. The semiconductor device according to claim 1, wherein The master key generator includes: a key exporter configured to generate an encryption key based on the device key and at least one requester identifier; and The decryption processor is configured to decrypt the encryption master key.

3. The semiconductor device according to claim 2, wherein: The key deriver is further configured to generate an encryption key using a key derivation function KDF having the device key and at least one requester identifier as input.

4. The semiconductor device according to claim 2, in, Demander data includes primary demander identifiers and secondary demander identifiers, and The key exporter is further configured to generate a primary key based on the device key and the primary demander identifier, and to generate an encryption key based on the primary key and the secondary demander identifier.

5. The semiconductor device according to claim 2, wherein: The master key generator is further configured to perform an operation of generating a master key once in response to the provision of the demander data.

6. The semiconductor device according to claim 1, further comprising: a physical unclonable function PUF key generator configured to generate a PUF key based on the PUF bits; as well as The master key memory is configured to store the master key encrypted by the PUF key.

7. The semiconductor device according to claim 6, further comprising: a master key manager configured to generate an encrypted master key by encrypting the master key by using the PUF key, and to generate a decrypted master key by decrypting the encrypted master key stored in the master key storage by using the PUF key, The cryptographic engine is further configured to receive a decryption master key from a master key manager.

8. The semiconductor device according to claim 7, wherein: The PUF key generator, the master key memory, the master key manager, and the cryptographic engine are included in a secure area that does not include an interface with the outside of the semiconductor device.

9. The semiconductor device according to claim 1, wherein: The device key memory includes a one-time programmable OTP fuse array.

10. A method for operating a semiconductor device for providing security information to a requester, the method comprising: receiving and storing device keys; receiving at least one demander identifier and an encryption master key of a demander; generating an encryption key based on the device key and at least one requester identifier; generating a master key by decrypting the encrypted master key using the encryption key; as well as Perform cryptographic operations based on the master key, Among them, the demanders are manufacturers of equipment including semiconductor equipment.

11. The method according to claim 10, wherein: Generating the encryption key includes generating the encryption key based on the device key and a primary demander identifier that is one of the at least one demander identifier using an operation associated with a supplier of the semiconductor device.

12. The method according to claim 11, in, Generating the encryption key includes generating the encryption key by using a key derivation function KDF, and The KDF includes an input, which includes a device key and at least one demander identifier.

13. The method according to claim 11, wherein: Receiving at least one demander identifier and an encryption master key includes receiving a primary demander identifier and a secondary demander identifier, and The generation of encryption keys includes: generating a primary key based on the device key and the primary claimant identifier; and An encryption key is generated based on the primary key and the secondary requester identifier.

14. The method according to claim 10, wherein: In response to receipt of the encryption master key, generation of the encryption key and generation of the master key are each performed once.

15. The method according to claim 10, further comprising: Generate PUF key based on physical unclonable function PUF bits; Encrypt the master key using the PUF key; as well as The encrypted master key is stored in the master key store.

16. The method according to claim 15, further comprising: Decrypt the encrypted master key stored in the master key memory using the PUF key, The performing of the cryptographic operation includes performing the cryptographic operation based on a master key generated by decrypting the encrypted master key using the PUF key.

17. A method for providing security information of a requester into a semiconductor device, the method comprising: A supplier of the semiconductor device provides the device key to the semiconductor device; generating, by a supplier of the semiconductor device, a primary key based on the device key and a primary demander identifier provided by the primary demander; as well as The semiconductor device supplier provides the primary key to the primary demander. Among them, the demanders are manufacturers of equipment including semiconductor equipment.

18. The method according to claim 17, wherein: The provision of the device key includes programming the device key into the semiconductor device.

19. The method according to claim 17, in, The generation of the primary key includes generating the primary key by using a key derivation function KDF, and The KDF includes an input including a device key and a primary demander identifier.

20. The method of claim 17, further comprising: The primary demander encrypts the primary demander's master key using the primary key; as well as The primary demander provides the semiconductor device with a primary demander identifier and an encryption master key.

21. The method of claim 17, further comprising: Receiving, by the primary demander, a secondary demander identifier from the secondary demander; The primary demander generates an encryption key based on the primary key and the secondary demander identifier; as well as The primary demander provides the encryption key to the secondary demander.

22. A method for providing security information of a requester into a semiconductor device, the method comprising: providing a demander identifier to a supplier of semiconductor equipment or a component including the semiconductor equipment; receiving, from a supplier of the semiconductor device, an encryption key generated based on a demander identifier and a device key provided to the semiconductor device; encrypting the master key using the encryption key; as well as Providing the demander identifier and the encryption master key to the semiconductor device, Among them, the demanders are manufacturers of equipment including semiconductor equipment.

23. A method for providing security information of a secondary demander to a semiconductor device, performed by a primary demander, the method comprising: providing a primary demander identifier to a supplier of semiconductor equipment or a component including the semiconductor equipment; receiving, from a supplier, a primary key generated based on a primary demander identifier and a device key provided to a semiconductor device; receiving a secondary demander identifier from a secondary demander; generating an encryption key based on the primary key and the secondary requester identifier; as well as Provide encryption keys to secondary demanders, The primary demander is a manufacturer of a first device including a semiconductor device, and Among them, the secondary demander is the manufacturer of the second device including the first device.

24. A semiconductor device for providing security information of a demander, the semiconductor device comprising: a device key storage configured to store a device key provided by a supplier of the semiconductor device; A master key generator configured to generate a master key of a demander based on a device key and demander data provided by the demander; A master key manager configured to encrypt the master key by using a PUF key generated based on the physically unclonable function PUF bits and decrypt the encrypted master key; as well as a cryptographic engine configured to perform cryptographic operations based on a decrypted master key provided by a master key manager, Among them, the demanders are manufacturers of equipment including semiconductor equipment, The demander data includes at least one demander identifier and an encryption master key.

25. The semiconductor device according to claim 24, wherein: The master key generator is further configured to generate the master key by using a method shared with the supplier and a method shared with the demander.

Citation Information

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