Method and apparatus for zero voltage switching using a flyback converter

Abstract

For zero voltage switching of a flyback converter, an example apparatus (300) includes: a first driver (132) that operates a first switch (104) to direct a first current (170) to flow to a first winding (108) of a transformer (106); and a second driver (303) that operates a second switch (150) to direct a second current to flow to a second winding (156) of the transformer (106), and operates the second switch (150) so that the second current discharges a voltage of the first switch (104).

Description

Technical Field

[0001] The present application relates generally to power converters and, more particularly, to methods and apparatus for zero voltage switching using a flyback converter. Background Art

[0002] A power converter is a circuit used in various devices to convert an input voltage to a desired output voltage. For example, a flyback converter includes an inductor that is divided to form a transformer. The transformer includes a primary winding and a secondary winding, and the voltage ratio between the primary winding and the secondary winding is scaled. The transformer also provides current isolation between the input and the corresponding output. The flyback converter controls transistors and / or switches to charge and / or discharge the inductor and / or capacitor to maintain the desired output voltage. Some power converters can operate in a transition mode or a quasi-resonant mode, in which the transistors and / or switches do not have a fixed switching frequency, but operate at the first valley point of the circuit resonance based on the flyback reflected voltage. Summary of the invention

[0003] For zero voltage switching of a flyback converter, an example apparatus includes: a first driver that operates a first switch to direct a first current to flow to a first winding of a transformer; and a second driver that operates a second switch to direct a second current to flow to a second winding of the transformer and operates the second switch so that the second current discharges a voltage of the first switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 is a schematic diagram of a conventional power conversion system including a high-side primary switch and a low-side primary switch for operating an active clamp flyback transformer.

[0005] Figure 2 Describe the corresponding Figure 1 A timing diagram of the operation of the power conversion system.

[0006] Figure 3 is a schematic diagram of an example power conversion system for implementing the examples described herein.

[0007] Figure 4 Describe the corresponding Figure 3 An example timing diagram of the operation of an example power conversion system.

[0008] Figure 5 is a schematic diagram of another example power conversion system for implementing the examples described herein.

[0009] Figure 6 Describe the corresponding Figure 5 An example timing diagram of the operation of an example power conversion system.

[0010] Figure 7 is included in Figure 3 and / or Figure 5 A block diagram of an example implementation of an example controller in an example power conversion system of FIG.

[0011] Figure 8 It means that it can be executed to achieve Figure 7 A flow chart of example machine readable instructions for an example controller.

[0012] Fig. 9 is constructed to execute Figure 8 Instructions to achieve Figure 7 Block diagram of an example processing platform of an example controller. DETAILED DESCRIPTION

[0013] The drawings are not drawn to scale. Generally, the same reference numbers are used throughout the drawings and accompanying written description to refer to the same or like parts.

[0014] Flyback converters are commonly used in alternating current (AC) to direct current (DC) power conversion applications and DC to DC power conversion applications, which have galvanic isolation between the input and one or more corresponding outputs. The flyback converter includes an inductor that is divided to form a transformer (e.g., a flyback transformer) so that the voltage at the primary winding is commutable and / or transferable to the voltage at the secondary winding. The transformer also provides other advantages of isolation. In some cases, when a passive clamping device including, for example, a Zener diode in series with a blocking diode on the primary side of the transformer core is used to dissipate energy from the leakage inductance, the flyback converter is a passive clamp flyback converter. In other cases, when an active clamping device including, for example, a high-voltage field effect transistor (FET) in series with a clamping capacitor on the primary side of the transformer core is used to recover energy from the leakage inductance, the flyback converter is an active clamp flyback (ACFB) converter.

[0015] A flyback converter can operate in one of several modes including a discontinuous mode, a continuous mode, or a transition mode. A special case of the transition mode is often referred to as a quasi-resonant (QR) mode. In the discontinuous mode, the flyback converter discharges all the energy stored in the transformer core between cycles (e.g., no energy is stored in the transformer core) and / or between operations of the flyback converter. In some cases, the flyback converter operates based on a fixed switching frequency. For example, the flyback converter may turn on the control FET and then turn off the control FET when a specific amount of drain current is reached. The flyback converter may turn the control FET back on at a fixed time after the control FET is turned off. In the continuous mode, the flyback converter begins a new cycle while some energy is still stored in the transformer core.

[0016] In transition mode, the flyback converter operates at the boundary between discontinuous mode and continuous mode, resulting in one or more FETs not being operated based on a fixed switching frequency. For example, after enabling the FET, the transformer's magnetizing current gradually rises until it reaches the desired current level, at which point the flyback converter turns off the FET. The magnetizing energy is delivered to the output through the secondary winding on the transformer. After the magnetizing current reaches zero, the magnetizing inductance in the flyback transformer rings with the node capacitance, causing the drain-source voltage of the FET to decrease in an oscillating manner to a lower voltage level, where the voltage level is based on the input voltage level and the reflected output voltage from the transformer core. In QR mode, the flyback converter turns the FET back on when one of the valleys or troughs in the drain-source voltage occurs.

[0017] Conventional ACFB converters operate in transition mode by controlling a high-side primary switch (e.g., a high-voltage FET) and a low-side primary switch (e.g., a high-voltage FET) to control the amount and / or direction of current (e.g., positive (conventional) current, negative (conventional) current, etc.) flowing through the primary winding of the flyback transformer. However, during the demagnetization time of the ACFB, or the time period during which the current in the primary winding is exchanged to the secondary winding and then delivered to the output, a large amount of current flows in the primary winding. During the demagnetization time, the current flow on the primary winding distorts the waveform of the current flowing in the secondary winding. If an SR driver with drain-source voltage sensing is used, the distorted waveform complicates the implementation of synchronous rectifier (SR) control on the secondary winding of the transformer. For example, the distorted waveform may cause the drain-source voltage sensing driver to turn off prematurely, thereby reducing the efficiency of the ACFB converter. During the demagnetization time, the current flow in the primary winding may increase the conduction loss in the primary transformer winding and the high-side primary switch.

[0018] The ACFB converter can be operated in transition mode to achieve zero voltage switching (ZVS) of the low-side primary switch by accumulating a relatively small amount of negative magnetizing current in the primary winding of the flyback transformer using the high-side primary switch. However, the high-side primary switch increases the cost and complexity of the ACFB converter. For example, the high-side primary switch is a floating high-side primary switch, which requires a corresponding high-side driver to operate, which adds additional cost, complexity, and use of printed circuit board space compared to conventional flyback implementations.

[0019] High power density ACFB converters operating in transition mode use wide bandgap (WBG) FETs such as gallium nitride (GaN) FETs and aluminum nitride (AlN) FETs due to their relatively low drain-source capacitance. Compared to relatively narrow bandgap FETs (such as silicon FETs) with much higher drain-source capacitance, the lower drain-source capacitance requires less negative current to accumulate on the primary winding to achieve ZVS. However, WBG FETs are more expensive, less reliable, and not widely available than silicon FETs.

[0020] The examples described herein include an improved flyback converter that achieves ZVS on a low-side main switch when operating in transition mode. The examples described herein include an ACFB converter without a high-side primary switch and a corresponding high-side driver. The examples described herein use a controller to control a low-side primary switch coupled to a primary winding of a transformer and a secondary switch coupled to a secondary winding of the transformer. The controller controls the secondary switch by redirecting a drive signal to control the high-side primary switch to the secondary switch through an isolated driver. In some described examples, the secondary switch for passing a negative current to the primary winding can be on a separate or auxiliary winding of the flyback transformer.

[0021] The examples described herein reduce the cost and complexity of the ACFB converter by removing components such as the high-side primary switch and the corresponding high-side driver. The examples described herein significantly reduce and / or minimize the amount of current flowing in the primary winding during the demagnetization time and thus reduce the conduction losses in the primary transformer winding.

[0022] The examples described herein reduce and / or eliminate distortion of the waveform associated with the current in the secondary winding to improve SR control of the secondary winding. The examples described herein enable the ACFB converter to include silicon FETs by reducing the number of primary side FETs, thereby reducing parasitic capacitance due to the output capacitance of the primary side FETs, which allows less negative current to accumulate in the transformer to achieve ZVS.

[0023] Figure 1 is a schematic diagram of a conventional power conversion system 100 including a first switch ( Q1 ) 102 and a second switch ( Q2 ) 104 to operate a transformer 106 . Figure 1 The power conversion system 100 is an active clamp flyback (ACFB) converter. Figure 1 In FIG. 1 , the first switch 102 is a high-side primary switch and the second switch 104 is a low-side primary switch. The first switch 102 and the second switch 104 are coupled to a first winding 108 of a transformer 106 at a first node 110. Figure 1 , the first winding 108 is the primary winding of the transformer 106 .

[0024] exist Figure 1 In the example of , the first switch 102 and the second switch 104 are N-channel metal oxide semiconductor field effect transistors (MOSFETs) (eg, power N-channel MOSFETs). Figure 1 In , the first drain 112 of the first switch 102 is coupled to the first capacitor (C1) 114 at the second node 116. Figure 1 , the first body diode 118 is shown coupled to the first capacitor 114 at the second node 116. The first body diode 118 is shown coupled to the first driver 120, the primary winding 108, and the second switch 104 at the third node 122. Figure 1 In , the first driver 120 is a high-side driver. Figure 1 , the first source 124 of the first switch 102 is coupled to the first body diode 118 , the high-side driver 120 , the primary winding 108 , and the second switch 104 at the third node 122 .

[0025] exist Figure 1 In the example of FIG. 1 , the first gate 126 and the first source 124 of the first switch 102 are coupled to the first driver 120. The first driver 120 controls the switching operation (eg, turning on, turning off, etc.) of the first switch 102, which controls the flow of current from the power source 128 with a corresponding input voltage. Figure 1 The power source 128 may be a battery, a voltage source (e.g., a wall socket providing an AC voltage, etc.), etc. Figure 1 In the embodiment, the controller 130 controls and / or guides or instructs the first driver 120 to operate the first switch 102 .

[0026] Figure 1 The controller 130 controls and / or guides or instructs the second driver 132 to operate the second switch 104. Figure 1 In FIG. 1 , the second driver 132 is a low-side driver. The second driver 132 controls the switching operation of the second switch 104 disposed between the transformer 106 and the negative power rail 134. Figure 1 In FIG. 1 , the second gate 136 and the second source 138 of the second switch 104 are coupled to the second driver 132. The second source 138 is coupled to the second driver 132 at a fourth node 140. Figure 1 , the second drain 142 is coupled to the first switch 102 and the primary winding 108 at a fifth node 146 , and the second body diode 144 is shown coupled to the first switch 102 and the primary winding 108 at the fifth node 146 .

[0027] exist Figure 1 In the example of FIG. 1 , the third driver 148 controls and / or facilitates operation of the secondary side of the transformer 106 . Figure 1The third driver 148 is a synchronous rectifier (SR) driver. The third driver 148 controls the switching operation of a third switch (Q3) 150 disposed between the transformer 106 and a ground power source 152. Figure 1 The third switch 150 is an N-channel MOSFET (eg, an N-channel power MOSFET).

[0028] Figure 1 The third switch 150 includes a third drain 154 coupled to a second winding 156 of the transformer 106. The second winding 156 of the transformer 106 is a secondary winding. Figure 1 , a third body diode 158 of the third switch 150 is shown coupled to the secondary winding 156 at a sixth node 160 . Figure 1 The third switch 150 includes a third source 162 coupled to the third driver 148 and is shown coupled to the third body diode 158 at a seventh node 164 . Figure 1 The seventh node 164 is coupled to the ground power supply 152 and the second capacitor (C2) 166 at an eighth node 168.

[0029] In operation, the controller 130 and the third driver 148 control the switching operations of the first switch 102, the second switch 104, and the third switch 150 to operate in the transition mode. The controller 130 and the third driver 148 operate the power conversion system 100 to achieve ZVS of the second switch 104 by accumulating a relatively small amount of negative magnetizing current in the primary winding 108 of the transformer 106 using the first switch 102. At least one of the controller 130 or the third driver 148 can control the negative current accumulated in the primary winding 108 to achieve ZVS during the conduction period of the second switch 104.

[0030] exist Figure 1 In the example of , the controller 130 instructs the second driver 132 to turn on the second switch 104. In response to the second switch 104 being enabled or in an on state, the first current 170 flows from the power source 128 to the primary winding 108 to store energy in the primary winding 108 of the transformer 106. Figure 1 The first current 170 is a primary current corresponding to the current flowing into and / or out of the primary winding 108 of the transformer 106. When the primary current 170 causes the energy stored in the primary winding 108 to meet a threshold value (e.g., energy exceeding an expected or specified amount of energy), the controller 130 turns off the second switch 104 via the second driver 132. In response to turning off the second switch 104, the primary current 170 of the primary winding 108 causes the drain-source voltage of the second switch 104 to increase until the first body diode 118 conducts and effectively clamps the drain-source voltage to the input voltage of the power supply 128.

[0031] In response to the increased voltage on the secondary winding 156, the primary current 170 is switched to the secondary winding 156 to generate and / or cause the second current 172 or the secondary current 172 to flow from the secondary winding 156 to at least one of the second capacitor 166 or the load 174. For example, the primary current 170 generates flux in the transformer 106 to generate the secondary current 172 and / or induces the secondary current 172 to flow from the secondary winding 156. Figure 1 In the embodiment of the present invention, load 174 can be any device that requires power. For example, load 174 can be a mobile device (e.g., a cellular phone, a smart phone, an iPad, etc.). TM tablet computer), personal digital assistant (PDA), Internet appliance, DVD player, CD player, digital video recorder, Blu-ray player, game console, personal video recorder, set-top box, headset or other wearable device, or any other type of computing device and / or any device that requires a power source to operate.

[0032] After a relatively short delay of turning off the second switch 104, the controller 130 turns on the first switch 102 via the first driver 120 and substantially simultaneously with the third driver 148 turning on the third switch 150 (eg, according to Figure 1 102 and the third switch 150 are turned on at relatively the same time) by ZVS. Alternatively, the controller 130 may not necessarily turn on the first switch 102 at the same time as the third driver 148 turns on the third switch 150. The third driver 148 turns off the third switch 150 when most or all of the energy stored in the transformer 106 has been delivered to the load 174 and / or any other corresponding output. In response to turning off the third switch 150 while maintaining the first switch 102 in the on state, a relatively small amount of negative current accumulates on the primary winding 108. When the amount of negative current meets a threshold, the controller 130 turns off the first switch 102, causing the negative current accumulated in the primary winding 108 to affect the first switch 102 and the second switch 104 and / or more generally Figure 1 The parasitic capacitance of the power conversion system 100 is discharged. In response to discharging the parasitic capacitance, the controller 130 re-triggers the power conversion system 100 by turning on the second switch 104 via the second driver 132 .

[0033] Since the first switch 102 and the corresponding first driver 120 are included, Figure 1 The power conversion system 100 is a relatively complex and expensive implementation of an ACFB converter. During the demagnetization time, the first switch 102 and the first driver 120 allow a large amount of current to flow into the primary winding 108, thereby increasing the conduction loss in the primary winding 108. Figure 1The first switch 102 and the second switch 104 of the power conversion system 100 use WBG FETs, which are more expensive FETs and less reliable FETs than silicon FETs. In some examples, the third switch 150 is a WBG FET.

[0034] Figure 2 Describe the corresponding Figure 1 A timing diagram 200 of the operation of the power conversion system 100 is shown. Figure 2 The timing diagram 200 depicts the relationship between Figure 1 The first gate-source voltage (Q1 gate-source voltage) 202 associated with the first switch 102 of Figure 1 The second gate-source voltage (Q2 gate-source voltage) 204 associated with the second switch 104 is Figure 1 150 associated with the third gate-source voltage (Q3 gate-source voltage) 206, and the drain-source voltage (Q2 drain-source voltage) 208 associated with the second switch 104. Further showing the function of time Figure 1 The primary current 170 and the secondary current 172 are shown in FIG.

[0035] exist Figure 2 In the timing diagram 200, before the first time (t1) 210, based on the second gate-source voltage 204 being pulled high and the primary current 170 accumulating and / or increasing Figure 1 The amount of energy stored in the primary winding 108 is used to turn on the second switch 104. The duration that the primary current 170 accumulates in the primary winding 108 is generally referred to as the magnetization time.

[0036] At the first time 210, the second switch 104 is turned off based on the second gate-source voltage 204 being pulled low. In response to turning off the second switch 104, the primary current 170 switches to Figure 1 The secondary winding 156 causes the secondary current 172 to increase and / or charge the second capacitor 166 and / or flow through Figure 1 At the first time 210, as the primary leakage inductance of the primary winding 108 is de-energized, the primary current 170 in the primary winding 108 begins to decay to zero. At the first time 210, the drain-source voltage 208 of the second switch 104 increases until the first body diode 118 of the first switch 102 conducts and clamps the drain-source voltage 208 to 100 Ω via the first capacitor 114. Figure 1 The input voltage of the power supply 128.

[0037] exist Figure 2In the example of FIG. 2 , after a relatively short delay after the first time 210 , the first switch 102 is turned on by ZVS at a second time (t2) 212 . At the second time 212 , Figure 1 The third switch 150 is turned on by ZVS substantially simultaneously with the first switch 102. The duration from the second time 212 until the third time (t3) 214 after the second time 212 is generally referred to as the demagnetization time. During the demagnetization time, the Figure 1 The energy in the transformer 106 is transmitted via Figure 1 The secondary winding 156 is delivered to the load 174. During the demagnetization time, the transformer primary leakage inductance is Figure 1 The first capacitor 114 resonates.

[0038] exist Figure 2 In the timing diagram 200 of FIG. 1 , during the demagnetization time, a relatively significant current flows in the primary winding 108. During the demagnetization time, the primary current 170 flowing through the primary winding 108 distorts the waveform of the secondary current 172 flowing through the secondary winding 156, as shown in FIG. Figure 2 For example, Figure 2 Compared to the distorted waveform depicted in Figure 2 The desired waveform of the secondary current 172 may be a triangular waveform (eg, a sawtooth waveform).

[0039] exist Figure 2 In the example of FIG. 2 , at the third time 214, all of the excitation energy in the transformer 106 has been delivered to the load 174 and / or any other corresponding output. In response to the excitation energy being delivered, the third switch 150 is turned off by pulling the third gate-source voltage 206 low. After the third time 214, current stops flowing on the secondary winding 156. However, the first switch 102 is still enabled at the third time 214 until the fourth time 216. In response to the first switch 102 being enabled from the third time 214 to the fourth time 216 while at least one of the second switch 104 or the third switch 150 is turned off, a relatively small amount of negative current accumulates on the primary winding 108. Figure 1 The controller 130 controls the magnitude of the negative current. At a fourth time 216 , the controller 130 turns off the first switch 102 .

[0040] exist Figure 2 In the timing diagram 200, in response to turning off the first switch 102, as the drain-source voltage 208 of the second switch 104 discharges and / or decays toward zero volts, the negative current in the primary winding 108 has an effect on the first switch 102, the second switch 104, or more generally Figure 1The parasitic capacitance of at least one of the power conversion systems 100 is discharged. In response to the drain-source voltage 208 approaching and / or reaching zero volts at a fifth time (t5) 218, the second switch 104 is turned on by ZVS by pulling the second gate-source voltage 204 high.

[0041] Figure 3 1 is a schematic diagram of an example power conversion system 300 that includes an example controller 302 to provide a control circuit 304 at an example secondary side 304 of a transformer 106 and more generally at a Figure 3 The fourth example driver 303 is operated on the power conversion system 300 of FIG. Figure 3 In the embodiment of the present invention, the fourth driver 303 is a FET driver (e.g., a power FET driver). Alternatively, the fourth driver 303 can be any other type of driver. In some examples, the controller 302 operates the FET driver 303 to accumulate a negative current on the secondary winding 156, thereby operating via ZVS during the transition mode. Figure 2 The second switch 104 is configured to be operable to:

[0042] exist Figure 3 , the fourth driver 303 is an isolated driver that receives and / or obtains a drive signal from the controller 302 on a first side of the isolation boundary (e.g., the input of the fourth driver 303) and drives a synchronous rectifier on a second side of the isolation boundary (e.g., the output of the fourth driver 303). In some examples, the fourth driver 303 is an IC with a built-in or integrated driver and a corresponding isolation structure. In other examples, the fourth driver 303 is a gate driver transformer. Alternatively, the fourth driver 303 can be implemented using a discrete implementation. Figure 3 The fourth driver 303 of the embodiment performs at least two functions, wherein the first function drives the third switch 150 (e.g., SRFET) based on the drive signal received from the controller 302, and wherein the second function provides isolation. Figure 1 The controller 130 receives the driving signal and must provide a diode emulation function (eg, does not allow reverse current to flow), so Figure 3 The fourth driver 303 is different from Figure 1 The third driver 148 is provided.

[0043] exist Figure 3 In the example, the power conversion system 300 is not Figure 1 The flyback converter of the first switch 102 and the first driver 120. For example, Figure 3 The power conversion system 300 is a flyback converter using a passive clamp. Figure 3 The power conversion system 300 is without a primary high-side switch (such as Figure 1 The first switch 102) and no corresponding high-side driver (such as Figure 1 The first driver 120) is a flyback converter. Figure 1 The power conversion system 100 depicted in the conventional ACFB is different, compared to Figure 1 The power conversion system 100 uses the first switch 102 to accumulate negative current on the primary winding 108, Figure 3 The power conversion system 300 controls and / or uses the third switch 150 to accumulate negative current on the secondary winding 156. Figure 1 The power conversion system 100 is different compared to Figure 1 A third driver 148 coupled to the SR driver 148, Figure 3 The third switch 150 is coupled to the FET driver 303 .

[0044] exist Figure 3 In the example of , the controller 302 is an integrated circuit (IC) chip including one or more electronic circuits. Alternatively, the controller 302 may be implemented using hardware logic, machine-readable instructions, hardware-implemented state machines, etc. and / or any combination thereof. Figure 3 middle, Figure 3 The controller 302 of the transformer 106 turns on the second switch 104 via the second driver 132 to allow the primary current 170 to flow from the power source 128 to the primary winding 108. In response to the primary current 170 storing energy in the primary winding 108 that meets and / or exceeds the energy threshold, the controller 302 turns off the second switch 104. In response to turning off the second switch 104, the current in the primary winding 108 is exchanged and / or transferred to the secondary winding 156. For example, the primary current 170 generates flux in the transformer 106 to generate the secondary current 172 and / or induces the secondary current 172 to flow from the secondary winding 156.

[0045] exist Figure 3 In the example, by removing Figure 1 The first switch 102, in Figure 3 During operation of the power conversion system 300, no current flows or the amount of current is negligible in the primary winding 108 during most or substantially most of the demagnetization time. In response to no current flowing or the amount of current being negligible in the primary winding 108, the waveform of the secondary current 172 remains triangular (e.g., a sawtooth waveform) to prevent and / or mitigate the FET driver 303 from being turned off prematurely and thereby reduce Figure 3 The possibility of improving the efficiency of power conversion system 300. For example, the waveform of secondary current 172 improves the accuracy of predicting and / or determining losses in the secondary circuit.

[0046] exist Figure 3In the example of FIG. 3 , the coupling between the primary winding 108 and the secondary winding 156 is imperfect because there is a leakage inductance between them. During the switching from the primary winding 108 to the secondary winding 156, the leakage energy corresponding to the leakage inductance cannot be directly transferred to the secondary winding 156 and must be absorbed. When the second switch 104 is turned off, the leakage energy of the primary winding 108 is absorbed by the example clamping network 306. Figure 3 The clamping network 306 includes Figure 1 The first capacitor 114, the example diode 308 and the example resistor 310. Alternatively, the resistor 310 may be replaced with a transient voltage suppressor diode, a Zener diode, etc. The clamping network 306 absorbs and / or dissipates leakage energy from the transformer 106 to reduce the voltage stress on the second switch 104.

[0047] Figure 4 Describe the corresponding Figure 3 An example timing diagram 400 of the operation of the power conversion system 300 is shown. Figure 4 The timing diagram 400 depicts the relationship between Figure 3 A second example gate-source voltage (Q2 gate-source voltage) 402 associated with the second switch 104 of Figure 3 404, and an example drain-source voltage (Q2 drain-source voltage) 406 associated with the second switch 104. Further illustrating the voltage as a function of time Figure 3 The primary current 170 and the secondary current 172 are shown in FIG.

[0048] exist Figure 4 In the timing diagram 400 of FIG. 1 , before the first example time (t1) 408, the second switch 104 is turned on based on the second gate-source voltage 402 being pulled high. Before the first time 408, the primary current 170 accumulates and / or increases. Figure 3 The amount of energy stored in the primary winding 108. At the first time 408, based on the second gate-source voltage 402 being pulled low, the second switch 104 is turned off. In response to turning off the second switch 104, the primary current 170 switches to Figure 3 The secondary winding 156 generates and / or causes the secondary current 172 to increase and / or charge the second capacitor 166 and / or flow through Figure 3 The load 174. At the first time 408, as the primary leakage inductance is Figure 3 The clamping network 306 is de-energized, and the primary current 170 in the primary winding 108 begins to decay to zero (eg, decays approximately linearly to zero). At a first time 408, the drain-source voltage 406 of the second switch 104 increases until Figure 3The diode 308 conducts and clamps the drain-source voltage 406 to Figure 3 The clamping network 306 and the input voltage of the power supply 128.

[0049] exist Figure 4 In the example of FIG. 4 , after a relatively short delay after the first time 408, the third switch 150 is turned on by ZVS at a second example time (t2) 410. Shortly after the second time 410, the secondary current 172 gradually decreases and / or decays toward zero at a substantially linear rate. During the demagnetization time from the second time 410 to the third example time (t3) 412, the secondary current 172 is stored in the ZVS. Figure 1 The energy in the transformer 106 is transmitted via Figure 3 of secondary winding 156 is delivered to load 174 .

[0050] exist Figure 4 In the timing diagram 400 of FIG. 4 , for a substantially substantial portion (e.g., a majority) of the demagnetization time, no current flows or the amount of current is negligible in the primary winding 108. In response to no current flowing or the amount of current flowing in the primary winding 108, Figure 4 The waveform of the secondary current 172 depicted in FIG. 1 maintains an expected and / or predictable triangular shape (eg, a sawtooth waveform).

[0051] exist Figure 4 In the example of FIG. 4 , at the third time 412 , all of the excitation energy in the transformer 106 has been delivered to the load 174 and / or any other corresponding output. In response to the excitation energy being delivered, Figure 3 The controller 302 instructs the FET driver 303 to maintain the third switch 150 in the on position to direct and / or cause a relatively small amount of negative current to accumulate on the secondary winding 156. For example, at the third time 412, after the excitation current in the secondary winding 156 decays to approximately zero amperes, the controller 302 may instruct the FET driver 303 to maintain the third switch 150 in the on position. By maintaining the third switch 150 in the on position, the controller 302, via the FET driver 303, may direct energy corresponding to the relatively small amount of negative current in the secondary winding 156 to be stored in the transformer 106.

[0052] exist Figure 4In the example of FIG. 4 , the controller 302 maintains the third switch 150 in the on position via the FET driver 303 from the third time 412 to the fourth example time (t4) 414. At the fourth time 414, the controller 302 instructs the FET driver 303 to turn off the third switch 150. In response to turning off the third switch 150, as the drain-source voltage 406 of the second switch 104 discharges and / or approaches zero volts, the negative current in the secondary winding 156 is exchanged to the primary winding 108 to provide a positive current to the second switch 104 and / or more generally the primary winding 108. Figure 3 The parasitic capacitance of the power conversion system 300 is discharged.

[0053] At the example fifth time (t5) 416, due to the negative current generated on the secondary winding 156 via the third switch 150, the controller 302 turns on the second switch 104 via the second driver 132 through ZVS as the drain-source voltage 406 is approximately zero volts. Figure 1 The power conversion system 100 is different, Figure 3 The controller 302 included in the power conversion system 300 discharges the parasitic capacitance in the power conversion system 300 by accumulating a negative current in the secondary winding 156 via the FET driver 303 operating the third switch 150 as described above.

[0054] Figure 5 is a schematic diagram of another example power conversion system 500 that includes another example controller 501 to operate a fifth example driver 502 on an example auxiliary side 504 or a portion of the power conversion system 500. In some examples, Figure 5 The controller 501 and Figure 3 The controller 302 is the same or substantially similar. Figure 5 In the embodiment, the controller 501 is an integrated circuit (IC) chip including one or more electronic circuits. Alternatively, the controller 501 can be implemented using hardware logic, machine-readable instructions, hardware-implemented state machines, etc. and / or any combination thereof.

[0055] exist Figure 5, the fifth driver 502 is an auxiliary (AUX) driver or an AUX FET driver (e.g., an AUX power FET driver). Alternatively, the fifth driver 502 can be any other type of driver. For example, the fifth driver 502 can be integrated into the controller 501 (e.g., integrated into an IC that includes the controller 501). In other examples, the fifth driver 502 can be a stand-alone driver IC or a discrete implementation. The controller 501 operates the AUX driver 502 to accumulate a negative current on the example auxiliary winding 506 of the example transformer 508, thereby operating via ZVS during the transition mode. Figure 2 The second switch 104 is configured to be operable to:

[0056] exist Figure 5 In the embodiment, the transformer 508 comprises Figure 1 The primary winding 108 and the secondary winding 156 and the auxiliary winding 506 of the transformer 508 can alternatively have a ratio Figure 5 Fewer or more windings are shown. Figure 5 , the AUX driver 502 is coupled to Figure 5 Controller 501 and fourth example switch (Q4) 510. Figure 5 The fourth switch 510 is an N-channel MOSFET. Alternatively, the power conversion system 500 may be implemented using a P-channel MOSFET for the fourth switch 510.

[0057] exist Figure 5 In FIG. 5 , the AUX driver 502 is coupled to the fourth switch 510 at the fourth example gate 512. Figure 5 , the AUX driver 502 is coupled to the fourth switch 510 at a fourth example source 514 at a ninth example node 516 . Figure 5 The AUX driver 502 is shown coupled to a fourth example body diode 518 at a ninth node 516 . Figure 5 A fourth body diode 518 of is shown coupled to a fourth example drain 520 of the fourth switch 510 and the auxiliary winding 506 at a tenth example node 522. Figure 5 , the auxiliary winding 506 is coupled to the fourth drain 520 and is shown coupled to the fourth body diode 518 at a tenth node 522 . Figure 5 The auxiliary winding 506 is coupled to a third example capacitor (C3) 524. The third capacitor 524 maintains a bias rail corresponding to the power supply 128 for the controller 501 and associated circuitry.

[0058] exist Figure 5 In the example of Figure 1 The primary current is 170 Figure 1In response to the primary current 170 being accumulated in the primary winding 108 and / or more generally in Figure 5 In response to storing a certain amount of energy that meets and / or exceeds a threshold value in the transformer 508, the controller 501 turns off the second switch 104 via the second driver 132. In response to turning off the second switch 104, the current in the primary winding 108 is switched to at least one of the secondary winding 156 or the auxiliary winding 506. In response to turning off the second switch 104, Figure 1 The SR driver 148 turns on the third switch 150 to cause and / or guide the secondary current 172 to charge the second capacitor 166 or flow through Figure 1 In response to turning off the second switch 104, the controller 501 commands the AUX driver 502 to turn on the fourth switch 510 to allow the example auxiliary current 526 to flow to the third capacitor 524 to supplement the power supply for the Figure 5 The charge in the capacitor that powers the controller 501 and associated circuitry.

[0059] In operation, when the excitation energy in the transformer 106 has been delivered to the load 174 and / or any other corresponding output, the SR driver 148 turns off the third switch 150, while the controller 501 maintains the fourth switch 510 in the on position via the AUX driver 502. By keeping the fourth switch 510 enabled after the third switch 150 is turned off, the controller 501 enables a relatively small amount of negative current to accumulate in the auxiliary winding 506. For example, the fourth switch 510 enables current (e.g., negative current, negative normal current, etc.) to flow from the third capacitor 524 to the auxiliary winding 506. In response to energy corresponding to the negative current satisfying the energy threshold, the controller 501 instructs the AUX driver 502 to turn off the fourth switch 510.

[0060] In response to turning off the fourth switch 510, the negative current on the auxiliary winding 506 is exchanged to the primary winding 108, which in turn discharges the parasitic capacitance of the second switch 104. For example, the negative current generates flux in the transformer 508 to generate a negative current and / or induces a negative current to flow from the primary winding 108 to discharge the parasitic capacitance of the second switch 104. In response to the discharge of the parasitic capacitance of the second switch 104, as the drain-source voltage of the second switch 104 decays to approximately zero volts, the controller 501 can turn on the second switch 104 through ZVS via the second driver 132 by discharging the parasitic capacitance.

[0061] Figure 6 Describe the corresponding Figure 5 An example timing diagram 600 of the operation of the power conversion system 500 is shown. Figure 6 The timing diagram 600 depicts the relationship between Figure 5 A second example gate-source voltage (Q2 gate-source voltage) 602 associated with the second switch 104 of Figure 5 A third example gate-source voltage (Q3 gate-source voltage) 604 associated with the third switch 150 of Figure 5 A third example gate-source voltage (Q3 gate-source voltage) 606 associated with the fourth switch 510 of Figure 5 An example drain-source voltage (Q2 drain-source voltage) 608 associated with the second switch 104 is shown. Further illustrated are the primary current 170, the secondary current 172, and the auxiliary current 526 as a function of time.

[0062] exist Figure 6 In the timing diagram 600 of FIG. 1 , before the first example time (t1) 610, the second switch 104 is turned on based on the second gate-source voltage 602 being pulled high. Before the first time 610, the primary current 170 accumulates and / or increases. Figure 5 The amount of energy stored in the primary winding 108. At the first time 610, based on the second gate-source voltage 602 being pulled low, the second switch 104 is turned off. In response to turning off the second switch 104, the primary current 170 switches to Figure 5 The secondary winding 156 is connected to generate and / or cause the secondary current 172 to increase and / or charge the second capacitor 166 and / or flow through Figure 3 load 174 and / or to or through any other corresponding output. At the first time 610, as the primary leakage inductance is Figure 5 The clamping network 306 is de-energized, and the primary current 170 in the primary winding 108 begins to decay to zero (e.g., decays approximately linearly to zero). At the first time 610, the drain-source voltage 606 of the second switch 104 increases until Figure 5 The diode 308 of the clamping network 306 is turned on and clamps the drain-source voltage 606 to the Figure 5 The input voltage of the power supply 128.

[0063] exist Figure 6 In the example of FIG. 6 , after a relatively short delay after the first time 610, the SR driver 148 turns on the third switch 150 via ZVS at a second example time (t2) 612. Shortly after the second time 612, the secondary current 172 gradually decreases and / or decays toward zero at a substantially linear rate. During the demagnetization time from the second time 612 to the third example time (t3) 614, the secondary current 172 is stored in Figure 5 The energy in transformer 508 is transmitted via Figure 5 of secondary winding 156 is delivered to load 174 .

[0064] exist Figure 6 In the timing diagram 600 of FIG. 1 , for a substantially substantial portion (e.g., a majority) of the demagnetization time, no current flows or a negligible amount of current flows in the primary winding 108. In response to no current flowing or a negligible amount of current flowing in the primary winding 108, Figure 6 The waveform of the secondary current 172 depicted in FIG. 1 maintains an expected and / or predictable triangular shape (e.g., a sawtooth waveform). The triangular waveform of the secondary current 172 prevents Figure 5 The SR driver 148 prematurely turns off the third switch 150 due to Figure 2 The distorted waveform of the secondary current 172 is depicted in FIG. Figure 1 The power conversion system 100 occurs.

[0065] exist Figure 6 In the example of , at the third time 614, all of the excitation energy in the transformer 508 has been delivered to the load 174 and / or any other corresponding output. In response to the excitation energy being delivered, Figure 5 The controller 501 instructs the AUX driver 502 to maintain the fourth switch 510 in the on position to guide and / or cause a relatively small amount of negative current to accumulate in Figure 5 For example, at the third time 614, after the excitation current in the secondary winding 156 decays to approximately zero amperes, the controller 501 may instruct the AUX driver 502 to maintain the fourth switch 510 in the on position. By maintaining the fourth switch 510 in the on position, the controller 501, via the AUX driver 502, may direct the energy corresponding to the relatively small amount of negative current in the auxiliary winding 506 to be stored in the transformer 508.

[0066] exist Figure 6 In the example of FIG. 5 , from the third time 614 to the fourth example time (t4) 616, the controller 501 maintains the fourth switch 510 in the on position via the AUX driver 502. At the fourth time 616, the controller 501 instructs the AUX driver 502 to turn off the fourth switch 510. In response to turning off the fourth switch 510, as the drain-source voltage 608 of the second switch 104 discharges and / or approaches zero volts, the negative current in the auxiliary winding 506 is exchanged to the primary winding 108 to provide a positive current to the second switch 104 and / or more generally the primary winding 108. Figure 5 The parasitic capacitance of the power conversion system 500 is discharged.

[0067] At the example fifth time (t5) 618, due to the negative current generated on the auxiliary winding 506 via the fourth switch 510, the controller 501 turns on the second switch 104 via the second driver 132 through ZVS as the drain-source voltage 606 is approximately zero volts. Figure 1 In contrast to the power conversion system 100, Figure 5 The controller 501 included in the power conversion system 300 discharges the parasitic capacitance in the power conversion system 500 via the AUX driver 502 that operates the fourth switch 510 as described above based on the negative current in the auxiliary winding 506 .

[0068] Figure 7 It is possible Figure 3 The controller 302 and / or Figure 5 501 of the controller 700 is a block diagram of an example implementation of the controller 700. In some examples, compared to conventional ACFB converter implementations (e.g., Figure 1 Compared to the negative current accumulated on the primary winding achieved by the power conversion system 100 of FIG. 1 ), the controller 700 controls the low-side primary switch through ZVS based on the negative current accumulated on the secondary winding, auxiliary winding, etc. Figure 7 In the example of , the controller 700 includes an example voltage detector 710 , an example current detector 720 , and an example control signal generator 730 .

[0069] exist Figure 7 In some examples, the controller 700 includes a voltage detector 710 to measure and / or sample a voltage at periodic intervals (e.g., synchronous intervals) or non-periodic intervals (e.g., asynchronous intervals). In some examples, the voltage detector 710 measures a drain-source voltage of a switch. For example, the voltage detector 710 may measure Figure 3 In such an example, the voltage detector 710 can measure the drain-source voltage via a voltage sensor (e.g., a VDS sensor) coupled to the second switch 104, the third switch 150, etc. In other examples, the voltage detector 710 can measure Figure 5The voltage detector 710 may measure the drain-source voltage of at least one of the second switch 104, the third switch 150, or the fourth switch 510. In such an example, the voltage detector 710 may measure the drain-source voltage via a voltage sensor (e.g., a VDS sensor) coupled to the second switch 104, the third switch 150, or the fourth switch 510. For example, the voltage detector 710 may correspond to a voltage sensor coupled to the first node 110 to measure the drain-source voltage of the second switch 104. In other examples, the voltage detector 710 may correspond to a voltage sensor coupled to the tenth node 522 to measure the drain-source voltage of the fourth switch 510.

[0070] In some examples, voltage detector 710 measures a voltage associated with a winding of a transformer. For example, voltage detector 710 may measure Figure 3 The voltage detector 710 can measure the voltage at the input and / or output of at least one of the primary winding 108 or the secondary winding 156 of the transformer 508. In such an example, the voltage detector 710 can measure the voltage via a voltage sensor coupled to the input and / or output of one or more windings. For example, the voltage detector 710 can correspond to a resistor divider from the auxiliary winding 506 of the transformer 508. In other examples, the voltage detector 710 can measure Figure 5 The voltage detector 710 can measure the voltage at the input and / or output of at least one of the primary winding 108, the secondary winding 156, or the auxiliary winding 506. In such an example, the voltage detector 710 can measure the voltage via a voltage sensor coupled to the input and / or output of one or more windings.

[0071] exist Figure 7 In some examples, the controller 700 includes a current detector 720 to measure and / or sample current at periodic intervals (e.g., synchronous intervals) or non-periodic intervals (e.g., asynchronous intervals). In some examples, the current detector 720 measures the current flowing through the windings of the transformer and / or associated with the windings of the transformer. For example, the current detector 720 can measure the current flowing through the windings of the transformer. Figure 3 The current of at least one of the primary winding 108 or the secondary winding 156 of the embodiment of the present invention can be measured by the current detector 720. In such an example, the current detector 720 can measure the current via a current sensor coupled to the input and / or output of one or more windings. For example, the current detector 720 can correspond to a current sensing resistor or a current sensing transformer. In other examples, the current detector 720 can measure the current flowing through Figure 5 The current detector 720 may measure the current of at least one of the primary winding 108, the secondary winding 156, or the auxiliary winding 506. In such an example, the current detector 720 may measure the current via a current sensor coupled to an input and / or output of one or more windings.

[0072] exist Figure 7In the example of FIG. 7 , the controller 700 includes a control signal generator 730 to generate a control signal such as a voltage signal, a current signal, etc. For example, the control signal generator 730 can generate a voltage signal, a current signal, etc. to indicate Figure 3 At least one of the second driver 132 or the FET driver 303 is turned on or off Figure 3 The second switch 104 and / or the third switch 150. In other examples, the control signal generator 730 can generate a voltage signal, a current signal, etc. to guide Figure 5 At least one of the second driver 132, the SR driver 148, or the AUX driver 502 is turned on or off Figure 5 At least one of the second switch 104, the third switch 150 or the fourth switch 510.

[0073] In some examples, the control signal generator 730 generates a control signal based on a measured parameter that satisfies a threshold. For example, when the measured voltage satisfies a voltage threshold, the control signal generator 730 can operate the switch. For example, when the voltage sensor measures that the drain-source voltage of the second switch 104 satisfies the voltage threshold, the control signal generator 730 can turn on the second switch 104. Figure 3 The second switch 104 is configured to be operable to:

[0074] In some examples, the control signal generator 730 generates a control signal when the measured current meets the current threshold. For example, when the current sensor measures that the current flowing through the primary winding 108 meets the current threshold, the control signal generator 730 may turn off the control signal. Figure 3 For example, when the primary current 170 is 1 ampere and is therefore greater than the current threshold of 0.5 amperes, the control signal generator 730 can turn off the second switch 104. In other examples, when the current flowing through the corresponding winding is less than the current threshold, the control signal generator 730 can turn on or off the switch.

[0075] Despite Figure 7 The implementation is shown in Figure 3 and / or Figure 5 700, but Figure 7 One or more of the elements, processes, and / or devices shown in the example may be combined, divided, rearranged, omitted, eliminated, and / or implemented in any other manner. In addition, the example voltage detector 710, the example current detector 720, the example control signal generator 730, and / or more generally Figure 7The example controller 700 can be implemented by hardware, software, firmware and / or any combination of hardware, software and / or firmware. Thus, for example, any of the example voltage detector 710, the example current detector 720, the example control signal generator 730 and / or more generally the example controller 700 can be implemented by one or more analog or digital circuits, logic circuits, programmable processors, programmable controllers, graphics processing units (GPUs), digital signal processors (DSPs), application specific integrated circuits (ASICs), programmable logic devices (PLDs) and / or field programmable logic devices (FPLDs). When any device or system claim of this patent is read to cover pure software and / or firmware implementations, at least one of the example voltage detector 710, the example current detector 720 and / or the example control signal generator 730 is hereby expressly defined to include a non-transitory computer-readable storage device or storage disk (including software and / or firmware) such as a memory, a digital versatile disk (DVD), a compact disk (CD), a Blu-ray disk, etc. Further, Figure 7 The example controller 700 includes in addition to or instead of Figure 7 One or more elements, processes and / or devices of those devices shown in, and / or may include more than one of any or all of the elements, processes and devices shown. As used herein, the phrase "in communication" (including variations thereof) encompasses direct communication and / or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or constant communication, but further includes selective communication at regular intervals, scheduled intervals, non-periodic intervals and / or one-time events.

[0076] Figure 8 The figure shows the method used to implement Figure 7 Flowchart of example hardware logic, machine readable instructions, hardware implemented state machine and / or any combination thereof of controller 700. Machine readable instructions may be an executable program or part of an executable program to be executed by a computer processor (e.g., in conjunction with Fig. 9 The program may be embodied in software stored in a non-transitory computer-readable storage medium such as a CD-ROM, floppy disk, hard drive, DVD, Blu-ray disk, or memory associated with the processor 912, but the entire program and / or portions thereof may be executed by a device other than the processor 912 and / or embodied in firmware or dedicated hardware. In addition, although reference is made to Figure 8 The flowchart shown in describes an example procedure, but an implementation may alternatively be used Figure 7Many other methods of the example controller 700 are described. For example, the order of execution of the blocks may be changed and / or some of the blocks described may be changed, eliminated, or combined. Additionally or alternatively, any or all of the blocks may be implemented by one or more hardware circuits (e.g., discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) that are configured to perform corresponding operations without executing software or firmware.

[0077] As mentioned above, Figure 8 The example processes of may be implemented using executable instructions (e.g., computer and / or machine readable instructions) stored on a non-transitory computer and / or machine readable medium (such as a hard drive, flash memory, read-only memory, compact disk, digital versatile disk, cache, random access memory, and / or any other storage device or storage disk in which information of any duration is stored (e.g., for an extended period of time, permanently, transiently, temporarily buffered and / or cached information)). As used herein, the term "non-transitory computer readable medium" is expressly defined to include any type of computer readable storage device and / or storage disk, and to exclude propagating signals and to exclude transmission media.

[0078] In this specification, the term "and / or" (when used in a form such as A, B and / or C) refers to any combination or subset of A, B, C, such as: (a) A only; (b) B only; (c) C only; (d) A and B; (e) A and C; (f) B and C; and (g) A and B and C.

[0079] Figure 8 is a flow chart representing example machine readable instructions 800 that may be executed to implement Figure 7 The example controller 700 is operated by ZVS Figure 3 and / or Figure 5 At least the second switch 104. For example, the machine readable instructions 800 may implement Figure 3 The controller 302 and / or Figure 5 Controller 501.

[0080] At block 802, the controller 700 samples the primary drain-source voltage substantially while turning on the primary FET. For example, Figure 7 The voltage detector 710 can measure Figure 3 The drain-source voltage of the second switch 104 (e.g., measured by a voltage sensor coupled to and / or monitoring the second switch 104). In such an example, Figure 7 The control signal generator 730 may instruct the second driver 132 to turn on the second switch 104 .

[0081] At block 804, in response to turning on the primary FET, the controller 700 turns off the primary FET based on the current measured by the current sense comparator. Figure 7 The current detector 720 can measure the current flowing through Figure 3 In such an example, the current detector 720 may compare the current with the current threshold, and the control signal generator 730 may turn off the second switch 104 via the second driver 132 based on the comparison. For example, when the primary current 170 flowing through the primary winding 108 is greater than the current threshold (e.g., a predetermined current threshold), the control signal generator 730 may turn off the second switch 104.

[0082] After turning off the primary FET, the controller 700 triggers a delay at block 806. At block 808, the controller 700 turns on the secondary FET. For example, the control signal generator 730 may be based on adaptive ZVS control via Figure 3 The FET driver 303 is turned on Figure 3 For example, the control signal generator 730 may turn on the third switch 150 to deliver the secondary current 172 from the secondary winding 156 to at least one of the second capacitor 166, the load 174, or any other corresponding output.

[0083] In other examples, the control signal generator 730 can be based on adaptive ZVS control via Figure 5 The AUX driver 502 is turned on Figure 5 510. For example, the control signal generator 730 may turn on the fourth switch 510 to deliver the auxiliary current 526 from the auxiliary winding 506 to the third capacitor 524. At block 812, in response to turning on the secondary FET, the controller 700 triggers a delay. After the delay at block 812, the controller 700 returns to block 802 to sample the drain-source voltage of the primary FET and substantially simultaneously turns on the primary FET.

[0084] exist Figure 8In the machine-readable instructions 800 of FIG. 800 , in response to executing the operation of block 802, the controller 700 determines whether ZVS is occurring on the primary FET at block 814. For example, the control signal generator 730 may determine whether the second switch 104 is turned on by ZVS based on the drain-source voltage of the second switch 104 measured by the voltage detector 710. For example, if the second switch 104 is turned on when the drain-source voltage of the second switch 104 is greater than 0 volts, the control signal generator 730 may determine that the second switch 104 is not turned on by ZVS. In other examples, if the second switch 104 is turned on when the drain-source voltage of the second switch 104 is less than a ZVS threshold (e.g., 0.1 volts, 0.3 volts, etc.), the control signal generator 730 may determine that the second switch 104 is turned on by ZVS.

[0085] If the controller 700 determines at block 814 that ZVS is occurring on the primary FET, the control signal generator 730 reduces the on-time of the secondary FET at block 816. For example, the control signal generator 730 may reduce Figure 3 The FET driver 303 maintains Figure 3 The duration that the third switch 150 is in the on state.

[0086] If the controller 700 determines at block 814 that ZVS is not occurring on the primary FET, the control signal generator 730 increases the on-time of the secondary FET at block 818. For example, the control signal generator 730 may increase Figure 3 The FET driver 303 maintains Figure 3 In such an example, by keeping the third switch 150 in the on state for a longer duration, the control signal generator 730 directs the additional negative current to Figure 3 At block 810, by accumulating additional negative current on the secondary winding 156, the drain-source voltage of the second switch 104 can decay to approximately zero volts when the increased amount of negative current is exchanged to the primary winding 108 when the third switch 150 is turned off.

[0087] Fig. 9 is constructed to execute Figure 8 Instructions to achieve Figure 7 900 of the controller 700. For example, the processor platform 900 may be configured to perform Figure 8 Instructions to achieve Figure 3 The controller 302 and / or Figure 5The processor platform 900 may be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cell phone, a smart phone, an iPad, etc.). TM tablet computer, etc.), personal digital assistant (PDA), Internet appliance, DVD player, CD player, digital video recorder, Blu-ray player, game console, personal video recorder, set-top box, headset or other wearable device, or any other type of computing device.

[0088] The processor platform 900 of the illustrated example includes a processor 912. The processor 912 of the illustrated example is hardware. For example, the processor 912 may be implemented by one or more integrated circuits, logic circuits, microprocessors, GPUs, DSPs, or controllers of any desired family or manufacturer. The hardware processor may be a semiconductor-based (e.g., silicon-based) device. In this example, the processor 912 implements Figure 7 An example controller 700 , an example voltage detector 710 , an example current detector 720 , and an example control signal generator 730 .

[0089] The processor 912 of the illustrated example includes a local memory 913 (e.g., a cache). The processor 912 of the illustrated example communicates with a main memory including a volatile memory 914 and a non-volatile memory 916 via a bus 918. The volatile memory 914 may be comprised of a synchronous dynamic random access memory (SDRAM), a dynamic random access memory (DRAM), Dynamic Random Access Memory The non-volatile memory 916 may be implemented by flash memory and / or any other desired type of storage device. Access to the main memory 914, 916 is controlled by a memory controller.

[0090] The processor platform 900 of the illustrated example also includes an interface circuit 920. The interface circuit 920 may be connected to the processor platform 900 through an Ethernet interface, a universal serial bus (USB), Any type of interface standard implementation such as an interface, a Near Field Communication (NFC) interface, and / or a PCI Express interface.

[0091] In the example shown, one or more input devices 922 are connected to the interface circuit 920. The input devices 922 allow a user to enter data and / or commands into the processor 912. The input devices 922 may be implemented by, for example, an audio sensor, a microphone, a camera (still or video), a keyboard, buttons, a mouse, a touch screen, a trackpad, a trackball, a pointing device, and / or a voice recognition system.

[0092] One or more output devices 924 are also connected to the interface circuit 920 of the illustrated example. The output device 924 can be implemented, for example, by a display device (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display (LCD), a cathode ray tube display (CRT), an in-place switch (IPS) display, a touch screen, etc.), a tactile output device, a printer, and / or a speaker. Therefore, the interface circuit 920 of the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or a graphics driver processor.

[0093] The interface circuitry 920 of the illustrated example also includes communication devices such as transmitters, receivers, transceivers, modems, residential gateways, wireless access points, and / or network interfaces to facilitate data exchange with external machines (e.g., any kind of computing device) via a network 926. This communication may be via, for example, an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a line-of-site wireless system, a cellular telephone system, etc.

[0094] The processor platform 900 of the illustrated example also includes one or more mass storage devices 928 for storing software and / or data. Examples of such mass storage devices 928 include floppy disk drives, hard disk drives, optical disk drives, Blu-ray disk drives, redundant array of independent disks (RAID) systems, and digital versatile disk (DVD) drives.

[0095] Figure 8 The machine-executable instructions 932 may be stored in the mass storage device 928, in the volatile memory 914, in the non-volatile memory 916, and / or on a removable, non-transitory computer-readable storage medium (such as a CD or DVD).

[0096] In light of the foregoing, example methods, apparatus, and articles of manufacture for zero voltage switching of a flyback converter are described herein. The examples described herein reduce the cost and complexity of a flyback converter (e.g., an active clamp flyback converter) by eliminating a high-side primary switch and a corresponding isolation drive circuit associated with the primary winding of the flyback transformer. Compared to a conventional active clamp flyback converter, the examples described herein reduce the current flow in the primary winding of the flyback transformer during the demagnetization time, and thus reduce the conduction losses in the primary transformer winding and the corresponding clamping network.

[0097] The examples described herein use alternative types of FETs to replace wide bandgap FETs (e.g., silicon FETs) to improve efficiency through ZVS. The reduction of switches coupled to and / or associated with the primary winding of the flyback transformer reduces the corresponding parasitic capacitance, resulting in less negative current accumulated in the flyback transformer to achieve ZVS. In some described examples, higher efficiency can be achieved using silicon FETs compared to wide bandgap FETs in conventional active clamp flyback converters. The examples described herein provide simplified and / or less complex control of synchronous rectification operations in the secondary side of the flyback converter.

[0098] The examples described herein simplify control by controlling synchronous rectification directly by the controller, thereby eliminating the need for drain-source sensing or other diode emulation techniques typically included in the SR driver of a conventional flyback converter. Furthermore, the examples described herein maintain a predictable triangular shape for the current waveform flowing through the secondary winding of the flyback transformer because no current or a negligible amount of current flows in the primary winding while current flows through the secondary winding.

[0099] Modifications may be made in the described embodiments, and other embodiments are possible, within the scope of the claims.

Claims

1. A device comprising: a first driver having an output coupled to a control terminal of a first switch and controlling the first switch to direct a first current from a first terminal of a primary winding of a transformer to a first current terminal of the first switch during a first time period; and a second driver having a control terminal coupled to the second switch and controlling the second switch to: directing a second current to flow from the first terminal of the secondary winding of the transformer to a load during a second time period beginning after completion of the first time period; and During the second time period, a third current is directed to flow from the second terminal of the secondary winding of the transformer to the current terminal of the second switch for a duration, the second time period lasting until the voltage across the first current terminal and the second current terminal of the first switch reaches zero, wherein the third current is configured to direct a fourth current to flow from the first current terminal of the first switch to the first terminal of the primary winding of the transformer until the voltage across the first current terminal and the second current terminal of the first switch is discharged to zero after the second time period.

2. The device according to claim 1, wherein: When the voltage is discharged, the first driver operates the first switch to be turned on by zero voltage switching.

3. The device of claim 1, further comprising a controller coupled to the first driver and the second driver.

4. The device according to claim 1, wherein: At least one of the first switch or the second switch is an N-channel metal oxide semiconductor field effect transistor.

5. The device according to claim 1, wherein: The second terminal of the primary winding of the transformer is coupled to a clamping network to clamp a voltage at the second terminal of the primary winding of the transformer to an input voltage.

6. The device of claim 1, further comprising a third driver that operates a third switch to direct a third current from a third winding of the transformer to at least one of a capacitor, a load, or an output.

7. A method comprising: turning on a first switch coupled to a first terminal of a primary winding of a transformer to direct a first current from the first terminal of the primary winding to a first current terminal of the first switch during a first time period; turning on a second switch having a current terminal coupled to a first terminal of a secondary winding of the transformer to direct a second current to flow from the first terminal of the secondary winding to a load during a second time period beginning after completion of the first time period; as well as During the second time period, the second switch is kept on for a duration to guide a third current to flow from the first terminal of the secondary winding to the current terminal of the second switch, the second time period lasts until the voltage across the first current terminal and the second current terminal of the first switch reaches zero, and the third current is configured to guide a fourth current to flow from the current terminal of the first switch to the first terminal of the primary winding of the transformer until the voltage across the first current terminal and the second current terminal of the first switch is discharged to zero after the second time period.

8. The method according to claim 7, further comprising: When the voltage is discharged, the first switch is turned on with zero voltage switching. 9 . The method of claim 7 , wherein switching the first switch comprises operating a first driver coupled to the first switch, and switching the second switch comprises operating a second driver coupled to the second switch.

10. The method according to claim 7, wherein: At least one of the first switch or the second switch is an N-channel metal oxide semiconductor field effect transistor.

11. The method according to claim 7, wherein: The second terminal of the primary winding of the transformer is coupled to a clamping network to clamp a voltage at the second terminal of the primary winding of the transformer to an input voltage.

12. The method according to claim 7, wherein: The second switch is coupled to a third winding of the transformer, and further includes a third driver operatively coupled to the third switch coupled to the secondary winding to direct the second current to flow from the secondary winding to the load.

13. The method according to claim 7, further comprising: determining whether the first switch is turned on with zero voltage switching; In response to determining that the first switch is not turned off with zero voltage switching, increasing a duration that the second switch is turned on; as well as In response to determining that the first switch is turned on with zero voltage switching, a duration that the second switch is turned on is reduced.

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