Semiconductor devices

Abstract

A semiconductor device is provided for charging that minimizes degradation of the energy storage device. The charging current is adjusted according to the ambient temperature. Charging is performed with a lower charging current in low-temperature environments. Charging is stopped when the ambient temperature is too low or too high. An oxide semiconductor storage element is used to measure the ambient temperature. By using an oxide semiconductor storage element, both the ambient temperature is measured and the temperature information is maintained.

Description

Technical Field

[0001] One embodiment of the present invention relates to an article, method or manufacturing method. One embodiment of the present invention relates to a process, machine, product or composition of matter. One embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a lighting device or an electronic device. One embodiment of the present invention relates to a charging control method for a power storage device. One embodiment of the present invention relates to a charging device.

[0002] In addition, in this specification, a power storage device (also referred to as a "battery" or "secondary battery") refers to all elements and devices that have a power storage function. For example, a power storage device includes a storage battery (also referred to as a secondary battery) such as a lithium-ion secondary battery, a lithium-ion capacitor, a nickel-hydrogen battery, an all-solid-state battery, and an electric double-layer capacitor. Background Art

[0003] As semiconductor thin films that can be used for transistors, silicon-based semiconductor materials are widely known, and as other materials, oxide semiconductors (OS: Oxide Semiconductor) have attracted attention. As oxide semiconductors, for example, it is known that in addition to single metal oxides such as indium oxide and zinc oxide, there are also multinary metal oxides. Among multinary metal oxides, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) is particularly hot.

[0004] Through the study of IGZO, CAAC (c-axis aligned crystalline) structure and nc (nanocrystalline) structure, which are neither single crystal nor amorphous, were discovered in oxide semiconductors (see non-patent documents 1 to 3). Non-patent documents 1 and 2 disclose a technology for manufacturing transistors using an oxide semiconductor having a CAAC structure. Non-patent documents 4 and 5 disclose that an oxide semiconductor having a lower crystallinity than a CAAC structure and a nc structure also has tiny crystals.

[0005] A transistor using IGZO for an active layer has an extremely small off-state current (see Non-Patent Document 6), and LSIs and displays utilizing this characteristic are known (see Non-Patent Documents 7 and 8).

[0006] In addition, various semiconductor devices using a transistor including an oxide semiconductor in a channel formation region (hereinafter also referred to as an “OS transistor”) have been proposed.

[0007] In recent years, various storage bodies such as lithium-ion secondary batteries, lithium-ion capacitors, and air batteries have been actively researched and developed. In particular, with the development of the semiconductor industry such as mobile phones, smart phones, or notebook personal computers, portable information terminals, electronic devices such as portable music players or digital cameras, medical equipment, hybrid electric vehicles (HEV), electric vehicles (EV), or plug-in hybrid electric vehicles (PHEV), etc., the demand for high-output, high-energy-density lithium-ion secondary batteries has increased dramatically. As a rechargeable energy supply source, lithium-ion secondary batteries have become a necessity in the modern information society.

[0008] Lithium-ion secondary batteries are required to have higher energy density, improved cycle characteristics, safety in various operating environments, improved long-term reliability, and the like.

[0009] A lithium-ion secondary battery includes, for example, at least a positive electrode, a negative electrode, and an electrolyte solution (Patent Document 1).

[0010] Patent Document 2 discloses a battery state detection device for detecting a micro short circuit of a secondary battery and a battery pack incorporating the same.

[0011] [Prior technical literature]

[0012] [Patent Document]

[0013] [Patent Document 1] Japanese Patent Application Publication No. 2012-9418

[0014] [Patent Document 2] Japanese Patent Application Publication No. 2010-66161

[0015] [Non-patent literature]

[0016] [Non-patent document 1] S. Yamazaki et al., "SID Symposium Digest of Technical Papers", 2012, volume 43, issue 1, p. 183-186

[0017] [Non-patent document 2] S. Yamazaki et al., "Japanese Journal of Applied Physics", 2014, volume 53, Number 4S, p. 04ED18-1-04ED18-10

[0018] [Non-patent document 3] S. Ito et al., "The Proceedings of AM-FPD'13 Digest of Technical Papers", 2013, p.151-154

[0019] [Non-patent document 4] S. Yamazaki et al., "ECS Journal of Solid State Science and Technology", 2014, volume 3, issue 9, p. Q3012-Q3022

[0020] [Non-patent document 5] S. Yamazaki, “ECS Transactions”, 2014, volume 64, issue 10, p.155-164

[0021] [Non-patent document 6] K. Kato et al., "Japanese Journal of Applied Physics", 2012, volume 51, p.021201-1-021201-7

[0022] [Non-patent document 7] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, pp. T216-T217

[0023] [Non-patent document 8] S.Amano et al., "SID Symposium Digest of Technical Papers", 2010, volume 41, issue 1, p.626-629 Summary of the invention

[0024] Technical problem to be solved by the invention

[0025] In many cases, a method of charging a storage device by causing a certain current to flow between the positive and negative electrodes of the storage device until the voltage between the two electrodes reaches a certain value is used. The most suitable current value for charging a storage device varies depending on the constituent materials of the positive electrode, negative electrode, and electrolyte. In addition, in order to reduce the degradation of the storage device (such as the decrease in storage capacity), the current value needs to be appropriately set according to the ambient temperature during charging (including the heat generation of the storage device).

[0026] One of the purposes of one embodiment of the present invention is to provide a semiconductor device that realizes charging that is less likely to cause degradation of a storage device. One of the purposes of another embodiment of the present invention is to provide a charging method that is less likely to cause degradation of a storage device. One of the purposes of another embodiment of the present invention is to provide a charging method that is less likely to damage a storage device. One of the purposes of another embodiment of the present invention is to provide a novel semiconductor device. One of the purposes of another embodiment of the present invention is to provide a novel charging device. One of the purposes of another embodiment of the present invention is to provide a novel charging method.

[0027] Note that the recording of these purposes does not prevent the existence of other purposes. In addition, one mode of the present invention does not need to achieve all of the above purposes. In addition, the description of the specification, drawings, claims, etc. clearly contains purposes other than the above purposes, and the purposes other than the above purposes can be obtained from the description of the specification, drawings, claims, etc.

[0028] Solutions to technical problems

[0029] The charging current is adjusted according to the ambient temperature. Charging is performed with a small charging current in a low temperature environment. Charging is stopped when the ambient temperature is too low or too high. In the measurement of the ambient temperature, a storage element including an oxide semiconductor is used. By using a storage element including an oxide semiconductor, the ambient temperature is measured and the temperature information is maintained at the same time.

[0030] One embodiment of the present invention is a semiconductor device including a first storage element, a second storage element, a comparison circuit and a current regulation circuit, the first storage element having a function of maintaining reference temperature information, the second storage element including a transistor including an oxide semiconductor in a semiconductor layer, the second storage element having a function of measuring ambient temperature and a function of maintaining ambient temperature as ambient temperature information, the comparison circuit having a function of comparing reference temperature information and ambient temperature information to determine the operation of the current regulation circuit, and the current regulation circuit having a function of supplying current to a secondary battery.

[0031] The semiconductor device may include a plurality of first storage elements. The first storage elements preferably have a function of storing reference temperature information different from each other.

[0032] The semiconductor layer preferably contains at least one of indium and zinc. The semiconductor layer more preferably contains both indium and zinc.

[0033] As the secondary battery, for example, a lithium ion secondary battery can be used.

[0034] Effects of the Invention

[0035] According to one embodiment of the present invention, a semiconductor device can be provided that realizes charging that does not easily cause degradation of a storage device. In addition, a charging method that does not easily cause degradation of a storage device can be provided. In addition, a charging method that does not easily damage a storage device can be provided. In addition, a novel semiconductor device can be provided. In addition, a novel charging device can be provided. In addition, a novel charging method can be provided.

[0036] Note that the description of these effects does not prevent the existence of other effects. In addition, one mode of the present invention does not need to have all of the above effects. In addition, the description of the specification, drawings, and claims, etc. clearly has effects other than the above effects, and effects other than the above effects can be obtained from the description of the specification, drawings, and claims, etc.

[0037] BRIEF DESCRIPTION OF THE DRAWINGS

[0038] [ Figure 1 ]A diagram illustrating a semiconductor device.

[0039] [Fig. 2] A diagram illustrating an example of a circuit structure of a storage element.

[0040] [Fig. 3] A diagram illustrating the electrical characteristics of a transistor.

[0041] [ Fig. 4 ] A diagram illustrating a method of charging a secondary battery.

[0042] [ Fig. 5 ] A diagram illustrating a method of charging a secondary battery.

[0043] [ Figure 6 ]A flow chart illustrating the charging operation of a semiconductor device.

[0044] [ Fig. 7 ] A diagram illustrating the relationship between ambient temperature and charging current.

[0045] [ FIG. 8 ] A perspective view of the semiconductor device 100 .

[0046] [ Fig. 9 ]Cross-sectional view of the semiconductor device 100.

[0047] [ Fig.10 ]Cross-sectional view of semiconductor device 100A.

[0048] [ Fig.11 ]Cross-sectional view of semiconductor device 100B.

[0049] [Fig. 12] A diagram illustrating an example of a transistor.

[0050] [Fig. 13] A diagram illustrating an example of a transistor.

[0051] [ Fig. 14 ] A perspective view showing an example of a secondary battery.

[0052] [Fig. 15] A diagram showing an example of an electronic device.

[0053] [Fig. 16] A diagram showing an example of an electronic device.

[0054] Modes for Carrying Out the Invention

[0055] Below, the embodiments of the present invention are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the method and details can be transformed into various forms. In addition, the present invention should not be interpreted as being limited to the contents described in the following embodiments.

[0056] Note that in each of the drawings described in this specification, the size of each component, the thickness of a layer, or the region may be exaggerated or omitted for the purpose of clarifying the content of the invention. Therefore, the present invention is not limited to the dimensions in the drawings.

[0057] Ordinal numbers such as "first" and "second" in this specification are used to avoid confusion between constituent elements, and do not indicate the order or sequence of process sequence or stacking sequence. In addition, for words that are not accompanied by ordinal numbers in this specification, ordinal numbers may be added to these words in the claims to avoid confusion between constituent elements.

[0058] (Implementation Method 1)

[0059] A configuration example and an operation example of a semiconductor device 100 according to one embodiment of the present invention will be described with reference to the drawings. Figure 1 is a block diagram illustrating the semiconductor device 100 .

[0060] <Structure example>

[0061] The semiconductor device 100 includes a memory element 101, a memory element 102, a comparison circuit 103, a current adjustment circuit 104, a control circuit 105, and an input / output circuit 106. The semiconductor device 100 is electrically connected to a secondary battery 200 and has a function of charging the secondary battery 200.

[0062] [Memory element 101]

[0063] The memory element 101 includes one or more memory elements. In this embodiment, the memory element 101 includes three memory elements (memory element 101_1, memory element 101_2, and memory element 101_3).

[0064] The memory element 101 stores information (potential or charge) that changes the charging current according to the ambient temperature during charging. In this embodiment, the memory elements 101_1, 101_2, and 101_3 each store information corresponding to a reference temperature (also referred to as "reference temperature information").

[0065] Figures 2A to 2G An example of a circuit structure that can be used for the storage element 101 is shown. Figures 2A to 2G Each is used as a storage element. Figure 2A The illustrated memory element 410 includes a transistor M1 and a capacitor CA. The memory element 410 includes one transistor and one capacitor.

[0066] The first terminal of the transistor M1 is connected to the first terminal of the capacitor CA, the second terminal of the transistor M1 is connected to the wiring BL, the gate of the transistor M1 is connected to the wiring WL, and the back gate of the transistor M1 is connected to the wiring BGL. The second terminal of the capacitor CA is connected to the wiring CAL. The node electrically connecting the first terminal of the transistor M1 and the first terminal of the capacitor CA is called a node ND.

[0067] In an actual transistor, the gate and the back gate overlap each other across the channel formation region of the semiconductor layer. Both the gate and the back gate can be used as gates. Therefore, one of them is sometimes called a "back gate" and the other is sometimes called a "gate" or "front gate". In addition, one of them is sometimes called a "first gate" and the other is sometimes called a "second gate".

[0068] The potential of the back gate may be equal to that of the gate, or may be ground potential or any other potential. In addition, by changing the potential of the back gate independently without being linked to the gate, the threshold voltage of the transistor can be changed.

[0069] By providing a back gate and setting the gate and back gate potentials to be equal, the region in the semiconductor layer where carriers flow is further expanded in the film thickness direction, so the amount of carrier migration increases. As a result, the on-state current of the transistor increases and the field effect mobility also increases.

[0070] Therefore, a transistor having a large on-state current relative to its occupied area can be manufactured. In other words, the occupied area of ​​the transistor relative to the required on-state current can be reduced. Therefore, a semiconductor device with a high degree of integration can be realized.

[0071] The wiring BGL is used as a wiring for supplying a potential to the back gate of the transistor M1. By supplying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M1 can be increased or decreased.

[0072] Data writing and reading are performed by supplying a high-level potential to the wiring WL to turn on the transistor M1 and electrically connect the wiring BL to the node ND.

[0073] The wiring CAL is used as a wiring for supplying a predetermined potential to the second terminal of the capacitor CA. It is preferable that a fixed potential is supplied to the wiring CAL.

[0074] Figure 2B The memory element 420 shown is a modified example of the memory element 410. In the memory element 420, the back gate of the transistor M1 is electrically connected to the wiring WL. By having such a structure, the same potential as the gate of the transistor M1 can be applied to the back gate of the transistor M1. Therefore, the current flowing through the transistor M1 when the transistor M1 is in the on state can be increased.

[0075] In addition, if Figure 2C As shown in the storage element 430 in FIG. 1 , the transistor M1 may also be a single-gate structure transistor (a transistor not including a back gate). The storage element 430 has a structure in which the back gate is removed from the transistor M1 of the storage element 410 and the storage element 420. Therefore, the storage element 430 can shorten the manufacturing process compared with the storage element 410 and the storage element 420.

[0076] The memory element 410 , the memory element 420 , and the memory element 430 are DRAM type memory elements.

[0077] It is preferable that an oxide semiconductor, which is one of metal oxides, is used in the semiconductor layer forming a channel of the transistor M1. In this specification and the like, a transistor including an oxide semiconductor in the semiconductor layer forming a channel is also referred to as an "OS transistor".

[0078] For example, as an oxide semiconductor, a metal oxide containing indium, an element M (the element M is one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium, etc.) and zinc can be used. In particular, the oxide semiconductor is preferably a metal oxide containing indium, gallium and zinc.

[0079] The OS transistor has a characteristic of extremely small off-state current. By using the OS transistor as the transistor M1, the leakage current of the transistor M1 can be made very small. In other words, the transistor M1 can be used to maintain the written data for a long time. Thus, the refresh frequency of the storage element can be reduced. In addition, the refresh work of the storage element can be omitted. In addition, since the leakage current is very small, multi-value data or analog data can be maintained in the storage element 410, the storage element 420, and the storage element 430.

[0080] In this specification and the like, a DRAM using an OS transistor is referred to as a DOSRAM (Dynamic Oxide Semiconductor Random Access Memory).

[0081] Figure 2D The circuit configuration example of a gain unit type memory element composed of two transistors and one capacitor is shown. The memory element 440 includes a transistor M1, a transistor M2, and a capacitor CA.

[0082] The first terminal of the transistor M1 is connected to the first terminal of the capacitor CA, the second terminal of the transistor M1 is connected to the wiring WBL, and the gate of the transistor M1 is connected to the wiring WWL. The second terminal of the capacitor CA is connected to the wiring CAL. The first terminal of the transistor M2 is connected to the wiring RBL, the second terminal of the transistor M2 is connected to the wiring RWL, and the gate of the transistor M2 is connected to the first terminal of the capacitor CA. The node electrically connected to the first terminal of the transistor M1, the first terminal of the capacitor CA, and the gate of the transistor M2 is called a node ND.

[0083] Bit line WBL is used as a write bit line, bit line RBL is used as a read bit line, word line WWL is used as a write word line, and word line RWL is used as a read word line. Transistor M1 is used as a switch that connects or disconnects node ND and bit line WBL.

[0084] As transistor M1, an OS transistor is preferably used. As described above, the off-state current of an OS transistor is very small, so by using an OS transistor as transistor M1, the potential written to node ND can be retained for a long time. In other words, data written to the storage element can be retained for a long time.

[0085] There is no particular limitation on the transistor used as the transistor M2. As the transistor M2, an OS transistor, a Si transistor (a transistor using silicon in a semiconductor layer), or other transistors may be used.

[0086] In addition, when the transistor M2 uses a Si transistor, the silicon used for the semiconductor layer can be amorphous silicon, polycrystalline silicon, low temperature polycrystalline silicon (LTPS: Low Temperature Poly-Silicon) or single crystal silicon. Since the field effect mobility of Si transistors is sometimes higher than that of OS transistors, when Si transistors are used as readout transistors, the operating speed during readout can be increased.

[0087] When the transistor M1 uses an OS transistor and the transistor M2 uses a Si transistor, they can also be set in different layers. The OS transistor can be made using the same manufacturing equipment and process as the Si transistor. Therefore, it is easy to mix and install the OS transistor and the Si transistor (hybridization), and it is easy to achieve high integration.

[0088] In addition, when the transistor M2 uses an OS transistor, the leakage current when not selected can be extremely small, thereby improving the readout accuracy. By using OS transistors as both the transistor M1 and the transistor M2, the manufacturing process of the semiconductor device can be reduced and the productivity can be improved. For example, the semiconductor device can also be manufactured at a process temperature below 400°C.

[0089] Figure 2E to Figure 2G The following is a circuit configuration example in which a transistor having a back gate (a four-terminal transistor, also referred to as a “four-terminal element”) is used as the transistor M1 and the transistor M2 . Figure 2E The storage element 450 shown, Figure 2F The storage element 460 and Figure 2G The illustrated memory element 470 is a modified example of the memory element 440 .

[0090] exist Figure 2E In the memory element 450 shown, the gate of the transistor M1 is electrically connected to the back gate, and the gate of the transistor M2 is electrically connected to the back gate.

[0091] exist Figure 2F In the illustrated memory element 460, the back gate of the transistor M1 and the back gate of the transistor M2 are electrically connected to the wiring BGL. A predetermined potential can be applied to the back gates of the transistor M1 and the transistor M2 via the wiring BGL.

[0092] exist Figure 2G In the memory element 470 shown, the back gate of the transistor M1 is electrically connected to the wiring WBGL, and the back gate of the transistor M2 is electrically connected to the wiring RBGL. By connecting the back gate of the transistor M1 and the back gate of the transistor M2 to different wirings, the threshold voltages can be changed independently.

[0093] The storage element 440 to the storage element 470 are 2Tr1C type storage cells. In this specification, etc., a storage device that uses an OS transistor as the transistor M1 to form a 2Tr1C type storage cell is referred to as NOSRAM (Non-volatile Oxide Semiconductor Random Access Memory). In addition, the storage element 440 to the storage element 470 can amplify the potential of the node ND in the transistor M12 and read the potential. In addition, the off-state current of the OS transistor is very small, and the potential of the node ND can be maintained for a long time. In addition, non-destructive reading can be performed while maintaining the potential of the node ND when performing a read operation.

[0094] The information stored in the memory element 101 is information that is less frequently rewritten. Therefore, as the memory element 101, it is preferable to use a NOSRAM that can read information non-destructively and store information for a long period of time.

[0095] also, Figure 2A , Figure 2B , Figure 2E to Figure 2G The transistor shown is a four-terminal element, and thus has the characteristic of being able to easily independently control input and output, compared to two-terminal elements such as MRAM (Magnetoresistive Random Access Memory), ReRAM (Resistive Random Access Memory), and phase-change memory that utilize MTJ (Magnetic Tunnel Junction) characteristics.

[0096] In addition, MRAM, ReRAM, and phase change memory sometimes undergo atomic-level structural changes when rewriting information. On the other hand, a storage device according to one embodiment of the present invention operates by charging or discharging electric charge through a transistor when rewriting information, so it has good rewriting durability and its structural changes are also small.

[0097] [Memory element 102]

[0098] The memory element 102 may be the same memory element as the memory element 101. The memory element 102 is preferably a DOSRAM or a NOARAM.

[0099] Here, the temperature dependency of Id-Vg characteristics, which is one of the electrical characteristics of a transistor, will be described. Figure 3A and Figure 3BAn example of Id-Vg characteristics, which are one of the electrical characteristics of a transistor, is shown. The Id-Vg characteristics represent changes in drain current (Id) with respect to changes in gate voltage (Vg). Figure 3A and Figure 3B The horizontal axis of shows Vg on a linear scale. In addition, Figure 3A and Figure 3B The vertical axis shows Id in a logarithmic scale.

[0100] Figure 3A The Id-Vg characteristics of the OS transistor are shown. Figure 3B Id-Vg characteristics of a transistor (Si transistor) using silicon for a semiconductor layer in which a channel is formed are shown. Figure 3A and Figure 3B Both are Id-Vg characteristics of n-channel transistors.

[0101] like Figure 3A As shown in Figure 1, the off-state current of the OS transistor is not likely to increase even when operating in a high temperature environment. The OS transistor can achieve an on / off ratio of more than 10 digits even when the operating temperature is above 125°C and below 150°C. Figure 3B As shown in Figure 1, as the temperature of the Si transistor increases, the off-state current increases. As the temperature of the Si transistor increases, the Vth drifts in the positive direction and the on-state current decreases.

[0102] By using an OS transistor as the transistor M1, information can be retained for a long time even when operating at a high temperature.

[0103] In addition, oxide semiconductors have the property that the resistance value decreases as the temperature rises. This property can be used to convert the ambient temperature into a potential. For example, when using Figure 2C In the case of the storage element 430 shown, first, the transistor M1 is turned on, 0V is supplied to the wiring BL, and 0V is written to the node ND. Then, VDD is supplied to the wiring BL, and the transistor M1 is turned off after a certain period of time. The resistance value of the oxide semiconductor changes with temperature. Therefore, the node ND maintains a potential corresponding to the ambient temperature at the time of measurement (also referred to as "ambient temperature information"). In addition, the higher the ambient temperature, the higher the potential maintained by the node ND.

[0104] Thus, the memory element 102 can be used as a temperature sensor. By using an oxide semiconductor, the memory element 101 and the memory element 102 can be manufactured simultaneously in the same process. In addition, since a temperature sensor such as a thermistor does not need to be separately provided, the productivity of the semiconductor device 100 can be improved.

[0105] [Comparison circuit 103]

[0106] The comparison circuit 103 has a function of determining the operation of the current regulating circuit by comparing the temperature information held by the storage element 101 with the ambient temperature held by the storage element 102. Specifically, the potential of the node ND of the storage element 101 is compared with the potential of the node ND of the storage element 102. The comparison circuit 103 can be composed of a comparator or the like.

[0107] [Current adjustment circuit 104]

[0108] The current regulating circuit 104 has a function of controlling the current value supplied to the secondary battery 200 according to the signal supplied from the comparison circuit 103. The current regulating circuit 104 can be formed of a power transistor or the like.

[0109] [Control circuit 105, input / output circuit 106]

[0110] The control circuit 105 has a function of comprehensively controlling the operations of the storage element 101, the storage element 102, the comparison circuit 103, the current adjustment circuit 104, and the input / output circuit 106. In addition, the control circuit 105 is supplied with a control signal, setting information of the storage element 101, etc. from the outside through the input / output circuit 106. In addition, the control circuit 105 has a function of outputting the charging voltage of the secondary battery 200, the current value output from the current adjustment circuit 104, and the ambient temperature information obtained in the storage element 102, etc. to the outside through the input / output circuit 106.

[0111] <Working Example>

[0112] Next, an example of a charging operation of the secondary battery 200 using the semiconductor device 100 will be described.

[0113] [Charging method]

[0114] The secondary battery can be charged, for example, as follows.

[0115] [CC charging]

[0116] First, CC charging is described as one of the charging methods. CC charging is a charging method in which a constant current flows through the secondary battery throughout the charging period and charging is stopped when the voltage of the secondary battery reaches a predetermined voltage. Figure 4A As shown in the figure, the secondary battery is assumed to be an equivalent circuit of internal resistance R and secondary battery capacity C. In this case, the secondary battery voltage V B is the voltage V applied to the internal resistor R R and the voltage V applied to the secondary battery capacity C C The sum of .

[0117] During CC charging, if Figure 4AAs shown, the switch is turned on and a constant current I flows through the secondary battery. During this period, since the current I is constant, the voltage V applied to the internal resistor R R According to V R =R×I is constant according to Ohm's law. On the other hand, the voltage V applied to the secondary battery capacity C is C As time goes by, the secondary battery voltage V B Rising over time.

[0118] And, when the secondary battery voltage V B When the voltage reaches a specified value, such as 4.3V, charging is stopped. Figure 4B As shown, the switch is closed and the current I = 0. Therefore, the voltage V applied to the internal resistor R R Therefore, the secondary battery voltage V B decline.

[0119] Figure 4C The secondary battery voltage V during CC charging and after CC charging is stopped is shown. B With charging current example. Figure 4C It can be seen that the secondary battery voltage V B It decreases slightly after CC charging is stopped.

[0120] [CCCV charging]

[0121] Next, a charging method different from the above, namely CCCV charging, is described. CCCV charging is a charging method in which CC charging is first performed to a predetermined voltage, and then CV (constant voltage) charging is performed until the current flowing decreases, specifically, until the end current value is reached.

[0122] During CC charging, if Figure 5A As shown in the figure, the switch of the constant current power supply is turned on and the switch of the constant voltage power supply is turned off, so a constant current I flows through the secondary battery. During this period, because the current I is constant, the voltage V applied to the internal resistor R is R According to V R =R×I is constant according to Ohm's law. On the other hand, the voltage V applied to the secondary battery capacity C is C As time goes by, the secondary battery voltage V B Rising over time.

[0123] And, when the secondary battery voltage V B When the voltage reaches a specified value, for example, 4.3V, the battery switches from CC charging to CV charging. Figure 5BAs shown in the figure, the switch of the constant voltage power supply is turned on and the switch of the constant current power supply is turned off, so the secondary battery voltage V B On the other hand, the voltage V applied to the secondary battery capacity C is constant. C As time goes by, it increases. Because V B =V R +V C , so the voltage V applied to the internal resistor R R As time goes by, the voltage V applied to the internal resistor R R becomes smaller, and the current I flowing through the secondary battery changes according to V R =R×I and becomes smaller according to Ohm's law.

[0124] Then, when the current I flowing through the secondary battery reaches a predetermined current, for example, a current equivalent to 0.01C, charging is stopped. Figure 5C As shown, all switches are closed, and the current I = 0. Therefore, the voltage V applied to the internal resistor R R However, the voltage V applied to the internal resistor R is sufficiently reduced by CV charging. R , so even if the voltage of the internal resistor R no longer drops, the secondary battery voltage V B It hardly drops.

[0125] Figure 5D The secondary battery voltage V during CCCV charging and after CCCV charging is stopped is shown. B With charging current example. Figure 5D It can be seen that the secondary battery voltage V B Even after CCCV charging is stopped, there is almost no drop.

[0126] [Charge rate]

[0127] Here, the charging rate is explained. The charging rate refers to the ratio of the charging current to the battery capacity, and is expressed by the unit C. In a battery with a rated capacity of X [Ah], the current equivalent to 1C is X [A]. In the case of charging with a current of 2X [A], it can be said that it is charged at 2C, and in the case of charging with a current of X / 5 [A], it can be said that it is charged at 0.2C.

[0128] [Charging operation example]

[0129] Generally, the charging conditions of a secondary battery vary depending on the constituent materials of the positive electrode, negative electrode, and electrolyte solution included in the secondary battery. In this embodiment, an example in which the semiconductor device 100 performs CC charging on the secondary battery 200 under the charging conditions shown in Table 1 is described.

[0130] [Table 1]

[0131] Battery capacity 3000mAh Maximum charging voltage 4.3V Charging possible temperature 0 to 45°C Charge rate (10 to 45°C) 0.5C Charging rate (<10℃) 0.25C

[0132] Figure 6 1 is a flowchart for explaining the charging operation of the semiconductor device 100 . Fig. 7A This is a graph illustrating the relationship between ambient temperature and charging current. Fig. 7A A temperature region P0 of lower than 0°C, a temperature region P1 of 0°C or higher and lower than 10°C, a temperature region P2 of 10°C or higher and lower than 45°C, and a temperature region P3 of 45°C or higher are shown.

[0133] First, the ambient temperature Tp is acquired (step S501).

[0134] Next, the temperature condition T1 maintained by the storage element 101_1 is compared with the ambient temperature Tp (step S502). When the ambient temperature Tp is lower than the temperature condition T1, it is determined that the secondary battery 200 is in the temperature range P0, and charging of the secondary battery 200 is stopped (current supply is stopped) (step S505).

[0135] When the ambient temperature Tp is higher than the temperature condition T1, the temperature condition T2 maintained by the storage element 101_2 is compared with the ambient temperature Tp (step S503). When the ambient temperature Tp is lower than the temperature condition T2, it is determined that the secondary battery 200 is in the temperature region P1, and the current I L is supplied to the secondary battery 200 (step S511). In this embodiment, the current I L is the current equivalent to a charge rate of 0.25C. Therefore, the current I L is 750mA.

[0136] When the ambient temperature Tp is higher than the temperature condition T2, the temperature condition T3 maintained by the storage element 101_3 is compared with the ambient temperature Tp (step S504). When the ambient temperature Tp is lower than the temperature condition T3, it is determined that the secondary battery 200 is in the temperature region P2, and the current I SD is supplied to the secondary battery 200 (step S512). In this embodiment, the current I SD is the current equivalent to a charge rate of 0.5C. Therefore, the current I SD is 1500mA.

[0137] When the ambient temperature Tp is higher than the temperature condition T3, it is determined that the secondary battery 200 is in the temperature region P3, and the charging of the secondary battery 200 is stopped (current supply is stopped) (step S505).

[0138] Next, the state of step S505, step S511 or step S512 is maintained for a certain period of time (step S506).

[0139] After a certain period of time, it is determined whether the voltage of the secondary battery 200 is less than the maximum charging voltage. In this embodiment, it is determined whether the voltage of the secondary battery 200 is less than 4.3V. When the voltage of the secondary battery 200 is less than the maximum charging voltage, the process returns to step S501 (step S507). When the voltage of the secondary battery 200 is greater than the maximum charging voltage, the charging process is terminated.

[0140] In the case of performing CCCV charging, CV charging may be performed thereafter.

[0141] When the ambient temperature is low (below 10°C in this embodiment), the reaction rate between the negative electrode material and Li decreases, and Li precipitation is likely to occur. Li precipitation sometimes becomes one of the causes of a decrease in battery capacity and a fire accident caused by an internal short circuit. Therefore, the charging current is preferably small. In addition, when the ambient temperature is too low (below 0°C in this embodiment), the supply of charging current is stopped.

[0142] Furthermore, when charging is performed in a state where the ambient temperature is too high (45° C. or higher in the present embodiment), oxidative decomposition of the electrolyte and dissolution of metal components from the positive electrode material are promoted, which may be one of the causes of capacitance reduction.

[0143] By adjusting the charging current according to the ambient temperature, it is possible to prevent the degradation of the secondary battery and improve the safety during charging.

[0144] also, Figure 7B A temperature region P0 below 0°C, a temperature region P1 above 0°C and below 10°C, a temperature region P2 above 10°C and below 25°C, a temperature region P3 above 25°C and below 45°C, and a temperature region P4 above 45°C are shown.

[0145] like Figure 7B As shown, the ambient temperature and the charging current may be continuously changed in a specific temperature range. Figure 7B An example is shown in which the charging current is continuously changed according to the ambient temperature in the temperature range P2. By controlling in this way, the charging time of the secondary battery 200 can be shortened.

[0146] This embodiment mode can be implemented in combination with the structures described in other embodiment modes and the like as appropriate.

[0147] (Implementation Method 2)

[0148] High current driving capability and / or high-speed operation may be required for the comparison circuit 103, the current regulation circuit 104, the control circuit 105, and the input / output circuit 106. In this case, Si transistors are preferably used in the comparison circuit 103, the current regulation circuit 104, the control circuit 105, and the input / output circuit 106.

[0149] In addition, as described in the above embodiment, it is preferable to use OS transistors in the memory element 101 and the memory element 102 .

[0150] OS transistors and Si transistors may be stacked. For example, as the semiconductor device 100, an integrated circuit 160 including the storage element 101 and the storage element 102 may be provided on the integrated circuit 150 including the comparison circuit 103, the current adjustment circuit 104, the control circuit 105, and the input / output circuit 106. By stacking various circuits, the semiconductor device 100 may be miniaturized. In other words, the occupied area of ​​the semiconductor device 100 may be reduced.

[0151] <Cross-sectional structure example>

[0152] Fig. 8A is a perspective view of a semiconductor device 100 including an integrated circuit 150 and an integrated circuit 160 . Figure 8B 1 is a diagram showing a simplified positional relationship between the integrated circuit 150 and the integrated circuit 160 . Fig. 9 is a cross-sectional view of a portion of the semiconductor device 100 .

[0153] [IC 150]

[0154] exist Fig. 9 In the embodiment, the integrated circuit 150 includes a transistor 233a, a transistor 233b, and a transistor 233c on a substrate 231. Fig. 9 A cross section of the transistor 233a, the transistor 233b, and the transistor 233c in the channel length direction is shown.

[0155] Channels of the transistor 233a, the transistor 233b, and the transistor 233c are formed in a portion of the substrate 231. When the integrated circuit is required to operate at high speed, a single crystal semiconductor substrate is preferably used as the substrate 231.

[0156] The transistor 233a, the transistor 233b, and the transistor 233c are electrically isolated from other transistors by the element isolation layer 232. The element isolation layer can be formed by a LOCOS (Local Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

[0157] Insulating layers 234, 235, and 237 are provided over the transistors 233a, 233b, and 233c, and an electrode 238 is buried in the insulating layer 237. The electrode 238 is electrically connected to one of the source and the drain of the transistor 233a through a contact plug 236.

[0158] In addition, insulating layers 239 , 240 , and 241 are provided on the electrode 238 and the insulating layer 237 , and an electrode 242 is buried in the insulating layers 239 , 240 , and 241 . The electrode 242 is electrically connected to the electrode 238 .

[0159] In addition, insulating layers 243 and 244 are provided on the electrode 242 and the insulating layer 241 , and an electrode 245 is buried in the insulating layers 243 and 244 . The electrode 245 is electrically connected to the electrode 242 .

[0160] In addition, insulating layers 246 and 247 are provided on the electrode 245 and the insulating layer 244 , and an electrode 249 is buried in the insulating layers 246 and 247 . The electrode 249 is electrically connected to the electrode 245 .

[0161] In addition, insulating layers 248 and 250 are provided on the electrode 249 and the insulating layer 247 , and an electrode 251 is buried in the insulating layers 248 and 250 . The electrode 251 is electrically connected to the electrode 249 .

[0162] [IC 160]

[0163] The integrated circuit 160 is disposed on the integrated circuit 150. Fig. 9 In FIG. 1 , the integrated circuit 160 includes a transistor 210 and a capacitor 220 . Fig. 9 2 shows a cross section in the channel length direction of the transistor 210. In addition, the transistor 210 includes a back gate.

[0164] An oxide semiconductor which is one of metal oxides is preferably used for the semiconductor layer of the transistor 210. That is, an OS transistor is preferably used as the transistor 210.

[0165] The transistor 210 is provided on the insulating layer 361. The insulating layer 362 is provided on the insulating layer 361. The back gate of the transistor 210 is buried in the insulating layer 362. The insulating layer 371 and the insulating layer 380 are provided on the insulating layer 362. The gate of the transistor 210 is buried in the insulating layer 380.

[0166] An insulating layer 374 and an insulating layer 381 are provided on the insulating layer 380. An electrode 355 is embedded in the insulating layer 361, the insulating layer 362, the insulating layer 365, the insulating layer 366, the insulating layer 371, the insulating layer 380, the insulating layer 374, and the insulating layer 381. The electrode 355 is electrically connected to the electrode 251. The electrode 355 can be used as a contact plug.

[0167] The electrode 152 is provided on the insulating layer 381. The electrode 152 is electrically connected to the electrode 355. The insulating layer 114, the insulating layer 115, and the insulating layer 130 are provided on the insulating layer 381 and the electrode 152.

[0168] Capacitor 220 includes: electrode 110 disposed in openings formed in insulating layer 114 and insulating layer 115; insulating layer 130 on electrode 110 and insulating layer 115; and electrode 120 on insulating layer 130. At least a portion of electrode 110, at least a portion of insulating layer 130, and at least a portion of electrode 120 are disposed in the openings formed in insulating layer 114 and insulating layer 115.

[0169] The electrode 110 is used as the lower electrode of the capacitor 220, the electrode 120 is used as the upper electrode of the capacitor 220, and the insulating layer 130 is used as the dielectric of the capacitor 220. The capacitor 220 has a structure in which the upper electrode and the lower electrode are opposed to each other not only on the bottom surface but also on the side surface in the openings of the insulating layer 114 and the insulating layer 115, so that the electrostatic capacitance per unit area can be increased. Therefore, the deeper the opening, the greater the electrostatic capacitance of the capacitor 220. In this way, by increasing the electrostatic capacitance per unit area of ​​the capacitor 220, the miniaturization or high integration of the semiconductor device can be promoted.

[0170] The shape of the openings formed in the insulating layers 114 and 115 in a plan view may be a quadrangle, a polygon other than a quadrangle, a polygon with arc-shaped corners, or a circular shape such as an ellipse.

[0171] The insulating layer 130 and the electrode 120 include an insulating layer 116 and an insulating layer 154. The electrode 112 is embedded in the insulating layer 114, the insulating layer 115, the insulating layer 130, the insulating layer 116, and the insulating layer 154. The electrode 112 is electrically connected to the electrode 152. The electrode 112 can be used as a contact plug. The electrode 153 is provided on the insulating layer 154. The electrode 153 is electrically connected to the electrode 112.

[0172] An insulating layer 156 is provided on the insulating layer 154 and the electrode 153 .

[0173] [Deformation Example 1]

[0174] Fig.10A semiconductor device 100A is shown as a modified example of the semiconductor device 100. The semiconductor device 100A has an integrated circuit 150A and an integrated circuit 160 stacked thereon. In the integrated circuit 150A, OS transistors are used as transistors such as the transistor 233a and the transistor 233b included in the integrated circuit 150. By using OS transistors as all transistors included in the semiconductor device 100A, the semiconductor device 100A can be made into a unipolar integrated circuit.

[0175] [Deformation Example 2]

[0176] Fig.11 A semiconductor device 100B is shown as a modified example of the semiconductor device 100A. When all transistors included in the semiconductor device 100B are OS transistors, the integrated circuit 150A and the integrated circuit 160 can be manufactured on the substrate 231 through the same process. As a result, the productivity of the semiconductor device can be improved. In addition, the production cost of the semiconductor device can be reduced.

[0177] In addition, when a substrate with high thermal conductivity such as a silicon substrate is used as the substrate 231, the cooling efficiency of the semiconductor device can be improved compared to the case where an insulating substrate is used. Therefore, the reliability of the semiconductor device can be improved.

[0178] <Constitution Materials>

[0179] [Substrate]

[0180] There is little restriction on the substrate material. As the substrate, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate can be used.

[0181] Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as a yttria-stabilized zirconia substrate), and a resin substrate.

[0182] In addition, as the semiconductor substrate, for example, there can be cited a semiconductor substrate composed of silicon or germanium, or a compound semiconductor substrate composed of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, etc. Furthermore, there can also be cited a semiconductor substrate having an insulator region inside the above-mentioned semiconductor substrate, such as an SOI (Silicon On Insulator) substrate.

[0183] As described above, when the integrated circuit is required to operate at high speed, it is preferable to use a single crystal semiconductor substrate as the substrate.

[0184] As the conductive substrate, graphite substrate, metal substrate, alloy substrate, conductive resin substrate, etc. can be cited. Alternatively, a substrate containing metal nitride, a substrate containing metal oxide, etc. can be cited. Furthermore, an insulator substrate provided with a conductor or a semiconductor, a semiconductor substrate provided with a conductor or an insulator, a conductive substrate provided with a semiconductor or an insulator, etc. can also be cited. Alternatively, a substrate having elements arranged on these substrates can also be used. As elements arranged on the substrate, capacitors, resistors, switching elements, light-emitting elements, storage elements, etc. can be cited. In addition, a substrate having semiconductor elements such as strain transistors or FIN-type transistors arranged on a semiconductor substrate can also be used. In other words, the substrate is not only a supporting substrate, but can also be a substrate on which other devices such as transistors are formed.

[0185] [Insulation layer]

[0186] As a material used for the insulating layer, there are oxides, nitrides, oxynitrides, oxynitrides, metal oxides, metal oxynitrides, metal oxynitrides, and the like having insulating properties.

[0187] For example, when miniaturization and high integration of transistors are being carried out, problems such as leakage current sometimes occur due to the thin film of the gate insulating layer. By using a high-k material as an insulating layer used as a gate insulating layer, it is possible to achieve low voltage when the transistor is operating while maintaining the physical thickness. On the other hand, by using a material with a low relative dielectric constant for an insulating layer used as an interlayer film, the parasitic capacitance generated between wirings can be reduced. Therefore, it is preferable to select the material according to the function of the insulating layer.

[0188] Insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0189] Insulators having a relatively low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, and resins.

[0190] In addition, when an OS transistor is used, the electrical characteristics of the transistor can be stabilized by surrounding the transistor with an insulating layer (insulating layer 365 and insulating layer 371, etc.) having the function of inhibiting the permeation of impurities such as hydrogen and oxygen. As an insulator having the function of inhibiting the permeation of impurities such as hydrogen and oxygen, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum can be used in a single layer or a stack. Specifically, as an insulating layer having the function of inhibiting the permeation of impurities such as hydrogen and oxygen, metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide, aluminum nitride, aluminum titanium nitride, titanium nitride, silicon oxynitride or silicon nitride can be used.

[0191] In addition, the insulating layer used as the gate insulating layer is preferably an insulator having a region containing oxygen that is released by heating. For example, by adopting a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the semiconductor layer 260, oxygen vacancies contained in the semiconductor layer 260 can be filled.

[0192] Note that in this specification, etc., nitrogen oxide refers to a compound whose nitrogen content is greater than that of oxygen. Also, oxynitride refers to a compound whose oxygen content is greater than that of nitrogen. In addition, the content of each element can be measured using, for example, Rutherford Backscattering Spectrometry (RBS).

[0193] Furthermore, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer, in order to prevent the hydrogen concentration in the semiconductor layer from increasing, it is preferable to reduce the hydrogen concentration in the insulating layer. Specifically, the hydrogen concentration of the insulating layer measured by secondary ion mass spectrometry (SIMS) is 2×10 20 atoms / cm 3 Below, preferably 5×10 19 atoms / cm 3 Below, more preferably 1×10 19 atoms / cm 3 Below, more preferably 5×10 18 atoms / cm 3 In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer.

[0194] Furthermore, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer, in order to prevent the nitrogen concentration in the semiconductor layer from increasing, it is preferable to reduce the nitrogen concentration in the insulating layer. Specifically, the nitrogen concentration of the insulating layer measured by SIMS is 5×10 19 atoms / cm 3 Below, preferably 5×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 Below, more preferably 5×10 17 atoms / cm 3 the following.

[0195] In addition, the insulating layer preferably has fewer defects in at least the region in contact with the semiconductor layer, and typically, the signal observed by the electron spin resonance method (ESR) is preferably smaller. For example, as the above signal, the E' center observed when the g value is 2.001 can be cited. The E' center is caused by the dangling bond of silicon. For example, when a silicon oxide layer or a silicon oxynitride layer is used as the insulating layer, a spin density of 3×10 17 spins / cm 3 Below, preferably 5×10 16 spins / cm 3 The following silicon oxide layer or silicon oxynitride layer.

[0196] Sometimes, in addition to the above signals, a signal caused by nitrogen dioxide (NO2) is observed. This signal is split into three signals due to the nuclear spin of N, each with a g value of 2.037 or more and 2.039 or less (first signal), a g value of 2.001 or more and 2.003 or less (second signal), and a g value of 1.964 or more and 1.966 or less (third signal).

[0197] For example, it is preferable to use a signal derived from nitrogen dioxide (NO2) with a spin density of 1×10 17 spins / cm 3 More than and less than 1×10 18 spins / cm 3 insulation layer.

[0198] Nitrogen dioxide (NO2) Nitrogen oxides (NO x ) forms an energy level in the insulating layer. This energy level is located in the energy gap of the oxide semiconductor layer. x) diffuses to the interface between the insulating layer and the oxide semiconductor layer, sometimes this energy level captures electrons on the insulating layer side. As a result, the captured electrons remain near the interface between the insulating layer and the oxide semiconductor layer, thereby causing the threshold voltage of the transistor to drift in the positive direction. Therefore, when a film with a low content of oxynitride is used as the insulating layer, the drift of the threshold voltage of the transistor can be reduced.

[0199] As nitrogen oxides (NO x For example, an insulating layer with a low release amount of ammonia can be a silicon oxynitride layer. The silicon oxynitride layer has a lower release amount of ammonia than nitrogen oxides (NO x ) release, typically 1×10 18 Pieces / cm 3 Above and 5×10 19 Pieces / cm 3 The ammonia release amount is the total amount in the TDS when the temperature of the heat treatment is within the range of 50° C. to 650° C. or within the range of 50° C. to 550° C.

[0200] Since nitrogen oxides (NO x ) reacts with ammonia and oxygen, so by using an insulating layer that releases a lot of ammonia, nitrogen oxides (NO x ).

[0201] At least one of the insulating layers in contact with the oxide semiconductor layer is preferably formed using an insulating layer that releases oxygen by heating. Specifically, it is preferable to use an insulating layer whose oxygen release amount converted to oxygen atoms is 1.0×10 18 atoms / cm 3 Above, preferably 1.0×10 19 atoms / cm 3 Above or 1.0×10 20 atoms / cm 3 In addition, in this specification and the like, oxygen released by heating is referred to as "excess oxygen".

[0202] In addition, the insulating layer containing excess oxygen can be formed by adding oxygen to the insulating layer. As the oxygen addition treatment, heat treatment in an oxidizing atmosphere, plasma treatment, etc. can be used. Alternatively, oxygen addition can be performed by ion implantation, ion doping, plasma immersion ion implantation, etc. Examples of the gas used for the oxygen addition treatment include 16 O2 or18 Oxygen gas such as O2, oxygen-containing gas such as nitrous oxide gas or ozone gas. Note that in this specification, treatment of adding oxygen may be referred to as "oxygen doping treatment." The oxygen doping treatment may be performed while heating the substrate.

[0203] As the insulating layer, a heat-resistant organic material such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, epoxy resin, etc. can be used. In addition to the above-mentioned organic materials, low-k materials, siloxane resins, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), etc. can also be used. In addition, the insulating layer can also be formed by stacking a plurality of insulating layers formed of these materials.

[0204] Siloxane resins are equivalent to resins containing Si-O-Si bonds formed using siloxane materials as starting materials. Siloxane resins may include an organic group (eg, an alkyl group or an aryl group) or a fluorine group as a substituent. In addition, the organic group may also have a fluorine group.

[0205] There is no particular limitation on the method for forming the insulating layer. Note that a baking step may be required depending on the material used for the insulating layer. In this case, the baking step of the insulating layer can be combined with another heat treatment step to efficiently manufacture the transistor.

[0206] There is no particular limitation on the method for forming the insulating layer. Note that a baking step may be required depending on the material used for the insulating layer. In this case, the baking step of the insulating layer can be combined with another heat treatment step to efficiently manufacture the transistor.

[0207] [Conductive layer]

[0208] As the conductive layer, it is preferred to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium and lanthanum, an alloy containing the above metal elements as a component, or an alloy combining the above metal elements, etc. For example, it is preferred to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. In addition, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, and an oxide containing lanthanum and nickel are conductive materials that are not easily oxidized or materials that maintain conductivity even when absorbing oxygen, so they are preferred. Alternatively, a semiconductor having high conductivity, such as polycrystalline silicon containing an impurity element such as phosphorus, or silicide such as nickel silicide may be used.

[0209] In addition, a plurality of conductive layers formed of the above-mentioned materials may be stacked. For example, a laminated structure in which a material containing the above-mentioned metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated structure in which a material containing the above-mentioned metal element and a conductive material containing nitrogen are combined may be used. In addition, a laminated structure in which a material containing the above-mentioned metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined may be used.

[0210] In addition, when an oxide semiconductor which is a kind of metal oxide is used as a semiconductor layer, a stacked structure combining a material containing the above-mentioned metal element and a conductive material containing oxygen is preferably used as a conductive layer used as a gate electrode. In this case, it is preferred that the conductive material containing oxygen is disposed on one side of the channel formation region. By disposing the conductive material containing oxygen on one side of the channel formation region, oxygen separated from the conductive material is easily supplied to the channel formation region.

[0211] In particular, as a conductive layer used as a gate electrode, it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed. In addition, a conductive material containing the above-mentioned metal element and nitrogen can also be used. For example, a conductive material containing nitrogen such as titanium nitride and tantalum nitride can be used. In addition, indium tin oxide (ITO: Indium Tin Oxide), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide added with silicon can also be used. By using the above-mentioned materials, hydrogen contained in the metal oxide forming the channel can sometimes be captured. Alternatively, hydrogen mixed from an external insulator can sometimes be captured.

[0212] In addition, as a conductive material for the contact plug, a highly embedded conductive material such as tungsten or polysilicon can be used. In addition, a combination of a highly embedded conductive material and a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer can also be used.

[0213] [Semiconductor layer]

[0214] As the semiconductor layer, one or more of a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor can be used. As the semiconductor material, for example, silicon or germanium can be used. In addition, compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, nitride semiconductors, or organic semiconductors can also be used.

[0215] When an organic semiconductor is used as the semiconductor layer, a low molecular weight organic material having an aromatic ring or a π-electron conjugated conductive polymer can be used. For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, polyparaphenylene vinylene, etc. can be used.

[0216] The semiconductor layer may also adopt a stacked structure. When the semiconductor layer adopts a stacked structure, semiconductors with different crystal states or different semiconductor materials may be used.

[0217] In addition, since the band gap of an oxide semiconductor, which is a type of metal oxide, is 2 eV or more, when an oxide semiconductor is used as a semiconductor layer, a transistor with extremely small off-state current can be realized. Specifically, the off-state current can be set to less than 1×10 -20 A. Less than 1×10 -22 A or less than 1×10 -24 A. That is, the switching ratio can be more than 20 digits. In addition, in a transistor using an oxide semiconductor as a semiconductor layer (OS transistor), the insulation withstand voltage between the source and the drain is high. Thus, a transistor with good reliability can be provided. In addition, a transistor with a large output voltage and a high withstand voltage can be provided. In addition, a storage device with good reliability can be provided. In addition, a storage device with a large output voltage and a high withstand voltage can be provided.

[0218] Compared with OS transistors, crystalline Si transistors can easily obtain higher mobility. On the other hand, it is difficult for crystalline Si transistors to achieve an extremely small off-state current like OS transistors. Therefore, it is important to appropriately select the semiconductor material used for the semiconductor layer according to its purpose and use. For example, a combination of OS transistors and crystalline Si transistors can be used depending on the purpose or use.

[0219] When an oxide semiconductor layer is used as a semiconductor layer, it is preferred to form the oxide semiconductor layer by sputtering. The density of the oxide semiconductor layer formed by sputtering is higher, so it is preferred. In the case of forming an oxide semiconductor layer by sputtering, as a sputtering gas, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen can be used. In addition, the sputtering gas needs to be highly purified. For example, as an oxygen gas or a rare gas used as a sputtering gas, a high-purity gas with a dew point of less than -60°C, preferably less than -100°C, is used. By using a high-purity sputtering gas to form a thin film, it is possible to prevent moisture and the like from mixing into the oxide semiconductor layer as much as possible.

[0220] When the oxide semiconductor layer is formed by sputtering, it is preferable to remove as much water as possible from the film forming chamber of the sputtering device. For example, it is preferable to use an adsorption vacuum pump such as a cryopump to evacuate the film forming chamber to a high vacuum (to 5×10 -7 Pa to 1×10 -4In particular, when the sputtering device is on standby, the partial pressure of the gas molecules corresponding to H2O (the gas molecules corresponding to m / z=18) in the film forming processing chamber is preferably 1×10 -4 Pa or less, more preferably 5×10 -5 Below Pa.

[0221] [Metal oxides]

[0222] By changing the composition of the elements contained in the metal oxide, a conductor, a semiconductor, or an insulator can be formed. Metal oxides with conductor properties are sometimes called "conductive oxides". Metal oxides with semiconductor properties are sometimes called "oxide semiconductors". Metal oxides with insulator properties are sometimes called "insulating oxides".

[0223] The oxide semiconductor as one of the metal oxides preferably contains indium or zinc. Indium and zinc are particularly preferably contained. In addition, it is preferred to further contain aluminum, gallium, yttrium or tin. Alternatively, it may also contain one or more of boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.

[0224] Here, the case where the oxide semiconductor includes indium, element M, and zinc is considered. Note that element M is aluminum, gallium, yttrium, or tin. Other elements that can be used as element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. Note that as element M, a plurality of the above elements may be combined.

[0225] In addition, in this specification and the like, a metal oxide containing nitrogen may be referred to as a metal oxide (metal oxide). In addition, a metal oxide containing nitrogen may also be referred to as a metal oxynitride (metal oxynitride).

[0226] [Structure of Metal Oxide]

[0227] Oxide semiconductors (metal oxides) are classified into single crystal oxide semiconductors and non-single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), a-like OS (amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0228] CAAC-OS has c-axis orientation, and its multiple nanocrystals are connected in the ab plane direction, and the crystal structure has distortion. Distortion refers to the part where the lattice arrangement direction changes between the region where multiple nanocrystals are connected and the region where the lattice arrangement is consistent.

[0229] Nanocrystals are basically hexagonal, but are not limited to regular hexagons, and are sometimes non-regular hexagons. In addition, nanocrystals sometimes have lattice arrangements such as pentagons or heptagons in distortion. In addition, in CAAC-OS, it is difficult to observe clear grain boundaries even near the distortion. That is, it can be seen that the formation of grain boundaries can be suppressed due to the distortion of the lattice arrangement. This is because CAAC-OS can accommodate distortion due to the low density of oxygen atoms arranged in the ab plane direction or the change in the bonding distance between atoms caused by the substitution of metal elements.

[0230] CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing element M, zinc, and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. In addition, indium and element M can replace each other. In the case where element M in the (M, Zn) layer is replaced by indium, the layer can also be represented as an (In, M, Zn) layer. In addition, in the case where indium in the In layer is replaced by element M, the layer can also be represented as an (In, M) layer.

[0231] CAAC-OS is a metal oxide with high crystallinity. On the other hand, it is not easy to observe clear grain boundaries in CAAC-OS, so it is not easy to cause a decrease in electron mobility due to grain boundaries. In addition, the crystallinity of metal oxides is sometimes reduced due to the mixing of impurities or the generation of defects, so it can be said that CAAC-OS is a metal oxide with few impurities or defects (oxygen vacancies, etc.). Therefore, the physical properties of the metal oxide containing CAAC-OS are stable. Therefore, the metal oxide with CAAC-OS has heat resistance and high reliability.

[0232] In nc-OS, the atomic arrangement in a tiny region (e.g., a region between 1 nm and 10 nm, especially a region between 1 nm and 3 nm) is periodic. In addition, in nc-OS, no regularity of crystal orientation is observed between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, sometimes nc-OS is no different from a-like OS or amorphous oxide semiconductors in certain analysis methods.

[0233] In addition, when In-Ga-Zn oxide (hereinafter, IGZO), which is a kind of metal oxide containing indium, gallium and zinc, is the above-mentioned nanocrystal, it may have a stable structure. In particular, IGZO has a tendency that crystal growth is not easy in the atmosphere, so sometimes IGZO is structurally stable when it is formed of small crystals (for example, the above-mentioned nanocrystals) than when it is formed of large crystals (here, crystals of several mm or several cm).

[0234] a-like OS is a metal oxide having a structure between nc-OS and amorphous oxide semiconductor. a-like OS contains voids or low-density regions. In other words, the crystallinity of a-like OS is lower than that of nc-OS and CAAC-OS.

[0235] Oxide semiconductors (metal oxides) have various structures and various characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

[0236] [Transistor including metal oxide]

[0237] Next, a case where the above-mentioned metal oxide is used in a channel formation region of a transistor will be described.

[0238] By using the above-mentioned metal oxide in the channel formation region of the transistor, a transistor with high field effect mobility can be realized. In addition, a transistor with high reliability can be realized.

[0239] In addition, it is preferable to use a metal oxide with a low carrier density for a transistor. When the carrier density of a metal oxide film is reduced, the impurity concentration in the metal oxide film is reduced to reduce the defect state density. In this specification, etc., a state in which the impurity concentration is low and the defect state density is low is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". For example, the carrier density in the metal oxide can be less than 8×10 11 cm -3 , preferably less than 1×10 11 cm -3 , more preferably less than 1×10 10 cm -3 , and is 1×10 -9 cm -3 above.

[0240] Because a high purity intrinsic or substantially high purity intrinsic metal oxide film has a lower defect state density, it is possible to have a lower trap state density.

[0241] Furthermore, it takes a long time for the charges trapped in the trap states of the metal oxide to disappear, and they may behave like fixed charges. Therefore, the electrical characteristics of a transistor having a channel formation region in a metal oxide with a high trap state density may be unstable.

[0242] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the metal oxide. In order to reduce the impurity concentration in the metal oxide, it is preferable to also reduce the impurity concentration in the adjacent film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0243] [Impurities]

[0244] Here, the influence of each impurity in the metal oxide is described.

[0245] In addition, when the metal oxide contains an alkali metal or an alkaline earth metal, a defect level is sometimes formed to form a carrier. Therefore, a transistor using a metal oxide containing an alkali metal or an alkaline earth metal as a channel formation region tends to have a normally-on characteristic. Therefore, it is preferred to reduce the concentration of the alkali metal or alkaline earth metal in the metal oxide. Specifically, the concentration of the alkali metal or alkaline earth metal in the metal oxide measured by SIMS is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.

[0246] The hydrogen contained in the metal oxide reacts with the oxygen bonded to the metal atom to generate water, thus sometimes forming an oxygen vacancy. In the case where the channel formation region in the metal oxide contains oxygen vacancies, the transistor tends to have a normally-on characteristic. When hydrogen enters the oxygen vacancy, electrons as carriers are sometimes generated. In addition, sometimes electrons as carriers are generated due to a portion of hydrogen bonding to oxygen bonded to the metal atom. Therefore, a transistor using a metal oxide containing hydrogen as a channel formation region tends to have a normally-on characteristic.

[0247] Therefore, it is preferable to reduce the hydrogen in the metal oxide as much as possible. Specifically, the hydrogen concentration in the metal oxide measured by SIMS analysis is set to less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , and more preferably less than 1×10 18 atoms / cm 3By using a metal oxide in which impurities are sufficiently reduced for a channel formation region of a transistor, the transistor can have stable electrical characteristics.

[0248] As a metal oxide for a semiconductor of a transistor, a thin film with high crystallinity is preferably used. By using this thin film, the stability or reliability of the transistor can be improved. As the thin film, for example, a single crystal metal oxide thin film or a polycrystalline metal oxide thin film can be cited. However, forming a single crystal metal oxide thin film or a polycrystalline metal oxide thin film on a substrate requires a process of high temperature or laser heating. Therefore, the cost of the manufacturing process becomes high and the throughput decreases.

[0249] Non-patent Documents 1 and 2 report the discovery of In-Ga-Zn oxide (also called CAAC-IGZO) with a CAAC structure in 2009. It is reported that CAAC-IGZO has c-axis orientation, unclear grain boundaries, and can be formed on a substrate at low temperatures. In addition, it is reported that transistors using CAAC-IGZO have excellent electrical characteristics and reliability.

[0250] In addition, In-Ga-Zn oxide (called nc-IGZO) with an nc structure was discovered in 2013 (see Non-Patent Document 3). It was reported that the atomic arrangement of nc-IGZO in a tiny region (e.g., a region greater than 1 nm and less than 3 nm) is periodic, and no regularity in crystal orientation is observed between different regions.

[0251] Non-patent literature 4 and non-patent literature 5 show the change of the average crystal size when the thin films of the above-mentioned CAAC-IGZO, nc-IGZO and IGZO with low crystallinity are irradiated with electron beams, respectively. In the IGZO thin film with low crystallinity, crystalline IGZO of about 1 nm can be observed before it is irradiated with an electron beam. Therefore, it is reported in non-patent literature 4 and non-patent literature 5 that the existence of a completely amorphous structure (completely amorphous structure) has not been confirmed in IGZO. Furthermore, it is disclosed that the stability of CAAC-IGZO thin films and nc-IGZO thin films relative to electron beam irradiation is higher than that of IGZO thin films with low crystallinity. Therefore, it is preferable to use a CAAC-IGZO thin film or a nc-IGZO thin film as a semiconductor of a transistor.

[0252] Non-patent document 6 discloses that the leakage current of a transistor using metal oxide in the non-conducting state is extremely low. Specifically, the off-state current of the transistor per channel width of 1 μm is yA / μm (10 -24For example, a low-power CPU or the like that utilizes the small leakage current characteristic of a transistor using a metal oxide has been disclosed (see Non-Patent Document 7).

[0253] In addition, there are reports that use transistors using metal oxides to apply the transistor to display devices by taking advantage of the low leakage current characteristic of the transistor (see non-patent document 8). In a display device, the display image is switched dozens of times in 1 second. The number of image switches per 1 second is called the "refresh frequency". In addition, the refresh frequency is sometimes called the "drive frequency". Such high-speed screen switching that is difficult for the human eye to recognize is believed to be a cause of eye fatigue. Therefore, a technology has been proposed to reduce the refresh frequency of the display device to reduce the number of image rewrites. The drive with a reduced refresh frequency can reduce the power consumption of the display device. This driving method is called "idle stop (IDS) drive".

[0254] The discovery of the CAAC structure and the nc structure has helped improve the electrical characteristics and reliability of transistors using the CAAC structure or metal oxides having the nc structure, reduce the cost of the manufacturing process, and increase the throughput. In addition, research has been conducted on applying the transistors to display devices and LSIs by utilizing the small leakage current characteristic of the transistors.

[0255] [Film Forming Method]

[0256] The insulating material used to form the insulating layer, the conductive material used to form the conductive layer, and the semiconductor material used to form the semiconductor layer can be formed by sputtering, spin coating, CVD (Chemical Vapor Deposition) method (including thermal CVD method, MOCVD (Metal Organic Chemical Vapor Deposition: Metal Organic Chemical Vapor Deposition) method, PECVD (Plasma Enhanced Chemical Vapor Deposition: Plasma Enhanced Chemical Vapor Deposition) method, high-density plasma CVD (High Density Plasma CVD) method, LPCVD (Low Pressure CVD: Reduced Pressure Chemical Vapor Deposition) method, APCVD (Atmospheric Pressure CVD: Atmospheric Pressure Chemical Vapor Deposition) method, etc.), ALD (Atomic Layer Deposition) method or MBE (Molecular Beam Epitaxy) method, PLD (Pulsed Laser Deposition: pulse laser deposition), dip coating, spray coating, droplet jetting (inkjet, etc.), printing (screen printing, offset printing, etc.), etc.

[0257] By utilizing the plasma CVD method, a high-quality film can be obtained at a lower temperature. In the case of using a film forming method that does not use plasma, such as the MOCVD method, the ALD method, or the thermal CVD method, it is not easy to cause damage to the formed surface. For example, the wiring, electrodes, elements (transistors, capacitors, etc.) included in the storage device sometimes generate charge accumulation due to receiving charges from plasma. At this time, the wiring, electrodes, elements, etc. included in the storage device are sometimes damaged due to the accumulated charge. On the other hand, in the case of a film forming method that does not use plasma, since such plasma damage does not occur, the yield of the storage device can be improved. In addition, since plasma damage does not occur during film formation, a film with fewer defects can be obtained.

[0258] The ALD method can utilize the self-regulation of the properties of atoms to deposit the atoms of each layer, thereby achieving the effects of being able to form extremely thin films, being able to form films on structures with high aspect ratios, being able to form films with fewer defects such as pinholes, being able to form films with excellent coverage, and being able to form films at low temperatures. In addition, the ALD method also includes the PEALD (Plasma Enhanced ALD) method utilizing plasma. By utilizing plasma, film formation can be performed at lower temperatures, so it is sometimes preferred. Note that the precursors used in the ALD method sometimes contain impurities such as carbon. Therefore, films formed using the ALD method sometimes contain more impurities such as carbon than films formed using other film forming methods. In addition, quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy).

[0259] Unlike the film-forming method of depositing particles released from a target material, etc., the CVD method and the ALD method are film-forming methods that form a film due to a reaction on the surface of the object to be processed. Therefore, the film formed by the CVD method and the ALD method is not easily affected by the shape of the object to be processed and has good step coverage. In particular, the film formed by the ALD method has good step coverage and thickness uniformity, so the ALD method is suitable for forming a film covering the surface of an opening with a high aspect ratio. However, the film-forming speed of the ALD method is relatively slow, so it is sometimes preferred to be used in combination with other film-forming methods such as the CVD method with a fast film-forming speed.

[0260] The CVD method or the ALD method can control the composition of the obtained film by adjusting the flow ratio of the source gases. For example, when the CVD method or the ALD method is used, a film of any composition can be formed by adjusting the flow ratio of the source gases. In addition, for example, when the CVD method or the ALD method is used, a film whose composition continuously changes can be formed by changing the flow ratio of the source gases while forming the film. When the film is formed while changing the flow ratio of the source gases, the time required for conveying and adjusting the pressure can be omitted, so the time required for film formation can be shortened compared to the case where the film is formed using multiple film forming chambers. Therefore, the productivity of the storage device can sometimes be improved.

[0261] This embodiment mode can be implemented in combination with the structures described in other embodiment modes and the like as appropriate.

[0262] (Implementation method 3)

[0263] In this embodiment, structural examples of a transistor 210A and a transistor 210B that can be applied to the transistor 210 are described with reference to the drawings.

[0264] <Transistor Structure Example 1>

[0265] Reference Fig. 12A , Fig. 12B and Fig. 12C A structural example of the transistor 210A will be described. Fig. 12A is a top view of transistor 210A. Fig. 12B is Fig. 12A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig. 12C is Fig. 12A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig. 12A In the top view, for easy understanding, part of the components are omitted and shown.

[0266] exist Fig. 12A , Fig. 12B and Fig. 12C 2 shows a transistor 210A, an insulating layer 361, an insulating layer 362, an insulating layer 365, an insulating layer 366, an insulating layer 371, an insulating layer 380, an insulating layer 374, and an insulating layer 381 which function as an interlayer insulating layer. In addition, a conductive layer 340 (conductive layer 340a and conductive layer 340b) which is electrically connected to the transistor 210A and functions as a contact plug is shown. In addition, an insulating layer 341 (insulating layer 341a and insulating layer 341b) which is in contact with the side surface of the conductive layer 340 which functions as a contact plug is provided.

[0267] As the interlayer insulating layer, a single layer or a stack of insulators such as silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (Ba, Sr)TiO3 (BST) can be used. Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, zirconium oxide can be added to these insulators. In addition, these insulators can also be nitrided. Silicon oxide, silicon oxynitride or silicon nitride can also be stacked on the above-mentioned insulators.

[0268] Transistor 210A includes: a conductive layer 360 (conductive layer 360a and conductive layer 360b) serving as a first gate electrode; a conductive layer 305 (conductive layer 305a and conductive layer 305b) serving as a second gate electrode; an insulating layer 349 serving as a first gate insulating film; insulating layers 365 and 366 serving as a second gate insulating layer; a semiconductor layer 260 (semiconductor layer 260a, semiconductor layer 260b and semiconductor layer 260c) including a region where a channel is formed; a conductive layer 342a serving as one of a source and a drain; a conductive layer 342b serving as the other of a source and a drain; and an insulating layer 371.

[0269] The conductive layer 305 is arranged so as to be embedded in the insulating layer 362, and the insulating layer 365 is arranged on the insulating layer 362 and the conductive layer 305. The insulating layer 366 is arranged on the insulating layer 365. In addition, the semiconductor layer 260 (semiconductor layer 260a, semiconductor layer 260b, and semiconductor layer 260c) is arranged on the insulating layer 366. The insulating layer 349 is arranged on the semiconductor layer 260, and the conductive layer 360 (conductive layer 360a and conductive layer 360b) is arranged on the insulating layer 349.

[0270] The conductive layer 342a and the conductive layer 342b are configured in a manner that contacts a portion of the top surface of the semiconductor layer 260b, and the insulating layer 371 is configured in a manner that contacts a portion of the top surface of the insulating layer 366, the side surface of the semiconductor layer 260a, the side surface of the semiconductor layer 260b, the side surface of the conductive layer 342a, the top surface of the conductive layer 342a, the side surface of the conductive layer 342b, and the top surface of the conductive layer 342b.

[0271] The insulating layer 341 is provided in contact with the side walls of the openings formed in the insulating layer 380, the insulating layer 374, and the insulating layer 381, and the first conductor of the conductive layer 340 is provided in contact with the side thereof, and the second conductor of the conductive layer 340 is provided inside thereof. Here, the height of the top surface of the conductive layer 340 and the height of the top surface of the insulating layer 381 may be substantially the same. In addition, in the transistor 210A, the first conductor of the conductive layer 340 and the second conductor of the conductive layer 340 are stacked, but the present invention is not limited to this. For example, the conductive layer 340 may also have a single-layer structure or a stacked structure of three or more layers. In the case where the structure has a stacked structure, an ordinal number is sometimes given in the order of formation to distinguish them.

[0272] The semiconductor layer 260 preferably includes a semiconductor layer 260a disposed on the insulating layer 366, a semiconductor layer 260b disposed on the semiconductor layer 260a, and a semiconductor layer 260c disposed on the semiconductor layer 260b and at least a portion of which is in contact with the top surface of the semiconductor layer 260b. When the semiconductor layer 260a is disposed below the semiconductor layer 260b, it is possible to suppress the diffusion of impurities from the structure formed below the semiconductor layer 260a to the semiconductor layer 260b. When the semiconductor layer 260c is disposed above the semiconductor layer 260b, it is possible to suppress the diffusion of impurities from the structure formed above the semiconductor layer 260c to the semiconductor layer 260b.

[0273] The semiconductor layer 260 of the transistor 210A preferably uses an oxide semiconductor which is one of metal oxides.

[0274] The transistor using oxide semiconductors for forming the semiconductor layer of the channel has extremely small leakage current (off-state current) in the non-conducting state, so a semiconductor device with low power consumption can be provided. In addition, since oxide semiconductors can be formed by sputtering or the like, highly integrated semiconductor devices can be easily realized.

[0275] For example, a metal oxide such as In-M-Zn oxide (the element M is one or more selected from gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) is preferably used as the semiconductor layer 260. In particular, gallium, yttrium, or tin is preferably used as the element M. In addition, In-M oxide, In-Zn oxide, and M-Zn oxide may also be used as the semiconductor layer 260.

[0276] In the transistor 210A, a conductive layer 360 serving as a first gate (also referred to as a top gate) electrode is formed in a self-aligned manner to fill an opening formed in the insulating layer 380 or the like. By forming the conductive layer 360 in this manner, the conductive layer 360 can be surely arranged in a region between the conductive layer 342a and the conductive layer 342b without requiring positional alignment.

[0277] The conductive layer 360 preferably includes a conductive layer 360a and a conductive layer 360b on the conductive layer 360a. For example, the conductive layer 360a is preferably arranged to surround the bottom surface and side surfaces of the conductive layer 360b. Fig. 12B As shown, the top surface of the conductive layer 360 is substantially consistent with the top surface of the insulating layer 349 and the top surface of the oxide 260c.

[0278] Conductive layer 305 is sometimes used as a second gate (also called bottom gate) electrode. In this case, the threshold voltage (Vth) of transistor 210A can be controlled by changing the potential applied to conductive layer 305 alone without linking it with the potential applied to conductive layer 360. In particular, by applying a negative potential to conductive layer 305, Vth of transistor 210A can be made greater than 0V, thereby reducing the off-state current. Therefore, applying a negative potential to conductive layer 305 can reduce the leakage current when conductive layer 360 is applied with a potential of 0V, compared to the case where a negative potential is not applied to conductive layer 305.

[0279] In addition, for example, in the case where the conductive layer 305 overlaps with the conductive layer 360 via the channel formation region of the semiconductor layer 260 , when a voltage is applied to the conductive layer 305 and the conductive layer 360 , the electric field generated from the conductive layer 360 and the electric field generated from the conductive layer 305 can be connected to cover the channel formation region of the semiconductor layer 260 .

[0280] That is, the channel formation region can be electrically surrounded by the electric field of the conductive layer 360 used as the first gate electrode and the electric field of the conductive layer 305 used as the second gate electrode. In this specification, etc., the structure of the transistor in which the channel formation region is electrically surrounded by the electric field of the first gate electrode and the second gate electrode is called a surrounded channel (S-channel) structure.

[0281] The insulating layer 365 and the insulating layer 371 preferably have a function of suppressing the diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, etc.). In addition, the insulating layer 365 and the insulating layer 371 preferably have a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). For example, compared with the insulating layer 366, the insulating layer 365 and the insulating layer 371 preferably have a function of suppressing the diffusion of one or both of hydrogen and oxygen. Compared with the insulating layer 349, the insulating layer 365 and the insulating layer 371 preferably have a function of suppressing the diffusion of one or both of hydrogen and oxygen. Compared with the insulating layer 380, the insulating layer 365 and the insulating layer 371 preferably have a function of suppressing the diffusion of one or both of hydrogen and oxygen.

[0282] In addition, in this specification, etc., a film having a function of suppressing the diffusion of hydrogen or oxygen is sometimes referred to as a film through which hydrogen or oxygen does not easily permeate, a film with low hydrogen or oxygen permeability, a film having barrier properties to hydrogen or oxygen, a barrier film to hydrogen or oxygen, etc. In addition, when a barrier film has conductivity, the barrier film is sometimes referred to as a conductive barrier film.

[0283] In addition, if Fig. 12B As shown, the insulating layer 371 preferably contacts the top surfaces of the conductive layers 342a and 342b, the side surfaces of the conductive layers 342a and 342b other than the side surfaces of the conductive layers 342a and 342b facing each other, the side surfaces of the semiconductor layers 260a and 260b, and a portion of the top surface of the insulating layer 366. Thus, the insulating layer 380 is separated from the insulating layer 366, the semiconductor layers 260a and 260b by the insulating layer 371. Therefore, impurities such as hydrogen contained in the insulating layer 380 and the like can be suppressed from intruding into the insulating layer 366, the semiconductor layers 260a and 260b.

[0284] In addition, if Fig. 12B As shown in FIG. 2 , the transistor 210A has a structure in which the insulating layer 374 contacts the top surfaces of the conductive layer 360, the insulating layer 349, and the semiconductor layer 260c. With such a structure, impurities such as hydrogen in the insulating layer 381 and the like can be prevented from entering the insulating layer 349. Thus, negative effects on the electrical characteristics and reliability of the transistor can be prevented.

[0285] By having the above structure, a transistor with a large on-state current can be provided. In addition, a transistor with a small off-state current can be provided. In addition, a semiconductor device with improved reliability while suppressing the variation of electrical characteristics and having stable electrical characteristics can be provided.

[0286] <Transistor Structure Example 2>

[0287] Reference Fig.13A , Fig. 13B and Fig. 13C A structural example of the transistor 210B will be described. Fig.13A is a top view of transistor 210B. Fig. 13B is Fig.13A A cross-sectional view of the portion indicated by the dashed line L1-L2. Fig. 13C is Fig.13A A cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. Fig.13A In the top view, for easy understanding, part of the components are omitted and shown.

[0288] The transistor 210B is a modified example of the transistor 210A. Therefore, in order to avoid duplication of description, the difference between the transistor 210B and the transistor 210A will be mainly described.

[0289] The conductive layer 360 used as the first gate electrode includes a conductive layer 360a and a conductive layer 360b on the conductive layer 360a. The conductive layer 360a preferably uses a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. In addition, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules).

[0290] When the conductive layer 360a has a function of suppressing diffusion of oxygen, the selectivity of the material of the conductive layer 360b can be improved. That is, by including the conductive layer 360a, oxidation of the conductive layer 360b can be suppressed, and a decrease in conductivity can be prevented.

[0291] In addition, an insulating layer 371 is preferably provided so as to cover the top surface and side surfaces of the conductive layer 360, the side surfaces of the insulating layer 349, and the side surfaces of the semiconductor layer 260c. As the insulating layer 371, an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen is preferably used. For example, aluminum oxide or hafnium oxide is preferably used. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxynitride, or silicon nitride can be used.

[0292] By providing the insulating layer 371, oxidation of the conductive layer 360 can be suppressed. In addition, by including the insulating layer 371, diffusion of impurities such as water and hydrogen contained in the insulating layer 380 into the transistor 210B can be suppressed.

[0293] Since a portion of the conductive layer 342a and a portion of the conductive layer 342b overlap with the conductive layer 360 in the transistor 210B, the parasitic capacitance of the transistor 210B tends to be larger than that of the transistor 210A. Therefore, the operating frequency tends to be lower than that of the transistor 210A. However, the transistor 210B does not need to provide an opening in the insulating layer 380 or the like to embed the conductive layer 360 or the insulating layer 349, so it has higher productivity than the transistor 210A.

[0294] This embodiment mode can be implemented in combination with the structures described in other embodiment modes and the like as appropriate.

[0295] (Implementation 4)

[0296] In this embodiment, refer to Fig.14A and Fig. 14B A cylindrical secondary battery 600 will be described as an example of the secondary battery 200. Fig.14AAs shown, the top surface of the cylindrical secondary battery 600 includes a positive electrode cover (battery cover) 601, and the side and bottom surfaces thereof include a battery can (outer can) 602. These positive electrode cover (battery cover) 601 and battery can (outer can) 602 are insulated by a gasket (insulating gasket) 610.

[0297] Fig. 14B 604 and 606, sandwiching a separator 605. Although not shown in the figure, the battery element is wound around the center pin. One end of the battery can 602 is closed and the other end is open. As the battery can 602, metals such as nickel, aluminum, titanium, etc., which are resistant to corrosion by the electrolyte, their alloys, or alloys of them and other metals (such as stainless steel, etc.) can be used. In addition, in order to prevent corrosion caused by the electrolyte, the battery can 602 is preferably covered with nickel or aluminum. On the inside of the battery can 602, the battery element in which the positive electrode, the negative electrode and the separator are wound is sandwiched by a pair of opposing insulating plates 608 and insulating plates 609. In addition, a non-aqueous electrolyte (not shown) is injected into the interior of the battery can 602 in which the battery element is provided. Secondary batteries are composed of a positive electrode including active materials such as lithium cobalt oxide (LiCoO2) and lithium iron phosphate (LiFePO4), a negative electrode made of carbon materials such as graphite that can absorb and release lithium ions, and a non-aqueous electrolyte in which a supporting electrolyte composed of a lithium salt such as LiBF4 and LiPF6 is dissolved in an organic solvent such as ethylene carbonate or diethyl carbonate.

[0298] Because the positive electrode and negative electrode used for the cylindrical storage battery are wound, the active material is preferably formed on both surfaces of the current collector. The positive electrode 604 is connected to the positive terminal (positive electrode current collector lead) 603, and the negative electrode 606 is connected to the negative terminal (negative electrode current collector lead) 607. Metal materials such as aluminum can be used for both the positive terminal 603 and the negative terminal 607. The positive terminal 603 is resistance-welded to the safety valve mechanism 612, and the negative terminal 607 is resistance-welded to the bottom of the battery can 602. The safety valve mechanism 612 is electrically connected to the positive electrode cover 601 through a PTC element (Positive Temperature Coefficient) 611. When the internal pressure of the battery rises to exceed a specified threshold, the safety valve mechanism 612 cuts off the electrical connection between the positive electrode cover 601 and the positive electrode 604. In addition, the PTC element 611 is a thermistor whose resistance increases when the temperature rises, and limits the current by increasing the resistance to prevent abnormal heating. Barium titanate (BaTiO 3 ) based semiconductor ceramics or the like can be used for the PTC element.

[0299] A lithium-ion secondary battery using an electrolyte includes a positive electrode, a negative electrode, a separator, an electrolyte, and an outer package. Note that in a lithium-ion secondary battery, since the anode and the cathode are swapped according to charging or discharging, and the oxidation reaction and the reduction reaction are swapped, the electrode with a high reaction potential is called the positive electrode, and the electrode with a low reaction potential is called the negative electrode. Therefore, in this specification, the positive electrode is called the "positive electrode" or "+ pole" even when charging or discharging, and the negative electrode is called the "negative electrode" or "- pole". If the terms of anode and cathode related to oxidation reaction and reduction reaction are used, the anode and cathode are opposite during charging and discharging, which may cause confusion. Therefore, in this specification, the terms of anode and cathode are not used. When the terms of anode and cathode are used, it is clearly indicated whether it is charging or discharging, and whether it corresponds to the positive electrode (+ pole) or the negative electrode (- pole).

[0300] In this embodiment, an example of a lithium ion secondary battery is shown, but it is not limited to a lithium ion secondary battery. As a positive electrode material of a secondary battery, for example, a material containing element A, element X and oxygen can be used. Element A is preferably an element selected from one or more of the first group elements and the second group elements. As a first group element, for example, alkali metals such as lithium, sodium, and potassium can be used. In addition, as a second group element, for example, calcium, beryllium, magnesium, etc. can be used. As element X, for example, one or more elements selected from metal elements, silicon and phosphorus can be used. In addition, element X is preferably an element selected from one or more of cobalt, nickel, manganese, iron and vanadium. Typically, lithium cobalt composite oxide (LiCoO2) and lithium iron phosphate (LiFePO4) can be cited.

[0301] The negative electrode includes a negative electrode active material layer and a negative electrode current collector. In addition, the negative electrode active material layer may also include a conductive auxiliary agent and a binder.

[0302] As the negative electrode active material, an element that can perform a charge-discharge reaction by alloying / de-alloying reaction with lithium can be used. For example, a material containing at least one of silicon, tin, gallium, aluminum, germanium, lead, antimony, bismuth, silver, zinc, cadmium and indium can be used. The capacitance of such an element is greater than that of carbon, and in particular, the theoretical capacitance of silicon is large, which is 4200 mAh / g.

[0303] In addition, the secondary battery preferably includes a separator. As the separator, for example, a separator formed of cellulose fibers such as paper, nonwoven fabrics, glass fibers, ceramics, or synthetic fibers containing nylon (polyamide), vinylon (polyvinyl alcohol-based fibers), polyester, acrylic resin, polyolefin, polyurethane, etc. can be used.

[0304] This embodiment mode can be implemented in combination with the structures described in other embodiment modes and the like as appropriate.

[0305] (Implementation method 5)

[0306] In this embodiment, an electronic device to which a semiconductor device according to one embodiment of the present invention can be applied is described.

[0307] A semiconductor device according to one embodiment of the present invention can be installed in various electronic devices. As examples of electronic devices, in addition to electronic devices with larger screens such as television devices, desktop or notebook personal computers, displays for computers, etc., digital signage, and large game machines such as pinball machines, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, and sound reproduction devices can also be cited. In addition, mobile bodies such as cars, two-wheeled vehicles, ships, and airplanes can also be said to be electronic devices. A semiconductor device according to one embodiment of the present invention can be used in a battery charging monitoring device installed in these electronic devices.

[0308] The electronic device may also include an antenna. By receiving a signal through the antenna, an image or information can be displayed on the display unit. In addition, when the electronic device includes an antenna and a secondary battery, the antenna can be used for contactless power transmission.

[0309] Electronic devices may also include sensors (which have the function of measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, tilt, vibration, smell or infrared).

[0310] An electronic device may have various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of executing various software (programs); a function of wireless communication; a function of reading programs or data stored in a storage medium; etc.

[0311] FIG. 15 illustrates a moving object using a semiconductor device and a secondary battery according to one embodiment of the present invention. Fig.15A The secondary battery 8024 of the automobile 8400 shown not only drives the electric motor 8406, but also supplies power to lighting devices such as the headlight 8401 or the interior light (not shown). The secondary battery 8024 of the automobile 8400 can also be used including Fig.14A and Fig. 14B The battery module shown has a plurality of cylindrical secondary batteries 600. The charge monitoring device 8025 includes a semiconductor device according to one embodiment of the present invention, and charges the secondary battery 8024 according to the ambient temperature.

[0312] exist Fig. 15BIn the illustrated automobile 8500 , the secondary battery included in the automobile 8500 can be charged by receiving electric power from an external charging device using a plug-in method or a contactless power supply method. Fig. 15B The figure shows a case where a secondary battery 8024 installed in a car 8500 is charged from a ground-mounted charging device 8021 through a cable 8022. When charging is performed, a charging monitoring device 8025 including a semiconductor device of one embodiment of the present invention is used, so that charging can be performed according to the ambient temperature. In addition, the charging monitoring device including a semiconductor device of one embodiment of the present invention may be provided in the charging device 8021.

[0313] As for the charging method or the specification of the connector, etc., it can be appropriately performed according to the prescribed method of CHAdeMO (registered trademark) or the combined charging system. As the charging device 8021, a charging station set up in a commercial facility or a home power supply can also be used. For example, by supplying power from the outside using plug-in technology, the secondary battery 8024 installed in the automobile 8500 can be charged. The AC power can be converted into DC power by a conversion device such as an AC / DC converter for charging.

[0314] In addition, although not shown in the figure, it is also possible to install a power receiving device in the mobile body and supply power contactlessly from a power transmission device on the ground for charging. When a contactless power supply method is used, by assembling a power transmission device in a road or an outer wall, charging can be performed not only when the vehicle is parked but also when it is driving. In addition, the contactless power supply method can also be used to send and receive power between mobile bodies. Furthermore, a solar cell can be set on the outside of the mobile body to charge the secondary battery when it is stopped or moving. Such contactless power supply can be achieved using an electromagnetic induction method or a magnetic field resonance method.

[0315] Fig. 15C This is an example of a two-wheeled vehicle using a secondary battery. Fig. 15C The illustrated scooter 8600 includes a secondary battery 8602, a charge monitoring device 8625, a rearview mirror 8601, and a turn signal lamp 8603. The secondary battery 8602 can supply power to the turn signal lamp 8603. In addition, by using the charge monitoring device 8025 including the semiconductor device of one embodiment of the present invention, the secondary battery 8602 can be charged according to the ambient temperature.

[0316] In addition, Fig. 15C In the illustrated scooter 8600, the secondary battery 8602 can be stored in the storage box 8604 under the seat. Even if the storage box 8604 under the seat is small, the secondary battery 8602 can be stored in the storage box 8604 under the seat.

[0317] The semiconductor device according to one embodiment of the present invention is not limited to a mobile object, but can be applied to a device including a secondary battery and a wireless module.

[0318] Fig.16A The mobile phone 7400 includes a display portion 7402 incorporated in a housing 7401, an operation button 7403, an external connection port 7404, a speaker 7405, a microphone 7406, and the like. Note that the mobile phone 7400 includes a power storage device 7407 and a charge monitoring device for the power storage device 7407.

[0319] Fig. 16B 1 is a projection diagram illustrating an example of the appearance of information processing device 1200. Information processing device 1200 described in this embodiment includes a computing device, an input / output device, a housing 1210, a display unit 1230, a display unit 1240, a power storage device 1250, and a charge monitoring device.

[0320] The information processing device 1200 includes a communication unit having a function of supplying information to a network and a function of acquiring information from a network. In addition, the communication unit can be used to receive information transmitted to a specific space and generate image information based on the received information. The information processing device 1200 can set a screen displaying a keyboard in one of the display unit 1230 and the display unit 1240 as a touch input panel to be used as a personal computer.

[0321] In addition, if Fig. 16C The wearable device shown may also be provided with a secondary battery charge monitoring device according to one embodiment of the present invention.

[0322] For example, the charging monitoring device may be installed in Fig. 16C In the eyeglass-type device 400 as shown. The eyeglass-type device 400 includes a frame 400a, a display unit 400b, and a wireless module. The temple portion of the curved frame 400a may also be provided with a power storage device, a charging monitoring device, and a wireless module. By providing the charging monitoring device, the degradation of the power storage device is suppressed, and the continuous use time can be prevented from decreasing. In addition, charging abnormalities are less likely to occur, and a safe eyeglass-type device 400 can be realized.

[0323] In addition, a power storage device, a charge monitoring device and a wireless module may be installed in the earphone device 401. The earphone device 401 includes at least a microphone part 401a, a flexible tube 401b and an earphone part 401c. The power storage device, the charge monitoring device and the wireless module may be installed in the flexible tube 401b or in the earphone part 401c.

[0324] Furthermore, the abnormality detection device may be incorporated into the device 402 that can be directly attached to the body. The power storage device 402b and the charge monitoring device of the power storage device may be provided in the thin casing 402a of the device 402.

[0325] Furthermore, the abnormality detection device may be installed in the device 403 that can be attached to clothes. The power storage device 403b and the charge monitoring device of the power storage device may be provided in the thin casing 403a of the device 403.

[0326] Alternatively, the abnormality detection device may be incorporated into the wristwatch type device 405. The wristwatch type device 405 includes a display unit 405a and a wristband unit 405b. The display unit 405a or the wristband unit 405b may include a power storage device and a charge monitoring device for the power storage device.

[0327] In addition to the time, various information such as e-mails and incoming phone calls can be displayed on the display unit 405a.

[0328] Furthermore, since the watch-type device 405 is a wearable device that is directly wrapped around the arm, it can be equipped with sensors for measuring the user's pulse, blood pressure, etc. Data on the user's exercise amount and health can be accumulated and effectively used for health maintenance.

[0329] Furthermore, a power storage device and a charge monitoring device for the power storage device may be installed in the belt-type device 406. The belt-type device 406 includes a wristband 406a and a wireless power supply and reception unit 406b. The power storage device, the charge monitoring device and the wireless module may be installed inside the wristband 406a.

[0330] By using the power storage device and the charge monitoring device of the power storage device according to one embodiment of the present invention as the power storage device of a daily electronic product, a lightweight and safe product can be provided. For example, as daily electronic products, electric toothbrushes, electric shavers, electric beauty devices, etc. can be cited. The power storage devices in these products are expected to have a rod-like shape and be small, lightweight, and large in capacity so that the user can hold them easily. Fig.16D This is a perspective view of a device called a liquid-containing smoking device (electronic cigarette). Fig.16D In the embodiment, the electronic cigarette 7410 includes: an atomizer 7411 including a heating element; a power storage device 7414 for supplying power to the atomizer; and a cartridge 7412 including a liquid supply container and a sensor, etc. In order to improve safety, a charge monitoring device of the power storage device may also be electrically connected to the power storage device 7414. Fig.16D The power storage device 7414 shown includes an external terminal for connecting to a charger. When picked up, the power storage device 7414 is located at the top end, so it is preferably short in total length and light in weight.

[0331] Note that this embodiment mode can be combined with other embodiment modes as appropriate.

[0332] [Explanation of symbols]

[0333] 100: semiconductor device, 101: storage element, 102: storage element, 103: comparison circuit, 104: current adjustment circuit, 105: control circuit, 106: input-output circuit, 110: electrode, 112: electrode, 114: insulating layer, 115: insulating layer, 116: insulating layer, 120: electrode, 130: insulating layer, 150: integrated circuit, 152: electrode, 153: electrode, 154: insulating layer, 156: insulating layer, 160: integrated circuit, 200: secondary battery, 210: transistor.

Claims

1. A semiconductor device comprising: a first storage element, a second storage element, a comparison circuit and a current adjustment circuit, The first storage element has the function of storing reference temperature information. The second storage element includes a capacitor and a first transistor including an oxide semiconductor in a first semiconductor layer, The second storage element has a function of measuring the ambient temperature and a function of retaining the ambient temperature as ambient temperature information between one electrode of the capacitor and one of the source and the drain of the first transistor due to a change in resistance of the oxide semiconductor. The comparison circuit has a function of comparing the reference temperature information with the ambient temperature information to determine the operation of the current adjustment circuit. Furthermore, the current regulating circuit has a function of supplying current to the secondary battery.

2. The semiconductor device according to claim 1, The first memory element includes a second transistor including an oxide semiconductor in a second semiconductor layer.

3. The semiconductor device according to claim 2, The second semiconductor layer includes one or both of indium and zinc.

4. The semiconductor device according to claim 1 or 2, The first semiconductor layer includes one or both of indium and zinc.

5. The semiconductor device according to claim 1 or 2, The secondary battery is a lithium ion secondary battery.

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