A multi-stress test system and method for IGBT devices
By designing a multi-stress effect test system for IGBT devices, using a DC current source and voltage source combined with a series-parallel conversion circuit, high-temperature gate bias and reverse bias testing is realized, which solves the problems of low test accuracy and high cost in the existing technology, and reduces the problem of low testing accuracy and high cost. Test cost and time.
Patent Information
- Application Number
- CN202011508777.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-18
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2040-12-18
AI Technical Summary
The reliability test of existing medium and high voltage high power semiconductor devices is mainly a single factor test, and the failure to fully consider the combined effect of multiple stresses, resulting in low test accuracy, high cost and high time cost.
A multi-stress effect testing system for IGBT devices was designed. Through the DC current source, current test branch switch, DC voltage source, voltage test branch switch and series and parallel conversion circuit, multiple IGBT devices under test are realized simultaneously. High-temperature gate bias test and high-temperature reverse bias test are combined with water-cooled devices to cool down to reduce testing costs and time.
The system can more comprehensively reflect the actual working of the device, reduce test accuracy deviations, reduce test samples, and reduce money and time costs.
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Figure CN112526312B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power semiconductor device testing, and in particular to a multi-stress testing system and method for an insulated gate bipolar transistor (IGBT) device. Background Art
[0002] Power semiconductor devices are increasingly widely used. Currently, they control at least 60% of the world's electricity. With the development of flexible direct current transmission technology and new energy vehicles, this proportion will increase significantly. This wider application poses greater challenges to power semiconductor devices in terms of voltage levels, capacity, and long-term operational reliability. Devices with high voltage levels and large capacity are referred to as high-voltage, high-power semiconductor devices. There are more than a dozen tests used to assess the reliability of high-voltage, high-power semiconductor devices, as shown in Table 1. The most important tests are power cycling, high-temperature reverse bias, and high-temperature gate bias, which respectively assess the packaging characteristics of high-voltage, high-power semiconductor devices, the long-term voltage withstand capability of the chip, and the chip gate reliability.
[0003] Table 1 Reliability test items for high-voltage and high-power semiconductor devices
[0004]
[0005] The power cycle test uses a DC current to heat the device under test to increase its temperature, and then cools it through a water cooling system, repeating this cycle to assess the long-term operational reliability of the package; the high-temperature reverse bias test applies high voltage to both ends of the blocked device in a high-temperature environment to assess the long-term voltage withstand capability of the chip terminal; the high-temperature gate bias test applies voltage to the device gate in a high-temperature environment to assess the long-term gate reliability of the chip. The basic principles of power cycling, high-temperature reverse bias testing, and high-temperature gate bias testing are as follows: Figure 1 As shown. Among them, Figure 1 Part (a) is the schematic diagram of the power cycle measurement circuit. Figure 1 In part (a) of Load is the load current source, I Sense is the measurement current source, K is the switch, and DUT IGBT is the IGBT device to be tested. To ensure that the temperature rise effect of the measurement current source does not cause aging of the device, I Sense ≈0.001*I Load When switch K is closed, the load current passes through the device under test to heat the device. When switch K is opened, the load current is removed, but the measurement current is still applied to the device under test. The whole process is repeated to form a power cycle test. Figure 1 Part (b) is the power cycle measurement timing diagram. Figure 1 In part (b), T on During this period, the device passes ILoad and I Sense and is heated, T on time Figure 1 In part (a), switch K is open, the load current is removed, and the device only flows through I Sense And cool down, repeat the whole process to constitute the power cycle test. Figure 1 Part (c) is the schematic diagram of the high-temperature reverse bias measurement circuit. Figure 1 In part (c), the two ends of the IGBT device GE under test are short-circuited, and the high-voltage power supply V C Apply voltage to both ends of the IGBT device CE under test through switch K and measure the resistance R Measure Connect in series to the device emitter to measure the CE leakage current I ces . Figure 1 Part (d) is the schematic diagram of the high-temperature gate bias measurement circuit. Figure 1 In part (d), the CE terminals of the IGBT device under test are short-circuited, and the gate power supply V G Apply voltage to both ends of the IGBT device GE under test through switch K and measure the resistance R Measure Connected in series to the device gate to measure the GE leakage current I ges .
[0006] However, conventional reliability assessments typically involve performing a single reliability test on a single device. For example, current power cycling tests, high-temperature reverse bias tests, and high-temperature gate bias tests are all performed separately on independent devices, without considering the combined effects of multiple factors. However, the actual application environment of high-voltage, high-power semiconductor devices is characterized by the cross-coupling of multiple stresses. The high current and high temperature gradients during the device's conduction phase, and the high voltage and high temperature during the device's blocking state, all accelerate device aging through different mechanisms. For example, aging of packaging materials can also lead to a decrease in the device's terminal withstand voltage, which cannot be assessed through a single reliability test item. Furthermore, performing only a single reliability test on each device increases the monetary and time costs of testing. Summary of the Invention
[0007] Based on this, it is necessary to provide a multi-stress test system and method for IGBT devices to solve the problems of low test accuracy, high monetary cost and high time cost.
[0008] To achieve the above object, the present invention provides the following solutions:
[0009] A multi-stress test system for an IGBT device comprises: a DC current source, a current test branch switch, a DC voltage source, a voltage test branch switch, and a plurality of parallel test branches;
[0010] The test branch includes a measuring current branch and a device under test branch; the measuring current branch includes a measuring current source and a measuring current switch connected in series; the device under test branch includes multiple IGBT devices under test, and two adjacent IGBT devices under test are connected through a series-parallel conversion circuit; each of the test branches is connected to the DC current source through one of the current test branch switches; and each of the test branches is connected to the DC voltage source through one of the voltage test branch switches.
[0011] Optionally, the collector and emitter of the i-th IGBT device under test in the device under test branch are both connected to one end of the series-parallel conversion circuit; the other end of the series-parallel conversion circuit is connected to the collector and emitter of the i+1-th IGBT device under test.
[0012] Optionally, the multi-stress test system for the IGBT device further includes a gate voltage source; the gate voltage source is connected to the gate of the IGBT device under test.
[0013] Optionally, the multi-stress test system for the IGBT device further includes a water cooler; the water cooler is used to cool the IGBT device under test.
[0014] Optionally, the multi-stress test system for the IGBT device further includes a current-limiting resistor; the current-limiting resistor is arranged between the DC voltage source and the voltage test branch switch.
[0015] Optionally, there are three test branches, and each of the device under test branches includes four IGBT devices under test.
[0016] The present invention further provides a multi-stress test method for an IGBT device, which is used in the multi-stress test system for the IGBT device described above; the method comprises:
[0017] Obtaining a driving pulse signal under the j-th test branch; the driving pulse signal includes a driving pulse signal of the current test branch switch, a driving pulse signal of the measurement current switch, a driving pulse signal of the voltage test branch switch, a driving pulse signal of the series-parallel conversion circuit, and a driving pulse signal of the gate of the IGBT device under test;
[0018] Determining the driving pulse signal under the j+1th test branch based on the driving pulse signal under the jth test branch, thereby obtaining a control timing diagram of the driving pulse signals under all test branches;
[0019] According to the control timing diagram, at the current power cycle number, the voltage test branch switch of the j-th test branch is controlled to be disconnected, the series-parallel conversion circuit of the j-th test branch is in series connection, the gate voltage is applied to all the IGBT devices under test on the j-th test branch, the measurement current switch of the j-th test branch is closed, and the current test branch switch of the j-th test branch is closed, so as to implement a high-temperature gate bias test on all the IGBT devices under test on the j-th test branch;
[0020] Obtaining high-temperature gate bias test data of the j-th test branch in the high-temperature gate bias test under the current power cycle number; the high-temperature gate bias test data includes the housing surface temperature, the junction temperature-saturation voltage drop relationship curve, the saturation voltage drop, the load current, the load voltage, the gate leakage current and the high-temperature gate bias test time;
[0021] Under the current number of power cycles, when the duration of the high-temperature gate bias test reaches a first set time, the current test branch switch of the j-th test branch is controlled to be disconnected, the measurement current switch of the j-th test branch is controlled to be disconnected, the gate voltages of all the IGBT devices under test on the j-th test branch are controlled to be zero, the state of the series-parallel conversion circuit of the j-th test branch is controlled to be parallel, and the voltage test branch switch of the j-th test branch is controlled to be closed, and all the IGBT devices under test on the j-th test branch are controlled to cool for a second set time, so as to achieve a high-temperature reverse bias test on all the IGBT devices under test on the j-th test branch;
[0022] Obtaining high-temperature reverse bias test data of the j-th test branch in a high-temperature reverse bias test under the current power cycle number; the high-temperature reverse bias test data includes a breakdown voltage, a blocking leakage current, and a high-temperature reverse bias test time;
[0023] Determine whether the current power cycle number is less than the maximum cycle number to obtain a first judgment result; determine whether the high-temperature gate bias test time under the current power cycle number is less than the maximum high-temperature gate bias test time to obtain a second judgment result; determine whether the high-temperature reverse bias test time under the current power cycle number is less than the maximum high-temperature reverse bias test time to obtain a third judgment result;
[0024] If the first judgment result is no, the second judgment result is no, or the third judgment result is no, then the test ends;
[0025] If the first judgment result, the second judgment result, and the third judgment result are all yes, determining cycle test data according to the high-temperature gate bias test data and the high-temperature reverse bias test data; the cycle test data includes cycle junction temperature, power loss, cycle breakdown voltage, cycle blocking leakage current, cycle gate leakage current, and cycle thermal resistance value;
[0026] Determining whether to terminate the test based on the cycle test data and the initial parameter data to obtain a fourth determination result; the initial parameter data including an initial breakdown voltage, an initial blocking leakage current, an initial gate leakage current, an initial saturation voltage drop, an initial junction temperature, and an initial thermal resistance;
[0027] If the fourth judgment result is yes, then end the test;
[0028] If the fourth judgment result is no, after updating the current number of power cycles, return to the step of "according to the control timing diagram, under the current number of power cycles, control the voltage test branch switch of the jth test branch to be disconnected, the state of the series-parallel conversion circuit of the jth test branch to be series, all the IGBT devices under test on the jth test branch to apply gate voltage, the measurement current switch of the jth test branch to be closed, and the current test branch switch of the jth test branch to be closed, so as to realize high-temperature gate bias test of all IGBT devices under test on the jth test branch".
[0029] Optionally, determining the cycle test data according to the high-temperature gate bias test data and the high-temperature reverse bias test data specifically includes:
[0030] determining a cyclic junction temperature of each of the IGBT devices under test according to the junction temperature-saturation voltage drop relationship curve and the saturation voltage drop, determining a power loss of each of the IGBT devices under test according to the load current and the load voltage, determining a cyclic breakdown voltage of each of the IGBT devices under test according to the breakdown voltage, determining a cyclic blocking leakage current of each of the IGBT devices under test according to the blocking leakage current, and determining a cyclic gate leakage current of each of the IGBT devices under test according to the gate leakage current;
[0031] The cyclic thermal resistance value of the IGBT device under test is determined according to the cyclic junction temperature, the power loss and the shell surface temperature.
[0032] Optionally, determining whether to end the test based on the cyclic test data and the initial parameter data to obtain a fourth determination result specifically includes:
[0033] Determine whether to terminate the power cycle test based on the cycle thermal resistance value, the cycle junction temperature, the load voltage, the initial saturation voltage drop, the initial junction temperature, and the initial thermal resistance value, to obtain a fifth judgment result; determine whether to terminate the high-temperature reverse bias test based on the cycle breakdown voltage, the cycle blocking leakage current, the initial breakdown voltage, and the initial blocking leakage current, to obtain a sixth judgment result; determine whether to terminate the high-temperature gate bias test based on the cycle gate leakage current and the initial gate leakage current, to obtain a seventh judgment result;
[0034] When the fifth judgment result, the sixth judgment result, and the seventh judgment result are all negative, it is determined that the fourth judgment result is negative; otherwise, the fourth judgment result is positive.
[0035] Optionally, determining the cyclic thermal resistance value of the IGBT device under test according to the cyclic junction temperature, the power loss and the housing surface temperature is specifically:
[0036] R=(T j -T c ) / P;
[0037] Where R represents the cycle thermal resistance, T j Indicates the cycle junction temperature, T c represents the shell surface temperature, and P represents the power loss.
[0038] Compared with the prior art, the present invention has the following beneficial effects:
[0039] The present invention proposes a multi-stress testing system and method for IGBT devices. The system provides a corresponding current test branch switch and voltage test branch switch for each test branch, and uses a series-parallel conversion circuit to connect multiple IGBT devices under test. This system implements power cycling testing, ensuring simultaneous high-temperature gate bias testing and high-temperature reverse bias testing. This more comprehensively reflects the true operating conditions of the device and addresses the issue of low test accuracy caused by the deviation between the power cycling test platform for high-voltage, high-power semiconductor devices and actual operating conditions. Furthermore, the simultaneous measurement of multiple reliability experiments reduces the total test volume of device samples, lowering both monetary and time costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0041] Figure 1 This is the schematic diagram of conventional power cycle test, high temperature reverse bias test, and high temperature gate bias test; Figure 1 Part (a) is the schematic diagram of the power cycle measurement circuit. Figure 1 Part (b) is the power cycle measurement timing diagram. Figure 1 Part (c) is the schematic diagram of the high-temperature reverse bias measurement circuit. Figure 1 Part (d) is the schematic diagram of the high-temperature gate bias measurement circuit;
[0042] Figure 2A circuit schematic diagram of a multi-stress test system for an IGBT device provided by an embodiment of the present invention;
[0043] Figure 3 A circuit schematic diagram of a series-parallel conversion circuit provided in an embodiment of the present invention;
[0044] Figure 4 This is a control timing diagram of the driving pulse signal of the multi-stress comprehensive action of each test branch provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0045] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0047] Figure 2 This is a circuit diagram of a multi-stress test system for IGBT devices provided by an embodiment of the present invention. Figure 2 The multi-stress test system for IGBT devices of this embodiment includes: a DC current source I Load , current test branch switch, DC voltage source V C , voltage test branch switch and multiple parallel test branches.
[0048] The test branch includes a measuring current branch and a device under test branch; the measuring current branch includes a measuring current source and a measuring current switch connected in series; the device under test branch includes a plurality of IGBT devices under test, and two adjacent IGBT devices under test are connected through a series-parallel conversion circuit T; each of the test branches is connected to the DC current source I through a current test branch switch. Load Each of the test branches is connected to the DC voltage source V through a voltage test branch switch C connect.
[0049] The multi-stress test system for IGBT devices described above operates as follows: During the device power cycling test, a large current flows through the device, causing it to heat up, and a high-temperature gate bias test is performed during the device heating process. After the device power cycling test, a reverse voltage is applied to the device, causing the device temperature to drop due to water cooling, during which a high-temperature reverse bias test is performed. To ensure that all tested IGBT devices have equal current flowing through them when conducting, the tested IGBT devices must be connected in series before closing the current test branch switch and the current measurement switch. To ensure that all tested IGBT devices have equal voltage across them when subjected to withstand voltage, the tested devices must be connected in parallel before closing the voltage test branch switch.
[0050] As an optional embodiment, the collector and emitter of the i-th IGBT device under test in the device under test branch are both connected to one end of the series-parallel conversion circuit T; the other end of the series-parallel conversion circuit T is connected to the collector and emitter of the i+1-th IGBT device under test. The circuit schematic diagram of the series-parallel conversion circuit T is shown in FIG. Figure 3 As shown in Figure 1, a double-pole double-throw switch can achieve series / parallel conversion between the two IGBT devices under test. When the double-pole double-throw switch is switched to 2, the two IGBT devices under test are connected in series; when the double-pole double-throw switch is switched to 1, the two IGBT devices under test are connected in parallel. The switching signal of the double-pole double-throw switch is provided by the control system.
[0051] As an optional implementation manner, the multi-stress test system for the IGBT device further includes a gate voltage source; the gate voltage source is connected to the gate of the IGBT device under test.
[0052] As an optional implementation manner, the multi-stress test system for the IGBT device further includes a water cooler; the water cooler is used to cool the IGBT device under test.
[0053] As an optional embodiment, the multi-stress test system for the IGBT device further includes a current limiting resistor R Current-limiting ; The current limiting resistor R Current-limiting Set the DC voltage source V C and the voltage test branch between the switches.
[0054] As an optional implementation, the DC current source I Load An ammeter I is connected between the current test branch switch Measure .
[0055] As an optional implementation, there are three test branches, each of which includes four IGBT devices under test. The three test branches are respectively a first test branch 1, a second test branch 2, and a third test branch 3.
[0056] The first test branch 1 includes a first measurement current branch and a first device under test branch; the first measurement current branch includes a first measurement current source I Sense1 and the first measuring current switch KS1; the first device under test branch includes four IGBT devices under test, namely DUT1, DUT2, DUT3 and DUT4; two adjacent IGBT devices under test are connected through a series-parallel conversion circuit T. The first test branch 1 is connected to the DC current source I through the first current test branch switch KI1. Load Connection; the first test branch 1 is connected to the DC voltage source V through the first voltage test branch switch KV1 C The first voltage test branch is connected in parallel with a voltmeter.
[0057] The second test branch 2 includes a second measurement current branch and a second device under test branch; the second measurement current branch includes a second measurement current source I Sense2 and the second measuring current switch KS2; the second device under test branch includes four IGBT devices under test, namely DUT5, DUT6, DUT7 and DUT8; two adjacent IGBT devices under test are connected through a series-parallel conversion circuit T. The second test branch 2 is connected to the DC current source I through the second current test branch switch KI2. Load The second test branch 2 is connected to the DC voltage source V through the second voltage test branch switch KV2 C connect.
[0058] The third test branch 3 includes a third measurement current branch and a third device under test branch; the third measurement current branch includes a third measurement current source I Sense3 and the third measuring current switch KS3; the third device under test branch includes four IGBT devices under test, namely DUT9, DUT10, DUT11 and DUT12; two adjacent IGBT devices under test are connected through a series-parallel conversion circuit T. The third test branch 3 is connected to the DC current source I through the third current test branch switch KI3. Load The third test branch 3 is connected to the DC voltage source V through the third voltage test branch switch KV3 C connect.
[0059] The following provides a more specific structure of a multi-stress test system for IGBT devices, and describes in detail the measurement principle and test process of the system.
[0060] The multi-stress test system for IGBT devices includes multiple parallel-connected test branches, a DC current source, a water cooler, a voltage test branch switch, a DC voltage source, a gate voltage source, a series-parallel conversion circuit, and a control system. Each test branch includes a measurement current branch and a device under test branch; the measurement current branch includes a measurement current switch and a measurement current source; and the device under test branch includes several devices under test connected in series with the current test branch switch and a series-parallel conversion circuit connected between the devices under test.
[0061] When the current test branch switch is closed, each test branch is connected to the DC current source to form a closed loop, and each current test branch switch is only turned on once in a power cycle test cycle. The DC power supply is used to provide a constant load current to the test branch. The water cooler is set corresponding to the test branch. The water cooler is used to cool the devices under test on all test branches. The gate voltage source is used to provide a gate voltage to turn on the device. The measuring current switch is closed, and each test branch forms a closed loop with the measuring current source to realize electrical quantity measurement. After the test branch completes the high-temperature gate bias and power cycle tests, the control system controls the current test branch switch, the measuring current switch, the series-parallel conversion circuit, the voltage test branch switch, the DC voltage source, and the gate voltage source to perform high-temperature reverse bias tests on several devices under test. When the current test branch switch is disconnected, the measuring current switch is disconnected, and the voltage test branch switch is closed, the test branch is disconnected from the DC current source and the measuring current source, the gate voltage source is set to zero, and it is connected to the DC voltage source to form a closed loop. Each voltage test branch switch is only closed and opened once in one power cycle, and the series-parallel conversion circuit controls the connection mode between the devices under test from series to parallel. The DC voltage source is used to provide a constant blocking voltage to all devices under test on the test branch.
[0062] The test process of the multi-stress test system for the above-mentioned IGBT device is as follows:
[0063] First, obtain the initial breakdown voltage, initial blocking leakage current, initial gate leakage current, initial saturation voltage drop, initial junction temperature, initial thermal resistance of the device under test, the current number of power cycles and the maximum number of cycles, the current high-temperature gate bias test time and the maximum high-temperature gate bias test time, the current high-temperature reverse bias test time and the maximum high-temperature reverse bias test time.
[0064] Then, the driving pulse signals of the current test branch switch, the current measurement switch, the voltage test branch switch, the series-parallel conversion circuit, and the gate of the device under test that are turned on at the current moment are obtained.
[0065] Furthermore, the driving pulse signals of the current test branch switch, measuring current switch, voltage test branch switch, series-parallel conversion circuit, and gate of the device under test corresponding to the next test branch are determined based on the driving pulse signals of the current test branch switch, measuring current switch, voltage test branch switch, series-parallel conversion circuit, and gate of the device under test at the current moment, thereby obtaining a control timing diagram of the driving pulse signals of the multi-stress comprehensive action of each test branch.
[0066] Furthermore, the shell surface temperature, junction temperature-saturation voltage drop relationship curve, saturation voltage drop, load current, load voltage, and gate leakage current of the device under test on the test branch corresponding to the current test branch switch that is turned on at the current moment in the current power cycle test are obtained, and the number of power cycle tests and high-temperature gate bias test time are updated.
[0067] Furthermore, the control system cuts off the current test branch switch, cuts off the measurement current switch, closes the voltage test branch switch, applies the series-parallel conversion circuit and the corresponding pulse signal of the gate drive of the device under test according to the control timing diagram, obtains the breakdown voltage and blocking leakage current of the device under test on the test branch corresponding to the voltage test branch switch that is currently turned on in the current high-temperature reverse bias test, and updates the high-temperature reverse bias test time;
[0068] Determine whether the number of power cycles is less than the maximum number of cycles, determine whether the high-temperature gate bias test time is less than the maximum high-temperature gate bias test time, and determine whether the high-temperature reverse bias test time is less than the maximum high-temperature reverse bias test time. If any one of them is greater, end the power cycle test, end the high-temperature gate bias test, and end the high-temperature reverse bias test;
[0069] If it is less than, the cyclic junction temperature of the device under test is determined according to the junction temperature-saturation voltage drop relationship curve and the saturation voltage drop, and the power loss is determined according to the load current and load voltage, the cyclic breakdown voltage of the device under test is determined according to the breakdown voltage, the cyclic blocking leakage current of the device under test is determined according to the blocking leakage current, and the cyclic gate leakage current of the device under test is determined according to the gate leakage current;
[0070] Determine the cyclic thermal resistance value of the device under test based on the cyclic junction temperature, power loss and case surface temperature.
[0071] Determine whether to end the power cycling test based on the cyclic thermal resistance value, cyclic junction temperature, load voltage, initial saturation voltage drop, initial junction temperature and initial thermal resistance value; determine whether to end the high-temperature reverse bias test based on the cyclic breakdown voltage, cyclic blocking leakage current, initial breakdown voltage and initial blocking leakage current; determine whether to end the high-temperature gate bias test based on the cyclic gate leakage current and initial gate leakage current; if any one of the power cycling test, high-temperature reverse bias test and high-temperature gate bias test is stopped, the entire test will be stopped.
[0072] Furthermore, the control system can integrate a control program and a data acquisition and processing program, implemented using LabVIEW programming. The control program can be used to implement different control sequences to achieve different test functions. The data processing program can be used to implement real-time online monitoring of the electrical and thermal parameters of the device under test, as well as the processing and storage of the corresponding data.
[0073] The present invention also provides a multi-stress testing method for IGBT devices, which is a reliability assessment method for high-voltage, high-power semiconductor devices under the combined effects of power cycling, high-temperature reverse bias, and high-temperature gate bias. The method is used in the multi-stress testing system for IGBT devices of the above embodiment. The method includes:
[0074] Step 101: Obtain the initial breakdown voltage, initial blocking leakage current, initial gate leakage current, initial saturation voltage drop, initial junction temperature and initial thermal resistance of all tested IGBT devices, the current number of power cycles and the maximum number of cycles, the current high-temperature gate bias test time and the maximum high-temperature gate bias test time, the current high-temperature reverse bias test time and the maximum high-temperature reverse bias test time.
[0075] Step 102: Obtain a drive pulse signal under the j-th test branch; the drive pulse signal includes a drive pulse signal of the current test branch switch, a drive pulse signal of the measurement current switch, a drive pulse signal of the voltage test branch switch, a drive pulse signal of the series-parallel conversion circuit, and a drive pulse signal of the gate of the IGBT device under test.
[0076] Step 103: Determine the driving pulse signal under the j+1th test branch based on the driving pulse signal under the jth test branch, thereby obtaining a control timing diagram of the driving pulse signal under the multi-stress comprehensive action of each test branch, such as Figure 4 As shown. Specifically:
[0077] The turn-on moment of the j+1th test branch arrives Δt1 earlier than the turn-off moment of the jth test branch to ensure a smooth transition of the load current between different test branches; the measurement current switch of the jth test branch is turned off Δt2 later than the current test branch switch of the jth test branch to accurately measure the junction temperature of each device under test (IGBT device under test); the gate voltage of each device under test on the jth test branch is reset to zero Δt3 later than the measurement current switch of the jth test branch to complete the high-temperature gate bias test; the rising edge of the series-parallel conversion signal on the jth test branch is delayed by Δt4 compared with the gate voltage zeroing signal of the jth test branch to complete the circuit topology conversion; the rising edge of the blocking voltage on the jth test branch is delayed by Δt5 compared with the rising edge of the series-parallel conversion signal to perform high-temperature reverse bias assessment.
[0078] Step 104: Perform a high-temperature gate bias test and a power cycle test based on each test signal. At the current power cycle count, the test is performed sequentially according to the control timing diagram. The voltage test branch switch of the jth test branch is controlled to be disconnected, the series-parallel conversion circuit of the jth test branch is in series connection, a gate voltage is applied to all IGBT devices under test on the jth test branch, the current measurement switch of the jth test branch is closed, and the current test branch switch of the jth test branch is closed. While the IGBT devices under test are conducting a high current, a high-temperature gate bias test is performed on all IGBT devices under test on the jth test branch. During this period, the remaining test branches do not pass a high current or a measurement current. The gate bias is zero, the series-parallel conversion circuit is in parallel connection, and a DC voltage is applied to both ends of the blocked device under test. High-temperature reverse bias testing is performed using the temperature drop time according to the respective timings.
[0079] Step 105: Obtain high-temperature gate bias test data of the jth test branch in the high-temperature gate bias test under the current number of power cycles; the high-temperature gate bias test data includes the shell surface temperature, junction temperature-saturation voltage drop relationship curve, saturation voltage drop, load current, load voltage, gate leakage current and high-temperature gate bias test time.
[0080] Step 106: Under the current power cycle number, when the duration of the high temperature gate bias test reaches the first set time t on After that, the current test branch switch of the j-th test branch is controlled to be disconnected, the measuring current switch of the j-th test branch is disconnected, the gate voltages of all the IGBT devices under test on the j-th test branch are set to zero, the state of the series-parallel conversion circuit of the j-th test branch is parallel, and the voltage test branch switch of the j-th test branch is closed, and all the IGBT devices under test on the j-th test branch are controlled to be cooled by water for a second set time t off =2×t on , to achieve high-temperature reverse bias testing of all IGBT devices under test on the j-th test branch. During the high-temperature gate bias test of the j-th test branch, the remaining test branches are also in the high-temperature reverse bias state. When the current test branch switch of the j-th test branch is disconnected, the current test branch switch of the j+1-th test branch is closed and combined to perform the high-temperature gate bias test, while the remaining test branches remain in the high-temperature reverse bias state.
[0081] In this process, the cooling time of the device under test in each test branch is twice the heating time, which can effectively ensure the cooling time of the device under test. This temperature is used to perform high-temperature reverse bias testing on all devices under test on the current test branch (jth test branch). The entire cycle t on +t offDuring the test, the high current is turned on and off to perform a power cycle test on the current test branch. During the entire cycle, the device conducts and turns off the high current, and the temperature cycles. The entire process constitutes a power cycle test. The temperature is not constant during the high temperature gate bias test and high temperature reverse bias test, but the impact on device aging is only reflected in the accelerated effect of temperature, and does not change the aging mechanism. Therefore, it can still be regarded as an effective high temperature gate bias test and high temperature reverse bias test. In addition, the temperature-sensitive electrical parameters (junction temperature T j and saturation voltage drop V CE A linearly related physical phenomenon at low current) that is, V CE The (T) method can effectively measure the junction temperature during the multi-stress comprehensive test, providing a basis for calculating the accelerated aging factor of the device during high-temperature gate bias test, high-temperature reverse bias test, and power cycle test life.
[0082] Step 106: obtaining high temperature reverse bias test data of the jth test branch in the high temperature reverse bias test under the current power cycle number; the high temperature reverse bias test data includes breakdown voltage, blocking leakage current and high temperature reverse bias test time.
[0083] Step 107: Determine whether the current number of power cycles is less than the maximum number of cycles, obtaining a first judgment result; determine whether the high-temperature gate bias test time under the current number of power cycles is less than the maximum high-temperature gate bias test time, obtaining a second judgment result; determine whether the high-temperature reverse bias test time under the current number of power cycles is less than the maximum high-temperature reverse bias test time, obtaining a third judgment result. If the first judgment result is no, the second judgment result is no, or the third judgment result is no, the test ends. If the first judgment result, the second judgment result, and the third judgment result are all yes, then execute steps 108 and 109.
[0084] Step 108: Determine cyclic test data based on the high-temperature gate bias test data and the high-temperature reverse bias test data; the cyclic test data includes cyclic junction temperature, power loss, cyclic breakdown voltage, cyclic blocking leakage current, cyclic gate leakage current and cyclic thermal resistance. Specifically:
[0085] determining a cyclic junction temperature of each of the IGBT devices under test according to the junction temperature-saturation voltage drop relationship curve and the saturation voltage drop, determining a power loss of each of the IGBT devices under test according to the load current and the load voltage, determining a cyclic breakdown voltage of each of the IGBT devices under test according to the breakdown voltage, determining a cyclic blocking leakage current of each of the IGBT devices under test according to the blocking leakage current, and determining a cyclic gate leakage current of each of the IGBT devices under test according to the gate leakage current;
[0086] The cyclic thermal resistance value of the IGBT device under test is determined based on the cyclic junction temperature, the power loss and the housing surface temperature. The calculation formula of the cyclic thermal resistance value is:
[0087] R=(T j -T c ) / P;
[0088] Where R represents the cycle thermal resistance, T j Indicates the cycle junction temperature, T c represents the shell surface temperature, and P represents the power loss.
[0089] Step 109: Determine whether to terminate the test based on the cycle test data and initial parameter data, obtaining a fourth determination result. The initial parameter data includes initial breakdown voltage, initial blocking leakage current, initial gate leakage current, initial saturation voltage drop, initial junction temperature, and initial thermal resistance. If the fourth determination result is yes, the test is terminated. If the fourth determination result is no, the current number of power cycles is updated, and the process returns to step 104.
[0090] The step of determining whether to terminate the test based on the cyclic test data and the initial parameter data to obtain a fourth determination result specifically includes:
[0091] Determine whether to end the power cycle test based on the cycle thermal resistance value, the cycle junction temperature, the load voltage, the initial saturation voltage drop, the initial junction temperature and the initial thermal resistance value, and obtain a fifth judgment result; determine whether to end the high-temperature reverse bias test based on the cycle breakdown voltage, the cycle blocking leakage current, the initial breakdown voltage and the initial blocking leakage current, and obtain a sixth judgment result; determine whether to end the high-temperature gate bias test based on the cycle gate leakage current and the initial gate leakage current, and obtain a seventh judgment result.
[0092] When the fifth judgment result, the sixth judgment result, and the seventh judgment result are all negative, it is determined that the fourth judgment result is negative; otherwise, the fourth judgment result is positive.
[0093] To address the problems of current power cycle test platforms for high-voltage and high-power semiconductor devices, such as deviation from actual operating conditions and low test efficiency, the multi-stress test method for IGBT devices of this embodiment can not only simultaneously assess the chip terminal withstand voltage and gate reliability, but also the device package reliability, truly reflecting the comprehensive cross-coupling effects of multiple stresses during the actual operation of the device. Its advantages mainly include the following aspects:
[0094] 1) It can simultaneously conduct chip terminal withstand voltage assessment, gate reliability assessment, and package reliability assessment of high-voltage and high-power semiconductor devices, and more comprehensively reflect the actual working conditions of the devices.
[0095] 2) Multiple reliability experiments are evaluated simultaneously, which reduces the total test volume of device samples, reduces the device R&D cost, and shortens the device R&D cycle.
[0096] 3) During the test, the power cycle test, high temperature gate bias test and high temperature reverse bias test of each device are complementary in timing, which improves the test efficiency.
[0097] 4) The technical problem of accurately measuring the junction temperature during high-temperature gate bias and high-temperature reverse bias tests is effectively solved. Based on the multi-stress test method for IGBT devices in this embodiment, the junction temperature can be directly measured using V CE (T)Method implementation.
[0098] The multi-stress test system and method for IGBT devices are mainly aimed at high-voltage and high-power IGBT devices, but the test system or method is also applicable to power cycle testing of other types of power semiconductor devices.
[0099] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method description.
[0100] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only intended to help understand the method and core concept of the present invention. At the same time, those skilled in the art will find that the specific implementation methods and application scopes may vary based on the concept of the present invention. In summary, the contents of this specification should not be construed as limiting the present invention.
Claims
1. A multi-stress test system for an IGBT device, characterized in that: include: A DC current source, a current test branch switch, a DC voltage source, a voltage test branch switch, and a plurality of parallel test branches; The test branch includes a measuring current branch and a device under test branch; the measuring current branch includes a measuring current source and a measuring current switch connected in series; the device under test branch includes a plurality of IGBT devices under test, and two adjacent IGBT devices under test are connected via a series-parallel conversion circuit; each of the test branches is connected to the DC current source via one of the current test branch switches; each of the test branches is connected to the DC voltage source via one of the voltage test branch switches; The branch of the device under test i The collector and emitter of each tested IGBT device are connected to one end of the series-parallel conversion circuit; the other end of the series-parallel conversion circuit is connected to the i +1 collector and emitter connection of the IGBT device under test; The multi-stress test system for the IGBT device further comprises a gate voltage source; the gate voltage source is connected to the gate of the IGBT device under test.
2. The multi-stress test system for an IGBT device according to claim 1, characterized in that: It also includes a water cooler; the water cooler is used to cool the IGBT device under test.
3. The multi-stress test system for an IGBT device according to claim 1, characterized in that: It also includes a current limiting resistor; the current limiting resistor is arranged between the DC voltage source and the voltage test branch switch.
4. The multi-stress test system for an IGBT device according to claim 1, characterized in that: There are three test branches, and each of the device under test branches includes four IGBT devices under test.
5. A multi-stress test method for an IGBT device, characterized in that: The method is used in a multi-stress test system for an IGBT device as claimed in any one of claims 1 to 4; the method comprises: Get the j The driving pulse signal comprises a driving pulse signal of a current test branch switch, a driving pulse signal of a measuring current switch, a driving pulse signal of a voltage test branch switch, a driving pulse signal of a series-parallel conversion circuit and a driving pulse signal of a gate of an IGBT device under test; By the said j The driving pulse signal under the test branch determines the j +1 driving pulse signal under the test branch, so as to obtain the control timing diagram of the driving pulse signals under all the test branches; According to the control timing diagram, under the current power cycle number, control the j The voltage test branch switch of the first test branch is disconnected, j The state of the series-parallel conversion circuit of the first test branch is series connection, j All IGBT devices under test on the first test branch are gate-voltage-applied, j The measuring current switch of the first test branch is closed and the j The current test branch switch of the first test branch is closed to achieve the j High temperature gate bias test of all IGBT devices under test on each test branch; Get the current power cycle number. j high-temperature gate bias test data of a test branch in a high-temperature gate bias test; the high-temperature gate bias test data includes shell surface temperature, junction temperature-saturation voltage drop relationship curve, saturation voltage drop, load current, load voltage, gate leakage current and high-temperature gate bias test time; Under the current power cycle number, when the duration of the high temperature gate bias test reaches the first set time, the control j The current test branch switch of the first test branch is disconnected, j The measuring current switch of the first test branch is opened, j The gate voltage of all IGBT devices under test on the first test branch is set to zero. j The state of the series-parallel conversion circuit of the first test branch is parallel and the state of the second test branch is parallel. j The voltage test branch switch of the first test branch is closed and controls the j All the IGBT devices under test on the first test branch cool down for the second set time to achieve the first j High temperature reverse bias test of all IGBT devices under test in each test branch; Get the current power cycle number. j High temperature reverse bias test data of a test branch in a high temperature reverse bias test; the high temperature reverse bias test data includes breakdown voltage, blocking leakage current and high temperature reverse bias test time; Determine whether the current power cycle number is less than the maximum cycle number to obtain a first judgment result; determine whether the high-temperature gate bias test time under the current power cycle number is less than the maximum high-temperature gate bias test time to obtain a second judgment result; determine whether the high-temperature reverse bias test time under the current power cycle number is less than the maximum high-temperature reverse bias test time to obtain a third judgment result; If the first judgment result is no, the second judgment result is no, or the third judgment result is no, then the test is terminated; If the first judgment result, the second judgment result and the third judgment result are all yes, determining the cycle test data according to the high temperature gate bias test data and the high temperature reverse bias test data; the cycle test data includes cycle junction temperature, power loss, cycle breakdown voltage, cycle blocking leakage current, cycle gate leakage current and cycle thermal resistance value; Determine whether to end the test according to the cycle test data and the initial parameter data to obtain a fourth judgment result; the initial parameter data includes an initial breakdown voltage, an initial blocking leakage current, an initial gate leakage current, an initial saturation voltage drop, an initial junction temperature, and an initial thermal resistance; If the fourth judgment result is yes, then end the test; If the fourth judgment result is no, then after updating the current power cycle number, return to "according to the control timing diagram, under the current power cycle number, control the first j The voltage test branch switch of the first test branch is disconnected, j The state of the series-parallel conversion circuit of the first test branch is series connection, j All IGBT devices under test on the first test branch are gate-voltage-applied, j The measuring current switch of the first test branch is closed and the j The current test branch switch of the first test branch is closed to achieve the j The procedure of "high temperature gate bias test for all IGBT devices under test on a test branch" is as follows:
6. The multi-stress test method for an IGBT device according to claim 5, characterized in that: The determining of the cycle test data according to the high temperature gate bias test data and the high temperature reverse bias test data specifically includes: Determine the cyclic junction temperature of each of the IGBT devices under test according to the junction temperature-saturation voltage drop relationship curve and the saturation voltage drop, determine the power loss of each of the IGBT devices under test according to the load current and the load voltage, determine the cyclic breakdown voltage of each of the IGBT devices under test according to the breakdown voltage, determine the cyclic blocking leakage current of each of the IGBT devices under test according to the blocking leakage current, and determine the cyclic gate leakage current of each of the IGBT devices under test according to the gate leakage current; The cyclic thermal resistance value of the IGBT device under test is determined according to the cyclic junction temperature, the power loss and the shell surface temperature.
7. The multi-stress test method for an IGBT device according to claim 5, characterized in that: The step of determining whether to end the test based on the cycle test data and the initial parameter data to obtain a fourth determination result specifically includes: Determine whether to terminate the power cycle test according to the cycle thermal resistance value, the cycle junction temperature, the load voltage, the initial saturation voltage drop, the initial junction temperature and the initial thermal resistance value, and obtain a fifth judgment result; determine whether to terminate the high-temperature reverse bias test according to the cycle breakdown voltage, the cycle blocking leakage current, the initial breakdown voltage and the initial blocking leakage current, and obtain a sixth judgment result; determine whether to terminate the high-temperature gate bias test according to the cycle gate leakage current and the initial gate leakage current, and obtain a seventh judgment result; When the fifth judgment result, the sixth judgment result and the seventh judgment result are all negative, it is determined that the fourth judgment result is negative; otherwise, the fourth judgment result is positive.
8. The multi-stress test method for an IGBT device according to claim 6, characterized in that: The step of determining the cyclic thermal resistance value of the IGBT device under test according to the cyclic junction temperature, the power loss and the shell surface temperature is specifically as follows: ; in, Indicates the cycle thermal resistance value, represents the cycle junction temperature, Indicates the shell surface temperature, P Indicates power loss.
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