Method for communication between circuits

By limiting the number of conductors in the communication link and adopting multi-channel transmission method, the problem of excessive communication power consumption between the two circuits is solved, and more efficient power management is achieved.

CN112613329BActive Publication Date: 2025-03-04STMICROELECTRONICS (ROUSSET) SAS
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Patent Information

Application Number
CN202011060247.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-10-04
Filing Date
2020-09-30
Publication Date
2025-03-04
Estimated Expiration
2040-09-30

AI Technical Summary

Technical Problem

In the prior art, methods for communication between two circuits have problems with excessive power consumption, especially in case of limited power supply.

Method used

Power consumption of the communication link is optimized by limiting the number of conductors used for communication between two circuits and using multi-channel transmission methods of synchronization signals, data signals and control signals.

Benefits of technology

It effectively reduces the power consumption of communication between the two circuits and improves the operating efficiency of the equipment under limited power supply.

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Abstract

Embodiments of the present disclosure relate to a method for communication between circuits. A first element and a second element of the same device communicate with each other. The first element sends a first piece of information to the second element, the first piece of information representing energy supplied to an electromagnetic field that powers the device. The second element adapts an operating frequency of the second element based on the first piece of information.
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Description

[0001] Priority claim

[0002] This application claims the priority of French Patent Application No. 1911040 filed on October 4, 2019, the contents of which are incorporated herein by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure relates generally to electronic circuits and, more particularly, to systems in which two circuits can communicate with each other. Background Art

[0004] Many applications are known in which an electronic device has no internal power source, so that circuits embedded in the device can only be activated if another device supplies sufficient energy to these circuits from the outside. In particular, this is the case with certain contactless cards, which usually draw the electrical energy required to power their circuits from the electromagnetic field emitted by a reader located within range. These circuits have (if applicable) a limited electrical power that should be used and can guarantee optimal operation of the device to which they belong.

[0005] The two circuits of such a device can sometimes (provided they are properly powered and activated) communicate with each other. However, efforts are made to ensure that the communication link has as few conductors as possible in order to occupy the limited space in or on the device.

[0006] There is a need to optimize the power consumed by two circuits that are able to communicate with each other. Summary of the invention

[0007] According to one aspect, there is provided a method of limiting the number of conductors of a link used for communication between two circuits.

[0008] According to another aspect, transmitting information related to an external constraint to a circuit is provided.

[0009] Embodiments address all or some of the disadvantages of known communication methods.

[0010] An embodiment provides a method for communication between a first element and a second element, wherein a first channel transmits a synchronization signal; a second channel and a third channel transmit two data signals; and a fourth channel and a fifth channel transmit two signals, which are respectively configured to control the output of a standby mode of the first element and the second element, and the first channel to the fifth channel are transmitted via three conductors or four conductors.

[0011] According to an embodiment, the signals transmitted by the fourth channel and the fifth channel are further configured to control the first element and the second element to be placed in the standby mode, respectively.

[0012] According to an embodiment, the conductors couple (preferably connect) the input-output terminals of the first element to the input-output terminals of the second element, respectively.

[0013] According to an embodiment, the first element supplies power to the second element.

[0014] According to an embodiment, two additional conductors couple (preferably connect) the first element to the second element and are brought to the supply potential and the reference potential, respectively, through the first element.

[0015] According to an embodiment, the first element is placed in standby mode after control has been transferred to the second element.

[0016] According to an embodiment, after the response has been transmitted to the first element, the second element is placed in standby mode.

[0017] According to an embodiment, the first element and the second element belong to the same device.

[0018] According to an embodiment, the first element controls the second element to be placed in a standby mode in order to communicate with the outside of the device.

[0019] According to an embodiment, the device communicates with the outside world via radio frequency signals.

[0020] According to an embodiment, the first component is a safety electronic circuit.

[0021] According to an embodiment, the second component is a microcontroller.

[0022] According to an embodiment, the second element is coupled (preferably connected) to the fingerprint sensor.

[0023] According to an embodiment, the fingerprint sensor is part of the device.

[0024] According to an embodiment, the first element provides power to the fingerprint sensor.

[0025] An embodiment provides a method for communication between a first element and at least one second element of the same device, wherein the first element sends a first piece of information to the second element, the first piece of information representing energy supplied by an electromagnetic field to power the device; and the second element adapts an operating frequency of the second element based on the first piece of information.

[0026] According to an embodiment, the first piece of information is the strength of the supply current of the device from the electromagnetic field.

[0027] According to an embodiment, the first piece of information is evaluated by the first element.

[0028] According to an embodiment: the first component sends a second piece of information to the second component, the second piece of information representing a remaining time budget of the device; and the second component performs several operations according to the second piece of information.

[0029] According to an embodiment, the second piece of information is evaluated by the first element.

[0030] According to an embodiment: the first component sends a third piece of information to the second component, the third piece of information representing a voltage budget of the device; and the second component adapts an internal configuration according to the third piece of information.

[0031] According to an embodiment, the third piece of information is evaluated by the first element.

[0032] According to an embodiment, the first element supplies power to the second element.

[0033] According to an embodiment, the first component is a safety electronic circuit.

[0034] According to an embodiment, the second component is a microcontroller.

[0035] According to an embodiment, the second element is coupled (preferably connected) to the fingerprint sensor.

[0036] According to an embodiment, the fingerprint sensor is part of the device.

[0037] According to an embodiment, the first element provides power to the fingerprint sensor.

[0038] According to an embodiment, the device communicates with the outside world through radio frequency signals without contact, or communicates with the outside world with contact.

[0039] An embodiment provides a device configured to perform the described method.

[0040] An embodiment provides a payment card configured to perform the described method. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The above features and advantages as well as other features are described in detail in the following description of specific embodiments given by way of example and not limitation with reference to the accompanying drawings, in which

[0042] Figure 1 An embodiment of a near field communication system is schematically illustrated in block diagram form;

[0043] Figure 2 An embodiment of the circuitry of devices of a system communicating with each other via wired links is schematically shown in block diagram form;

[0044] Figure 3 is a sequence diagram of various stages of an embodiment of a communication method;

[0045] Figure 4A and Figure 4B A timing diagram showing various stages of an embodiment of a communication method;

[0046] Figure 5A and Figure 5B A timing diagram showing other stages of an embodiment of a communication method;

[0047] Figure 6 is a timing diagram of another stage of an embodiment of a communication method;

[0048] Figure 7 is a timing diagram of yet another stage of an embodiment of a communication method; and

[0049] Fig. 8A and Figure 8B A flow chart showing further steps of an embodiment of a communication method. DETAILED DESCRIPTION

[0050] In the various drawings, similar features have been designated by similar reference numerals. Specifically, structural features and / or functional features common between various embodiments may have the same reference numerals and may be provided with the same structural characteristics, dimensional characteristics, and material characteristics.

[0051] For the sake of clarity, only the operations and elements used to understand the embodiments described herein are described in detail and described. Specifically, the generation of exchange signals and data and their interpretation have not been described in detail, and the described embodiments and implementations are compatible with standard techniques for generating and interpreting these signals and data.

[0052] Unless otherwise specified, when referring to two elements being connected together, this means a direct connection without any intermediate elements except conductors; and when referring to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0053] In the following disclosure, unless otherwise stated, when referring to absolute position qualifiers such as terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers such as terms "above", "below", "upper", "lower", etc., or orientation qualifiers such as "horizontal", "vertical", etc., reference is made to the orientation shown in the figure.

[0054] Unless otherwise indicated, the expressions "around", "approximately", "substantially" and "about" mean within 10%, preferably, within 5%.

[0055] In the following disclosure, a "binary signal" refers to a signal that alternates between a first constant state (e.g., a low state represented by "0") and a second constant state level (e.g., a high state represented by "1"). The 0 state and the 1 state of different binary signals of the same electronic circuit may be different high and low levels. In practice, a binary signal may correspond to a voltage or current that may not be perfectly constant in the high or low state.

[0056] Figure 1 An embodiment of a near field communication (NFC) system is schematically illustrated in block diagram form.

[0057] exist Figure 1 In the embodiment, a first near field communication device 1 ("reader") communicates with a second near field communication device 2 ("card"). According to this embodiment, the first near field communication device 1 is, for example, a contactless payment reader or a terminal 1 or a mobile phone having such a function. The second near field communication device 2 is, for example, a contactless payment bank card 2.

[0058] The terminal 1 comprises an antenna 10 ("antenna"). In particular, the antenna 10 is configured to emit an electromagnetic field (EMF) generated by one or several electronic circuits of the terminal 1, which are Figure 1 1 is represented by a single functional block 12 (FCT). In the case where a bank card 2 is within range of a terminal 1, the electromagnetic field emitted by the terminal 1 can be detected by an antenna 20 ("antenna") of the card 2. The terminal 1 is then said to operate in "reader" mode, while the card 2 operates in "card" mode.

[0059] In addition to the antenna 20, the card 2 also includes a first element 21 (SE) or circuit 21, and a second element 22 (BioMCU) or circuit 22. Preferably, the first element 21 is a secure electronic component. According to this embodiment (wherein the card 2 is a contactless payment bank card), the first element 21 can be a microcontroller 21, which is configured to perform security tasks, such as operations associated with bank transactions between the card 2 and the terminal 1. The second element 22 is suitable for processing biometric data acquired by one or several sensors 23 ("sensors"). Preferably, the second element 22 is a microcontroller unit (MCU). The second element 22 can be a general microcontroller unit or a biometric identification microcontroller unit, in other words, an electronic component dedicated to processing biometric identification data.

[0060] According to a preferred embodiment, the main difference between the microcontroller unit 22 and the microcontroller unit 21 is that the microcontroller unit 22: executes more than one million instructions per second (MIPS), in particular, instructions related to image processing operations, for an electrical power consumption substantially equal to that of the microcontroller 21; is capable of managing one or several modes in which the electrical power consumption of the microcontroller unit 22 is greatly reduced, preferably by several orders of magnitude relative to the nominal operating mode (for example, a low-power mode of approximately 50 μA and a nominal mode of 10 mA); embeds a larger amount of RAM than the RAM of the microcontroller unit 21 (for example, 100 kB for the microcontroller unit 22 and 16 kB for the microcontroller unit 21) in order to execute biometric recognition algorithms; and integrates several interfaces, in particular, these interfaces allow the microcontroller unit 22 to communicate with the first microcontroller unit 21 and the sensor 23.

[0061] Figure 1 A single sensor 23 ("Sensor") is shown associated with the second element 22. This sensor 23 is, for example, a fingerprint sensor accessible from the front of the bank card 2. The second element 22 is then, for example, a microcontroller that controls the acquisition of images corresponding to the fingerprint of the user of the card 2 by the sensor 23 and that executes one or more applications to analyze these images. The second element 22 and the fingerprint sensor 23 together form a biometric recognition framework ("Biometric Recognition Framework").

[0062] According to this embodiment, the first element 21 specifically includes: a first transceiver, for example, a first transceiver of a universal asynchronous type, for radio frequency signals 210 (radio frequency universal asynchronous receiver transmitter - RFUART); an energy harvesting module 211 ("energy harvesting"); input and output terminals or studs (general purpose input output (GPIO)) represented by a single block 212; a second transceiver, for example, a second transceiver 213 of a universal asynchronous type (universal asynchronous receiver transmitter - UART); and a memory module 214 (RAM), for example, a volatile memory.

[0063] exist Figure 1 In the embodiment, the first transceiver 210 is coupled (preferably connected) to the antenna 20 of the card 2. The transceiver notably allows the card 2 to receive radio frequency signals emitted by the terminal 1 when the card 2 is within the range of the terminal 1. Thus, the card 2 communicates with the outside through radio frequency signals.

[0064] Specifically, the energy collection module 211 is configured to draw power from the electromagnetic field emitted by the terminal 1. Specifically, the module 211 is used to supply power to the first element 21. The first element 21 supplies power to the second element 22 of the card 2 and the biometric identification sensor 23.

[0065] The input-output terminals 212 of the first element 21 are coupled (preferably connected) to the second element 22. These terminals 212 can be configured to serve as input, in other words, to receive signals; or to serve as output, in other words, to transmit signals. The terminals 212 allow the second element 22 to receive signals by means of the input-output terminals 212. Figure 1 The link 24 indicated by a double arrow in the figure enables bidirectional data exchange between the first element 21 and the second element 22 .

[0066] Still in Figure 1 , the second transceiver 213 of the first element 21 is coupled (preferably connected) to a module 25 ("micromodule") of the card 2. This module 25 allows the card 2 to communicate with the terminal 1 when the card 2 is physically coupled or connected to the terminal 1. This situation corresponds to the situation in which the card 2 is inserted into the terminal 1 in order to make a payment by contact. In this situation, the data exchange and the power supply of the card 2 are carried out through conductive tracks located on the front of the card 2.

[0067] Card 2 may also include one or more other electronic components or circuits. These electronic components or circuits are Figure 1 The electronic components or circuits are represented by a single functional block 26 (FCT), and the operation of these electronic components or circuits will not be described in detail in the following description.

[0068] It should be pointed out that Figure 1 The schematic diagram is not intended to faithfully reproduce the actual physical arrangement of the devices 1 and 2. In particular, the various elements constituting the terminal 1 and the card 2 are not shown to scale and, in practice, the arrangement of these elements may vary. Figure 1 The arrangement shown is different.

[0069] Figure 2 An embodiment of circuits 21 and 22 of a device 2 of the system is schematically shown in block diagram form. These circuits 21 and 22 communicate with each other via a wired connection 24.

[0070] According to this embodiment, the first circuit 21 includes, for example, four general-purpose input-output terminals 212 (GPIO): a first terminal 212A, coupled to (preferably connected to) a first conductor or wire 24A, which is configured to transmit a first channel, which transmits a synchronization signal or clock signal (CLK); a second terminal 212B, coupled to (preferably connected to) a second conductor or wire 24B, which is configured to transmit a third channel and a fourth channel, which transmit two data signals (DATA) respectively; a third terminal 212C, coupled to (preferably connected to) a third conductor or wire 24C, which is configured to transmit a fourth channel, which transmits a third signal (SE_BUSY); and a fourth terminal 212D, coupled to (preferably connected to) a fourth conductor or wire 24D, which is configured to transmit a fifth channel, which transmits a fourth signal (BioMCU_BUSY).

[0071] Likewise, the second circuit 22 includes four general-purpose input-output terminals 222 (GPIO): a first terminal 222A coupled to (preferably connected to) the first conductor 24A; a second terminal 222B coupled to (preferably connected to) the second conductor 24B; a third terminal 222C coupled to (preferably connected to) the third conductor 24C; and a fourth terminal 222D coupled to (preferably connected to) the fourth conductor 24D.

[0072] According to this embodiment, the first circuit 21 also includes: a fifth terminal 215A, coupled to (preferably connected to) a fifth conductor or wire 27A, which is brought to a potential (VCC) so that the second circuit 22 can be powered from the first circuit 21; and a sixth terminal 215B, coupled to (preferably connected to) a sixth conductor or wire 27B, which is brought to a reference potential, for example, ground (GND).

[0073] Likewise, the second circuit 22 further includes a fifth terminal 225A coupled to (preferably connected to) the fifth conductor 27A, and a sixth terminal 225B coupled to (preferably connected to) the sixth conductor 27B.

[0074] According to an embodiment, the fingerprint sensor 23 ( Figure 1 ) includes two terminals, which are similar to the terminals 225A and 225B of the second circuit 22. Then, these two terminals of the sensor 23 are respectively coupled to (preferably connected to) the conductors 27A and 27B. Then, the fingerprint sensor 23 is powered by the first circuit 21.

[0075] Generally speaking, a master device ("master") coupled to a slave device ("slave") via a synchronous serial data bus (Serial Peripheral Interface - SPI) communicates according to a master-slave scheme, where the master device controls the communication. In practice, such as serial data, the bus usually includes four conductors, each of which transmits signals in a unidirectional manner. In other words, each signal is either transmitted from the master device to the slave device or from the slave device to the master device.

[0076] Traditionally, a synchronous serial data bus between a master device and a slave device more specifically includes: a first conductor, which transmits a clock signal generated by the master device; a second conductor, which transmits a first data signal generated by the master device for the slave device (master device output, slave device input-MOSI); a third conductor, which transmits a second data signal generated by the slave device for the master device (master device input, slave device output-MISO); and a fourth conductor, which transmits a selection signal of the slave device generated by the master device.

[0077] Contrary to the traditional situation described above, Figure 2 The first circuit 21 and the second circuit 22 of the embodiment of the present invention communicate with each other here via a data bus SPI consisting of only two conductors (conductors 24A and 24B of link 24) according to this embodiment. The first circuit 21 constitutes a master circuit, and the second circuit 22 constitutes a slave circuit. The data exchange between the first circuit 21 and the second circuit 22 is carried out at the initiation of the first circuit 21.

[0078] Here, use is made of the fact that circuits 21 and 22 are the only two circuits that wish to communicate with each other. Therefore, the usual selection signal is not required.

[0079] Here, the first conductor 24A transmits a synchronization signal CLK configured to synchronize data exchange between the master circuit 21 and the slave circuit 22. The second conductor 24B transmits a data signal DATA representing data exchanged between the master circuit 21 and the slave circuit 22. More specifically, still according to this embodiment, the second conductor 24B is sometimes configured to transmit a data signal MOSI sent from the master circuit 21 to the slave circuit 22, and sometimes also configured to transmit a data signal MISO sent from the slave circuit 22 to the master circuit 21. Therefore, the data signal DATA corresponds to the signal MOSI or the signal MISO according to the direction of exchanging data.

[0080] This communication between the first circuit 21 and the second circuit 22 is defined as half-duplex bidirectional or "SPI IP" communication. The advantages of this SPI IP mode are as follows: in particular, the number of terminals or pins or pads involved in the communication between the circuits 21 and 22 is reduced due to the alternating transmission of the MOSI signal and the MISO signal on the same conductor 24B. Figure 2The disclosed embodiments make it possible to limit the number of hardware interfaces, terminals or conductors used for communication between these circuits 21 and 22 .

[0081] According to a preferred embodiment, the third signal SE_BUSY and the fourth signal BioMCU_BUSY are binary signals evolving between a high level and a low level. Specifically, these signals SE_BUSY and BioMCU_BUSY make it possible to synchronize the data exchange between the first circuit 21 and the second circuit 22 .

[0082] The signals SE_BUSY and BioMCU_BUSY are configured to control the first circuit 21 and the second circuit 22 to exit from the standby mode or the low power consumption mode. These signals SE_BUSY and BioMCU_BUSY are also configured to control the first circuit 21 and the second circuit 22 to be in the standby mode. This makes it possible to manage the power consumption of the second device 2 to which the first circuit 21 and the second circuit 22 belong. Therefore, this makes it possible to reduce the electric power consumption of the second device 2 relative to a similar device whose first circuit and the second circuit are not switched to the standby mode.

[0083] The first circuit 21 may be, for example, a microcontroller unit with four input-output terminals that are initially configured to allow conventional communication SPI on four wires. Such a circuit may advantageously be reconfigured to make it compatible with the communication method described in the present disclosure. Thus, for a constant number of wires, functionality close to that of conventional SPI communication between a master device or circuit and a slave device or circuit may be retained, while increasing the possibility of exchanging two signals SE_BUSY and BioMCU_BUSY between these devices or circuits.

[0084] According to a preferred embodiment, the input-output terminal 212 of the first circuit 21 is configured as follows: the first terminal 212A is configured as an output so as to transmit the signal CLK to the second circuit 22; the second terminal 212B is alternately configured as an input to receive the signal MISO transmitted by the second circuit 22, or is configured as an output to transmit the signal MOSI to the second circuit 22; the third terminal 212C is configured as an output to transmit the signal SE_BUSY to the second circuit 22; and the fourth terminal 212D is configured as an input to receive the signal BioMCU_BUSY transmitted by the second circuit 22.

[0085] Still according to this preferred embodiment, the input-output terminal 222 of the second circuit 22 is configured as follows: the first terminal 222A is configured as an input to receive the signal CLK transmitted by the first circuit 21; the second terminal 222B is alternately configured as an input to receive the signal MOSI transmitted by the first circuit 21, or is configured as an output to transmit the signal MISO to the first circuit 21; the third terminal 222C is configured as an input to receive the signal SE_BUSY transmitted by the first circuit 21; and the fourth terminal 222D is configured as an output to transmit the signal BioMCU_BUSY to the first circuit 21.

[0086] In one variation, each of the first circuit 21 and the second circuit 22 includes only three input-output terminals, which are coupled to (preferably, connected to) three conductors: a first conductor, configured to transmit a first channel and a second channel, the first channel and the second channel respectively transmitting a synchronization signal CLK and a signal SE_BUSY, which cannot be transmitted at the same time; a second conductor, configured to transmit a third channel and a fourth channel, the third channel and the fourth channel respectively transmitting signals MOSI and MISO; and a third conductor, configured to transmit a fifth channel, the fifth channel transmitting the signal BioMCU_BUSY.

[0087] According to this variation: the terminal of the first circuit 21 coupled (preferably, connected) to the first conductor is configured as an output to transmit the synchronization signal CLK or the signal SE_BUSY; the terminal of the second circuit 22 coupled (preferably, connected) to the first conductor is configured as an input to receive the synchronization signal CLK or the signal SE_BUSY.

[0088] One advantage of this variant is that it allows the use of only three conductors. In the case where each of the first circuit 21 and the second circuit 22 comprises four terminals, only three of these terminals are used to perform the method described in the present disclosure. Thus, one terminal of each circuit and the fourth conductor are freed to perform other functions.

[0089] Below is about Figure 3 The functions of the signals CLK, DATA, SE_BUSY and BioMCU_BUSY are disclosed in more detail in the embodiment of the communication method described in FIG. 8 .

[0090] Figure 3 2 is a flow chart of various stages of an embodiment of a communication method between the first circuit 21 and the second circuit 22. Specifically, Figure 3 The progression of the various steps or phases of communication between these circuits 21 and 22 is shown as a function of time (t).

[0091] According to this embodiment, the communication between the first circuit 21 or master circuit 21 and the second circuit 22 or slave circuit 22 is still engaged by the master circuit 21. In other words, it is assumed that the elements of the biometric environment of the device 2 (in other words, the slave circuit 22 and the fingerprint sensor 23) do not trigger the communication with the master circuit 21.

[0092] The communication between the master circuit 21 (SE) and the slave circuit 22 (BioMCU) is carried out according to the following stages: a command is sent from the master circuit 21 to the slave circuit 22, which Figure 3 In the command phase, the slave circuit 22 sends a response to the master circuit 21, which is indicated by arrow 31. Figure 3 Indicated by arrow 32 (command phase).

[0093] These command transmission phases 31 and these response transmission phases 32 are suspended for several cycles, during which the master circuit 21 and the slave circuit 22 are switched to low power modes 33 and 34, respectively. Each low power mode 33, 34 here corresponds to a standby mode, that is to say a mode in which the electric power consumption of the circuit 21, 22 is greatly reduced relative to the electric power consumption of the same circuit 21, 22 during normal operation. The reduction in electric power consumption preferably consists of entering a standby mode consuming approximately 500 μA from a nominal mode consuming approximately 10 mA.

[0094] Before the first command 31 is transmitted by the master circuit 21 and after each response is transmitted to the slave circuit 22, the slave circuit 22 is placed in or switched to a low power mode 34. Likewise, the master circuit 21 is placed in or switched to a low power mode when the master circuit 21 is waiting for a response 32 from the slave circuit 22. During the transmission of a command 31 or a response 32, each circuit 21, 22 leaves a low power mode 33, 34.

[0095] like Figure 3 As shown, the sending of each response 32 can be separated from the sending of the associated command 31 by a greater or lesser duration. Specifically, the duration is a function of the number of operations performed by the slave circuit 22 to generate the response to be sent. These operations correspond to microprocessor unit instructions or microprocessor unit instruction groups (e.g., instructions or instruction groups associated with image processing operations) executed by the slave circuit 22. The sending of each command 31 can also be separated from the sending of the previous response by a greater or lesser duration. Specifically, the duration is a function of the number of operations performed by the master circuit 21 to generate the next command to be sent. These operations correspond to microprocessor unit instructions or microprocessor unit instruction groups executed by the master circuit 21.

[0096] The command 31 transmission phase and the response 32 transmission phase are each reflected by the exchange of at least two frames between the circuits 21 and 22. Depending on whether these phases include data to be communicated, these frames are more specifically exchanged as follows: for the command 31 transmission phase without data exchange, the master circuit 21 transmits a command header frame, and then the slave circuit 22 transmits an acknowledgement frame; for the command 31 transmission phase with data exchange, the master circuit 21 transmits a command header frame, and then the slave circuit 22 transmits an acknowledgement frame, next, the master circuit transmits a command data frame, and finally, the slave circuit 22 transmits another acknowledgement frame; for the response 32 transmission frame without data exchange, the slave circuit 22 transmits a response header frame, and then, the master circuit transmits an acknowledgement frame; and for the response 32 transmission phase with data exchange, the slave circuit 22 transmits a response header frame, and then, the master circuit 21 transmits an acknowledgement frame, next, the slave circuit 22 transmits a response data frame, and finally, the master circuit 21 transmits another acknowledgement frame.

[0097] Figure 4A and Figure 4B The timing diagrams show the various stages of an embodiment of the communication method between the circuits 21 and 22. These timing diagrams reflect in particular the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA over time (t).

[0098] Figure 4A The timing diagram of the command transmission without data exchange 31 ( Figure 3 ) corresponds to Figure 4B The timing diagram of the command transmission with data exchange 31 ( Figure 3 ) corresponding to.

[0099] exist Figure 4A In the example, at the initial time t0, all signals in the signals SE_BUSY, BioMCU_BUSY, CLK and DATA are in a low state or low level. Assume that: at the time t0, the master circuit 21 is not in the low power mode; and at the time t0, the slave circuit 22 is in the low power mode.

[0100] At time t1 after time t0, the signal SE_BUSY is switched from a low state to a high state or a high level by the master circuit 21. The transition of the signal SE_BUSY to a high state is intended to indicate to the slave circuit 22 that the master circuit 21 wishes to send a command to the slave circuit 22. The slave circuit 22 then exits the low power mode and begins a wake-up sequence during which the slave circuit 22 performs various operations related to its exit from the standby state. During all of these operations, the signal BioMCU_BUSY remains in a low state.

[0101] At time t2 after time t1, the signal BioMCU_BUSY switches from a low state to a high state by the slave circuit 22. The transition of the signal BioMCU_BUSY to a high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to receive the command header frame. From time t2, both the master circuit 21 and the slave circuit 22 are in a low power mode until the command transmission phase ends.

[0102] At time t3 after time t2, the master circuit 21 starts to send its clock signal, that is, the master circuit 21 periodically switches the clock signal CLK between the low state and the high state. The first switch of the signal CLK from the low state to the high state marks the start of the transmission of the command header frame. At each switch to the high state of the signal CLK, a new bit of the command header frame is sent to the slave circuit 22. The command header frame is sent from the master circuit 21 to the slave circuit 22. Therefore, as described in relation to Figure 2 As described, the transmission of the command header frame corresponds to the transmission of the signal MOSI on the second conductor 24B of the link 24.

[0103] At time t4 after time t3, the master circuit 21 stops sending out the clock signal CLK by returning its clock signal CLK to the low state. This last switching of the signal CLK from the high state to the low state marks the end of the transmission of the command header frame.

[0104] At time t5 after time t4, the signal BioMCU_BUSY switches from the high state to the low state by the slave circuit 22. The transition of the signal BioMCU_BUSY to the low state is intended to indicate to the master circuit 21 that the slave circuit 22 is occupied to perform an operation allowing it to generate an acknowledgement frame.

[0105] At time t6 after time t5, the signal BioMCU_BUSY switches from a low state to a high state by the slave circuit 22. The transition of the signal BioMCU_BUSY to a high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to send an acknowledgement frame in response to the previously received command header frame.

[0106] At time t7 after time t6, the master circuit 21 starts to send out its clock signal. The first switching of the signal CLK from the low state to the high state marks the start of the transmission of the acknowledgment frame (ack). At each switching to the high state of the signal CLK, a new bit of the acknowledgment frame is sent to the master circuit 21. The acknowledgment frame is sent from the slave circuit 22 to the master circuit 21. Therefore, as described in relation to Figure 2 As described, the transmission of the acknowledgment frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0107] At time t8 after time t7, the master circuit 21 stops sending out the clock signal CLK by returning it to the low state. This final switch of the signal CLK from the high state to the low state indicates the end of sending of the acknowledgement frame.

[0108] At time t9 after time t8, signal BioMCU_BUSY switches from high state to low state by slave circuit 22. Signal BioMCU_BUSY switching to low state is intended to indicate to master circuit 21 that slave circuit 22 is occupied to perform operations allowing it to generate a response frame (not shown in FIG. 4 ).

[0109] At time t10 after time t9, in which the duration is set by the master circuit 21, the signal SE_BUSY is switched from the high state to the low state by the master circuit 21. Time t10 marks the end of the command transmission phase 31 ( Figure 3 ). Therefore, preferably, the transition of the signal SE_BUSY to a low state is preferably accompanied by the master circuit 21 switching to a low power state while waiting for the response transmission phase initiated by the slave circuit 22. In other words, after sending a command to the slave circuit 22, the master circuit 21 is placed in a standby mode.

[0110] Figure 4B The timing diagram includes Figure 4A These components are common to the timing diagrams of FIG. 1 and FIG. 2 . These components will not be described in detail below. Figure 4B The timing diagram and Figure 4A The main difference of the timing diagram is that Figure 4B The timing diagram of comprises successive moments t2' to t9' inserted between moment t9 and moment t10. Thus, the duration separating moment t9 from moment t10 allows the exchange of command data between circuits 21 and 22.

[0111] At time t2' after time t9, the signal BioMCU_BUSY switches from the low state to the high state by the slave circuit 22. This transition of the signal BioMCU_BUSY to the high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to receive a command data frame.

[0112] At time t3' after time t2', the master circuit 21 starts to send out its clock signal. The first switching of the signal CLK from the low state to the high state marks the start of the transmission of the command data frame (command data). At each switching to the high state of the signal CLK, a new bit of the command data frame is sent to the slave circuit 22. The command data frame is sent from the master circuit 21 to the slave circuit 22. Therefore, as described in relation to Figure 2 As described, the transmission of the command data frame corresponds to the transmission of the signal MOSI on the second conductor 24B of the link 24.

[0113] At time t4 after time t3, the master circuit 21 stops sending out the clock signal CLK by returning its clock signal CLK to the low state. This last switching of the signal CLK from the high state to the low state marks the end of the transmission of the command data frame.

[0114] Next, the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA at consecutive instants t5', t6', t7', t8' and t9' is similar to that previously described for consecutive instants t5, t6, t7, t8 and t9, respectively. However, the acknowledgment frame (ack) sent between instants t7' and t8' and the acknowledgment frame sent between instants t7 and t8 may have different contents.

[0115] According to a preferred embodiment, each command header frame comprises: a first byte corresponding to an identifier of a command to be executed by the slave circuit 22; a second byte corresponding to an electromagnetic field EMF ( Figure 1 ) supplied energy (power budget) (in other words, the energy that can be allocated to the biometric recognition framework to perform its operations) or available power; the third byte corresponds to device 2 ( Figure 1 ) (in other words, the duration that can be allocated to the biometric recognition framework to perform its operations); a fourth duration, which makes it possible to indicate to the second circuit 22 whether the command sent by the first circuit 21 constitutes a new command or an instruction to continue executing a previous command; two bytes corresponding to the length of the data to be sent; and two other bytes corresponding to the result of a cyclic redundancy check (CRC).

[0116] Preferably, the value of the second byte represents the value from terminal 1 ( Figure 1 ) and the intensity of the supply current of the device 2 according to the electromagnetic field EMF transmitted by the macro unit. Then, the macro unit of the first circuit 21 adapts the operating frequency of the first circuit 21 according to the intensity estimate. The first circuit 21 can send the available energy value to another circuit (for example, the second circuit 22) without such a macro unit, so as to allow the second circuit 22 to adapt its operating frequency according to the energy that can be transferred to the second circuit 22. Therefore, the operating frequency of the second circuit 22 can be adapted according to the energy (here, the electrical intensity) that can be allocated to the second circuit 22.

[0117] According to this embodiment, the antenna 20 ( Figure 1) is estimated by the sensor of the first circuit 21. As an example, for a module with a magnetic component of an EMF field varying between 0.5A / m and 3A / m at a pitch of 0.1A / m, this intensity is between about 2.5mA and about 17.5mA at a pitch of 0.5mA. This intensity range then includes 32 possible values, allowing it to be encoded on 5 bits of the second byte to be sent to the second circuit 22.

[0118] Likewise, the time budget value is estimated by the first circuit 21 and sent to the second circuit 22 .

[0119] In one variation, the fourth byte is associated with device 2 ( Figure 1 ) corresponds to the voltage budget of the power supply (in other words, the voltage that can be allocated to the biometric recognition framework to perform its operations). This voltage value allows the second circuit 22 to adapt the internal configuration. The second circuit 22 can, for example, consume more or less current depending on the voltage value sent to the second circuit 22 by the first circuit 21.

[0120] Figure 5A and Figure 5B The timing diagrams show further stages of an embodiment of the communication method between the circuits 21 and 22. These timing diagrams reflect in particular the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA over time (t).

[0121] Figure 5A The timing diagram of the response transmission without data exchange 32 ( Figure 3 ) corresponds to Figure 5B The timing diagram of the response transmission with data exchange 32 ( Figure 3 ) corresponding to.

[0122] FIG. 5A to FIG. 5B The timing diagram includes FIG. 4A to FIG. 4B These components are common to the timing diagrams of FIG. 1 and FIG. 2 . These components will not be described in detail below. FIG. 5A to FIG. 5B The timing diagram and FIG. 4A to FIG. 4B The main difference between the timing diagrams is that FIG. 5A to FIG. 5B In the timing diagram of FIG. 1 , the slave circuit 22 removes the master circuit 21 from the low power mode. FIG. 5A to FIG. 5B In the case of FIG. 4A to FIG. 4B Further exchanges are performed in the direction opposite to that described.

[0123] exist Figure 5A In the example, at the initial time t0, all signals in the signals SE_BUSY, BioMCU_BUSY, CLK and DATA are in a low state (at a low level). FIG. 4A to FIG. 4BContrary to what has been described, it is assumed that: at this time t0 , the master circuit 21 is in the low power mode; and at the time t0 , the slave circuit is not in the low power mode.

[0124] exist FIG. 5A to FIG. 5B In the embodiment of the present invention, the signal SE_BUSY remains in the low state during the entire response transmission phase.

[0125] At time t1, the signal BioMCU_BUSY is switched from a low state to a high state by the slave circuit 22. The transition of the signal BioMCU_BUSY to a high state is intended to indicate to the master circuit 21 that the slave circuit 22 wishes to send a response to the master circuit 21. The master circuit 21 then exits the low power mode and begins a wake-up sequence during which the master circuit 21 performs various operations related to its exit from the standby state. Neither the master circuit 21 nor the slave circuit 22 is in a low power mode until the response transmission phase is over.

[0126] Between moments t3 and t4, the master circuit 21 issues its clock signal CLK, and at each cycle of this signal CLK, bits of the response header frame are sent to the master circuit 21. The response header frame is sent from the slave circuit 22 to the master circuit 21. Thus, as with respect to Figure 2 As described, the transmission of the response header frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0127] Between moments t7 and t8, the master circuit 21 sends out its clock signal CLK, and at each cycle of this signal CLK, bits of an acknowledgment (ack) frame are sent to the slave circuit 22. The acknowledgment frame is sent from the master circuit 21 to the slave circuit 22. Thus, as with respect to Figure 2 As described, the transmission of the acknowledgment frame corresponds to the transmission of the signal MOSI on the second conductor 24B of the link 24 .

[0128] At time t9, the signal BioMCU_BUSY switches from the high state to the low state through the slave circuit 22. According to this embodiment, the signal SE_BUSY remains in the low state between time t0 and t9. FIG. 4A to FIG. 4B The published timing diagram is different. Figure 5A The timing diagram does not include time t10.

[0129] Figure 5B The timing diagram includes Figure 5A These components are common to the timing diagrams of FIG. 1 and FIG. 2 . These components will not be described in detail below. Figure 5B The timing diagram and Figure 5A The main difference of the timing diagram is that Figure 5BThe timing diagram of includes the consecutive moments t2' to t9' after the moment t9. Therefore, the moment t9 is followed by a duration that allows the exchange of response data between the circuits 21 and 22.

[0130] At time t2', the signal BioMCU_BUSY switches from a low state to a high state by the slave circuit 22. This transition of the signal BioMCU_BUSY to a high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to send a response data frame.

[0131] At time t3', the master circuit 21 starts to send out its clock signal. The first switching of the signal CLK from the low state to the high state marks the start of the transmission of the response data frame (response data). At each switching to the high state of the signal CLK, a new bit of the response data frame is sent to the master circuit 21. The response data frame is sent from the slave circuit 22 to the master circuit 21. Therefore, as described in relation to Figure 2 As described, the transmission of the response data frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0132] At time t4', the master circuit 21 stops sending out the clock signal CLK by returning its clock signal CLK to the low state. This last switching of the signal CLK from the high state to the low state marks the end of the transmission of the response data frame.

[0133] Next, the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA at the consecutive moments t5', t6', t7', t8' and t9' is similar to what was previously described for the consecutive moments t5, t6, t7, t8 and t9, respectively. However, the acknowledgment frame (ack) sent between moments t7' and t8' and the acknowledgment frame sent between moments t7 and t8 may have different contents. FIG. 4A to FIG. 4B Unlike what is described, the confirmation frames sent between the moments t7 ′ and t8 ′ and the confirmation frames sent between the moments t7 and t8 are sent here by the master circuit 21 to the slave circuit 22 .

[0134] At the instant t9', the signal BioMCU_BUSY is switched from the high state to the low state by the slave circuit 22. According to this embodiment, the signal SE_BUSY remains in the low state between the instants t0 and t9'. FIG. 4A to FIG. 4B The published timing diagram is different. Figure 5B The timing diagram does not include time t10.

[0135] According to a preferred embodiment, each response header frame comprises: two first bytes corresponding to the status of the command executed by the slave circuit 22; a second byte making it possible to indicate to the master circuit 21 whether the slave circuit 22 is waiting to receive a new command or a command with the same identifier in which it is intended to continue to execute; a third byte corresponding to the link 24 ( Figure 1 and Figure 2 ) corresponding to a maximum transmission frequency value on the main circuit 21, which is compatible with the energy that can be allocated to the biometric recognition framework by the main circuit 21; two bytes corresponding to the length of the data to be sent; and two other bytes corresponding to the result of a cyclic redundancy check (CRC).

[0136] Specifically, the value of the third byte of the response frame enables the main circuit 21 to adapt the transmission frequency on the link according to the change of energy from the electromagnetic field. Specifically, increasing the energy will lead to increasing the transmission frequency. Conversely, reducing the energy will lead to reducing the transmission frequency.

[0137] According to this embodiment, the sending of the response by the slave circuit 22 is preceded by the sending of the command by the master circuit 21. Therefore, different cases of alternating sequences of these commands and these responses are possible, depending on whether the command and / or the response include data, and the implementation of these different cases is within the capabilities of a person skilled in the art based on the above information.

[0138] According to a preferred embodiment, in the event of a fault affecting the slave circuit 22, an error management operation is provided. During normal operation, each time the signal SE_BUSY is placed in a high state, it is accompanied by the signal BioMCU_BUSY being placed in a high state a few moments later. The time delay is initiated at the time of the switch to the high state of the signal SE_BUSY. In the event that the master circuit 21 observes that the signal BioMCU_BUSY has not switched to a high state before the time delay expires, it is considered that the slave circuit 22 has not responded.

[0139] Still according to the preferred embodiment, one or several other time delays are started after sending a command header, a response header, a command and / or a response. In the case where this or these other time delays expire before the associated confirmation frame is sent, it is considered that there is no response from circuit 22.

[0140] Furthermore, if the confirmation frame does not contain the value expected by the receiving circuit of the frame, the previous frame can be resent. In the case where several consecutive confirmation frames do not contain the expected value, for example, after three consecutive confirmation frames do not correspond to the frames expected by the receiving circuit, it can also be considered that the slave circuit 22 has not responded.

[0141] Figure 62 is a timing diagram of another stage of the embodiment of the communication method between the circuits 21 and 22. The timing diagram specifically reflects the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA over time (t).

[0142] If the length or size of the response data (that is, the number of bytes of the data) exceeds the maximum length of the frame, Figure 6 The timing diagram of the response with data exchange sends 32 ( Figure 3 For example, this case corresponds to a case where the slave circuit 22 sends data representing the analysis result of the fingerprint to the master circuit 21, and the length of the data exceeds the limit length of the frame.

[0143] For the communication method implemented on the link 24, it is assumed that the maximum length of the frame is equal to 240 bytes. When the length of the response data to be sent is greater than 240 bytes, the data is divided into a plurality of words as required, each word not exceeding 240 bytes. Then, the sending of the response data is equivalent to sending the response data in the same response phase 32 ( Figure 3 ) during which continuous transmission of frames is performed, each frame corresponding to one word of the response data.

[0144] Figure 6 The diagram illustrates a case where the slave circuit 22 sends response data including 500 bytes to the master circuit 21 as an example. Still in this example, the data including 500 bytes is divided into: a first word (response data [0-239]) consisting of the first 240 bytes of the response data; a second word (response data [240-479]) consisting of the subsequent 240 bytes of the response data; and a third word (response data [480-499]) consisting of the last 20 bytes of the response data.

[0145] Figure 6 The timing diagram includes Figure 5B These components are common to the timing diagrams of FIG. 1 and FIG. 2 . These components will not be described in detail below. Figure 6 The timing diagram and Figure 5B The main difference between the timing diagrams is that Figure 6 About Figure 5B The described operation of separating moments t2' to t6' is repeated several times. Specifically, consecutive moments t2'a, t3'a, t4'a, t5'a, t2'b, t3'b, t4'b, t5'b, t2'c, t3'c, t4'c and t5'c are inserted between moments t9 and t6'.

[0146] In with Figure 5BAt a similar time t2'a to time t2', the signal BioMCU_BUSY switches from a low state to a high state by the slave circuit 22. This transition of the signal BioMCU_BUSY to a high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to send a first frame containing a first word of response data.

[0147] At a time t3'a similar to time t3', the master circuit 21 starts to send out its clock signal. The first switching of the signal CLK from the low state to the high state marks the beginning of the transmission of the first frame. At each switching to the high state of the signal CLK, new bits of the first frame (and therefore new bits of the first word) are sent to the master circuit 21. The first frame is sent from the slave circuit 22 to the master circuit 21. Thus, as with respect to Figure 2 As described, the transmission of this first frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0148] At a time t4'a similar to time t4', the master circuit 21 stops sending out the clock signal CLK by returning it to the low state. This last switching of the signal CLK from the high state to the low state marks the end of the transmission of the first frame.

[0149] At a time t5'a similar to the time t5', the signal BioMCU_BUSY is switched to a low state. Thus, the slave circuit 22 indicates to the master circuit 21 that it is not yet ready to send or receive.

[0150] Next, the signals SE_BUSY, BioMCU_BUSY, CLK and DATA evolve at successive moments t2'b, t3'b, t4'b and t5'b after moment t5'a, similarly to what was previously described for successive moments t2'a, t3'a, t4'a and t5'a, respectively, with the only difference being that moments t3'b and t4'b constitute the transmission of a second frame containing the second word of the response data. Likewise, next, the signals SE_BUSY, BioMCU_BUSY, CLK and DATA evolve at successive moments t2'c, t3'c, t4'c and t5'c after moment t5'b, similarly to what was previously described for successive moments t2'a, t3'a, t4'a and t5'a, respectively, with the only difference being that moments t3'c and t4'c constitute the transmission of a third frame containing the third word of the response data.

[0151] During contactless communication, efforts are made to make the first circuit 21, the second circuit 22 and the biometric sensor 23 consume as little energy as possible. Preferably, the biometric framework (that is to say, the second circuit 22 and the biometric sensor 23) therefore exits the low power mode only in the following two cases: during the initial startup phase, during which the card ( Figure 1 ) near Terminal 1( Figure 1 ), so that the card is powered by the terminal 1; and at the beginning of the command sending phase 31 ( Figure 3 ) and the end of the associated response sending phase 32 ( Figure 3 ). In both cases, the biometric recognition framework is in standby mode after each response sending phase 32.

[0152] In a variant, the biometric framework is powered only when it is pressurized by the first circuit 21. The biometric framework is then started under pressure from the first circuit 21 and the sending of the first command is initiated by the first circuit 21 when the signal BioMCU_BUSY switches to a low state.

[0153] According to an embodiment, during the active cycle of the biometric recognition framework, a pause sometimes occurs between the sending of a command and the sending of an associated response. In practice, such a pause may occur in the case of a wait time extension (WTX) request. Specifically, such a wait time extension request occurs when the card 2 requires the terminal 1 to grant it additional time before stopping the transmission of the field, thereby cutting off the power supply to the card 2.

[0154] For contactless payment type banking applications, a latency extension request is typically sent after approximately 38 ms (at most: after receiving an Application Protocol Data Unit (APDU) command; or after receiving a previous latency extension request).

[0155] According to a preferred embodiment, after each APDU reception or wait time extension request reception, a time delay or timer is activated by the first circuit 21. Expiration of this time delay then makes it possible to indicate to the first circuit 21 the appropriate moment for making the next time delay extension request. In this example, this time delay is initially set to a value less than 38 ms.

[0156] If the time delay expires at a time when the second circuit 22 is not in the low power mode, in other words, if the time delay expires while the second circuit 22 is in an active state, the first circuit 21 sends a pause command to the second circuit 22. The pause command attempts to pause the operation performed by the second circuit 22 and temporarily switches the second circuit 22 to the low power mode.

[0157] Figure 7 is a timing diagram of a further stage of an embodiment of the communication method between the circuits 21 and 22 in the case of sending a pause command. The timing diagram specifically reflects the evolution of the signals SE_BUSY, BioMCU_BUSY, CLK and DATA over time (t).

[0158] Figure 7 The timing diagram corresponds to the situation where the time delay expires while the slave circuit 22 is in an active state. Therefore, the master circuit 21 will send a suspend command to the slave circuit 22 in order to place the second circuit in a low power mode.

[0159] exist Figure 7 In FIG. 1 , it is assumed that at time t20, the signals SE_BUSY, BioMCU_BUSY, CLK and DATA are initially in a low state. It is also assumed that this time t20 is inserted between the command transmission phase and the response transmission phase. Therefore, the signal BioMCU_BUSY is intended to enter a high state after time t20 to start the response transmission phase. Figure 7 In the example, contrary to what is expected (because the response sending phase is about to start, the signal BioMCU_BUSY is usually expected to rise), the signal SE_BUSY is set to a high state at time t20.

[0160] At time t21 after time t20, the signal SE_BUSY is switched from the low state to the high state by the master circuit 21. This transition of the signal SE_BUSY to the high state is intended to indicate to the slave circuit 22 that the master circuit 21 wishes to suspend the signal SE_BUSY.

[0161] From time t21, the slave circuit 22 detects and executes the pause command. The slave circuit 22 switches to low power mode. After a duration indicated as the maximum pause time, an operation for managing the time extension request (WTX management) is performed by the master circuit 21. The maximum pause time duration is long enough to ensure that the slave circuit 22 does switch to low power mode before starting the maximum pause time management operation. Therefore, between the master circuit 21 and the card 2 ( Figure 1 ) during external communication, the slave circuit 22 is placed in standby mode.

[0162] At time t23 after time t21, the signal SE_BUSY is therefore switched from a high state to a low state by the master circuit 21. Time t23 marks the end of the management of the maximum pause time by the master circuit 21. The switching of the signal SE_BUSY to a low state causes the slave circuit 22 to exit the low power mode. This is equivalent to sending a command to the slave circuit 22 to resume the operation performed by the slave circuit 22 before the transmission of the pause command.

[0163] Then, the slave circuit 22 exits the low power mode and starts a wake-up sequence during which the slave circuit 22 performs various operations related to its exit from the standby state. During all these operations, the signal BioMCU_BUSY remains in a low state.

[0164] At time t25 after time t23, the signal SE_BUSY is switched from the low state to the high state by the master circuit 21. This means that the master circuit 21 wishes to send a recovery frame to the slave circuit 22.

[0165] At time t26 after time t25, signal BioMCU_BUSY switches from the low state to the high state by slave circuit 22. This transition of signal BioMCU_BUSY to the high state (after which signal SE_BUSY transitions to the high state) is intended to indicate to master circuit 21 that slave circuit 22 is ready to receive a recovery frame.

[0166] At time t27 after time t26, the master circuit 21 sends out its clock signal CLK. The first switch of the signal CLK from the low state to the high state marks the start of the transmission of the recovery frame. At each switch to the high state of the signal CLK, a new bit of the recovery frame is sent to the slave circuit 22. The recovery frame is sent from the master circuit 21 to the slave circuit 22. Therefore, as described in relation to Figure 2 As described, the transmission of the recovery frame corresponds to the transmission of the signal MOSI on the second conductor 24B of the link 24.

[0167] According to a preferred embodiment, the recovery frame includes bytes that are related to FIG. 4A to FIG. 4B The bytes of the command header frame described are similar. Specifically, the recovery frame includes a third byte, which corresponds to the time budget allocated to the biometric recognition framework to perform its operation. Still according to the preferred embodiment, the time budget more specifically corresponds to the remaining duration of the time delay suitable for providing the following waiting time extension. Therefore, this advantageously allows the master circuit 21 to communicate to the slave circuit 22 the duration that the slave circuit 22 must perform its operation before the next waiting time extension.

[0168] At time t28 after time t27, the master circuit 21 stops sending its clock signal CLK. Therefore, this time t28 marks the end of transmission of the recovery frame.

[0169] At time t29 after time t28, the signal BioMCU_BUSY switches from the high state to the low state by the slave circuit 22. This transition of the signal BioMCU_BUSY to the low state is intended to indicate to the master circuit 21 that the slave circuit 22 is occupied to perform operations allowing it to generate an acknowledgement frame.

[0170] At time t30 after time t29, the signal BioMCU_BUSY switches from the low state to the high state by the slave circuit 22. This transition of the signal BioMCU_BUSY to the high state is intended to indicate to the master circuit 21 that the slave circuit 22 is ready to send an acknowledgement frame in response to the previously received recovery frame.

[0171] At time t31 after time t30, the master circuit 21 starts to send out its clock signal, and the confirmation frame is sent to the master circuit 21 through the slave circuit 22. Figure 2 As described, the transmission of the acknowledgment frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0172] At time t32 after time t31, the master circuit 21 stops sending its clock signal CLK. Therefore, this time t32 marks the end of sending the confirmation frame.

[0173] At time t33 after time t32, the signal BioMCU_BUSY switches from the high state to the low state by the slave circuit 22. This transition of the signal BioMCU_BUSY to the low state is intended to indicate to the master circuit 21 that the slave circuit 22 is occupied to continue to perform operations allowing it to generate a response frame.

[0174] At time t34 after time t33, the signal SE_BUSY is switched from a high state to a low state by the master circuit 21. Time t34 marks the end of the transmission of the recovery frame and the associated confirmation frame. Therefore, preferably, while waiting for the response transmission phase initiated by the slave circuit 22, the transition of the signal SE_BUSY to a low state is accompanied by the master circuit 21 switching to a low power state.

[0175] At time t35 after time t34, the signal BioMCU_BUSY switches from a low state to a high state by the slave circuit 22. This transition of the signal BioMCU_BUSY to a high state indicates to the master circuit 21 that the slave circuit 22 wishes to send a response to the master circuit 21. The master circuit 21 then exits the low power mode and begins a wake-up sequence during which the master circuit 21 performs various operations related to its exit from the standby state. During all of these operations, the signal SE_BUSY remains in a low state.

[0176] Then, it is assumed that a pause command is not sent to the slave circuit 22 through the master circuit 21 .

[0177] At time t37 after time t35, the master circuit 21 issues its clock signal CLK, and at each cycle of the signal CLK, the bits of the response header frame are sent to the slave circuit 22. The response header frame is sent from the slave circuit 22 to the master circuit 21. Figure 2As described, the transmission of the response header frame corresponds to the transmission of the signal MISO on the second conductor 24B of the link 24 .

[0178] According to the present embodiment, sometimes a competition situation (race situation) between the pause command and the response frame transmission request may occur. Specifically, this situation may occur when the master circuit 21 commands the slave circuit 22 to pause at about the time when the slave circuit 22 is ready to send a response. For example, this corresponds to the approximately simultaneous rise of the signals SE_BUSY and BioMCU_BUSY at time t21.

[0179] In this case, priority is given to the pause command sent by the master circuit 21. Then, before the maximum pause time duration expires, the signal BioMCU_BUSY switches to a low state. Next, the pause command is considered by the slave circuit 22, which enters standby mode to allow the master circuit 21 to manage the wait time extension.

[0180] Still according to this embodiment, therefore, the switching of the signal SE_BUSY to the high state corresponds to: the transmission of a command when the slave circuit 22 is in the standby mode; or the transmission of a pause command when the master circuit 21 is waiting for a response from the slave circuit 22 .

[0181] Fig. 8A and Figure 8B A flow chart showing other steps of an embodiment of the communication method. Specifically, FIG. 8A to FIG. 8B The progression of steps or phases of the communication between circuits 21 and 22 over time (t) is shown.

[0182] According to this embodiment, the second circuit 22 performs two types of operations or tasks: so-called interruptible tasks, in other words, operations whose execution can be suspended at any time and then resumed without affecting the operation; and so-called uninterruptible tasks, in other words, operations whose execution cannot be suspended until the execution is completed.

[0183] An example of an interruptible task is analyzing an image obtained by the fingerprint sensor 23 by the second circuit 22 in order to extract minutiae therefrom, that is, to produce a reduced fingerprint. An example of an uninterruptible task is communication between the second circuit 22 and the fingerprint sensor 23.

[0184] Fig. 8A The communication diagram between the first circuit 21 and the second circuit 22 is schematically shown in the case where the second circuit 22 performs an interruptible operation 82. The first circuit 21 sends a command to the second circuit 22 (arrow 81, command) to perform the interruptible operation 82. Then, the second circuit 22 starts the execution of the interruptible operation 82 commanded by the first circuit 21 (block 82a, execution).

[0185] After a duration corresponding to the expiration of the time delay (WTX timer expiration) such that the next waiting time extension can be expected, a pause command (arrow 83a, pause) is sent to the second device 22, as described with respect to Figure 7 This causes the second circuit 22 to suspend execution 82a of the interruptible operation 82 and allow the first circuit 21 to manage (block 84a, WTX management) the wait time extension. Then, a resume command (arrow 85a, Resume) is sent to the second circuit 22. Then, the second circuit 22 resumes execution of the interruptible operation 82 (block 82b, Execute).

[0186] After a duration corresponding to the expiration of the time delay (WTX time expiration) such that the next wait time extension can be expected, a new pause command (arrow 83b, pause) is sent to the second device 22. This causes the second circuit 22 to pause the execution 82b of the interruptible operation 82 and allow the first circuit 21 to manage (block 84b, WTX management) the wait time extension. Then, a new resume command (arrow 85b, resume) is sent to the second circuit 22. Then, the second circuit 22 resumes the execution of the interruptible operation 82 (block 82c, execute).

[0187] Once the execution 82c of the interruptible operation 82 is completed, the second circuit 22 sends a response (arrow 86, response). The response contains, for example, output data of the execution 82a, 82b, 82c of the interruptible operation 82.

[0188] exist Fig. 8A In the embodiment, it is assumed that only two pauses occur during the execution of the interruptible operation, each of which is caused by the need to manage the latency extension. However, it should be understood that in practice, the interruptible operation can be suspended by any number of pauses, and based on the information provided in this disclosure, it is within the ability of those skilled in the art to implement such variations.

[0189] Figure 8B Schematically shows a communication diagram between the first circuit 21 and the second circuit 22 in the case where the second circuit 22 performs an operation 87 (e.g., an interruptible operation that can be divided or split into several uninterruptible sub-operations or subtasks). According to this embodiment, it is assumed that each sub-operation can be performed during a shorter duration than the duration separating two consecutive wait time extensions.

[0190] The first circuit 21 sends a command to the second circuit 22 (arrow 81, command) to perform operation 87. Then, in the example of view B, the second circuit 22 performs the first uninterrupted sub-operation of operation 87 commanded by the first circuit 21 (block 87b, sub-operation 1), and then performs the second uninterrupted sub-operation (block 87b, sub-operation 2).

[0191] After the duration before the expected expiration of the time delay (expiration of the expected WTX timer) makes it possible to foresee the next waiting time extension, a response (arrow 86a, response (not terminated)) is sent to the first device 21. This results in allowing the first circuit 21 to manage (block 84a, WTX management) the waiting time extension. Then, a resume command (arrow 88a, command (continue)) is sent to the second circuit 22. Then, still in Figure 8B In the example, the second circuit 22 performs the third uninterrupted sub-operation (block 87c, sub-operation n) of operation 87 commanded by the first circuit 21, and then performs the fourth uninterrupted sub-operation (block 87d, sub-operation n+1).

[0192] After the duration before the foreseen expiration of the time delay (foreseen expiration of the WTX timer) makes it possible to foresee the following waiting time extension, a new response (arrow 86b, response (not terminated)) is sent to the first device 21. This results in allowing the first circuit 21 to manage (box 84b, WTX management) the second waiting time extension. Then, a new resume command (arrow 88b, command (continue)) is sent to the second circuit 22. Then, in the example of view B, the second circuit 22 again performs the fifth and last uninterrupted sub-operation of the operation 87 commanded by the first circuit 21 (box 87e, sub-operation).

[0193] exist Figure 8B In the present invention, it is assumed that only two pauses occur during the execution of the operation, each of which is caused by the need to manage the latency extension. However, it should be understood that in practice, the operation can be suspended by any number of pauses, and based on the information provided in this disclosure, it is within the ability of those skilled in the art to implement such variations.

[0194] According to a preferred embodiment, command 81' and resume commands 88a and 88b contain the energy budget and the time budget allocated to the second circuit 22 until the next latency extension management. Advantageously, this allows the second circuit 22 to calculate the number of uninterrupted operations that can be performed before the next pause, specifically depending on the available energy.

[0195] Thus, a strategy can be developed for executing operations by the second circuit 22. In particular, in the case of an operation comprising uninterruptible sub-operations, the second circuit 22 is able to determine how many uninterruptible sub-operations can be executed before the next pause. This makes it possible to limit the risk of pauses during the execution of uninterruptible sub-operations. Thus, the execution of uninterruptible sub-operations of a given operation can also be optimized.

[0196] Various embodiments and variations have been described. It will be appreciated by those skilled in the art that certain features of these embodiments may be combined, and other variations will be readily apparent to those skilled in the art. What has been described with respect to embodiments and implementations in which the synchronization signal CLK is at a low level by default (the acquisition of data is performed on the rising edge of the signal CLK) may be transposed to a reverse level and reverse edge (high level and falling edge).

[0197] Furthermore, what has been specifically described in connection with the embodiments and implementation modes in which the sensor 23 is a fingerprint sensor is more generally applicable to other types of biometric recognition sensors 23, such as facial recognition sensors.

[0198] Finally, based on the functional description provided above, it is within the capabilities of those skilled in the art to implement in practice the embodiments and variations described herein. Specifically, what is more specifically described with respect to the communication between a microcontroller unit and a biometric identification microcontroller unit for an exemplary application to perform security operations is more generally applicable to any communication between a master circuit or device and a slave circuit or device.

Claims

1. A method for communication between a first element and at least one second element of the same device connected by a communication link, comprising: sending, by the first element, a clock signal of the first element, wherein when sending the clock signal, the clock signal periodically switches between a low state and a high state, wherein at each switch to the high state of the clock signal, a bit of a command header frame is sent to the second element, During the duration of sending the command header frame: The first component sends a first piece of information and a second piece of information to the second component via the communication link, wherein the first piece of information represents a power budget related to energy for supplying power to the device via the electromagnetic field, and the second piece of information represents a remaining time budget for the device, wherein the first piece of information is the intensity of the power supply current of the device from the electromagnetic field, and the remaining time budget is estimated by the first component; Adapting the operating frequency by the second component according to the strength of the supply current provided by the first piece of information; as well as The second component performs several operations according to the second information.

2. The method according to claim 1, further comprising: The intensity of the supply current is evaluated by the first element.

3. The method according to claim 1, further comprising: The second piece of information is evaluated by the first element.

4. The method according to claim 1, further comprising: sending a third piece of information to the second component through the first component, the third piece of information representing a voltage budget of the device; as well as The internal configuration is adapted by the second component according to the third information.

5. The method according to claim 4, further comprising: The third piece of information is evaluated by the first element. The method of claim 1 , wherein the first element supplies power to the second element.

7. The method of claim 1, wherein the first component is a secure electronic circuit.

8. The method of claim 1, wherein the second component is a microcontroller.

9. The method of claim 1, wherein the second element is coupled to a fingerprint sensor.

10. The method of claim 9, wherein the fingerprint sensor is part of the device. The method of claim 9 , wherein the first element provides power to the fingerprint sensor. 12 . The method according to claim 1 , wherein the device performs external communication using a radio frequency signal without contact or a wired signal with contact.

13. A device configured to perform the method according to claim 1.

14. A payment card configured to perform the method according to claim 1.

Citation Information

Patent Citations

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