Display device

Abstract

A display device is provided. The display device includes a base substrate including a display area and a non-display area adjacent to the display area; a first power line located in the non-display area to which a first power voltage is applied; a second power line located in the non-display area and spaced apart from the first power line to which a second power voltage is applied; and a dam overlapping the first power line and the second power line, having a first height on the first power line, and having a second height greater than the first height between the first power line and the second power line.

Description

Technical Field

[0001] Several aspects of some example embodiments relate generally to display devices. Background Technology

[0002] Recently, with technological advancements, display products with smaller size, lighter weight, and superior performance have been produced. Cathode ray tube (CRT) televisions, with their numerous advantages in performance and price, have been widely used in display devices. However, recently, display devices such as plasma display devices, liquid crystal display devices, and organic light-emitting diode (OLED) display devices have become more frequently used compared to CRT displays due to their relatively smaller thickness, lighter weight, and lower power consumption.

[0003] The display device may include an internal structure sealed by a thin-film encapsulation layer, and a touchscreen panel formed on the thin-film encapsulation layer. For example, an organic light-emitting diode (OLED) display device may have a structure in which the thin-film encapsulation layer and the touchscreen panel are formed directly on the thin-film encapsulation layer. In this case, the quality of the thin-film encapsulation layer can affect the display quality and the quality of the touchscreen panel.

[0004] The information disclosed in this background section is only intended to enhance the understanding of the background, and therefore, the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention

[0005] Several aspects of some example embodiments relate generally to display devices. For example, some example embodiments of the inventive concept relate to display devices with relatively improved display quality.

[0006] Several aspects of some example embodiments include a display device in which a thin-film encapsulation layer with relatively improved quality is formed, thereby improving display quality and the quality of the touchscreen panel layer.

[0007] According to some example embodiments, the display device may include: a base substrate including a display area and a non-display area adjacent to the display area; a first power line located in the non-display area, to which a first power voltage is applied; a second power line located in the non-display area and spaced apart from the first power line, to which a second power voltage is applied; and a dam overlapping the first power line and the second power line, having a first height on the first power line and a second height greater than the first height between the first power line and the second power line.

[0008] According to some example embodiments, the dam may include a first dam layer and a second dam layer located on the first dam layer. Additionally, the first dam layer may be formed between the first power line and the second power line, and also formed on the first power line and the second power line. Furthermore, the second dam layer may be formed between the first power line and the second power line.

[0009] According to some example embodiments, the two ends of the second dam layer of the dam may overlap with the first power line and the second power line.

[0010] According to some example embodiments, the display device may further include: a pixel defining layer located on a base substrate to define an opening; a light-emitting layer located in the opening; and a thin-film encapsulation layer located on the light-emitting layer. Additionally, a first dam layer may be located on the same layer as the pixel defining layer.

[0011] According to some example embodiments, the display device may also include spacers located on the pixel defining layer. Additionally, a second dam layer may be located on the same layer as the spacers.

[0012] According to some example embodiments, the display device may further include a through-hole insulating layer located on the first power line and the second power line. Additionally, the height from the base substrate to the upper surface of the through-hole insulating layer may be lower in the region between the first power line and the second power line than in the region overlapping with either the first or second power line.

[0013] According to some example embodiments, each of the first power line and the second power line may include at least two conductive layers, and an insulating layer may be interposed between the conductive layers.

[0014] According to some example embodiments, the display device may further include: a first inorganic layer located on top of the dam; an organic layer located on the first inorganic layer; and a second inorganic layer located on the organic layer.

[0015] According to some example embodiments, the display device may also include a through-hole insulating layer having a recessed portion formed between the first power line and the second power line.

[0016] According to some example embodiments, the display device may further include: a thin-film transistor layer located on a base substrate and including thin-film transistors; a light-emitting structure electrically connected to the thin-film transistors; a thin-film encapsulation layer covering the light-emitting structure; and a touch screen panel layer located on the thin-film encapsulation layer to detect user touch input.

[0017] According to some example embodiments, the display device may include: a base substrate including a display area and a non-display area adjacent to the display area; a first power line located in the non-display area, to which a first power voltage is applied; a second power line located in the non-display area and spaced apart from the first power line, to which a second power voltage is applied; and an insulating layer having a recessed portion formed between the first power line and the second power line.

[0018] According to some example embodiments, the recessed portion may include a first portion that at least partially overlaps with a first power line and a second portion that at least partially overlaps with a second power line.

[0019] According to some example embodiments, the first power line and the second power line may be spaced apart from each other in a first direction and may extend in a second direction perpendicular to the first direction. Additionally, the first and second portions of the recessed portion may extend in directions inclined relative to the first and second directions, respectively.

[0020] According to some example embodiments, the first power line and the second power line may be spaced apart from each other in a first direction and may extend in a second direction perpendicular to the first direction. Additionally, the recessed portion may extend in the second direction between the first power line and the second power line.

[0021] According to some example embodiments, the display device may further include a thin-film transistor layer located on a base substrate and comprising thin-film transistors. Additionally, the height from the upper surface of the thin-film transistor layer to the upper surface of the insulating layer with the recessed portion may be lower in the region between the first power line and the second power line than in the region overlapping with either the first or second power line.

[0022] According to some example embodiments, the insulating layer may include: a first through-hole insulating layer; and a second through-hole insulating layer located on the first through-hole insulating layer. Alternatively, neither the first nor the second through-hole insulating layer may be formed in the recessed portion.

[0023] According to some example embodiments, the display device may further include: a first inorganic layer on an insulating layer; an organic layer on the first inorganic layer; and a second inorganic layer on the organic layer.

[0024] According to some example embodiments, the display device may further include: a thin-film transistor layer located on a base substrate and including thin-film transistors; a light-emitting structure electrically connected to the thin-film transistors; a thin-film encapsulation layer covering the light-emitting structure; and a touch screen panel layer located on the thin-film encapsulation layer to detect user touch input.

[0025] According to some example embodiments, the display device may also include a dam located on an insulating layer to overlap with the first power line and the second power line.

[0026] According to some example embodiments, the dam may have a first height on the first power line and a second height greater than the first height between the first power line and the second power line.

[0027] Therefore, the display device according to some example embodiments may include a dam that overlaps with a first power line and a second power line, having a first height on the first power line and a second height greater than the first height between the first power line and the second power line; or it may include an insulating layer having a recessed portion formed between the first power line and the second power line. Thus, the organic layer of the thin-film encapsulation layer can be formed relatively uniformly, thereby improving the display quality and the quality of the touchscreen panel layer. Attached Figure Description

[0028] Figure 1 This is a block diagram illustrating a display device according to some example embodiments.

[0029] Figure 2 It is shown Figure 1 An example of an equivalent circuit diagram of pixels included in a display device.

[0030] Figure 3 This is a plan view showing a display device according to some example embodiments.

[0031] Figure 4 Is with Figure 3 A cross-sectional view of the pixels in the display area of ​​a display device.

[0032] Figure 5 It is shown Figure 3 A magnified view of region "A" in the image.

[0033] Figure 6A It is along Figure 5 The cross-sectional view taken by line I-I' in the figure.

[0034] Figure 6B It is along Figure 5 The cross-sectional view taken from line II-II' in the diagram.

[0035] Figure 6C It is along Figure 5 The cross-sectional view taken by line III-III' in the figure.

[0036] Figure 7 This is a cross-sectional view showing a display device according to some example embodiments.

[0037] Figure 8 This is a partial magnified view showing a display device according to some example embodiments.

[0038] Figure 9A It is along Figure 8 The cross-sectional view taken by line I-I' in the figure.

[0039] Figure 9B It is along Figure 8 The cross-sectional view taken from line II-II' in the diagram.

[0040] Figure 10 This is a cross-sectional view showing a display device according to some example embodiments.

[0041] Figure 11 This is a cross-sectional view showing a display device according to some example embodiments.

[0042] Figure 12 This is a partial magnified view showing a display device according to some example embodiments.

[0043] Figure 13 This is a partial magnified view showing a display device according to some example embodiments.

[0044] Figures 14A to 14C This is a cross-sectional view illustrating a method of manufacturing a display device according to some example embodiments.

[0045] Figure 15 It is shown Figure 5 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device.

[0046] Figure 16 It is shown Figure 8 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device.

[0047] Figure 17 It is shown Figure 12 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device.

[0048] Figure 18 It is shown Figure 13 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device.

[0049] Figure 19 This is a block diagram illustrating an electronic device according to some example embodiments.

[0050] Figure 20A It is shown Figure 19 The electronic device is implemented as an example of a television.

[0051] Figure 20B It is shown Figure 19 The diagram shows an example of an electronic device implemented as a smartphone. Detailed Implementation

[0052] In the following sections, further details of some exemplary embodiments of the inventive concept will be explained in more detail with reference to the accompanying drawings.

[0053] Figure 1 This is a block diagram illustrating a display device according to some example embodiments.

[0054] Reference Figure 1 The display device may include a display panel 10, a scan driver 20, a data driver 30, a transmission control driver 40, and a controller 50.

[0055] Display panel 10 may include a plurality of pixels PX for displaying images. For example, display panel 10 may include n*m ​​pixels PX located at the intersection of scan lines SL1 to SLn and data lines DL1 to DLm (where each of n and m is an integer greater than 1) (e.g., arranged in a matrix). An example structure of pixel PX will be referred to below. Figure 2 To describe in more detail.

[0056] The scan driver 20 can sequentially provide a first scan signal to the pixel PX via scan lines SL1 to SLn, and sequentially provide a second scan signal to the pixel PX via inverted scan lines / SL1 to / SLn. For example, the second scan signal can be an inverted signal of the first scan signal based on the first control signal CTL1.

[0057] The data driver 30 can provide data signals to the pixel PX via data lines DL1 to DLm based on the second control signal CTL2.

[0058] The transmit control driver 40 can sequentially provide transmit control signals to pixel PX via transmit control lines EM1 to EMn based on the third control signal CTL3.

[0059] The controller 50 can control the scan driver 20, the data driver 30, and the transmit control driver 40. The controller 50 can generate control signals CTL1 to CTL3 to control the scan driver 20, the data driver 30, and the transmit control driver 40. The first control signal CTL1 for controlling the scan driver 20 may include a scan start signal, a scan clock signal, etc. The second control signal CTL2 for controlling the data driver 30 may include image data, a horizontal start signal, etc. The third control signal CTL3 for controlling the transmit control driver 40 may include a transmit control start signal, a transmit control clock signal, etc.

[0060] In addition, the display device may also include a power supply unit configured to supply a first power supply voltage ELVDD, a second power supply voltage ELVSS, and an initialization voltage VINT to the display panel 10.

[0061] Figure 2 It is shown Figure 1 An example of an equivalent circuit diagram of pixels included in a display device.

[0062] Reference Figure 2 Pixel PX may include first transistors T1 to seventh transistors T7, storage capacitor CST, and organic light-emitting diode (OLED). Pixel PX may be located in the i-th pixel row (where i is an integer between 1 and n) and the j-th pixel column (where j is an integer between 1 and m).

[0063] The first transistor T1 may be a driving transistor configured to provide a driving current corresponding to a data signal to an organic light-emitting diode (OLED). The first transistor T1 may include: a gate electrode connected to a first node N1, a first electrode connected to a second node N2, and a second electrode connected to a third node N3.

[0064] The second transistor T2 may provide a data signal to the first transistor T1 in response to the first scan signal GS1. According to some example embodiments, the second transistor T2 may include: a gate electrode configured to receive the first scan signal GS1 from the i-th scan line SL1, a first electrode configured to receive a data signal from the j-th data line DLj, and a second electrode connected to the first electrode of the first transistor T1 (i.e., the second node N2).

[0065] The third transistor T3 may connect the second electrode of the first transistor T1 to the gate electrode of the first transistor T1 in response to the second scan signal GS2. According to some example embodiments, the third transistor T3 may include: a gate electrode configured to receive the second scan signal GS2 from the i-th inverted scan line / SLi, a first electrode connected to the second electrode of the first transistor T1 (i.e., the third node N3), and a second electrode connected to the gate electrode of the first transistor T1 (i.e., the first node N1).

[0066] The fourth transistor T4 may apply an initialization voltage VINT to the gate electrode of the first transistor T1 in response to a third scan signal GS3. According to some example embodiments, the fourth transistor T4 may include: a gate electrode configured to receive the third scan signal GS3 from the (i-1)th inverted scan line / SL(i-1), a first electrode connected to the initialization voltage VINT, and a second electrode connected to the gate electrode of the first transistor T1 (i.e., the first node N1).

[0067] The fifth transistor T5 may apply a first power supply voltage ELVDD to the first electrode of the first transistor T1 in response to a transmit control signal. According to some example embodiments, the fifth transistor T5 may include: a gate electrode configured to receive a transmit control signal from the i-th transmit control line EMi, a first electrode connected to the first power supply voltage ELVDD, and a second electrode connected to the first electrode of the first transistor T1 (i.e., the second node N2).

[0068] The sixth transistor T6 can connect the second electrode of the first transistor T1 to the first electrode of the organic light-emitting diode OLED in response to an emission control signal. According to some example embodiments, the sixth transistor T6 may include: a gate electrode configured to receive an emission control signal from the i-th emission control line EMi, a first electrode connected to the second electrode of the first transistor T1 (i.e., the third node N3), and a second electrode connected to the first electrode of the organic light-emitting diode OLED (i.e., the fourth node N4).

[0069] The seventh transistor T7 may apply an initialization voltage VINT to the first electrode of the organic light-emitting diode OLED in response to the fourth scan signal GS4. According to some example embodiments, the seventh transistor T7 may include: a gate electrode configured to receive the fourth scan signal GS4 from the (i-1)th inverted scan line / SL(i-1), a first electrode connected to the initialization voltage VINT, and a second electrode connected to the first electrode (i.e., the fourth node N4) of the organic light-emitting diode OLED.

[0070] In this configuration, each of the first transistor T1, the second transistor T2, the fifth transistor T5, and the sixth transistor T6 can be a polysilicon (poly-Si) thin-film transistor and can be a P-type transistor. Each of the third transistor T3, the fourth transistor T4, and the seventh transistor T7 can be an oxide thin-film transistor and can be an N-type transistor.

[0071] The storage capacitor CST may include a first electrode connected to a first power supply voltage ELVDD and a second electrode connected to the gate electrode (i.e., the first node N1) of the first transistor T1.

[0072] Figure 3 This is a plan view showing a display device according to some example embodiments.

[0073] Reference Figure 3 The display device may include a display area DA for displaying an image and a non-display area NDA adjacent to and surrounding the display area DA. The display device may include a first power line 210 and a second power line 220.

[0074] The display area DA may be located on a plane configured with a first direction D1 and a second direction D2 perpendicular to the first direction D1. A plurality of pixels for displaying an image may be located in the display area DA, and the first power line 210 and the second power line 220 may be located in the non-display area NDA (e.g., around the periphery of the display area DA or outside the coverage area of ​​the display area DA).

[0075] A first power supply voltage ELVDD may be applied to a first power supply line 210. A second power supply voltage ELVSS may be applied to a second power supply line 220. The horizontal portion of the first power supply line 210 may extend in a first direction D1 and may be adjacent to the display area DA. The vertical portion of the first power supply line 210 may extend from the horizontal portion of the first power supply line 210 along a second direction D2. The second power supply line 220 may extend to surround the display area DA and may be spaced apart from the first power supply line 210.

[0076] Figure 4 Is with Figure 3 A cross-sectional view of the pixels in the display area of ​​a display device.

[0077] Reference Figure 4 The display device may include: a base substrate 100, a buffer layer 110, an active pattern ACT of a thin film transistor TFT, a first insulating layer 120, a gate conductive layer, a second insulating layer 130, a first source-drain conductive layer, a first through-hole insulating layer VIA1, a second source-drain conductive layer, a second through-hole insulating layer VIA2, a light-emitting structure 180, a pixel defining layer PDL, spacers SPC, a thin film encapsulation layer 190, and a touch screen panel layer TSP.

[0078] The base substrate 100 may be formed of a transparent or opaque material. For example, the base substrate 100 may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate (F-doped quartz substrate), a soda-lime glass substrate, an alkali-free glass substrate, etc. According to some example embodiments, the base substrate 100 may be a flexible transparent resin substrate. Examples of transparent resin substrates that can be used as the base substrate 100 include polyimide substrates.

[0079] The buffer layer 110 may be located over the entire base substrate 100. The buffer layer 110 prevents or reduces the diffusion of metal atoms or impurities from the base substrate 100 into the active pattern ACT, and can control the heat transfer rate during the crystallization process used to form the active pattern ACT to obtain a substantially uniform active pattern ACT. Additionally, when the surface of the base substrate 100 is non-uniform, the buffer layer 110 can be used to improve the flatness of the surface of the base substrate 100 (e.g., planarize it).

[0080] The active pattern ACT may be located on the buffer layer 110. The active pattern ACT may include a drain region and a source region doped with impurities, and a channel region located between the drain region and the source region. For example, the active pattern ACT may include polysilicon.

[0081] The first insulating layer 120 may be located on a buffer layer 110 on which the active pattern ACT is located. The first insulating layer 120 may include inorganic insulating materials such as silicon compounds and metal oxides.

[0082] The gate conductive layer may be located on the first insulating layer 120. The gate conductive layer may include the gate electrode GE of the thin-film transistor TFT that overlaps with the active pattern ACT. The gate conductive layer may also include signal lines, such as scan lines for driving a display device.

[0083] The second insulating layer 130 may be located on the first insulating layer 120 on which the gate conductive layer is located. The second insulating layer 130 may include inorganic insulating materials such as silicon compounds and metal oxides.

[0084] The first source-drain conductive layer may be located on the second insulating layer 130. The first source-drain conductive layer may include the source electrode SE and drain electrode DE of the thin-film transistor (TFT). The first source-drain conductive layer may also include a first power line (see...). Figure 6C The first layer of 210 (see 210) Figure 6C 212 in the middle) and the second power line (see Figure 6C The first layer of 220 (see 220) Figure 6C (222 in the middle).

[0085] The first via insulating layer VIA1 may be located on a second insulating layer 130 on which the first source / drain conductive layer is located. The first via insulating layer VIA1 may be formed by using organic materials such as photoresist, acrylic resin, polyimide resin, polyamide resin, and siloxane resin.

[0086] The second source / drain conductive layer may be located on the first via insulating layer VIA1. The second source / drain conductive layer may include contact pads CP electrically connected to the thin-film transistor TFT. The second source / drain conductive layer may include a second layer of the first power line (see [reference]). Figure 6C 214 in the middle) and the second layer of the second power line (see 214 in the middle) Figure 6C (224 in the middle).

[0087] The second via insulating layer VIA2 may be located on the first via insulating layer VIA1 on which the second source / drain conductive layer is located. The second via insulating layer VIA2 may be formed by using organic materials such as photoresist, acrylic resin, polyimide resin, polyamide resin, and siloxane resin.

[0088] The light-emitting structure 180 may include a first electrode 181, a light-emitting layer 182, and a second electrode 183.

[0089] The first electrode 181 may be located on the second through-hole insulating layer VIA2. Depending on the light emission scheme of the display device, the first electrode 181 may be formed by using a reflective or transmissive material. According to some example embodiments, the first electrode 181 may have a single-layer structure or a multi-layer structure including a metal film, an alloy film, a metal nitride film, a conductive metal oxide film, and / or a transparent conductive material film.

[0090] A pixel defining layer (PDL) may be located on the second via insulating layer (VIA2) on which the first electrode 181 is located. The PDL may be formed using organic or inorganic materials. For example, it may be formed using photoresist, polyacrylic resin, polyimide resin, acrylic resin, silicone compound, etc. According to some example embodiments, the PDL may be etched to form an opening that partially exposes the first electrode 181. The opening in the PDL may define an emitting region and a non-emitting region of the display device. For example, the portion where the opening of the PDL is located may correspond to the emitting region, and the non-emitting region may correspond to the portion adjacent to the opening of the PDL.

[0091] The spacer SPC can be located on the pixel-defining layer PDL. The spacer SPC maintains the gap between the touchscreen panel layer TSP and the light-emitting structure 180.

[0092] The light-emitting layer 182 may be located on the first electrode 181 exposed through the opening of the pixel-defining layer PDL. Additionally, the light-emitting layer 182 may extend to the sidewall of the opening of the pixel-defining layer PDL. According to some example embodiments, the light-emitting layer 182 may have a multilayer structure including an organic emitting layer, a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. According to some example embodiments, except for the organic emitting layer, the hole injection layer, hole transport layer, electron transport layer, electron injection layer, etc., may be commonly configured to correspond to multiple pixels. The organic emitting layer 182 may be formed using light-emitting materials for generating different colors of light, such as red, green, and blue, according to each pixel of the display device. According to some example embodiments, the organic emitting layer 182 may have a structure that stacks multiple light-emitting materials for emitting white light to achieve different colors of light, such as red, green, and blue. In this case, the above light-emitting structure may be commonly configured to correspond to multiple pixels, and the multiple pixels may be distinguished by a color filter layer.

[0093] The second electrode 183 may be located on the pixel defining layer (PDL) and the light-emitting layer 182. Depending on the light-emitting scheme of the display device, the second electrode 183 may include a transmissive material or a reflective material. According to some example embodiments, the second electrode 183 may have a single-layer structure or a multi-layer structure including a metal film, an alloy film, a metal nitride film, a conductive metal oxide film, and / or a transparent conductive material film.

[0094] A thin-film encapsulation layer 190 may be located on the second electrode 183. The thin-film encapsulation layer 190 prevents or reduces the penetration of moisture, oxygen, or other contaminants from the outside. The thin-film encapsulation layer 190 may include at least one organic layer and at least one inorganic layer. The at least one organic layer and at least one inorganic layer may be stacked alternately on top of each other. According to some example embodiments, the thin-film encapsulation layer 190 may include a first inorganic layer 191, an organic layer 192 located on the first inorganic layer 191, and a second inorganic layer 193 located on the organic layer 192, but embodiments according to this disclosure are not limited thereto.

[0095] The touchscreen panel layer TSP may be located on the thin-film encapsulation layer 190. The touchscreen panel layer TSP may include touch electrodes and an insulating layer, and may be formed directly on the thin-film encapsulation layer 190.

[0096] Figure 5 It is shown Figure 3 A magnified view of area "A" in the image. Figure 6A It is along Figure 5 The cross-sectional view taken by line I-I' in the middle. Figure 6B It is along Figure 5 The cross-sectional view taken by line II-II' in the middle, and Figure 6C It is along Figure 5 The cross-sectional view taken by line III-III' in the figure.

[0097] Reference Figures 3 to 6C The display device may include a base substrate 100, a thin film transistor layer TFTL, a first power line 210, a second power line 220, a first through-hole insulating layer VIA1, a second through-hole insulating layer VIA2, a dam DAM, a thin film encapsulation layer 190, and a touch screen panel layer TSP.

[0098] The thin-film transistor layer (TFTL) may include thin-film transistors (TFTs) and insulating layers (e.g., buffer layer 110, first insulating layer 120, and second insulating layer 130).

[0099] The first power line 210 may include a first layer 212 and a second layer 214. The second power line 220 may include a first layer 222 and a second layer 224. The first layer 212 of the first power line 210 and the first layer 222 of the second power line 220 may be included in a first source-drain conductive layer. The second layer 214 of the first power line 210 and the second layer 224 of the second power line 220 may be included in a second source-drain conductive layer.

[0100] Depending on the presence or absence of the first power line 210 and the second power line 220, the first via insulating layer VIA1 and the second via insulating layer VIA2 may be recessed in the region between the first power line 210 and the second power line 220 than in the portions where the first power line 210 and the second power line 220 are formed. In other words, the height from the base substrate 100 to the upper surface of the second via insulating layer VIA2 may be lower in the region between the first power line 210 and the second power line 220 than in the region overlapping with the first power line 210 or the second power line 220.

[0101] The dam DAM can be formed on the second through-hole insulating layer VIA2. The dam DAM can surround the display area DA of the display device and can overlap with the first power line 210 and the second power line 220. In other words, at the portions of the first power line 210 and the second power line 220 that extend in the second direction D2, the dam DAM can extend in the first direction D1. The dam DAM can be configured to prevent or reduce overflow by controlling the flow of organic material when the organic layer 192 of the thin film encapsulation layer 190 is formed.

[0102] Multiple dams (DAMs) can be arranged in the second direction D2. Although four dams (DAMs) extending in the first direction D1 are shown in the figures as arranged in the second direction D2, the embodiments according to this disclosure are not limited thereto.

[0103] The dam layer DAM may include a first dam layer DM1 and a second dam layer DM2. The first dam layer DM1 may be located in the area overlapping with the first power line 210 and the second power line 220, as well as in the area between the first power line 210 and the second power line 220. For example, the first dam layer DAM1 may be formed on the same layer as the pixel defining layer PDL.

[0104] The second dam layer DM2 may be located on the first dam layer DM1 in the area between the first power line 210 and the second power line 220. Therefore, the dam DM1 may have a first height h1 on the first power line 210 and the second power line 220, and may have a second height h2 greater than the first height h1 between the first power line 210 and the second power line 220. The two ends of the second dam layer DM2 of the dam DM1 may overlap with the first power line 210 and the second power line 220.

[0105] For example, the second dam layer DM2 can be formed on the same layer as the spacer SPC. According to some example embodiments, the dam DAM can be formed on one layer as comprising two parts with different heights by using a halftone mask or the like.

[0106] Figure 7 This is a cross-sectional view showing a display device according to some example embodiments.

[0107] Reference Figure 7 Except that the second dam layer DM2 is formed only between the first power line 210 and the second power line 220 so that the two ends of the second dam layer DM2 of the dam DAM do not overlap with the first power line 210 and the second power line 220, the display device and Figure 6C The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0108] Figure 8 This is a partial magnified view showing a display device according to some example embodiments. Figure 9A It is along Figure 8 The cross-sectional view taken by line I-I' in the middle, and Figure 9B It is along Figure 8 The cross-sectional view taken from line II-II' in the diagram.

[0109] Reference Figures 8 to 9B Besides forming the recessed VV portion, the display device and Figures 4 to 6C The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0110] The display device may include a base substrate 100, a thin-film transistor layer (TFTL), a first source / drain conductive layer, a first through-hole insulating layer (VIA1), a second source / drain conductive layer, a second through-hole insulating layer (VIA2), a thin-film encapsulation layer 190, and a touch screen panel layer (TSP). The first source / drain conductive layer may include a first layer 212 of a first power line 210 and a first layer 222 of a second power line 220. The second source / drain conductive layer may include a second layer 214 of the first power line 210 and a second layer 224 of the second power line 220. The thin-film encapsulation layer 190 may include a first inorganic layer 191, an organic layer 192, and a second inorganic layer 193.

[0111] The recessed portion VV can be formed in the second through-hole insulating layer VIA2. The recessed portion VV can be formed between the first power line 210 and the second power line 220.

[0112] The recessed portion VV may include a first portion VV1 that overlaps at least partially with the first power line 210 and a second portion VV2 that overlaps at least partially with the second power line 220.

[0113] The first portion VV1 and the second portion VV2 of the recessed portion VV can extend in directions inclined relative to the first direction D1 and the second direction D2, respectively. In other words, as Figure 8 As shown, the first part VV1 can extend obliquely to the lower left, and the second part VV2 can extend obliquely to the lower right.

[0114] The recessed portion VV may also include a third portion VV3, which is configured to connect the first portion VV1 to the second portion VV2 and extend in the first direction D1.

[0115] In the recessed portion VV, all or part of the first through-hole insulating layer VIA1 or the second through-hole insulating layer VIA2 may not be formed. According to some example embodiments, the first through-hole insulating layer VIA1 may not be formed in the recessed portion VV by a patterning process.

[0116] Therefore, the height from the upper surface of the thin film transistor layer TFTL to the upper surface of the second through-hole insulating layer VIA2, where the recessed portion VV is formed, can be lower in the region between the first power line 210 and the second power line 220 than in the region overlapping with the first power line 210 or the second power line 220.

[0117] Additionally, according to some example embodiments, the display device may also include, for example, Figure 5 The dam DAM in the display device.

[0118] Figure 10 This is a cross-sectional view showing a display device according to some example embodiments.

[0119] Reference Figure 10 Except for removing the second via insulating layer VIA2 in the recessed portion VV by patterning instead of removing the first via insulating layer VIA1 by patterning, the display device and Figure 9A The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0120] Figure 11 This is a cross-sectional view showing a display device according to some example embodiments.

[0121] Reference Figure 11 Besides removing the first through-hole insulating layer VIA1 and the second through-hole insulating layer VIA2 by patterning in the recessed portion VV, the display device and Figure 9A The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0122] Figure 12 This is a partial magnified view showing a display device according to some example embodiments.

[0123] Reference Figure 12 Except for the recessed portion VV which does not include the third portion, and the first portion VV1 and the second portion VV2 which are directly connected to each other to form a V-shape as a whole, the display device and Figure 8 The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0124] Figure 13 This is a partial magnified view showing a display device according to some example embodiments.

[0125] Reference Figure 13 Apart from the VV shape of the recessed portion, the display device and Figure 8 The display devices are essentially the same. Therefore, some redundant descriptions can be omitted.

[0126] The recessed portion VV can extend in the second direction D2 between the first power line 210 and the second power line 220.

[0127] Figures 14A to 14C This is a cross-sectional view illustrating a method of manufacturing a display device according to some example embodiments.

[0128] Reference Figure 14A A thin-film transistor layer (TFTL), a first source / drain conductive layer, a first via insulating layer (VIA1), a second source / drain conductive layer, and a second via insulating layer (VIA2) can be formed on the base substrate 100. Then, a dam layer (DAM) can be formed by forming a first dam layer (DM1) and a second dam layer (DM2). Afterward, a first inorganic layer 191 of the thin-film encapsulation layer 190 can be formed.

[0129] Reference Figure 14B An organic layer 192 may be formed on the first inorganic layer 191. The organic layer 192 may be formed from a monomer that is an organic compound. For example, the organic layer 192 may include methacrylates, acrylates, epoxy resins, etc. Liquid monomers may be formed by printing processes, etc. In this case, the printing process may include inkjet printing, screen printing, gravure printing, offset printing, flexographic printing, etc., but embodiments according to this disclosure are not limited thereto.

[0130] In this scenario, the liquid monomer can flow and disperse in the direction of the arrow in the diagram. Excessive flow can then be controlled via a dam DAM. For example, the dam DAM can be connected to the first power line (see...). Figure 5 210 in the middle) and the second power line (see Figure 5The layers (220) overlap, having a first height on the first power line and a second height greater than the first height between the first and second power lines. Therefore, when flow is concentrated in a region with a relatively low height on the upper surface of the second through-hole insulation layer VIA2 between the first and second power lines, monomer overflow outside the desired location is prevented. Thereafter, the monomer can be cured to form the organic layer 192.

[0131] Reference Figure 14C A second inorganic layer 193 can be formed on the organic layer 192. Then, a touchscreen panel layer TSP including touch electrodes can be formed on the second inorganic layer 193. For example, after the touch electrodes are directly formed on the second inorganic layer 193 by a deposition process, an insulating layer can be formed to form the touchscreen panel layer TSP. In this case, because the organic layer 192 is uniformly formed by dammed DAM, the spacing between the touchscreen panel layer TSP and the thin-film transistor layer TFTL, as well as the first and second source / drain conductive layers, can be uniformly maintained. This makes it easy to control the parasitic capacitance between the touchscreen panel layer TSP and other conductive patterns, and easily ensures the uniformity of the surface on which the touchscreen panel layer TSP is formed.

[0132] Figure 15 It is shown Figure 5 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device. Figure 16 It is shown Figure 8 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device. Figure 17 It is shown Figure 12 A flow diagram of the organic layer in the thin-film encapsulation layer of the display device, and Figure 18 It is shown Figure 13 A diagram showing the flow of the organic layer in the thin-film encapsulation layer of a display device.

[0133] Reference Figures 15 to 18 It can be seen that, due to the dam DAM or the recessed portion VV, the flow of the organic layer is not concentrated in the area with a relatively low height on the upper surface of the second through-hole insulation layer between the first power line 210 and the second power line 220, but is dispersed to the periphery, thus preventing the organic layer from overflowing outside the desired location.

[0134] On the other hand, when the dam DAM or recessed portion VV is not formed, the flow will concentrate in the area between the first power line 210 and the second power line 220 due to the step difference, which may cause the organic layer to overflow. When such a problem occurs, the organic layer will not form uniformly, making it difficult to form the touch screen panel layer uniformly. It may also be difficult to control the parasitic capacitance of the touch screen panel layer, and moisture and other substances can penetrate into the light-emitting layer in the display area through the overflowed organic layer, thereby damaging the light-emitting layer.

[0135] Figure 19 This is a block diagram illustrating an electronic device according to some example embodiments. Figure 20A It is shown Figure 19 The electronic device is implemented as an example diagram of a television, and Figure 20B It is shown Figure 19 The diagram shows an example of an electronic device implemented as a smartphone.

[0136] Reference Figures 19 to 20B Electronic device 500 may include processor 510, memory device 520, storage device 530, input / output (I / O) device 540, power supply 550, and display device 560. Here, display device 560 may be… Figure 1 The display device. Additionally, the electronic device 500 may also include multiple ports for communicating with video cards, sound cards, memory cards, universal serial bus (USB) devices, other electronic devices, etc. According to some example embodiments, such as... Figure 20A As shown, the electronic device 500 can be implemented as a television. According to some example embodiments, such as... Figure 20B As shown, electronic device 500 can be implemented as a smartphone. However, electronic device 500 is not limited to this. For example, electronic device 500 can be implemented as a cellular phone, video phone, smartboard, smartwatch, tablet PC, car navigation system, computer monitor, laptop computer, head-mounted display (HMD) device, etc.

[0137] Processor 510 can perform various computing functions. Processor 510 can be a microprocessor, central processing unit (CPU), application processor (AP), etc. Processor 510 can be connected to other components via address bus, control bus, data bus, etc. In addition, processor 510 can be connected to an expansion bus such as the peripheral component interconnect (PCI) bus. Memory device 520 can store data for the operation of electronic device 500. For example, memory device 520 may include: at least one non-volatile memory device, such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase-change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano-floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device, etc.; and / or at least one volatile memory device, such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, a mobile DRAM device, etc. Storage device 530 may include solid-state drive (SSD) devices, hard disk drive (HDD) devices, CD-ROM devices, etc. I / O device 540 may include: input devices such as keyboards, keypads, mice, touchpads, touchscreens, etc.; and output devices such as printers, speakers, etc. Power supply 550 provides power for the operation of electronic device 500.

[0138] Display device 560 can be connected to other components via a bus or other communication link. According to some example embodiments, I / O device 540 may include display device 560. As described above, display device 560 includes a dam overlapping a first power line and a second power line, having a first height on the first power line and a second height greater than the first height between the first and second power lines, or display device 560 includes an insulating layer having a recessed portion formed between the first and second power lines. Therefore, an organic layer of the thin-film encapsulation layer can be uniformly formed, thereby improving display quality and the quality of the touchscreen panel layer. Because certain characteristics have been described above, certain repetitive descriptions associated with them are omitted.

[0139] Several aspects of some exemplary embodiments of the present invention can be applied to display devices and electronic devices including display devices. For example, embodiments of the present invention can be applied to smartphones, cellular phones, video phones, smart panels, smartwatches, tablet PCs, car navigation systems, televisions, computer monitors, laptop computers, head-mounted display devices, etc.

[0140] The foregoing is illustrative of some exemplary embodiments and is not to be construed as limiting thereto. Although various aspects of some exemplary embodiments have been described, those skilled in the art will readily recognize that many modifications are possible in the embodiments without substantially departing from the novel teachings and characteristics of the embodiments according to the inventive concept. Therefore, all such modifications are intended to be included within the scope of the inventive concept as defined in the claims. It will therefore be understood that the foregoing is illustrative of various exemplary embodiments and is not to be construed as limiting to the specific exemplary embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the appended claims and their equivalents.

Claims

1. A display device, comprising: A base substrate, comprising a display area and a non-display area adjacent to the display area; A first power line is located in the non-display area, and a first power voltage is applied to the first power line. A second power line is located in the non-display area and spaced apart from the first power line, and a second power voltage is applied to the second power line; as well as A dam, located on the insulation layer to overlap with the first power line and the second power line, has a first height on the first power line and a second height greater than the first height between the first power line and the second power line.

2. The display device according to claim 1, wherein, The dam comprises a first dam layer and a second dam layer located on the first dam layer. The first dam layer is formed between the first power line and the second power line, and is formed on both the first power line and the second power line. The second dam layer is formed between the first power line and the second power line.

3. The display device according to claim 2, wherein, The two ends of the second dam layer of the dam overlap with the first power line and the second power line.

4. The display device according to claim 2, further comprising: A pixel defining layer is located on the base substrate to define an opening; The light-emitting layer is located in the opening; as well as A thin-film encapsulation layer is located on the light-emitting layer. The first dam layer of the dam and the pixel limiting layer are located on the same layer.

5. The display device according to claim 4, further comprising: Spacers are located on the pixel defining layer. The second dam layer of the dam is located on the same layer as the spacer.

6. The display device according to claim 1, wherein, The insulating layer includes: Through-hole insulation layer, located on the first power line and the second power line. The height from the base substrate to the upper surface of the via insulating layer is lower in the region between the first power line and the second power line than in the region overlapping with the first power line or the second power line.

7. The display device according to claim 1, wherein, Each of the first power line and the second power line includes at least two conductive layers, and an insulating layer is interposed between the conductive layers.

8. The display device according to claim 1, further comprising: The first inorganic layer is located on the dam; An organic layer is located on the first inorganic layer; as well as The second inorganic layer is located on the organic layer.

9. The display device according to claim 1, wherein, The insulating layer includes: The through-hole insulating layer has a recessed portion located between the first power line and the second power line.

10. The display device according to claim 1, further comprising: A thin-film transistor layer, located on the base substrate and comprising thin-film transistors; A light-emitting structure electrically connected to the thin-film transistor; A thin-film encapsulation layer covers the light-emitting structure; as well as A touchscreen panel layer is located on the thin-film encapsulation layer to detect user touch input.

11. The display device according to claim 6 or 9, wherein, The through-hole insulating layer includes a first through-hole insulating layer and a second through-hole insulating layer located on the first through-hole insulating layer. The dam is located on the second through-hole insulation layer.

12. The display device according to claim 1, wherein, The first power line is supplied with a first power supply voltage, ELVDD. The second power line is supplied with a second power supply voltage, ELVSS.

13. A display device, comprising: A base substrate, comprising a display area and a non-display area adjacent to the display area; A first power line is located in the non-display area, and a first power voltage is applied to the first power line. A second power line is located in the non-display area and spaced apart from the first power line, and a second power voltage is applied to the second power line; as well as The insulating layer has a recessed portion located between the first power line and the second power line. The recessed portion includes a first portion that at least partially overlaps with the first power line and a second portion that at least partially overlaps with the second power line.

14. The display device according to claim 13, wherein, The first power line and the second power line are spaced apart from each other in a first direction and extend in a second direction perpendicular to the first direction. The first and second portions of the recessed portion extend in directions inclined relative to the first and second directions, respectively.

15. The display device according to claim 13, wherein, The first power line and the second power line are spaced apart from each other in a first direction and extend in a second direction perpendicular to the first direction. The recessed portion extends in the second direction between the first power line and the second power line.

16. The display device according to claim 13, further comprising: A thin-film transistor layer, located on the base substrate and comprising thin-film transistors, The height from the upper surface of the thin-film transistor layer to the upper surface of the insulating layer where the recessed portion is formed is lower in the region between the first power line and the second power line than in the region overlapping with the first power line or the second power line.

17. The display device according to claim 13, wherein, The insulating layer includes: First through-hole insulating layer; and The second through-hole insulating layer is located on the first through-hole insulating layer, and Wherein, neither the first through-hole insulating layer nor the second through-hole insulating layer is formed in the recessed portion.

18. The display device according to claim 13, further comprising: The first inorganic layer is located on the insulating layer; An organic layer is located on the first inorganic layer; as well as The second inorganic layer is located on the organic layer.

19. The display device according to claim 13, further comprising: A thin-film transistor layer, located on the base substrate and comprising thin-film transistors; A light-emitting structure electrically connected to the thin-film transistor; A thin-film encapsulation layer covers the light-emitting structure; as well as A touchscreen panel layer is located on the thin-film encapsulation layer to detect user touch input.

20. The display device according to claim 13, further comprising: A dam is located on the insulation layer to overlap with the first power line and the second power line.

21. The display device according to claim 20, wherein, The dam has a first height on the first power line and a second height greater than the first height between the first power line and the second power line.

22. The display device according to claim 13, wherein, The first power line is supplied with a first power supply voltage, ELVDD. The second power line is supplied with a second power supply voltage, ELVSS.

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