Gamma reference voltage output circuit for display device

Abstract

The present embodiment relates to a gamma reference voltage output circuit of a display device, and more particularly, to a gamma reference voltage output circuit having a structure for sharing elements required for outputting a gamma reference voltage in gamma reference voltage output circuits included in respective driver chips of a plurality of driver chips.

Description

Technical Field

[0001] The present embodiment relates to a gamma reference voltage output circuit of a display device. Background Art

[0002] As the information society develops, the demand for products requiring display devices continues to grow. Recently, various types of display devices such as liquid crystal display devices, plasma display devices, and organic light emitting diode display devices have been used.

[0003] Since the display device is thin and light, it is easy to miniaturize the display device, and the display device has a low driving voltage and power consumption and can achieve image quality close to that of a cathode ray tube. Therefore, small and medium-sized display devices such as mobile communication terminals, monitors, and notebook computers are currently widely used. Here, in the small and medium-sized display devices, a driving device for driving a display panel is configured as a chip and mounted to the display panel. Recently, the increase in the size and resolution of the display panel has led to an increase in the number of display panels equipped with multiple driving chips.

[0004] As described above, a display panel mounted with a plurality of driving chips has a problem in that display quality may be degraded depending on output deviations between the driving chips. Summary of the invention

[0005] In this context, an aspect of the present embodiment is to provide a technology for eliminating output deviations between driving chips in a display panel on which a plurality of driving chips are mounted.

[0006] In view of the above situation, an embodiment provides a gamma reference voltage output circuit of a display device, the gamma reference voltage output circuit comprising: a first gamma reference voltage output circuit, which comprises a one-side gamma buffer circuit and a one-side gamma reference voltage generating circuit, the one-side gamma buffer circuit is configured to receive M one-side voltage divisions and output M one-side buffer voltages, M is a natural number, the one-side gamma reference voltage generating circuit is configured to use the M one-side buffer voltages and the first one-side gamma reference voltage to generate a second one-side gamma reference voltage to an N-1th one-side gamma reference voltage, N is a natural number greater than M; a buffer voltage relay circuit, one end of which is connected to the output side of the one-side gamma buffer circuit and is configured to transmit the M one-side buffer voltages to its other end; and a second gamma reference voltage output circuit, which includes an opposite-side gamma reference voltage generating circuit, the opposite-side gamma reference voltage generating circuit is connected to the other end of the buffer voltage relay circuit, and the opposite-side gamma reference voltage generating circuit is configured to receive the M one-side buffer voltages and use the M one-side buffer voltages and the first opposite-side gamma reference voltage to generate a second opposite-side gamma reference voltage to the N-1th opposite-side gamma reference voltage.

[0007] The first gamma reference voltage output circuit may further include a one-side power input circuit configured to output the first one-side gamma reference voltage, the N-th one-side gamma reference voltage, and the M one-side divided voltages, and the second gamma reference voltage output circuit may further include an opposite-side power input circuit configured to output a first opposite-side gamma reference voltage corresponding to the first one-side gamma reference voltage and an N-th opposite-side gamma reference voltage corresponding to the N-th one-side gamma reference voltage in a state electrically isolated from the one-side power input circuit. The one-side power input circuit may include: a first one-side input buffer configured to receive a first input voltage and output the first one-side gamma reference voltage; a first one-side line having one end connected to an output end of the first one-side input buffer; a second one-side input buffer configured to receive a second input voltage and output the N-th one-side gamma reference voltage; a second one-side line having one end connected to an output end of the second one-side input buffer; and a first one-side resistor array configured to receive the first one-side gamma reference voltage from the first one-side line and generate the M one-side divided voltages.

[0008] The opposite side power input circuit may include: a first opposite side input buffer, which is configured to receive a third input voltage and output the first opposite side gamma reference voltage; a first opposite side line, one end of which is connected to the output end of the first opposite side input buffer; a second opposite side input buffer, which is configured to receive a fourth input voltage and output the Nth opposite side gamma reference voltage; and a second opposite side line, one end of which is connected to the output end of the second opposite side input buffer.

[0009] The other end of the first side line and the other end of the first pair of side lines can be electrically isolated from each other, and the other end of the second side line and the other end of the second pair of side lines can also be electrically isolated from each other. The first input voltage and the third input voltage can be adjusted so that the first pair of side gamma reference voltage and the first side gamma reference voltage are consistent with each other, and the second input voltage and the fourth input voltage can be adjusted so that the Nth pair of side gamma reference voltage and the Nth side gamma reference voltage are consistent with each other.

[0010] Another embodiment provides a gamma reference voltage output circuit of a display device, the gamma reference voltage output circuit comprising: a first gamma reference voltage output circuit, which includes a one-side gamma buffer circuit and a one-side gamma reference voltage generation circuit, the one-side gamma buffer circuit is configured to receive M one-side divided voltages, buffer the M one-side divided voltages and output M one-side buffered voltages, M is a natural number, the one-side gamma reference voltage generation circuit is configured to use the M one-side buffered voltages and the first one-side gamma reference voltage to generate a second one-side gamma reference voltage to an N-1th one-side gamma reference voltage, N is a natural number greater than M; a voltage-dividing relay circuit, one end of which is connected to the An output side of a one-side gamma buffer circuit, and is configured to transmit the M one-side divided voltages to its other end; and a second gamma reference voltage output circuit, which includes an opposite-side gamma buffer circuit and an opposite-side gamma reference voltage generating circuit, the input side of the opposite-side gamma buffer circuit is connected to the other end of the voltage-dividing relay circuit, the opposite-side gamma buffer circuit is configured to receive the M one-side divided voltages, buffer the M one-side divided voltages and output M opposite-side buffered voltages, and the opposite-side gamma reference voltage generating circuit is configured to use the M opposite-side buffer voltages and the first opposite-side gamma reference voltage to generate a second opposite-side gamma reference voltage to the N-1th opposite-side gamma reference voltage.

[0011] The first gamma reference voltage output circuit may further include a one-side power input circuit configured to output the first one-side gamma reference voltage, the N-th one-side gamma reference voltage, and the M one-side divided voltages, and the second gamma reference voltage output circuit may further include an opposite-side power input circuit configured to output a first opposite-side gamma reference voltage corresponding to the first one-side gamma reference voltage and an N-th opposite-side gamma reference voltage corresponding to the N-th one-side gamma reference voltage in a state electrically isolated from the one-side power input circuit. The gamma reference voltage output circuit may further include a buffer voltage relay circuit having one end connected to the output side of the one-side gamma buffer circuit and the other end connected to the opposite-side gamma reference voltage generating circuit, the buffer voltage relay circuit configured to transmit the M one-side buffer voltages to the opposite-side gamma reference voltage generating circuit.

[0012] The voltage-dividing relay circuit and the buffer voltage relay circuit may each include a switch, and in the event that any one of the switch of the voltage-dividing relay circuit and the switch of the buffer voltage relay circuit is turned on, the other one remains turned off.

[0013] When the switch of the voltage-divider relay circuit is turned on and the switch of the buffer voltage relay circuit is turned off, the opposite-side gamma buffer circuit can receive the M one-side voltage dividers from the voltage-divider relay circuit and can output the M one-side voltage dividers as the M opposite-side buffer voltages, and the opposite-side gamma reference voltage generating circuit can use the M opposite-side buffer voltages and the first opposite-side gamma reference voltage to generate the second opposite-side gamma reference voltage to the N-1th opposite-side gamma reference voltage.

[0014] When the switch of the buffer voltage relay circuit is turned on and the switch of the voltage divider relay circuit is turned off, the opposite side gamma reference voltage generating circuit can receive the M one-side buffer voltages from the buffer voltage relay circuit, and can use the M one-side buffer voltages and the first opposite side gamma reference voltage to generate the second opposite side gamma reference voltage to the N-1th opposite side gamma reference voltage.

[0015] Another embodiment provides a gamma reference voltage output circuit of a display device, the gamma reference voltage output circuit comprising: a first gamma reference voltage output circuit, which includes a one-side power input circuit, a one-side gamma buffer circuit and a one-side gamma reference voltage generation circuit, the one-side power input circuit is configured to output a first one-side reference voltage and M+2 one-side divided voltages, M is a natural number, the one-side gamma buffer circuit is configured to receive the M+2 one-side divided voltages and output M+2 one-side buffered voltages, the one-side gamma reference voltage generation circuit is configured to use the M+2 one-side buffered voltages and the first one-side reference voltage to generate a first one-side gamma reference voltage to an N-th one-side gamma reference voltage, N is a natural number greater than M; A one-side voltage relay circuit, one end of which is respectively connected to the output side of the one-side power input circuit and the output side of the one-side gamma buffer circuit, and is configured to transmit the first one-side reference voltage and the M+2 one-side buffer voltages to its other end; and a second gamma reference voltage output circuit, which includes an opposite-side gamma reference voltage generating circuit, the opposite-side gamma reference voltage generating circuit is connected to the other end of the one-side voltage relay circuit, and the opposite-side gamma reference voltage generating circuit is configured to receive the first one-side reference voltage and the M+2 one-side buffer voltages, and use the M+2 one-side buffer voltages and the first one-side reference voltage to generate a first opposite-side gamma reference voltage to an Nth opposite-side gamma reference voltage.

[0016] The one-side power input circuit may include: a first one-side input buffer, which is configured to receive a first voltage and output the first one-side reference voltage; a first one-side line, one end of which is connected to the output end of the first one-side input buffer; and a first one-side resistor array, which is configured to receive the first one-side reference voltage from the first one-side line and generate the M+2 one-side voltage dividers.

[0017] The one-side gamma buffer circuit may include M+2 one-side gamma buffers, and the one-side voltage relay circuit may include: M+3 one-side internal lines, one ends of which are respectively connected to the first one-side line and the output side of the M+2 one-side gamma buffers, and a one-side connection pad is provided at the other end; M+3 opposite-side internal lines, one end of which is connected to the input side of the opposite-side gamma reference voltage generating circuit, and an opposite-side connection pad is provided at the other end; and M+3 connecting lines, one end of which is connected to each of the M+3 one-side connection pads and the other end is connected to each of the M+3 opposite-side connection pads.

[0018] As described above, according to the present embodiment, the deviation of the gamma reference voltage between the driving chips, which causes the output deviation between the driving chips, can be eliminated, thereby improving the display quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other aspects, features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a block diagram of a display device according to an embodiment;

[0021] Figure 2 is a block diagram of a gamma reference voltage output circuit according to a first embodiment;

[0022] Figure 3 is a block diagram of a gamma reference voltage output circuit according to a second embodiment;

[0023] Figure 4 is a block diagram of a gamma reference voltage output circuit according to a third embodiment; and

[0024] Figure 5 is a block diagram of a gamma reference voltage output circuit according to a fourth embodiment. DETAILED DESCRIPTION

[0025] Figure 1 is a block diagram of a display device according to an embodiment.

[0026] refer to Figure 1The display device may include a panel 1, a data driving device 2, a gate driving device 3, a timing control device 4, and the like.

[0027] The panel 1 may have a plurality of data lines DL and a plurality of gate lines GL arranged thereon, and may have a plurality of sub-pixels in a matrix form. Each sub-pixel may be connected to the data line DL according to a scan signal supplied to the gate line GL. In addition, the brightness of each sub-pixel may be adjusted according to a data voltage supplied to the data line DL.

[0028] Panel 1 may be an LCD (liquid crystal display) panel, an OLED (organic light emitting diode) panel, or other types of panels. In the case where panel 1 is an OLED panel, the OLED may be arranged in each sub-pixel, and a plurality of transistors connected to the OLED may be arranged. The gate line GL and the data line DL may be connected to the transistors arranged in each sub-pixel. If a scan signal indicating conduction is supplied to the gate line GL, one of the plurality of transistors may be turned on, and the data line DL may be connected to the gate of another transistor. In addition, the magnitude of the current flowing through the other transistor may be adjusted according to the magnitude of the data voltage supplied to the data line DL, thereby adjusting the brightness of the OLED.

[0029] The gate driving device 3 may supply a scan signal to the gate line GL, and the data driving device 2 may supply a data voltage to the data line DL. The gate driving device 3 and the data driving device 2 may receive a control signal or a synchronization signal from the timing control device 4, and may determine the driving timing of each sub-pixel according to the control signal or the synchronization signal.

[0030] The timing control device 4 may send the image data RGB indicating the grayscale value of each sub-pixel to the data driving device 2. The timing control device 4 may receive the image data RGB from an external device, may convert the image data RGB into a form that complies with the data driving device 2, and may send the image data RGB. In the case where the panel 1 is an OLED panel, the timing control device 4 may detect a change in the characteristics of each sub-pixel of the OLED panel, may convert the image data RGB to compensate for the characteristic change, and may send it to the data driving device 2.

[0031] The data driving device 2 may extract pixel image data of each sub-pixel from the image data RGB, may generate a data voltage according to the pixel image data, and may supply the generated data voltage to a data line (DL) connected to each sub-pixel.

[0032] If the panel is larger than a certain size, the data driving device 2 may include two or more driving chips. For example, the data driving device 2 may include a first driving chip 10 for supplying a data voltage to a side area of ​​the panel (1) and a second driving chip 20 for supplying a data voltage to an opposite side area of ​​the panel (1). In the case where the data driving device 2 includes the first driving chip 10 and the second driving chip 20, each of the first driving chip 10 and the second driving chip 20 may include a channel circuit and a gamma reference voltage output circuit.

[0033] In other words, the first driver chip 10 may include a first channel circuit 12 and a first gamma reference voltage output circuit 100, and the second driver chip 20 may include a second channel circuit 22 and a second gamma reference voltage output circuit 200. In addition, the first driver chip 10 and the second driver chip 20 may each further include a data processing circuit (not shown) that receives image data from the timing control device 4 and extracts pixel image data (pRGB) from the image data.

[0034] On the other hand, the first channel circuit 12 may include a plurality of channel circuits for outputting data voltages in one side region, and the second channel circuit 22 may include a plurality of channel circuits for outputting data voltages in an opposite side region.

[0035] Here, one channel circuit may include a shift register, a latch, a digital-to-analog converter (DAC), an output buffer, and the like.

[0036] The pixel image data (pRGB) extracted by the data processing circuit (not shown) can be temporarily stored in the latch (LT) by the shift register (SR), and then can be converted into an analog data voltage (Vdata) in the DAC. In addition, the data voltage (Vdata) can be output to the data line through the output buffer (BF).

[0037] In an embodiment, the DAC may receive a plurality of gamma voltages from any one of the gamma reference voltage output circuits 100 or 200. In addition, the DAC may generate a data voltage (Vdata) by selecting one of the plurality of gamma voltages according to pixel image data (pRGB).

[0038] The DAC may include a switch array. Here, the switch array may include a plurality of switches, and the plurality of switches may be connected to output lines OL of any one of the gamma reference voltage output circuits 100 or 200. The number of output lines OL may be the same as the number of gamma reference voltages output from any one of the gamma reference voltage output circuits 100 or 200. For example, if the gamma reference voltage includes the first gamma reference voltage to the 1024th gamma reference voltage, the number of output lines OL may be 1024.

[0039] In this case, the switch array may receive the first to 1024th gamma reference voltages through the output line OL, and may select any one of the first to 1024th gamma reference voltages according to the grayscale value of the previously input pixel image data (pRGB), thereby outputting a data voltage.

[0040] In one embodiment, the first gamma reference voltage output circuit 100 and the second gamma reference voltage output circuit 200 respectively included in the first driver chip 10 and the second driver chip 20 may share components required to output gamma reference voltages, thereby eliminating output deviations between gamma reference voltages.

[0041] Its detailed description is as follows.

[0042] Figure 2 is a block diagram of a gamma reference voltage output circuit according to the first embodiment.

[0043] refer to Figure 2 According to the first embodiment, the gamma reference voltage output circuit may include: a first gamma reference voltage output circuit 100, which is included in the first driving chip 10; a second gamma reference voltage output circuit 200, which is included in the second driving chip 20; and a buffer voltage relay circuit 310, which is used to electrically connect the first gamma reference voltage output circuit 100 with the second gamma reference voltage output circuit 200. In the first embodiment, the first gamma reference voltage output circuit 100 may include a one-side power input circuit 112, a one-side gamma buffer circuit 122, and a one-side gamma reference voltage generating circuit 132.

[0044] The one-side power input circuit 112 may output a first one-side gamma reference voltage, an N-th one-side gamma reference voltage, and M one-side divided voltages.

[0045] The one-side power input circuit 112 may include: a first one-side input buffer 112a, for receiving a first input voltage Vin1 and outputting a first one-side gamma reference voltage V1; a first one-side line 112b, one end of which is connected to the output end of the first one-side input buffer 112a; a second one-side input buffer 112c, for receiving a second input voltage Vin2 and outputting an N-th one-side gamma reference voltage (e.g., V1024); a second one-side line 112d, which is connected to the output end of the second one-side input buffer 112c; and a first one-side resistor array 112e, for receiving the first one-side gamma reference voltage V1 from the first one-side line 112b and generating M one-side voltage dividers (e.g., Vd1 to Vd7).

[0046] In an embodiment, although for ease of explanation the description will be based on the situation where the first one side resistor array 112e receives the first one side gamma reference voltage V1, in actual application of this embodiment, the first one side resistor array 112e can receive the Nth one side gamma reference voltage (for example, V1024) from the second one side line 112d, and can generate M one side voltage dividers.

[0047] One end of the first one-side resistor array 112e may be connected to the first one-side wire 112b, and the other end thereof may be connected to the second one-side wire 112d. In addition, nodes may be formed in some of the plurality of resistors constituting the first one-side resistor array 112e, and M one-side voltage divisions may be output through the nodes. Here, the resistors constituting the first one-side resistor array 112e may have substantially the same resistance value.

[0048] The one-sided gamma buffer circuit 122 may receive M one-sided divided voltages generated by the first one-sided resistor array 112e and may buffer the M one-sided divided voltages to output M one-sided buffered voltages. The one-sided gamma buffer circuit 122 may include M one-sided gamma buffers.

[0049] The one-side gamma reference voltage generating circuit 132 may include a plurality of resistors connected in series to each other, and may use the plurality of resistors to separate the first one-side gamma reference voltage from the M one-side buffer voltages, thereby generating the second one-side gamma reference voltage to the N-1th one-side gamma reference voltage. That is, the one-side gamma reference voltage generating circuit 132 may use the first one-side gamma reference voltage and the M one-side buffer voltages to generate the second one-side gamma reference voltage to the N-1th one-side gamma reference voltage.

[0050] Here, one end of the one-side gamma reference voltage generating circuit 132 may be connected to the first one-side line 112 b, and the other end thereof may be connected to the second one-side line 112 d. In addition, the one-side buffer voltage output from the one-side gamma buffer circuit 122 may be input to a node formed in some of the plurality of resistors constituting the one-side gamma reference voltage generating circuit 132.

[0051] The output line OL of the first gamma reference voltage output circuit 100 can be supplied to multiple switch arrays included in the first channel circuit 12: the second one-side gamma reference voltage to the N-1th one-side gamma reference voltage generated by the one-side gamma reference voltage generation circuit 132, and the first one-side gamma reference voltage and the Nth one-side gamma reference voltage output from the one-side power input circuit 112.

[0052] The second gamma reference voltage output circuit 200 may include an opposite-side power input circuit 212 and an opposite-side gamma reference voltage generating circuit 232 .

[0053] The opposite side power input circuit 212 can output the first opposite side gamma reference voltage and the Nth opposite side gamma reference voltage in a state electrically isolated from the one side power input circuit 112. Here, the first opposite side gamma reference voltage can correspond to the first one side gamma reference voltage, and the Nth opposite side gamma reference voltage can correspond to the Nth one side gamma reference voltage. In other words, the value of the first opposite side gamma reference voltage can be the same as the value of the first one side gamma reference voltage, or the deviation therebetween can be very small. In addition, the value of the Nth opposite side gamma reference voltage can also be the same as the value of the Nth one side gamma reference voltage, or the deviation therebetween can be very small.

[0054] The opposite side power input circuit 212 may include: a first opposite side input buffer 212a, for receiving a third input voltage Vin3 and outputting a first opposite side gamma reference voltage V1'; a first opposite side line 212b, one end of which is connected to the output end of the first opposite side input buffer 212a; a second opposite side input buffer 212c, for receiving a fourth input voltage Vin4 and outputting an Nth opposite side gamma reference voltage (e.g., V1024'); and a second opposite side line 212d, which is connected to the output end of the second opposite side input buffer 212c. Here, the other end of the first side line 112b and the other end of the first side line 212b may be electrically isolated from each other, and the other end of the second side line 112d and the other end of the second side line 212d may also be electrically isolated from each other.

[0055] On the other hand, the opposite-side power input circuit 212 may further include a first opposite-side resistor array 212 e including a plurality of resistors connected in series to each other.

[0056] The opposite side gamma reference voltage generating circuit 232 may include a plurality of resistors connected in series to each other, and may use resistors to separate a first opposite side gamma reference voltage from M one-side buffer voltages input through a buffer voltage relay circuit 310 (which will be described later), thereby generating a second opposite side gamma reference voltage to an N-1th opposite side gamma reference voltage.

[0057] Here, one end of the opposite-side gamma reference voltage generating circuit 232 may be connected to the first opposite-side line 212 b , and the other end thereof may be connected to the second opposite-side line 212 d .

[0058] In addition, the one-side buffer voltage input through the buffer voltage relay circuit 310 may be input to nodes formed in some of the plurality of resistors constituting the opposite-side gamma reference voltage generating circuit 232. The resistance value of each of the plurality of resistors constituting the opposite-side gamma reference voltage generating circuit 232 may be the same as the resistance value of each of the plurality of resistors constituting the one-side gamma reference voltage generating circuit 132.

[0059] The output line OL of the second gamma reference voltage output circuit 200 can be supplied to multiple switch arrays included in the second channel circuit 22: the second opposite side gamma reference voltage generated by the opposite side gamma reference voltage generation circuit 232 to the N-1th opposite side gamma reference voltage, and the first opposite side gamma reference voltage and the Nth opposite side gamma reference voltage output from the opposite side power input circuit 212.

[0060] On the other hand, the second gamma reference voltage output circuit 200 may further include a contra-side gamma buffer circuit 222 including M contra-side gamma buffers having input terminals distributedly connected to the first contra-side resistor array 212 e .

[0061] If the second gamma reference voltage output circuit 200 also includes an opposite gamma buffer circuit 222, the output side of the opposite gamma buffer circuit 222 may not be electrically connected to the opposite gamma reference voltage generating circuit 232, or power may not be supplied to the opposite gamma buffer circuit 222 (i.e., M opposite gamma buffers).

[0062] This is because the opposite side gamma reference voltage generating circuit 232 uses the M opposite side buffer voltages input through the buffer voltage relay circuit 310 when generating the second opposite side gamma reference voltage to the N−1th opposite side gamma reference voltage, instead of using the M opposite side buffer voltages buffered in the opposite side gamma buffer circuit 222 .

[0063] In the first embodiment, due to the following reasons, the other end of the first side line 112b and the other end of the first pair of side lines 212b are electrically isolated from each other, the other end of the second side line 112d and the other end of the second pair of side lines 212d are electrically isolated from each other, and the opposite side gamma reference voltage generating circuit 232 uses M one side buffer voltages to generate the second opposite side gamma reference voltage to the N-1th opposite side gamma reference voltage.

[0064] First, even if the M one-side gamma buffers constituting the one-side gamma buffer circuit 122 and the M opposite-side gamma buffers constituting the opposite-side gamma buffer circuit 222 are the same product, they may have different manufacturing tolerances, which may generate a deviation between the one-side buffer voltage output from the one-side gamma buffer and the opposite-side buffer voltage output from the opposite-side gamma buffer, thereby causing a deviation between the one-side gamma reference voltage and the opposite-side gamma reference voltage.

[0065] In the first embodiment, in order to eliminate the above-mentioned deviation of the gamma reference voltage, the M one-side buffer voltages output from the one-side gamma buffer circuit 122 are also used in the opposite-side gamma reference voltage generating circuit 232 to generate the opposite-side gamma reference voltage, thereby eliminating the deviation of the gamma reference voltage between the two sides caused by the deviation of the buffer voltage between the two sides.

[0066] On the other hand, since the first side gamma reference voltage and the N-th side gamma reference voltage output from the one side power input circuit 112, the signal having the first side gamma reference voltage, and the signal having the N-th side gamma reference voltage are also used to generate power for M one side voltage dividers and the second side gamma reference voltage to the N-1-th side gamma reference voltage, they have very large current values ​​compared to the M one side buffer voltages output from the one side gamma buffer circuit 122.

[0067] Here, the buffer voltage relay circuit 310 to be described later may include a plurality of lines, and each line may have an internal resistance.

[0068] Therefore, when the buffer voltage relay circuit 310 transmits the first one-side gamma reference voltage to the opposite-side gamma reference voltage generating circuit 232 so that the second gamma reference voltage output circuit 200 shares the first one-side gamma reference voltage, compared with the M one-side buffer voltages, the voltage change amount increases due to the very large current value and the internal resistance of the line.

[0069] Therefore, the deviation between the first one side gamma reference voltage used in the opposite side gamma reference voltage generating circuit 232 and the first one side gamma reference voltage used in the one side gamma reference voltage generating circuit 132 may also increase. Therefore, the other end of the first one side line 112 b and the other end of the first opposite side line 212 b are electrically isolated from each other, the other end of the second one side line 112 d and the other end of the second opposite side line 212 d are electrically isolated from each other, and the opposite side gamma reference voltage generating circuit 232 uses the first opposite side gamma reference voltage.

[0070] Here, the value of the first pair-side gamma reference voltage and the value of the first one-side gamma reference voltage must coincide with each other, and the value of the Nth pair-side gamma reference voltage and the value of the Nth one-side gamma reference voltage must also coincide with each other.

[0071] To this end, in the first embodiment, the first input voltage Vin1 input to the first one-side input buffer 112a of the first gamma reference voltage output circuit 100 and the third input voltage Vin3 input to the first opposite-side input buffer 212a of the second gamma reference voltage output circuit 200 can be adjusted to be consistent with each other, so that the value of the first opposite-side gamma reference voltage and the value of the first one-side gamma reference voltage are consistent with each other. Similarly, the second input voltage Vin2 input to the second one-side input buffer 112c of the first gamma reference voltage output circuit 100 and the fourth input voltage Vin4 input to the second opposite-side input buffer 212c of the second gamma reference voltage output circuit 200 can be adjusted to be consistent with each other, so that the value of the Nth opposite-side gamma reference voltage and the value of the Nth one-side gamma reference voltage are consistent with each other.

[0072] In addition, in the first embodiment, the outputs of the first side input buffer 112a and the first opposite side input buffer 212a can be adjusted so that the value of the first opposite side gamma reference voltage is consistent with the value of the first side gamma reference voltage, and the outputs of the second side input buffer 112c and the second opposite side input buffer 212c can be adjusted so that the value of the Nth opposite side gamma reference voltage is consistent with the value of the Nth side gamma reference voltage.

[0073] Here, the control for making the first input voltage consistent with the third input voltage and the control for making the second input voltage consistent with the fourth input voltage may be performed by the timing control device 4 or a separate power controller (not shown).

[0074] Similarly, the control for adjusting the output of the first one side input buffer 112a and the first opposite side input buffer 212a and the control for adjusting the output of the second one side input buffer 112c and the second opposite side input buffer 212c can also be performed by the timing control device 4 or a separate power controller (not shown).

[0075] On the other hand, in the first embodiment, the buffer voltage relay circuit 310 for transmitting only the M one-side buffer voltages to the opposite-side gamma reference voltage generating circuit 232 (i.e., the buffer voltage relay circuit 310 having one end connected to the output side of the one-side gamma buffer circuit 122 and transmitting the M one-side buffer voltages to the opposite-side gamma reference voltage generating circuit 232 connected to the other end) is as shown in FIG. Figure 2As shown, it may include: M one-side internal lines 312a to 312g, one end of which is connected to the output side of the M one-side gamma buffers and forms a one-side connection pad at the other end; M opposite-side internal lines 314a to 314g, one end of which is connected to the input side of the opposite-side gamma reference voltage generating circuit and forms an opposite-side connection pad at the other end; and M connection lines 316a to 316g, one end of which is connected to each of the M one-side connection pads and the other end is connected to each of the M opposite-side connection pads.

[0076] Figure 3 is a block diagram of a gamma reference voltage output circuit according to a second embodiment.

[0077] refer to Figure 3 According to the second embodiment, the gamma reference voltage output circuit may include: a first gamma reference voltage output circuit 100, which is included in the first driving chip 10; a second gamma reference voltage output circuit 200, which is included in the second driving chip 20; and a voltage dividing relay circuit 320, which is used to electrically connect the first gamma reference voltage output circuit 100 with the second gamma reference voltage output circuit 200. In the second embodiment, the first gamma reference voltage output circuit 100 may include a one-side power input circuit 114, a one-side gamma buffer circuit 124, and a one-side gamma reference voltage generating circuit 134.

[0078] The one-side power input circuit 114 may output a first one-side gamma reference voltage, an N-th one-side gamma reference voltage, and M one-side divided voltages.

[0079] The one-side power input circuit 114 may include: a first one-side input buffer 114a, for receiving a first input voltage Vin1 and outputting a first one-side gamma reference voltage V1; a first one-side line 114b, one end of which is connected to the output end of the first one-side input buffer 114a; a second one-side input buffer 114c, for receiving a second input voltage Vin2 and outputting an N-th one-side gamma reference voltage (e.g., V1024); a second one-side line 114d, which is connected to the output end of the second one-side input buffer 114c; and a first one-side resistor array 114e, for receiving the first one-side gamma reference voltage V1 from the first one-side line 114b and generating M one-side voltage dividers (e.g., Vd1 to Vd7).

[0080] The one-sided gamma buffer circuit 124 may receive the M one-sided divided voltages generated by the first one-sided resistor array 114e and may buffer the M one-sided divided voltages to output M one-sided buffered voltages. The one-sided gamma buffer circuit 124 may include M one-sided gamma buffers.

[0081] The one side gamma reference voltage generating circuit 134 may include a plurality of resistors connected in series to each other, and may separate the first one side gamma reference voltage from the M one side buffer voltages using the plurality of resistors to generate the second one side gamma reference voltage to the N−1th one side gamma reference voltage.

[0082] The output line OL of the first gamma reference voltage output circuit 100 can be supplied to multiple switch arrays included in the first channel circuit 12: the second one-side gamma reference voltage to the N-1 one-side gamma reference voltage generated by the one-side gamma reference voltage generation circuit 134, and the first one-side gamma reference voltage and the N one-side gamma reference voltage output from the one-side power input circuit 114.

[0083] The second gamma reference voltage output circuit 200 may include an opposite-side power input circuit 214 , an opposite-side gamma buffer circuit 224 , and an opposite-side gamma reference voltage generating circuit 234 .

[0084] The opposite side power input circuit 214 may output a first opposite side gamma reference voltage and an Nth opposite side gamma reference voltage in a state electrically isolated from the one side power input circuit 114. Here, the first opposite side gamma reference voltage may correspond to the first one side gamma reference voltage, and the Nth opposite side gamma reference voltage may correspond to the Nth one side gamma reference voltage.

[0085] The opposite side power input circuit 214 may include: a first opposite side input buffer 214a, for receiving a third input voltage Vin3 and outputting a first opposite side gamma reference voltage V1'; a first opposite side line 214b, one end of which is connected to the output end of the first opposite side input buffer 214a; a second opposite side input buffer 214c, for receiving a fourth input voltage Vin4 and outputting an Nth opposite side gamma reference voltage (e.g., V1024'); and a second opposite side line 214d connected to the output end of the second opposite side input buffer 214c. Here, the other end of the first side line 114b and the other end of the first side line 214b may be electrically isolated from each other, and the other end of the second side line 114d and the other end of the second side line 214d may also be electrically isolated from each other.

[0086] The opposite-side gamma buffer circuit 224 may receive M one-side divided voltages through an input side connected to the other end of the voltage-dividing relay circuit 320 , and may buffer the M one-side divided voltages, thereby outputting M opposite-side buffered voltages.

[0087] The opposite side gamma reference voltage generating circuit 234 may include a plurality of resistors connected in series to each other, and may use resistors to separate the first opposite side gamma reference voltage output from the opposite side gamma buffer circuit 224 from the M opposite side buffer voltages, thereby generating a second opposite side gamma reference voltage to an N-1th opposite side gamma reference voltage.

[0088] Here, one end of the opposite-side gamma reference voltage generating circuit 234 may be connected to the first opposite-side line 214 b , and the other end thereof may be connected to the second opposite-side line 214 d .

[0089] In addition, the opposite-side buffer voltage output from the opposite-side gamma buffer circuit 224 may be input to nodes formed in some of the plurality of resistors constituting the opposite-side gamma reference voltage generating circuit 234. The resistance value of each of the plurality of resistors constituting the opposite-side gamma reference voltage generating circuit 234 may be the same as the resistance value of each of the plurality of resistors constituting the one-side gamma reference voltage generating circuit 134.

[0090] The output line OL of the second gamma reference voltage output circuit 200 can be supplied to multiple switch arrays included in the second channel circuit 22: the second opposite side gamma reference voltage generated by the opposite side gamma reference voltage generation circuit 234 to the N-1th opposite side gamma reference voltage, and the first opposite side gamma reference voltage and the Nth opposite side gamma reference voltage output from the opposite side power input circuit 214.

[0091] In the second embodiment, the reasons why the other ends of the first side wire 114b and the first pair of side wires 214b are electrically isolated from each other and the other ends of the second side wire 114d and the second pair of side wires 214d are electrically isolated from each other are the same as those described in the first embodiment.

[0092] On the other hand, in the second embodiment, the reason why the opposite-side gamma buffer circuit 224 uses M one-side voltage divisions to output M opposite-side buffer voltages is as follows.

[0093] First, in the case where the opposite-side power input circuit 214 includes a resistor array for generating an opposite-side voltage division, the resistors in the first one-side resistor array 114e included in the one-side power input circuit 114 and the resistors included in the resistor array of the opposite-side power input circuit 214 may have different manufacturing tolerances, and this may generate a deviation in the voltage division between the two sides, thereby causing a deviation in the gamma reference voltage between the two sides.

[0094] In the second embodiment, in order to eliminate the deviation of the gamma reference voltage, the M one-side voltage dividers generated by the first one-side resistor array 114e are also used in the opposite-side gamma buffer circuit 224 to generate the opposite-side buffer voltage, thereby eliminating the deviation of the gamma reference voltage between the two sides caused by the deviation of the voltage divider between the two sides.

[0095] On the other hand, in the second embodiment, the value of the first pair-side gamma reference voltage and the value of the first one-side gamma reference voltage must agree with each other, and the value of the Nth pair-side gamma reference voltage and the value of the Nth one-side gamma reference voltage must also agree with each other.

[0096] To this end, in the second embodiment, the first input voltage Vin1 input to the first one-side input buffer 114a of the first gamma reference voltage output circuit 100 and the third input voltage Vin3 input to the first opposite-side input buffer 214a of the second gamma reference voltage output circuit 200 can be adjusted to be consistent with each other, so that the value of the first opposite-side gamma reference voltage and the value of the first one-side gamma reference voltage are consistent with each other. Similarly, the second input voltage Vin2 input to the second one-side input buffer 114c of the first gamma reference voltage output circuit 100 and the fourth input voltage Vin4 input to the second opposite-side input buffer 214c of the second gamma reference voltage output circuit 200 can be adjusted to be consistent with each other, so that the value of the Nth opposite-side gamma reference voltage and the value of the Nth one-side gamma reference voltage are consistent with each other.

[0097] In addition, in the second embodiment, the outputs of the first side input buffer 114a and the first opposite side input buffer 214a can be adjusted so that the value of the first opposite side gamma reference voltage is consistent with the value of the first side gamma reference voltage, and the outputs of the second side input buffer 114c and the second opposite side input buffer 214c can be adjusted so that the value of the Nth opposite side gamma reference voltage is consistent with the value of the Nth side gamma reference voltage.

[0098] Here, the control for making the first input voltage consistent with the third input voltage and the control for making the second input voltage consistent with the fourth input voltage may be performed by the timing control device 4 or a separate power controller (not shown).

[0099] Similarly, the control for adjusting the output of the first one side input buffer 114a and the first opposite side input buffer 214a and the control for adjusting the output of the second one side input buffer 114c and the second opposite side input buffer 214c can also be performed by the timing control device 4 or a separate power controller (not shown).

[0100] On the other hand, in the second embodiment, the voltage-dividing relay circuit 320 for transmitting only the M one-side divided voltages to the opposite-side gamma buffer circuit 224 (i.e., the voltage-dividing relay circuit 320 having one end connected to the input side of the one-side gamma buffer circuit 124 and transmitting the M one-side divided voltages to the input side of the opposite-side gamma buffer circuit 224 connected to the other end) is as shown in FIG. Figure 3As shown, it may include: M one-side internal lines 322a to 322g, one end of which is connected to the input side of the M one-side gamma buffers and forms a one-side connection pad at the other end; M opposite-side internal lines 324a to 324g, one end of which is connected to the input side of the opposite-side gamma buffer circuit 224 and forms an opposite-side connection pad at the other end; and M connection lines 326a to 326g, one end of which is connected to each one-side connection pad among the M one-side connection pads and the other end is connected to each opposite-side connection pad among the M opposite-side connection pads.

[0101] Figure 4 is a block diagram of a gamma reference voltage output circuit according to a third embodiment.

[0102] like Figure 4 As shown, the gamma reference voltage output circuit according to the third embodiment can selectively use one-side buffer voltage and one-side voltage division in the second gamma reference voltage output circuit 200 by configuring both buffer voltage relay circuits 332, 336 and 334 including switches s / w and voltage divider relay circuits 342, 344 and 336 including switches s / w.

[0103] In other words, if any one of the switches of the voltage-dividing relay circuit 342, 344, or 336 and the switches of the buffer voltage relay circuit 332, 336, or 334 is turned on, the other may remain turned off. Figure 4 In the embodiment, if the switches of the voltage-dividing relay circuits 342, 344 and 336 are turned on, and if the switches of the buffer voltage relay circuits 332, 336 and 334 are turned off, the opposite side gamma buffer circuit 440 can receive M one-side voltage dividers from the voltage-dividing relay circuits 342, 344 and 336, and can output M opposite side buffer voltages, and the opposite side gamma reference voltage generating circuit can use the M opposite side buffer voltages and the first opposite side gamma reference voltage V1' to generate the second opposite side gamma reference voltage to the N-1th opposite side gamma reference voltage.

[0104] On the other hand, if the switches of the buffer voltage relay circuits 332, 336 and 334 are turned on, and if the switches of the voltage divider relay circuits 342, 344 and 336 are turned off, the opposite side gamma reference voltage generating circuit 450 can receive M one-side buffer voltages from the buffer voltage relay circuits 332, 336 and 334, and can use the M one-side buffer voltages and the first opposite side gamma reference voltage V1' to generate the second opposite side gamma reference voltage to the N-1th opposite side gamma reference voltage.

[0105] In the third embodiment having the above-described structure, the opposite-side resistor array 432 included in the opposite-side power input circuit 430 may be electrically isolated from the opposite-side gamma buffer circuit 440. Here, a one-side switch may be provided between the one-side resistor array 412 included in the one-side power input circuit 410 and the one-side gamma buffer circuit 420, and an opposite-side switch may be provided between the opposite-side resistor array 432 included in the opposite-side power input circuit 430 and the opposite-side gamma buffer circuit 440. In addition, when the data driving device 2 operates, the one-side switch may always be turned on, and the opposite-side switch may always be turned off, so that the opposite-side resistor array 432 and the opposite-side gamma buffer circuit 440 may be electrically isolated from each other.

[0106] In the third embodiment, control for turning on / off switches included in each of the buffer voltage relay circuits 332, 336 and 334 and the voltage dividing relay circuits 342, 344 and 336 may be performed by the timing control device 4 or a separate controller (not shown).

[0107] In the third embodiment, the buffer voltage relay circuits 332 , 336 , and 334 and the voltage dividing relay circuits 342 , 344 , and 336 may share the connection line 336 .

[0108] Figure 5 is a block diagram of a gamma reference voltage output circuit according to a fourth embodiment.

[0109] refer to Figure 5 According to the fourth embodiment, the gamma reference voltage output circuit may include: a first gamma reference voltage output circuit 100, which is included in the first driver chip 10; a second gamma reference voltage output circuit 200, which is included in the second driver chip 20; and a one-side voltage relay circuit 350, which is used to electrically connect the first gamma reference voltage output circuit 100 with the second gamma reference voltage output circuit 200. In the fourth embodiment, the gamma reference voltage is not generated in the part of the one-side gamma reference voltage generation circuit 136 and the opposite-side gamma reference voltage generation circuit 216, which are adjacent to the power line and may cause a large deviation of the gamma reference voltage between the two sides, and two gamma buffers (M+2) are added to the existing (M) gamma buffers, so that the gamma reference voltage is generated from the part to which the buffer voltage from the M+2 gamma buffers is input, thereby eliminating the deviation of the gamma reference voltage between the two sides. Specifically, in the fourth embodiment, the first gamma reference voltage output circuit 100 may include a one-side power input circuit 116, a one-side gamma buffer circuit 126, and a one-side gamma reference voltage generation circuit 136. The one-side power input circuit 116 can output a first one-side reference voltage, an N-th one-side reference voltage, and M+2 one-side divided voltages.

[0110] The one-side power input circuit 116 may include: a first one-side input buffer 116a, used to receive a first input voltage Vin1 and output a first one-side reference voltage Vrl; a first one-side line 116b, one end of which is connected to the output end of the first one-side input buffer 116a; and a first one-side resistor array 116c, used to receive the first one-side reference voltage Vrl from the first one-side line and generate M+2 one-side divided voltages Vd1 to Vd9.

[0111] The one-side power input circuit 116 may further include: a second one-side input buffer 116d for receiving the second input voltage Vin2 and outputting a second one-side reference voltage; and a second one-side line 116e connected to an output terminal of the second one-side input buffer 116d.

[0112] In the fourth embodiment, although the description is based on the case where the first one side reference voltage Vrl is input to the first one side resistor array 116c for the sake of ease of explanation, the first one side resistor array 116c can receive the second one side reference voltage from the second one side line 116e, and M+2 one side voltage dividers can be generated in the actual application of the embodiment.

[0113] The one-side gamma buffer circuit 126 may receive the M+2 one-side divided voltages generated by the first one-side resistor array 116c, may buffer them, and may output M+2 one-side buffered voltages. The one-side gamma buffer circuit 126 may include M+2 one-side gamma buffers.

[0114] The one-side gamma reference voltage generating circuit 136 may include a plurality of resistors connected in series to each other, and may use resistors to separate the first one-side reference voltage from the M+2 one-side buffer voltages, thereby generating the first one-side gamma reference voltage to the N-th one-side gamma reference voltage. That is, the one-side gamma reference voltage generating circuit 136 may use the first one-side reference voltage and the M+2 one-side buffer voltages to generate the first one-side gamma reference voltage V1 to the N-th one-side gamma reference voltage V1024.

[0115] Here, one end of the one-side gamma reference voltage generating circuit 136 may be connected to the first one-side line 116b, and the other end thereof may be connected to the second one-side line 116e. In addition, a portion between a point connected to the first one-side buffer voltage node and the second one-side line 116b and a portion between a point connected to the second one-side line 116e at a node where the first one-side buffer voltage is input may not be connected to the output line OL of the first gamma reference voltage output circuit 100.

[0116] The first to N-th one-side gamma reference voltages generated by the one-side gamma reference voltage generating circuit 136 may be supplied to a plurality of switch arrays included in the first channel circuit 12 through the output line OL of the first gamma reference voltage output circuit 100 .

[0117] The second gamma reference voltage output circuit 200 may include an opposite-side gamma reference voltage generating circuit 216. The opposite-side gamma reference voltage generating circuit 216 may be connected to the other end of the one-side voltage relay circuit 350 (which will be described later) to receive the first one-side reference voltage and M+2 one-side buffer voltages, and may generate the first to Nth opposite-side gamma reference voltages V1' to V1024' using the M+2 one-side buffer voltages and the first one-side reference voltage.

[0118] The second gamma reference voltage output circuit 200 may further include an opposite power input circuit 226 and an opposite gamma buffer circuit 236 including M+2 opposite gamma buffers. The opposite power input circuit 226 and the opposite gamma buffer circuit 236 may be continuously maintained in a state of being electrically isolated from the opposite gamma reference voltage generating circuit 216.

[0119] On the other hand, the first to Nth opposite-side gamma reference voltages generated by the opposite-side gamma reference voltage generating circuit 216 may be supplied to a plurality of switch arrays included in the second channel circuit 22 through the output line OL of the second gamma reference voltage output circuit 200 .

[0120] In the fourth embodiment, a one-side voltage relay circuit 350 for transmitting M+2 one-side buffer voltages and the first one-side reference voltage Vr1 to the opposite-side gamma reference voltage generating circuit 216 (i.e., a one-side voltage relay circuit 350 having one end connected to the output side of the one-side power input circuit 116 and the output side of the one-side gamma buffer circuit 126, respectively, and transmitting the first one-side reference voltage Vr1 and the M+2 one-side buffer voltages to the opposite-side gamma reference voltage generating circuit 216 connected to the other end) is provided. Figure 5As shown, it may include: M+3 one-side internal lines 352a to 352j, one end of which is connected to the output side of each of the first one-side line 116b and the M+2 one-side gamma buffers and a one-side connection pad is provided at the other end; M+3 opposite-side internal lines 354a to 354j, one end of which is connected to the input side of the opposite-side gamma reference voltage generating circuit 216 and a opposite-side connection pad is provided at the other end; and M+3 connecting lines 356a to 356j, one end of which is connected to each of the M+3 one-side connection pads and the other end is connected to each of the M+3 opposite-side connection pads. Here, the one-side voltage relay circuit 350 may also include a one-side internal line 352k, an opposite-side internal line 354k, and a connecting line 356k.

[0121] CROSS-REFERENCE TO RELATED APPLICATIONS

[0122] This application claims priority to Korean Patent Application No. 10-2019-0171770, filed on Dec. 20, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein.

Claims

1. A gamma reference voltage output circuit for a display device, the gamma reference voltage output circuit comprising: A first gamma reference voltage output circuit, comprising a one-side gamma buffer circuit and a one-side gamma reference voltage generating circuit, wherein the one-side gamma buffer circuit is configured to receive M one-side divided voltages and output M one-side buffered voltages, where M is a natural number, and the one-side gamma reference voltage generating circuit is configured to use the M one-side buffered voltages and the first one-side gamma reference voltage to generate a second one-side gamma reference voltage to an N-1th one-side gamma reference voltage, where N is a natural number greater than M; a buffer voltage relay circuit having one end connected to the output side of the one-side gamma buffer circuit and configured to transmit the M one-side buffer voltages to the other end thereof; as well as a second gamma reference voltage output circuit, comprising an opposite-side gamma reference voltage generating circuit, the opposite-side gamma reference voltage generating circuit being connected to the other end of the buffer voltage relay circuit, the opposite-side gamma reference voltage generating circuit being configured to receive the M one-side buffer voltages and to generate a second opposite-side gamma reference voltage to an N-1th opposite-side gamma reference voltage using the M one-side buffer voltages and the first opposite-side gamma reference voltage, The buffer voltage relay circuit includes an internal line on one side, an internal line on the opposite side and a connecting line, and Wherein, the connecting wire is connected to the one-side internal wire and the opposite-side internal wire through a connecting pad.

2. The gamma reference voltage output circuit according to claim 1, wherein: The first gamma reference voltage output circuit further includes a one-side power input circuit, the one-side power input circuit being configured to output the first one-side gamma reference voltage, the N-th one-side gamma reference voltage, and the M one-side divided voltages, and The second gamma reference voltage output circuit also includes an opposite side power input circuit, which is configured to output a first opposite side gamma reference voltage consistent with the first side gamma reference voltage and an Nth opposite side gamma reference voltage consistent with the Nth side gamma reference voltage in a state electrically isolated from the one side power input circuit.

3. The gamma reference voltage output circuit according to claim 2, wherein: The one-side power input circuit comprises: A first one-side input buffer configured to receive a first input voltage and output the first one-side gamma reference voltage; A first side line, one end of which is connected to the output end of the first side input buffer; A second one-side input buffer configured to receive a second input voltage and output the N-th one-side gamma reference voltage; a second one-side line, one end of which is connected to the output end of the second one-side input buffer; and The first one-side resistor array is configured to receive the first one-side gamma reference voltage from the first one-side line and generate the M one-side divided voltages.

4. The gamma reference voltage output circuit according to claim 3, wherein: The opposite side power input circuit comprises: a first pair-side input buffer configured to receive a third input voltage and output the first pair-side gamma reference voltage; a first pair of side lines, one end of which is connected to the output end of the first pair of side input buffers; a second pair-side input buffer configured to receive a fourth input voltage and output the Nth pair-side gamma reference voltage; and The second pair of side lines has one end connected to the output end of the second pair of side input buffers.

5. The gamma reference voltage output circuit according to claim 4, wherein: The other end of the first side wire and the other end of the first pair of side wires are electrically isolated from each other, and the other end of the second side wire and the other end of the second pair of side wires are also electrically isolated from each other.

6. The gamma reference voltage output circuit according to claim 5, wherein: adjusting the first input voltage and the third input voltage so that the first opposite-side gamma reference voltage and the first one-side gamma reference voltage are consistent with each other, and The second input voltage and the fourth input voltage are adjusted so that the N-th opposite-side gamma reference voltage and the N-th one-side gamma reference voltage are consistent with each other.

7. A gamma reference voltage output circuit for a display device, the gamma reference voltage output circuit comprising: A first gamma reference voltage output circuit, comprising a one-side gamma buffer circuit and a one-side gamma reference voltage generating circuit, wherein the one-side gamma buffer circuit is configured to receive M one-side divided voltages, buffer the M one-side divided voltages and output M one-side buffered voltages, where M is a natural number, and the one-side gamma reference voltage generating circuit is configured to generate a second one-side gamma reference voltage to an N-1th one-side gamma reference voltage using the M one-side buffered voltages and the first one-side gamma reference voltage, where N is a natural number greater than M; a voltage-dividing relay circuit, one end of which is connected to the output side of the one-side gamma buffer circuit and is configured to transmit the M one-side divided voltages to the other end thereof; as well as A second gamma reference voltage output circuit includes an opposite-side gamma buffer circuit and an opposite-side gamma reference voltage generating circuit, wherein the input side of the opposite-side gamma buffer circuit is connected to the other end of the voltage-dividing relay circuit, the opposite-side gamma buffer circuit is configured to receive the M one-side divided voltages, buffer the M one-side divided voltages and output M opposite-side buffered voltages, and the opposite-side gamma reference voltage generating circuit is configured to use the M opposite-side buffer voltages and the first opposite-side gamma reference voltage to generate a second opposite-side gamma reference voltage to an N-1th opposite-side gamma reference voltage.

8. The gamma reference voltage output circuit according to claim 7, wherein: The first gamma reference voltage output circuit further includes a one-side power input circuit, the one-side power input circuit being configured to output the first one-side gamma reference voltage, the N-th one-side gamma reference voltage, and the M one-side divided voltages, and The second gamma reference voltage output circuit also includes an opposite side power input circuit, which is configured to output a first opposite side gamma reference voltage corresponding to the first side gamma reference voltage and an Nth opposite side gamma reference voltage corresponding to the Nth side gamma reference voltage in a state electrically isolated from the one side power input circuit.

9. The gamma reference voltage output circuit according to claim 7 further includes a buffer voltage relay circuit, one end of which is connected to the output side of the one-side gamma buffer circuit and the other end is connected to the opposite-side gamma reference voltage generating circuit, and the buffer voltage relay circuit is configured to transmit the M one-side buffer voltages to the opposite-side gamma reference voltage generating circuit.

10. The gamma reference voltage output circuit according to claim 9, wherein: The voltage-dividing relay circuit and the buffer voltage relay circuit each include a switch, and in the case where any one of the switch of the voltage-dividing relay circuit and the switch of the buffer voltage relay circuit is turned on, the other one remains turned off.

11. The gamma reference voltage output circuit according to claim 10, wherein: When the switch of the buffer voltage relay circuit is turned on and the switch of the voltage divider relay circuit is turned off, the opposite side gamma reference voltage generating circuit receives the M one-side buffer voltages from the buffer voltage relay circuit, and uses the M one-side buffer voltages and the first opposite side gamma reference voltage to generate the second opposite side gamma reference voltage to the N-1th opposite side gamma reference voltage.

12. A gamma reference voltage output circuit for a display device, the gamma reference voltage output circuit comprising: A first gamma reference voltage output circuit, comprising a one-side power input circuit, a one-side gamma buffer circuit and a one-side gamma reference voltage generation circuit, wherein the one-side power input circuit is configured to output a first one-side reference voltage and M+2 one-side divided voltages, where M is a natural number, the one-side gamma buffer circuit is configured to receive the M+2 one-side divided voltages and output M+2 one-side buffered voltages, and the one-side gamma reference voltage generation circuit is configured to use the M+2 one-side buffered voltages and the first one-side reference voltage to generate a first one-side gamma reference voltage to an N-th one-side gamma reference voltage, where N is a natural number greater than M; a one-side voltage relay circuit, one end of which is respectively connected to the output side of the one-side power input circuit and the output side of the one-side gamma buffer circuit, and is configured to transmit the first one-side reference voltage and the M+2 one-side buffer voltages to the other end thereof; as well as a second gamma reference voltage output circuit, comprising an opposite-side gamma reference voltage generating circuit, the opposite-side gamma reference voltage generating circuit being connected to the other end of the one-side voltage relay circuit, the opposite-side gamma reference voltage generating circuit being configured to receive the first one-side reference voltage and the M+2 one-side buffer voltages, and to generate a first opposite-side gamma reference voltage to an Nth opposite-side gamma reference voltage using the M+2 one-side buffer voltages and the first one-side reference voltage, The one-side voltage relay circuit includes an internal line on one side, an internal line on the opposite side and a connecting line, and Wherein, the connecting wire is connected to the one-side internal wire and the opposite-side internal wire through a connecting pad.

13. The gamma reference voltage output circuit according to claim 12, wherein: The one-side power input circuit comprises: A first one-side input buffer configured to receive a first input voltage and output the first one-side reference voltage; a first one-side line, one end of which is connected to the output end of the first one-side input buffer; and The first one-side resistor array is configured to receive the first one-side reference voltage from the first one-side line and generate the M+2 one-side divided voltages.

14. The gamma reference voltage output circuit according to claim 13, wherein: The one-side gamma buffer circuit includes M+2 one-side gamma buffers, and The one-side voltage relay circuit comprises: M+3 one-side internal lines, one end of which is respectively connected to the first one-side line and the output side of the M+2 one-side gamma buffers, and a one-side connection pad is provided at the other end; M+3 opposite-side internal lines, one end of which is connected to the input side of the opposite-side gamma reference voltage generating circuit and the other end of which is provided with an opposite-side connection pad; and M+3 connection lines, one end of which is connected to each of the M+3 one-side connection pads and the other end of which is connected to each of the M+3 opposite-side connection pads.

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