A method for checking Verilog timing module drive conflicts

Abstract

The present invention discloses a method for checking driving conflicts in a Verilog timing module, which includes: scanning Verilog code to obtain at least one always block; parsing each always block statement by statement to obtain statement parsing results, including: register information and driven intervals of registers driven by each statement related to assignment in the Verilog code; constructing a hash table according to the statement parsing results; according to the statement parsing results, taking the union of the driven intervals of the same register belonging to the same always block, and after taking the union, taking the intersection of the driven intervals of the same register belonging to different always blocks to obtain driving conflict intervals; searching the hash table based on the driving conflict intervals to determine statements related to driving conflicts in the Verilog code. The present invention can save the debugging time of users in the RTL design process and improve the development efficiency.

Description

Technical Field

[0001] The present invention belongs to the field of Electronic Design Automation (EDA), and particularly relates to a method for checking drive conflicts in Verilog timing modules. Background Art

[0002] In the design of RTL (Register Transfer Level circuits), a part is combinational logic and a part is sequential logic. Generally, each input of sequential logic can only have one driver, which can be the output of combinational logic or the output of sequential logic. In the actual development process of RTL, there is a relatively common type of error, that is, the output of a timing circuit has multiple drivers; for example, Figure 1 in, the output of the Q terminal of the register is driven by both signals W and E. Currently, Figure 1 this type of error as shown is often only discovered when there are problems with the simulation results, thus lengthening the debugging cycle of RTL design. Especially when the RTL design is very large, it seriously affects the development process. Summary of the Invention

[0003] In order to solve the above problems existing in the prior art, the present invention provides a method for checking drive conflicts in Verilog timing modules.

[0004] The technical problem to be solved by the present invention is realized through the following technical solutions:

[0005] A method for checking drive conflicts in Verilog timing modules includes:

[0006] Scanning the Verilog code to obtain at least one always block;

[0007] Parsing each statement of each of the always blocks to obtain the statement parsing result of the Verilog code; the statement parsing result includes: the register information of the registers driven by each statement related to assignment in the Verilog code and the driven interval;

[0008] Constructing a hash table according to the statement parsing result; the hash table is used to record the position information of each statement in the Verilog code and the register information of the register driven by the statement and the driven interval;

[0009] Based on the statement parsing result, union the driven intervals that belong to the same always block and the same register, and after the union, intersect the driven intervals that belong to different always blocks and the same register to obtain the driving conflict intervals;

[0010] Search the hash table based on the driving conflict intervals to determine the statements related to driving conflicts in the Verilog code.

[0011] Optionally, the driven interval is represented by a low integer bit and a high integer bit.

[0012] Optionally, the register information includes: the hierarchy and name of the register;

[0013] Construct a hash table according to the statement parsing result, including:

[0014] Calculate the hash value according to the hierarchy and name of the register driven by each statement, and store the driven interval of the register and the position information of the statement into the hash table according to the hash value.

[0015] Optionally, parse each statement in each always block, including:

[0016] For each always block, scan the statements in the always block one by one;

[0017] In response to the scanned statement being neither a basic assignment statement nor a loop statement, further disassemble the statement;

[0018] In response to the scanned or disassembled statement being a basic assignment statement, read the name and driven interval of the register driven by the statement from the statement, and determine the hierarchy of the register driven by the statement;

[0019] In response to the scanned or disassembled statement being a loop statement, read the name of the register driven by the statement from the statement, calculate the driven interval of the register driven by the statement, and determine the hierarchy of the register driven by the statement.

[0020] Optionally, calculating the driven interval of the register driven by the statement includes:

[0021] When the address index of the register driven by the statement is a known quantity, calculate the driven interval of the register according to the known quantity;

[0022] When the address index of the register driven by the statement is an unknown quantity, set the address index to a preset value, and the preset value is used to represent that the driven interval of the register driven by the statement is all bits of all register addresses.

[0023] Optionally, search the hash table based on the drive conflict interval to determine statements related to drive conflicts in the Verilog code, including:

[0024] Calculate a hash value based on the name and hierarchy of the register to which the drive conflict interval belongs;

[0025] Determine the location information of statements related to drive conflicts in the Verilog code from the hash table according to the calculated hash value.

[0026] Optionally, there are multiple drive conflict intervals;

[0027] Calculating a hash value based on the name and hierarchy of the register to which the drive conflict interval belongs, including:

[0028] For each drive conflict interval, determine the name and hierarchy of the register to which the drive conflict interval belongs;

[0029] In response to the hash value not having been calculated according to the determined name and hierarchy, calculate the hash value according to the name and hierarchy, and save the calculation record;

[0030] In response to the hash value having been calculated according to the determined name and hierarchy, obtain the calculated hash value from the saved calculation record.

[0031] Optionally, the method further includes: outputting the location information of statements related to drive conflicts in the Verilog code.

[0032] In the method for checking Verilog timing module drive conflicts provided by the present invention, the driven range is used to represent the bit selection of the driven register. In this way, registers of any bit width can be represented by two numbers, the highest bit and the lowest bit, without the need to store each bit of the register being driven. When checking drive conflicts, registers in the same always will not generate conflicts. Only the union of the driven ranges needs to be calculated. Registers in different always will generate conflicts. By finding the intersection of the two ranges, the drive conflict range can be obtained. The method of using ranges to represent the bit selection of the driven register in the present invention not only reduces the storage space but also does not require calculating a large number of nodes, reducing the complexity of the operation. This advantage is particularly obvious for registers with a relatively large bit width in practice. Moreover, the present invention stores the drive node information through a hash table, that is, stores the position information of each statement related to the assignment in the Verilog code, as well as the register information of the register driven by the statement and the driven range. In this way, when searching the hash table based on the drive conflict range, the time consumed is constant time. Even when applied to a relatively large Verilog design, the time consumption will not increase significantly. In summary, the present invention provides a static checking method with fast operation speed and short time consumption, which can report drive conflict problems at the compilation stage, thereby saving the user's debugging time and improving the development efficiency.

[0033] The following will further describe the present invention in detail with reference to the accompanying drawings. Description of the Drawings

[0034] Figure 1 is a schematic diagram of drive conflicts;

[0035] Figure 2 is a flowchart of the method for checking Verilog timing module drive conflicts provided by an embodiment of the present invention;

[0036] Figure 3 is another flowchart of the method for checking Verilog timing module drive conflicts provided by an embodiment of the present invention;

[0037] Figure 4 is an exemplary piece of Verilog code. Detailed Embodiments

[0038] The following further describes the present invention in detail with specific embodiments, but the embodiments of the present invention are not limited thereto.

[0039] In order to save the user's debugging time and improve the development efficiency, an embodiment of the present invention provides a method for checking Verilog timing module drive conflicts, as Figure 2 shown. The method includes the following steps:

[0040] S10: Scan the Verilog code to obtain at least one always block.

[0041] Here, Verilog refers to Verilog HDL, which is a hardware description language. It is a language used to describe the structure and behavior of digital system hardware in text form. With it, logic circuit diagrams, logic expressions, and the logical functions completed by digital logic systems can be represented. The always block is the always statement block in Verilog code.

[0042] S20: Parse each statement in each always block to obtain the statement parsing result of the Verilog code; the statement parsing result includes: the register information and the driven interval of the registers driven by each statement related to assignment in the Verilog code.

[0043] Among them, the register information may include: the hierarchy and name of the register. The driven interval can be represented by two numbers, a low bit and a high bit, for example, represented by a low integer bit and a high integer bit.

[0044] Specifically, this step may specifically include: for each always block, scan the statements in the always block one by one; in response to the scanned statement being neither a basic assignment statement nor a loop statement, further disassemble the statement; in response to the scanned or disassembled statement being a basic assignment statement, read the name and driven interval of the register driven by the statement from the statement, and determine the hierarchy of the register driven by the statement; in response to the scanned or disassembled statement being a loop statement, read the name of the register driven by the statement from the statement, calculate the driven interval of the register driven by the statement, and determine the hierarchy of the register driven by the statement.

[0045] It can be understood that if the scanned statement is neither a basic assignment statement nor a loop statement, it means that the statement is a composite statement and needs to be further disassembled to obtain several statements with smaller precision. Then, for each statement obtained by splitting, it is parsed respectively according to the processing method of basic assignment statements or loop statements.

[0046] S30: Construct a hash table according to the statement parsing result; the hash table is used to record the position information of each statement in the Verilog code, as well as the register information and the driven interval of the register driven by the statement.

[0047] Here, there are multiple specific implementation methods for constructing a hash table according to the statement parsing result. For the sake of clarity of the solution and clear layout, the specific implementation method for constructing a hash table according to the statement parsing result will be illustrated by examples later.

[0048] S40: According to the statement parsing result, union the driven intervals that belong to the same always block and the same register, and after the union, intersect the driven intervals that belong to different always blocks and the same register to obtain the drive conflict interval.

[0049] It can be understood that registers in the same always will not cause conflicts, and only the union of the driven intervals needs to be taken. However, registers in different always will cause conflicts, so the intersection of the two intervals is taken, and the obtained intersection interval is the drive conflict interval.

[0050] S50: Search the hash table based on the drive conflict interval to determine the statements related to drive conflicts in the Verilog code.

[0051] It can be understood that since the driven intervals of the registers driven by each statement are stored in the hash table, when it is found that the drive conflict interval is within the driven interval of the register driven by a certain statement, it can be determined that this statement is a statement related to drive conflicts.

[0052] In addition, after determining the statements related to drive conflicts in the Verilog code, the position information of the statements related to drive conflicts in the Verilog code can be further output.

[0053] In the method for checking drive conflicts in Verilog timing modules provided by the present invention, the driven interval is used to represent the bit selection of the driven register. In this way, registers of any bit width can be represented by two numbers, the highest bit and the lowest bit, without storing each bit of the register that is driven. When checking drive conflicts, registers in the same always will not cause conflicts, and only the union of the driven intervals needs to be taken. Registers in different always will cause conflicts, and the intersection of the two intervals is taken to obtain the drive conflict interval. The way of using intervals to represent the bit selection of the driven register in the present invention not only reduces the storage space, but also does not require calculating a large number of nodes, reducing the complexity of the operation. This advantage is particularly obvious for registers with a relatively large bit width in practice. Moreover, the present invention stores the drive node information through a hash table, that is, stores the position information of each statement related to assignment in the Verilog code, as well as the register information and the driven interval of the register driven by this statement. In this way, the time consumed for searching the hash table based on the drive conflict interval is constant time, and even when applied to a relatively large Verilog design, the time consumption will not increase significantly. In summary, the present invention provides a static checking method with fast operation speed and short time consumption, which can report drive conflict - related problems at the compilation stage, thereby saving the user's debugging time and improving the development efficiency.

[0054] Optionally, in one implementation, constructing a hash table according to the statement parsing result may include:

[0055] Calculate a hash value based on the level and name of the register driven by each statement, and store the driven interval of the register and the position information of the statement into the hash table according to the hash value.

[0056] It can be understood that the level and name of a register can uniquely determine a register. Therefore, in this implementation, the hash table feature is used to evenly hash each register into memory. Correspondingly, in step S50, searching the hash table based on the drive conflict interval to determine the statements related to drive conflicts in the Verilog code may include:

[0057] Calculate a hash value based on the name and level of the register to which the drive conflict interval belongs;

[0058] Determine the position information of the statements related to drive conflicts in the Verilog code from the hash table according to the calculated hash value.

[0059] Specifically, the position information of multiple statements and the driven interval of each statement are stored at the address indicated by the calculated hash value. Compare the interval stored in the hash table with the drive conflict interval. If there is an intersection, it can be determined whether there are statements related to drive conflicts. If it is determined that there are statements related to drive conflicts, the line number of the statement in the Verilog code can also be obtained from this address.

[0060] In practical applications, different registers may calculate the same hash value for their levels and names. At this time, if the hash value is calculated for the first time, directly store the driven interval of the register and the position information of the statement into the hash address indicated by the hash value; and if the same hash value is calculated again, then according to the hash conflict handling principle, store the driven interval of the register and the position information of the statement into another address. Correspondingly, when querying the hash table subsequently, if a non-unique hash value is calculated, the previously stored address can also be located according to the parameters used when calculating the hash value. In the context of the present invention, if a non-unique hash value is calculated, the address where the storage was previously performed using the level and name of the register used when calculating the hash value can also be located. For a more detailed implementation of hash conflicts, reference can be made to existing related prior arts, which will not be elaborated in the embodiments of the present invention.

[0061] In another implementation, the register information of a register may include: the unique identifier of the register. Correspondingly, in step S30, constructing a hash table according to the statement parsing result may include:

[0062] Calculate the hash value according to the unique identifier of the register driven by each statement, and store the driven interval of the register and the position information of the statement into the hash address indicated by the hash value.

[0063] Among them, the unique identifier of the register can be preset when writing Verilog code.

[0064] In one embodiment, when parsing the statements in an always block, if the statement to be parsed is a loop statement, when calculating the driven interval of the register driven by the statement, in order to reduce the calculation amount, the following method can be used for calculation:

[0065] When the address index of the register driven by the loop statement to be parsed is a known quantity, calculate the driven interval of the register according to the known quantity; when the address index of the register driven by the loop statement to be parsed is an unknown quantity, set the address index to a preset value, and this preset value is used to represent that the driven interval of the register driven by the statement is all bits of all register addresses. In this way, when subsequently finding the intersection of the driven intervals of the same register that belong to different always blocks, if one of the two driven intervals to be intersected is represented by this preset value, the finally obtained intersection is the other driven interval, because the driven interval represented by this preset value is the largest.

[0066] Among them, the address index of the register being a known quantity means that the address index indicates the driven bits of the register, such as mem[3:0]; or, the address index that can be deduced from the context of the Verilog code to the specific bits being driven also belongs to the known quantity. For example, mem[i], if the value of i has been defined elsewhere in the Verilog code, then the address index i is also known at this time. The address index of the register being an unknown quantity means that the specific number of bits being driven cannot be determined according to the context. For example, mem[address], since the address index address is a quantity that can only be deduced during the running of the Verilog code, it belongs to the unknown quantity.

[0067] It can be understood that, in order to ensure that no driving conflict situation is missed, registers with unknown addresses of the memory type need to be regarded as being driven for each bit. The traditional method is to expand the registers at each address, and usually the address index range of the memory type registers is relatively large. Therefore, expanding and processing each address situation will consume a large amount of time and memory space. To solve this technical problem, the embodiments of the present invention use a special preset value to represent the situation of unknown addresses. If the index address of the register is the preset value, then when finding the intersection of the driven intervals, the additional calculation amount caused by the unknown address situation only relates to the number of registers with non-preset value addresses that are driven, greatly reducing the calculation amount.

[0068] In addition, in order to further reduce the calculation amount, when searching the hash table based on the driving conflict interval, a memory mechanism can also be added to reduce the calculation amount. Specifically, in practical applications, the driving conflict intervals obtained by finding the intersection can include multiple; correspondingly, based on the name and level of the register to which the driving conflict interval belongs, calculating the hash value can include:

[0069] For each driving conflict interval, determine the name and level of the register to which the driving conflict interval belongs;

[0070] In response to not having calculated the hash value according to the determined name and level, calculate the hash value according to the name and level, and save the calculation record;

[0071] In response to having calculated the hash value according to the determined name and level, obtain the calculated hash value from the saved calculation record.

[0072] It can be understood that when searching the hash table, the hash value of the same level and the same register will be calculated multiple times, and there will also be multiple situations where the driven interval stored at the address indicated by a certain hash value is compared with the driving conflict interval. Therefore, by introducing the memory mechanism, repeated calculations can be reduced. When the hash value needs to be calculated, first check whether the hash value has been calculated. If it has been calculated, directly use the calculated result. If it has not been found, calculate the required result separately and save the calculation record. The calculation record includes the name and level of the register participating in the calculation, the calculated hash value, and the address pointed to by the hash value. In practical applications, the calculation record can be stored in another hash table in constant time for distinction from the original hash table.

[0073] In an alternative implementation manner, the hash table can be constructed while parsing the statements. Refer to Figure 3 as shown, and the specific process is as follows:

[0074] A. Scan the Verilog code and take out an always block;

[0075] B. Analyze each statement in this always block one by one; among them, if the parsed statement is a basic assignment statement, jump to step C; if the parsed statement is a loop statement, jump to step D; if the parsed statement is neither a basic assignment statement nor a loop statement, jump to step E;

[0076] C. Read the name of the register driven by this statement and the driven interval, and determine the hierarchy of this register; calculate the hash value according to the determined hierarchy and the read name, and store the read driven interval and the position information of this statement into the hash table according to this hash value; then, jump to step F;

[0077] D. Read the name of the register driven by this statement, calculate the driven interval of the register driven by this statement, and determine the hierarchy of the register driven by this statement; calculate the hash value according to the determined hierarchy and the read name, and store the calculated driven interval and the position information of this statement into the hash table according to this hash value; then, jump to step F;

[0078] E. Split the statement into smaller - grained statements, and return to step B;

[0079] F. Determine whether all statements in this always block have been parsed; if so, jump to step G; if not, return to step B to continue parsing the next statement in this always block;

[0080] G. Determine whether all assignment blocks in the Verilog code have been scanned; if not, jump to step A; if so, jump to step H;

[0081] H. Process the data stored in the hash table, including: taking the union of the driven intervals that belong to the same always block and the same register, and after taking the union, taking the intersection of the driven intervals that belong to different always blocks and the same register to obtain the drive conflict interval;

[0082] I. Search the hash table according to the drive conflict interval to find the position information of the statements related to the drive conflict;

[0083] J. Output the complete register drive conflict information.

[0084] For the sake of clarity of the solution, the embodiments of the present invention will be described in detail below with a specific example. Figure 4 A piece of Verilog code used in this example is given, and the inspection process is as follows:

[0085] Step 1, take out the always block on lines 11 to 14.

[0086] Step 2: Determine that the statement on line 12 is a basic assignment statement, and store the driven interval q[7:4] and the line number 12 where this statement is located into the hash table. Similarly, determine that the statement on line 13 is a basic assignment statement, and store the driven bit index interval q[3:3] and the line number 13 where this statement is located into the hash table.

[0087] Step 3: Continue to fetch the next always block, that is, the always block from line 15 to line 19. Determine that it is a forloop loop statement and the address index is known, so calculate the range of the loop control variable i as [4:0], and store the driven interval q[4:0] and the line number 17 where this loop statement is located into the hash table.

[0088] Step 4: Continue to fetch the next always block, that is, the always block from line 21 to line 23. Determine that the statement type is a basic assignment statement, and the address index value address is an unknown quantity and the result cannot be calculated, so use the preset value 0xFFFFFF to replace this address index, and store the driven interval mem[0xFFFFFF][3:0] and the line number 22 where this statement is located into the hash table.

[0089] Step 5: Continue to fetch the next always block, that is, the always block from line 24 to line 26. Determine that the statement type is a basic assignment statement, and the address index is 3, which is a known quantity, so store the driven index interval mem[3:3][3:0] and the line number 25 where this statement is located into the hash table.

[0090] Step 6: After processing all the statement blocks, find the union of the driven intervals of the same register within the same always block. So find the union of q[7:4] and q[3:3] recorded in Step 2 to get q[7:3], and the results of finding the union within other always blocks remain unchanged; also, find the intersection of the driven intervals of the same register within different always blocks; among them, for the variable q, the result of finding the intersection of the previously obtained union q[7:3] and q[4:0] obtained in Step 3 is q[4:3]. For the variable mem, mem[0xFFFFFF] represents driving all bits of all addresses, and mem[3] in the code represents driving all bits of address 3, so the intersection is mem[3:3][3:0], that is, the drive conflict interval.

[0091] Step 7: According to the conflict interval results obtained in Step 6, look up the location information of the statements containing the drive conflict interval in the hash table stored in Steps 2 - 5. The line numbers containing q[4:3] are: line 12, line 13, line 17. The line numbers containing mem[3:3][3:0] are: line 22, line 25.

[0092] Step 9: Output the driving conflict interval and the number of lines determined in Step 8.

[0093] It should be noted that the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present invention, "a plurality of" means two or more, unless otherwise specifically defined.

[0094] In the description of this specification, the descriptions with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0095] Although the present application has been described in connection with various embodiments herein, however, in the process of implementing the claimed present application, those skilled in the art can understand and achieve other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims.

[0096] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention pertains, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, and all should be regarded as belonging to the protection scope of the present invention.

Claims

1. A method for checking Verilog timing module drive conflicts, characterized in that Including: Scanning the Verilog code to obtain at least one always block; Parsing each statement of each of the always blocks to obtain the statement parsing result of the Verilog code; The statement parsing result includes: the register information and the driven interval of the registers driven by each statement related to assignment in the Verilog code; Constructing a hash table according to the statement parsing result; the hash table is used to record the position information of each statement in the Verilog code and the register information and the driven interval of the register driven by the statement; According to the statement parsing result, taking the union of the driven intervals of the same register belonging to the same always block, and after taking the union, taking the intersection of the driven intervals of the same register belonging to different always blocks to obtain the driving conflict interval; Searching the hash table based on the driving conflict interval to determine the statements related to driving conflict in the Verilog code; Among them, parsing each statement of each of the always blocks includes: For each of the always blocks, scanning the statements in the always block one by one; in response to the scanned statement being neither a basic assignment statement nor a loop statement, further disassembling the statement; in response to the scanned or disassembled statement being a basic assignment statement, reading the name and the driven interval of the register driven by the statement from the statement, and determining the level of the register driven by the statement; in response to the scanned or disassembled statement being a loop statement, reading the name of the register driven by the statement from the statement, calculating the driven interval of the register driven by the statement, and determining the level of the register driven by the statement; The calculating the driven interval of the register driven by the statement includes: When the address index of the register driven by the statement is a known quantity, calculating the driven interval of the register according to the known quantity; When the address index of the register driven by the statement is an unknown quantity, setting the address index to a preset value, and the preset value is used to represent that the driven interval of the register driven by the statement is all bits of all register addresses.

2. The method according to claim 1, wherein The driven interval is represented by a low integer bit and a high integer bit.

3. The method according to claim 2, wherein The register information includes: the level and name of the register; Constructing a hash table according to the statement parsing result includes: Calculating a hash value according to the level and name of the register driven by each statement, and storing the driven interval of the register and the position information of the statement into the hash table according to the hash value.

4. The method according to claim 1, wherein Searching the hash table based on the driving conflict interval to determine the statements related to driving conflict in the Verilog code includes: Calculating a hash value based on the name and level of the register to which the driving conflict interval belongs; Determining the position information of the statements related to driving conflict in the Verilog code from the hash table according to the calculated hash value.

5. The method according to claim 4, characterized in that There are multiple driving conflict intervals; Calculating a hash value based on the name and level of the register to which the driving conflict interval belongs includes: For each drive conflict range, determine the name and level of the register to which the drive conflict range belongs; In response to the hash value not having been calculated based on the determined name and level, calculate the hash value based on the name and level, and save the calculation record; In response to the hash value having been calculated based on the determined name and level, obtain the calculated hash value from the saved calculation record.

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