Filters and Multiplexers

Abstract

Filter and multiplexer. A filter includes: a first signal terminal and a second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a substrate having a first surface and a second surface, the first signal terminal and the second signal terminal being located on the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned closer to the first surface than the filter circuit in the substrate, a first end of the line being connected to one of the first signal terminal and the second signal terminal; and a ground terminal being located on the first surface and a second end of the line being connected to the ground terminal, wherein when the substrate is viewed in a plan view, an area where the line overlaps the ground terminal is larger than an area where the line overlaps one of the first signal terminal and the second signal terminal.

Description

Technical Field

[0001] One aspect of the present embodiment relates to a filter and a multiplexer. Background Art

[0002] Filters including both inductors and capacitors (i.e., LC filters) have been widely used as high-frequency filters in the field of communications. LC filters are constructed by stacking dielectric layers such as ceramic layers. With the complexity of communication devices, people are increasingly interested in new communication standards (such as 5G mobile communication systems). Filters for such standards are required to have high frequencies and high suppression. LC filters may not be able to fully meet these requirements. As disclosed in Japanese Patent Application Publication Nos. 2018-129680 and 2018-129683, filters including acoustic wave resonators and LC with excellent steepness are known. Summary of the invention

[0003] When an inductor is used as a matching circuit in a filter including an acoustic wave resonator and LC, the inductance of the inductor as a matching circuit varies depending on the distance between the inductor and the mounting board, thereby varying the filter characteristics. Alternatively, suppression in the attenuation band may be insufficient. When the number of stages in the filter is increased to increase suppression, the filter becomes larger.

[0004] According to a first aspect of the present embodiment, a filter is provided, comprising: a first signal terminal; a second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a substrate having a first surface and a second surface opposite to the first surface, the first signal terminal and the second signal terminal being located on the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned closer to the first surface in the substrate than the filter circuit, a first end of the line being connected to one of the first signal terminal and the second signal terminal; and a ground terminal being located on the first surface and a second end of the line being connected to the ground terminal, wherein, when the substrate is viewed in a plan view, an area of ​​a region where the line overlaps with the ground terminal is larger than an area of ​​a region where the line overlaps with one of the first signal terminal and the second signal terminal.

[0005] According to a second aspect of the present embodiment, a filter is provided, the filter comprising: a first signal terminal; a second signal terminal; a first element having a first end connected to ground, the first element being selected from the group consisting of an acoustic wave resonator, an inductor and a capacitor, a second element being connected between the first signal terminal and the second signal terminal, when the first element is an acoustic wave resonator, the second element being selected from the group consisting of an inductor and a capacitor, and when the first element is an inductor or a capacitor, the second element is an acoustic wave resonator; a third element being connected in parallel with the second element between the first signal terminal and the second signal terminal, and being selected from the group consisting of an inductor and a capacitor, when an inductor or a capacitor is selected as the first element, the type of the third element is different from the type of the first element, and when an inductor or a capacitor is selected as the second element when the third element is of a different type from the second element; a fourth element connected in series with the third element between the first signal terminal and the second signal terminal and connected in parallel with the second element, the second end of the first element is connected between the fourth element and the third element, the fourth element is selected from an inductor or a capacitor, and the type of the fourth element is the same as the type of the third element; a first inductor having a first end connected between the first signal terminal and the second element and between the first signal terminal and the third element; a second inductor having a first end connected between the second signal terminal and the second element and between the first signal terminal and the fourth element; and a third inductor having a first end connected to the second end of the first inductor and the second end of the second inductor and a second end connected to ground.

[0006] According to a third aspect of the present embodiment, there is provided a multiplexer including any one of the above filters. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a circuit diagram of a filter according to a first embodiment and a first comparative example;

[0008] Figure 2A is a plan view of the acoustic wave resonator in the first embodiment and the first comparative example, and Figure 2B is a cross-sectional view of another acoustic wave resonator of the first embodiment and the first comparative example;

[0009] Figure 3A and Figure 3B are cross-sectional views of filters according to the first embodiment and the first comparative example, respectively;

[0010] FIG. 4A to FIG. 4E is a plan view of a multilayer substrate in the first embodiment and the first comparative example;

[0011] Figure 5A and Figure 5B are plan views of multilayer substrates in the first embodiment and the first comparative example, respectively;

[0012] Fig. 6A and Figure 6B is a cross-sectional view illustrating a filter of a first comparative example mounted on a mounting board;

[0013] FIG. 7A to FIG. 7C The filter characteristics of measurement method A and measurement method B in Comparative Example 1 are illustrated;

[0014] FIG. 8A to FIG. 8C They are the plan views of samples C to E in simulation 1, respectively;

[0015] 9A to 9C They are the relationship diagrams between the inductance and the frequency in samples C to E in simulation 1;

[0016] Fig. 10A and Fig. 10B is a cross-sectional view illustrating the filter of the first embodiment mounted on a mounting board;

[0017] FIG. 11A to FIG. 11C is a plan view of filters according to first to third modifications of the first embodiment;

[0018] FIG. 12A to FIG. 12D is a circuit diagram illustrating another circuit configuration of the first embodiment;

[0019] FIG. 13A to FIG. 13C They are the circuit diagrams of filters F, G and H in simulation 2, and Fig.13D is the equivalent circuit of the acoustic wave resonator in simulation 2;

[0020] Fig.14A and Fig. 14B The transmission characteristics S21 of the filters F, G, and H in simulation 2 are illustrated;

[0021] FIG. 15A to FIG. 15D is a circuit diagram illustrating another circuit configuration of the second embodiment; and

[0022] Fig.16 is a circuit diagram of a duplexer according to a third embodiment. DETAILED DESCRIPTION

[0023] Hereinafter, a description will be given of embodiments of the present disclosure with reference to the accompanying drawings.

[0024] First embodiment

[0025] Figure 1 is a circuit diagram of a filter according to the first embodiment and the first comparative example. Figure 1As shown, the filter 100 includes a filter circuit F1 and matching circuits M1 and M2. The filter circuit F1 is connected between the node N2 and the node N3. The matching circuit M1 is connected between the signal terminal T1 and the node N2. The matching circuit M2 is connected between the signal terminal T2 and the node N3.

[0026] The signal terminal T1 is an input terminal, and the signal terminal T2 is an output terminal. The filter circuit F1 is a high-pass filter. The filter circuit F1 allows signals in a passband among high-frequency signals input to the signal terminal T1 to pass through, and suppresses signals in other frequency bands. The matching circuit M1 matches the impedance of the filter circuit F1 when viewed from the signal terminal T1 with a reference impedance (e.g., 50Ω), and the matching circuit M2 matches the impedance of the filter circuit F1 when viewed from the signal terminal T2 with a reference impedance (e.g., 50Ω).

[0027] Two paths are provided in parallel between nodes N2 and N3. One path includes capacitors C3 and C4 connected in series. Inductor L1 and capacitor C9 are connected in parallel between node N1 located between capacitors C3 and C4 and ground terminal Tg. Another path between nodes N2 and N3 includes acoustic wave resonator R2. Acoustic wave resonator R2 includes acoustic wave resonators S1 to S4 connected in series and acoustic wave resonator S5 connected in parallel to acoustic wave resonator S3. Inductor L8 is connected between acoustic wave resonator R2 and node N2. Inductor L9 is connected between acoustic wave resonator R2 and node N3.

[0028] The matching circuit M1 includes an inductor L5 and a capacitor C5. The inductor L5 is connected between the signal terminal T1 and the node N4. The capacitor C5 is connected between the signal terminal T1 and the node N2. The matching circuit M2 includes an inductor L6 and a capacitor C6. The inductor L6 is connected between the signal terminal T2 and the node N4. The capacitor C6 is connected between the signal terminal T2 and the node N3. The node N4 is connected to the ground terminal Tg.

[0029] Figure 2A is a plan view of the acoustic wave resonator in the first embodiment and the first comparative example, and Figure 2B is a cross-sectional view of another acoustic wave resonator in the first embodiment and the first comparative example. Figure 2AIn the example of , the acoustic wave resonator is a surface acoustic wave resonator. An interdigital transducer (IDT) 40 and a reflector 42 are located on the top surface of a substrate 41. The IDT 40 includes a pair of comb electrodes 40a opposite to each other. The comb electrode 40a includes a plurality of electrode fingers 40b and a bus bar 40c connecting the electrode fingers 40b. The reflector 42 is located on both sides of the IDT 40. The IDT 40 excites surface acoustic waves on the substrate 41. The substrate 41 is, for example, a piezoelectric substrate (such as a lithium tantalate substrate, a lithium niobate substrate, or a crystalline quartz substrate). The substrate 41 may be a composite substrate having a structure designed to have a piezoelectric substrate bonded to a supporting substrate such as a sapphire substrate, a spinel substrate, an alumina substrate, a crystalline quartz substrate, or a silicon substrate. The IDT 40 and the reflector 42 are formed of, for example, an aluminum film or a copper film. A protective film or a temperature compensation film may be provided on the substrate 41 to cover the IDT 40 and the reflector 42.

[0030] exist Figure 2B In the example of, the acoustic wave resonator is a piezoelectric thin film resonator. A piezoelectric film 46 is formed on a substrate 41. A lower electrode 44 and an upper electrode 48 are arranged to sandwich the piezoelectric film 46 between the lower electrode 44 and the upper electrode 48. An air gap 45 is formed between the lower electrode 44 and the substrate 41. The area where the lower electrode 44 and the upper electrode 48 are opposite to each other across at least a portion of the piezoelectric film 46 is a resonance area 47. The lower electrode 44 and the upper electrode 48 in the resonance area 47 excite acoustic waves in the piezoelectric film 46 in a thickness extension mode. The substrate 41 is, for example, a sapphire substrate, a spinel substrate, an alumina substrate, a glass substrate, a crystal quartz substrate, or a silicon substrate. The lower electrode 44 and the upper electrode 48 are formed of a metal film such as a ruthenium film. The piezoelectric film 46 is, for example, an aluminum nitride film. An acoustic mirror may be provided instead of the air gap 45.

[0031] Figure 3A and Figure 3B 1 and 2 are cross-sectional views of filters according to the first embodiment and the first comparative example, respectively. Figure 3A and Figure 3B As shown, in the filter 100 of the first embodiment and the filter 110 of the first comparative example, the electronic components 20 and 22 are mounted on the multilayer substrate 10. The electronic component 20 is a component on which the acoustic wave resonator R2 is mounted. The terminal 21 is provided on the bottom surface of the electronic component 20. The electronic component 22 is a layered product having a structure designed to have a dielectric layer such as a ceramic layer stacked. The electronic component 22 includes Figure 1 The inductors and capacitors shown are those other than the inductors L5 and L6 . The terminal 23 is provided on the bottom surface of the electronic component 22 .

[0032] The multilayer substrate 10 includes laminated insulating layers 11a to 11c. For example, the insulating layers 11a to 11c are made of a resin such as glass epoxy or a ceramic such as low temperature co-fired ceramic (LTCC) or high temperature co-fired ceramic (HTCC). The metal layer 12a is arranged on the upper surface of the insulating layer 11a, and the metal layer 12b is arranged on the upper surface of the insulating layer 11b. The terminal 14 is arranged on the lower surface of the insulating layer 11c. Through-hole wiring 13a to 13c that penetrate the insulating layers 11a to 11c respectively is provided. The metal layers 12a and 12b, the through-hole wiring 13a to 13c and the terminal 14 are formed by a metal layer such as a copper layer, a gold layer or an aluminum layer, for example. A solder resist 15 having an opening 15a is located on the lower surface of the insulating layer 11c. At least a portion of the terminal 14 is exposed from the opening 15a of the solder resist 15. The solder resist 15 is a resin layer made of epoxy resin or other resins. The terminals 14 include signal terminals T1 and T2 and a ground terminal Tg.

[0033] The metal layer 12a on the top surface of the multilayer substrate 10 is connected to the terminal 21 on the bottom surface of the electronic component 20 and the terminal 23 on the bottom surface of the electronic component 22 through the solder 24. The sealing portion 26 for sealing the electronic components 20 and 22 is located on the multilayer substrate 10. The sealing portion 26 is formed by a resin layer made of, for example, epoxy resin. The resin layer may contain an inorganic filler. A top plate as a metal plate or an insulating plate may be provided above the electronic components 20 and 22 without providing the sealing portion 26.

[0034] FIG. 4A to FIG. 4E 1 is a plan view of a multilayer substrate in the first embodiment and the first comparative example. FIG. 4A to FIG. 4E , the plan view of the multilayer substrate of the first embodiment is the same as the plan view of the multilayer substrate of the first comparative example. In addition, illustration of metal layers and via wirings other than the inductors L5 and L6 is omitted.

[0035] like Figure 4A As shown, the metal layer 12a is located on the insulating layer 11a. The metal layer 12a serves as a terminal connected to the electronic components 20 and 22. Figure 4B As shown in FIG. 1 , a through-hole wiring 13a is provided that penetrates the insulating layer 11a. Figure 4C As shown, the metal layer 12b is located on the insulating layer 11b. The metal layer 12b includes a line 16a that forms at least a portion of the inductor L5 and a line 16b that forms at least a portion of the inductor L6. Figure 4D As shown in FIG. 1 , a through-hole wiring 13b is provided that penetrates the insulating layer 11b. Figure 4E As shown, a via wiring 13c penetrating the insulating layer 11c is provided.

[0036] Figure 5A and Figure 5BThey are plan views of multilayer substrates in the first embodiment and the first comparative example, respectively. Figure 5A and Figure 5B 1 is a plan view illustrating the bottom surface of the insulating layer 11c viewed from above. Figure 5A and Figure 5B As shown, the terminal 14 is located on the bottom surface of the insulating layer 11c. The signal terminals T1 and T2 and the ground terminal Tg are provided as the terminal 14.

[0037] like FIG. 4A to FIG. 5B As shown, the first end of the wire 16a is electrically connected to the signal terminal T1 through the through-hole wirings 13b and 13c, and the first end of the wire 16b is electrically connected to the signal terminal T2 through the through-hole wirings 13b and 13c. The second end of the wire 16a is electrically connected to the ground terminal Tg through the through-hole wirings 13b and 13c, and the second end of the wire 16b is connected to the ground terminal Tg through the through-hole wirings 13b and 13c. The first ends of the wires 16a and 16b are also electrically connected to the electronic component 22 through the through-hole wiring 13a and the metal layer 12a.

[0038] like Figure 3A and Figure 5A As shown, in the filter 100 of the first embodiment, the ground terminal Tg is larger than the signal terminals T1 and T2, and overlaps approximately half of each of the lines 16a and 16b in a plan view. Figure 3B and Figure 5B As shown, in the filter 110 of the first comparative example, the ground terminal Tg has approximately the same size as each of the signal terminals T1 and T2, and the ground terminal Tg hardly overlaps each of the lines 16a and 16b.

[0039] In the first embodiment and the first comparative example, the filters 100 and 110 can be miniaturized by providing the line 16a forming at least a part of the inductor L5 of the matching circuit M1 and the line 16b forming at least a part of the inductor L6 of the matching circuit M2 in the multilayer substrate 10. However, the first comparative example has the problem described below.

[0040] Fig. 6A and Figure 6B is a cross-sectional view illustrating a filter according to a first comparative example mounted on a mounting board. Fig. 6A The measurement method shown in is defined as method A, and Figure 6B The measurement method shown in is defined as method B. Fig. 6A As shown, in mode A, in order to inspect the filter 110 of the first comparative example, the filter 110 is mounted on the mounting board 30 via the conductive sheet 36. The terminal 14 of the filter 110 is electrically connected to the terminal 32 on the mounting board 30 via the conductive sheet 36.

[0041] like Figure 6BAs shown, in the mode B, the filter 110 of the first comparative example is mounted on the mounting board 30 using the solder 34. The terminal 14 of the filter 110 is electrically connected to the terminal 32 on the mounting board 30 through the solder 34.

[0042] exist Fig. 6A In the embodiment A shown in FIG. 1 , the distance D1 between the bottom surface of the filter 110 and the top surface of the mounting plate 30 is greater than that in the embodiment A shown in FIG. Figure 6B The distance D2 between the bottom surface of the filter 110 and the top surface of the mounting plate 30 in the embodiment B shown in FIG. Fig. 6A In the illustrated mode A, the inductance between the terminal 14 and the terminal 32 is greater than the inductance between the terminal 14 and the terminal 32 in the mode B illustrated in FIG6B. Therefore, the inductances of the inductors L5 and L6 are different between the mode A and the mode B, which results in a difference between the filter characteristics in the mode A and the filter characteristics in the mode B.

[0043] FIG. 7A to FIG. 7C Filter characteristics in the approach A and the approach B in the first comparative example are illustrated. Fig. 7A : is a Smith chart illustrating the reflection characteristic S11 at the signal terminal T1 in each of the pattern A and the pattern B. Figure 7B The transmission characteristic S21 (attenuation) from the signal terminal T1 to the signal terminal T2 in the method A is illustrated. Figure 7C The transmission characteristic S21 (attenuation) from the signal terminal T1 to the signal terminal T2 in the method B is illustrated. Figure 7B and Figure 7C In FIG. 1 , the dotted line corresponds to the scale of the vertical axis on the right side of the figure, and the solid line corresponds to the scale of the vertical axis on the left side of the figure. The dotted line represents the amplification attenuation of the solid line. Marks m1 and m2 indicate passbands. Mark m1 indicates 5150 MHz, and mark m2 indicates 7125 MHz. The characteristics from 1000 MHz to 10000 MHz were measured. The inductance and capacitance of each element are approximately equal to the inductance and capacitance of the filter F in the simulation 2 described later.

[0044] like Fig. 7A As shown, at a frequency lower than the frequency indicated by the mark m1 (i.e., a frequency lower than the passband), the reflection characteristic in mode A is different from the reflection characteristic in mode B. The reflection characteristic between the frequencies indicated by the marks m1 and m2 (i.e., within the passband) approximately corresponds to the reference impedance.

[0045] like Figure 7B and Figure 7CAs shown, three attenuation poles 50 to 52 having relative minimum values ​​are formed at frequencies lower than the passband. The attenuation pole 50 is an attenuation pole mainly formed by the acoustic wave resonator R2. The attenuation pole 51 is an attenuation pole mainly formed by the filter circuit F1. The attenuation pole 52 is an attenuation pole formed by the filter circuit F1 and the matching circuits M1 and M2.

[0046] like Figure 7B and Figure 7C As shown, the attenuation pole 50 in the method A is not much different from the attenuation pole 50 in the method B. The attenuation pole 51 in the method A is formed at a frequency slightly higher than the frequency at which the attenuation pole 51 in the method B is formed. The attenuation pole 52 in the method A is formed at a frequency lower than the frequency at which the attenuation pole 52 in the method B is formed. As shown above, since the attenuation pole 52 in the method A is mainly formed at a frequency lower than the frequency at which the attenuation pole 52 in the method B is formed, the attenuation near 4000 MHz is large.

[0047] As shown above, in the first comparative example, the change in the distance between the bottom surface of the multilayer substrate 10 and the top surface of the mounting board 30 greatly changes the characteristics of the filter. Fig. 6A and Figure 6B As shown, the filter characteristics obtained when the filter 110 is inspected are different from the filter characteristics obtained when the filter 110 is mounted on the mounting board 30. The thickness of the solder 34 used to mount the filter 110 on the mounting board 30 also affects the filter characteristics.

[0048] Simulation 1

[0049] The inductance of the inductor L5 between the ground terminal Tg and the terminal 32 of the mounting board 30 was simulated for different sizes of the ground terminal Tg using the three-dimensional finite element method. The total thickness of the insulating layers 11b and 11c was set to 85μm, and the relative dielectric constant of the insulating layers 11b and 11c was set to 4.4. The distance D1 in mode A was set to 150μm, and the distance D2 in mode B was set to 10μm.

[0050] FIG. 8A to FIG. 8C They are the plan views of samples C to E in simulation 1. FIG. 8A to FIG. 8C , the insulating layer 11c, the metal layer 12b, the through-hole wirings 13b and 13c, the terminal 14, the line 16a, and the terminal 32 are illustrated. The area 56 of the line 16a overlapping with the signal terminal T1 and the area 54 of the line 16a overlapping with the ground terminal Tg are indicated by dense hatching. Sample C corresponds to the first comparative example, and samples D and E correspond to the first embodiment.

[0051] like Fig. 8AAs shown, in sample C, the area of ​​the ground terminal Tg in the plan view is approximately equal to the area of ​​the signal terminal T1 in the plan view. Region 54 is the area where the line 16a overlaps with the ground terminal Tg connected to the line 16a through the through-hole wiring 13b and 13c in the plan view. Region 56 is the area where the line 16a overlaps with the signal terminal T1 connected to the line 16a through the through-hole wiring 13b and 13c in the plan view. Region 58 is the area of ​​the metal layer 12b other than regions 54 and 56. The area of ​​region 54 is approximately equal to the area of ​​region 56. Although the metal layer 12b overlaps with the terminal 14c at the center portion of the line 16a, the metal layer 12b is not electrically connected to the terminal 14c in the filter.

[0052] like Figure 8B As shown, in sample D, the area of ​​region 54 where line 16a overlaps ground terminal Tg in plan view is larger than the area of ​​region 56 where line 16a overlaps signal terminal T1 in plan view. The area of ​​region 54 in plan view is equal to or larger than half the area of ​​metal layer 12b in plan view.

[0053] like Figure 8C As shown, the area of ​​the region 54 where the line 16a overlaps the ground terminal Tg in the plan view is larger in the sample E than in the sample D. The ground terminal Tg extends to the area other than the signal terminals T1 and T2 on the lower surface of the insulating layer 11c. The area of ​​the region 54 in the plan view is equal to or greater than 80% of the metal layer 12b.

[0054] 9A to 9C They are the relationship between the inductance and frequency in samples C to E in simulation 1. Fig. 9A As shown, in sample C, the inductance in method A is greater than that in method B. At 6 GHz, the inductance in method A is 1.25 nH, while the inductance in method B is 0.97 nH. The ratio of the inductance in method A to the inductance in method B is 129%.

[0055] like Fig. 9B As shown, the difference between the inductance in method A and the inductance in method B is smaller in sample D than in sample C. At 6 GHz, the inductance in method A is 1.07 nH, while the inductance in method B is 0.93 nH. The ratio of the inductance in method A to the inductance in method B is 116%. Fig. 9C As shown, the difference between the inductance in method A and the inductance in method B is smaller in sample E than in sample D. At 6 GHz, the inductance of method A is 1.01 nH, while the inductance is 0.91 nH in method B. The ratio of the inductance in method A to the inductance in method B is 111%.

[0056] As shown above, as the area of ​​the region 54 increases, the difference between the inductance in the pattern A and the inductance in the pattern B decreases.

[0057] Fig. 10A and Fig. 10B FIG. 1 is a cross-sectional view illustrating a filter according to the first embodiment mounted on a mounting board. Fig. 10A and Fig. 10B In the embodiment, the area 54 where the ground terminal Tg overlaps with the metal layer 12b is greater than Fig. 6A and Figure 6B The region 54 of the first comparative example is shown. It is considered that as the region 54 becomes larger, the influence of the difference between the distance D1 between the terminal 14 and the terminal 32 and the distance D2 between the terminal 14 and the terminal 32 on the inductor L5 decreases.

[0058] FIG. 11A to FIG. 11C 1 and 2 are plan views of filters according to first to third modifications of the first embodiment. FIG. 11A to FIG. 11C The insulating layer 11 c , the metal layer 12 b , the terminal 14 , the opening 15 a of the solder resist 15 , the wires 16 a and 16 b , and the terminal 32 are mainly illustrated.

[0059] First Modification of the First Embodiment

[0060] like Fig.11A As shown, in the first modification of the first embodiment, a line 16a forming at least a portion of the inductor L5 and a line 16b forming at least a portion of the inductor L6 are provided. In both the lines 16a and 16b, the area of ​​the region 54 in the plan view is equal to or greater than 50% of the area of ​​the metal layer 12b in the plan view. Two ground terminals Tg connected to the lines 16a and 16b, respectively, are separately provided. The other structures are the same as those in the first embodiment, and therefore the description thereof is omitted.

[0061] Second Modification of the First Embodiment

[0062] like Fig. 11B As shown, in the second modification of the first embodiment, the wires 16a and 16b are connected to the same ground terminal Tg. The other structures are the same as those of the first modification of the first embodiment, and thus the description thereof is omitted.

[0063] Third Modification of the First Embodiment

[0064] like Fig. 11C As shown, in the third modification of the first embodiment, the ground terminal Tg is located between the signal terminals T1 and T2. The other structures are the same as those of the second modification of the first embodiment, and thus the description thereof is omitted.

[0065] In the first embodiment and its variant, the filter circuit F1 is connected between the signal terminal T1 (first signal terminal) and the signal terminal T2 (second signal terminal). The signal terminals T1 and T2 and the ground terminal Tg are located on the bottom surface (first surface) of the multilayer substrate 10 (substrate), and the electronic components 20 and 22 forming the filter circuit F1 are located on the top surface side (the second surface of the substrate opposite to the first surface), that is, on the top surface of the multilayer substrate 10 or on the multilayer substrate 10. The line 16a (first line) is located in the multilayer substrate 10, the first end of the line 16a is connected to the signal terminal T1, and the second end of the line 16a is connected to the ground terminal Tg (first ground terminal). When the multilayer substrate 10 is viewed in a plan view, the area of ​​the area where the line 16a overlaps with the ground terminal Tg is larger than the area of ​​the area where the line 16a overlaps with the signal terminal T1. This structure reduces the dependence of the filter characteristics on the distance between the mounting board 30 and the multilayer substrate 10.

[0066] A case where the filter circuit F1 is located on the top surface side of the multilayer substrate 10 is described, but a portion of the filter circuit F1 (e.g., a portion of a capacitor, a portion of an inductor, or a portion of a capacitor and a portion of an inductor) may be located in the multilayer substrate 10. That is, it is sufficient as long as at least a portion of the filter circuit F1 is located on the upper surface side of the multilayer substrate 10. In this case, the lines 16a and 16b are positioned closer to the bottom surface of the multilayer substrate 10 than the filter circuit F1. Preferably, no other capacitors, other inductors, and other lines are provided between the line 16a and the bottom surface of the multilayer substrate 10, or between the line 16b and the bottom surface of the multilayer substrate 10. Although a case where the lines 16a and 16b are provided is described, it is sufficient to provide only one of the lines 16a and 16b.

[0067] In the first modification of the first embodiment, a plurality of lines 16a and 16b are provided, and a plurality of ground terminals Tg are separately provided to correspond to the lines 16a and 16b, and each ground terminal Tg is connected to a corresponding one of the lines 16a and 16b. In this case, the line 16a as one of the lines is connected to the signal terminal T1, and when the multilayer substrate 10 is viewed in a plan view, the area of ​​the region where the line 16a overlaps with the corresponding ground terminal Tg is larger than the area of ​​the region where the line 16a overlaps with the signal terminal T1. Additionally, the line 16b as another of the lines is connected to the signal terminal T2, and when the multilayer substrate 10 is viewed in a plan view, the area of ​​the region where the line 16b overlaps with the corresponding ground terminal Tg is larger than the area of ​​the region where the line 16b overlaps with the signal terminal T2. This structure reduces the dependence of the filter characteristics on the distance between the mounting board 30 and the multilayer substrate 10.

[0068] As described in the results of simulation 1, as the area of ​​region 54 increases, the change in filter characteristics due to the change in the distance between mounting board 30 and multilayer substrate 10 decreases. Therefore, in at least one of lines 16a and 16b, the area of ​​region 54 is preferably equal to or greater than 2 times the area of ​​region 56, more preferably equal to or greater than 5 times the area of ​​region 56, and further preferably equal to or greater than 10 times the area of ​​region 56. In addition, the area of ​​region 54 in a plan view is preferably equal to or greater than 50% of the area of ​​line 16a in a plan view, and more preferably equal to or greater than 80% of the area of ​​line 16a in a plan view.

[0069] A case where the signal terminals T1 and T2 are an input terminal and an output terminal, respectively, is described, but the signal terminals T1 and T2 may be an output terminal and an input terminal, respectively.

[0070] In the second and third modified examples of the first embodiment, the line 16a, which is one of the lines, connects the signal terminal T1 to the ground terminal Tg, and when the multilayer substrate 10 is viewed in a plan view, the area of ​​the region where the line 16a overlaps with the ground terminal Tg is larger than the area of ​​the region where the line 16a overlaps with the signal terminal T1. The line 16b connects the signal terminal T2 to the ground terminal Tg, and when the multilayer substrate 10 is viewed in a plan view, the area of ​​the region where the line 16b overlaps with the ground terminal Tg is larger than the area of ​​the region where the line 16b overlaps with the signal terminal T2. This structure forms an inductor L7 between the ground terminal Tg and the terminal 32 of the mounting substrate 30 in the filter G of the second embodiment described below. Therefore, as described later, the attenuation characteristics of the attenuation band are improved.

[0071] The circuit configuration of the filter circuit F1 is not limited to the first embodiment, and the filter circuit F1 preferably includes an acoustic wave resonator R2 , an inductor, and a capacitor connected between the signal terminals T1 and T2 .

[0072] Other circuit configurations

[0073] FIG. 12A to FIG. 12D 2 is a circuit diagram illustrating another circuit configuration of the first embodiment. Fig. 12AAs shown, inductors L8 and L9 and capacitors C5, C6, and C9 may be omitted. When an element having a first end connected to the ground and a second end connected to the node N1 is defined as a first element, an element connected between the signal terminal T1 and the signal terminal T2 is defined as a second element, an element connected in parallel with the second element between the signal terminals T1 and T2 is defined as a third element, and an element connected in series with the third element and in parallel with the second element between the signal terminals T1 and T2 is defined as a fourth element, the first element is the inductor L1, the second element is the acoustic wave resonator R2, the third element is the capacitor C3, and the fourth element is the capacitor C4. Other circuit configurations are similar to Figure 1 The circuit configuration is the same, and therefore the description thereof is omitted.

[0074] like Fig. 12B As shown, the first element may be a capacitor C1, the second element may be an acoustic wave resonator R2, the third element may be an inductor L3, and the fourth element may be an inductor L4. Fig. 12C As shown, the first element may be an acoustic wave resonator R1, the second element may be a capacitor C2, the third element may be an inductor L3, and the fourth element may be an inductor L4. Fig.12D As shown, the first element may be an acoustic wave resonator R1, the second element may be an inductor L2, the third element may be a capacitor C3, and the fourth element may be a capacitor C4.

[0075] As shown above, the first element is selected from the group consisting of the acoustic wave resonator R1, the inductor L1 and the capacitor C1. When the first element is the acoustic wave resonator R1, the second element is selected from the inductor L2 and the capacitor C2, and when the first element is the inductor L1 or the capacitor C1, the second element is the acoustic wave resonator R2. The third element is selected from the inductor L3 and the capacitor C3, and when the inductor or the capacitor is selected as the first element, the type of the third element is different from the type of the first element, and when the inductor or the capacitor is selected as the second element, the type of the third element is different from the type of the second element. The fourth element is selected from the inductor L4 and the capacitor C4, and the type of the fourth element is the same as the type of the third element.

[0076] like Figure 7B and Figure 7CAs shown, the transmission characteristics of the filter have an attenuation pole 50 (first attenuation pole) formed by one or more acoustic wave resonators R1 or R2, an attenuation pole 51 (second attenuation pole) formed by the filter circuit F1, and an attenuation pole 52 (third attenuation pole) formed by the filter circuit F1 and lines 16a and 16b. The attenuation poles 50 to 52 are formed at a frequency lower than the passband. The attenuation pole 51 is formed between the attenuation pole 52 and the passband, and the attenuation pole 50 is formed between the attenuation pole 51 and the passband. As shown above, the acoustic wave resonator R1 or R2 increases the attenuation steepness between the passband and the attenuation band. In such a filter, the frequency change of the attenuation pole 52 is likely to change the attenuation characteristics of the filter. Therefore, the area 54 is preferably larger than the area 56.

[0077] The first embodiment and its modified examples describe the case where the filter 100 is a high-pass filter as an example, but the filter 100 may be a low-pass filter or a band-pass filter. In a low-pass filter, attenuation poles 50 to 52 are located at a frequency higher than the passband. The inductors L5 and L6 used as matching circuits M1 and M2, respectively, are likely to form an attenuation pole 52 at a low frequency. Therefore, the filter 100 is preferably a high-pass filter.

[0078] The acoustic wave resonator R2 may be one acoustic wave resonator, or may be two or more acoustic wave resonators, such as Figure 1 shown.

[0079] Second embodiment

[0080] Simulation 2

[0081] The filter according to the second embodiment was simulated. FIG. 13A to FIG. 13C is a circuit diagram of filters F, G, and H in simulation 2. Filter F corresponds to the second comparative example, and filters G and H correspond to the second embodiment.

[0082] like Fig.13A As shown, in the filter F, in addition to Figure 1 The acoustic wave resonator R2 in the embodiment is composed of an acoustic wave resonator R2, and the structure is the same as Figure 1 The structure shown in is the same as that shown in , so its description is omitted. Fig. 13B As shown in FIG. 1 , in the filter G, the inductor L7 is connected between the node N4 and the ground terminal Tg. The other circuit configurations are the same as those of the filter F, so the description thereof is omitted. Fig. 13C As shown, in the filter H, a capacitor C7 is connected in parallel with the filter circuit F1 between the signal terminals T1 and T2.

[0083] The capacitance of capacitors C5 and C6 in filter F is set to 1.8pF. In filter G, when the inductance of inductor L7 is 0.05nH, the capacitance of capacitors C5 and C6 is set to 2.1pF, and when the inductance of inductor L7 is 0.12nH, the capacitance of capacitors C5 and C6 is set to 2.2pF. In filter H, the capacitance of capacitors C5 and C6 is set to 2.5pF, the inductance of inductor L7 is set to 0.12nH, and the capacitance of capacitor C7 is set to 0.06pF. The inductance of inductors L5 and L6 in filters F, G and H is set to 1.3nH. Among filters F, G and H, the capacitance of other capacitors and the inductance of other inductors are set so as to obtain the desired attenuation characteristics, and are set to approximately the same value.

[0084] Fig.13D The equivalent circuit of the acoustic wave resonator in Simulation 2 is illustrated. Fig.13D As shown, between the ends T01 and T02 of the acoustic wave resonator R2, the resistor R01 and the capacitor C02 are connected in series, and the capacitor C01 and the inductor L01 are connected in parallel with the capacitor C02. In simulation 2, the resistance of the resistor R01 is set to 5Ω, the capacitance of the capacitor C01 is set to 9.8fF, the capacitance of the capacitor C02 is set to 0.19pF, and the inductance of the inductor L01 is set to 97.9nH.

[0085] Fig.14A and Fig. 14B The transfer characteristics S21 of the filters F, G, and H in Simulation 2 are illustrated. Fig.14A The transmission characteristics of the filter F, the filter G in which the inductance of L7 is 0.05 nH, and the filter G in which the inductance of L7 is 0.07 nH are illustrated. Fig. 14B The transmission characteristics of the filter G in which the inductance of L7 is 0.07 nH, the filter G in which the inductance of L7 is 0.12 nH, and the filter H are illustrated.

[0086] like Fig.14A As shown, in filter F, attenuation pole 52 is formed below 1000 MHz, and the attenuation near 4000 MHz is small. In filter G, as the inductance of inductor L7 increases, the frequency at which attenuation pole 52 has a relative minimum value becomes higher. Therefore, the attenuation pole near 4000 MHz becomes higher. As described above, the provision of inductor L7 increases the attenuation in the attenuation band.

[0087] like Fig. 14BAs shown, in filter G, when the inductance of inductor L7 is 0.12 nH, attenuation poles 51 and 52 become one, and attenuation becomes smaller. As in filter H, provision of capacitor C7 separates attenuation poles 51 and 52, so attenuation near 4000 MHz becomes larger. As can be seen from the above, even when it is impossible to reduce the inductance of inductor L7, provision of capacitor C7 increases attenuation in the attenuation band.

[0088] Other circuit configurations

[0089] FIG. 15A to FIG. 15D 2 is a circuit diagram illustrating another circuit configuration of the second embodiment. Fig.15A As shown, inductors L8 and L9 and capacitors C5, C6, and C9 may be omitted. When an element having a first end connected to the ground and a second end connected to the node N1 is defined as a first element, an element connected between the signal terminal T1 and the signal terminal T2 is defined as a second element, an element connected in parallel with the second element between the signal terminals T1 and T2 is defined as a third element, and an element connected in series with the third element and in parallel with the second element between the signal terminals T1 and T2 is defined as a fourth element, the first element is the inductor L1, the second element is the acoustic wave resonator R2, the third element is the capacitor C3, and the fourth element is the capacitor C4. Other circuit configurations are similar to Fig. 13B The circuit configuration is the same, so the description thereof is omitted.

[0090] like Fig. 15B As shown, the first element may be a capacitor C1, the second element may be an acoustic wave resonator R2, the third element may be an inductor L3, and the fourth element may be an inductor L4. Fig. 15C As shown, the first element may be an acoustic wave resonator R1, the second element may be a capacitor C2, the third element may be an inductor L3, and the fourth element may be an inductor L4. Fig.15D As shown, the first element may be an acoustic wave resonator R1, the second element may be an inductor L2, the third element may be a capacitor C3, and the fourth element may be a capacitor C4.

[0091] As described above, the first element is selected from the group consisting of the acoustic wave resonator R1, the inductor L1 and the capacitor C1. When the first element is the acoustic wave resonator R1, the second element is selected from the inductor L2 and the capacitor C2, and when the first element is the inductor L1 or the capacitor C1, the second element is the acoustic wave resonator R2. The third element is selected from the inductor L3 and the capacitor C3, and the type of the third element is different from the type of the first element when the inductor or the capacitor is selected as the first element, and the type of the third element is different from the type of the second element when the inductor or the capacitor is selected as the second element. The fourth element is selected from the inductor L4 and the capacitor C4, and the type of the fourth element is the same as the type of the third element.

[0092] Inductor L5 (first inductor) has a first end connected to node N2, which is located between signal terminal T1 and the second element and between signal terminal T1 and the third element. Inductor L6 (second inductor) has a first end connected to node N3, which is located between signal terminal T2 and the second element and between signal terminal T2 and the fourth element. Inductor L7 (third inductor) has a first end connected to both the second end of inductor L5 and the second end of inductor L6, and has a second end connected to ground. This structure improves the attenuation characteristics in the attenuation band without increasing the number of filters in filter G. Inductor L7 can be formed in the multilayer substrate 10 of the first embodiment, but inductor L7 can be an inductor formed by solder 34 between the ground terminal Tg of the multilayer substrate 10 and the terminal 32 of the mounting board 30.

[0093] like Figure 7B and Figure 7C As shown, the transmission characteristics of the filter have an attenuation pole 50 (first attenuation pole) formed by one or more acoustic wave resonators R1 or R2, an attenuation pole 51 (second attenuation pole) formed by the filter circuit F1, and an attenuation pole 52 (third attenuation pole) formed by the filter circuit F1 and inductors L5 to L7. The attenuation poles 50 to 52 are formed at a frequency lower than the passband. The attenuation pole 51 is formed between the attenuation pole 52 and the passband, and the attenuation pole 50 is formed between the attenuation pole 51 and the passband. As shown above, the acoustic wave resonator R1 or R2 increases the attenuation steepness between the passband and the attenuation band. In addition, the inductor L7 is provided to move the attenuation pole 52 to a higher frequency. This improves the attenuation characteristics in the attenuation band.

[0094] like Fig. 14BAs shown, when the inductance of the inductor L7 is too large, the attenuation in the attenuation band decreases. Therefore, the inductance of the inductor L7 is preferably smaller than the inductance of the inductor L5 and the inductance of the inductor L6. The inductance of the inductor L7 is more preferably equal to or less than 1 / 5 of the inductance of the inductor L3 and 1 / 5 of the inductance of the inductor L6, and is further preferably equal to or less than 1 / 15 of the inductance of the inductor L3 and 1 / 15 of the inductance of the inductor L6. When the inductance of the inductor L7 is too small, the effect of improving the attenuation characteristics is reduced. Therefore, the inductance of the inductor L7 is more preferably equal to or greater than 1 / 100 of the inductance of the inductor L3 and 1 / 100 of the inductance of the inductor L6, and is further preferably equal to or greater than 1 / 50 of the inductance of the inductor L3 and 1 / 50 of the inductance of the inductor L6.

[0095] A capacitor C5 (first capacitor) connecting the first end of the inductor L5 to the second element and the third element and a capacitor C6 (second capacitor) connecting the first end of the inductor L6 to the third element and the fourth element may be provided as in the filter G. This structure allows the matching circuit M1 to be formed by the inductor L5 and the capacitor C5, and the matching circuit M2 to be formed by the inductor L6 and the capacitor C6.

[0096] There may be a case where the inductance of the inductor L7 is not reduced. For example, when the inductor L7 is an inductor formed by the solder 34 between the ground terminal Tg of the multilayer substrate 10 and the terminal 32 of the mounting board 30, the inductance of the inductor L7 may not be reduced. Therefore, as in Fig. 13C In the filter H shown in FIG. 1 , a capacitor C7 (third capacitor) is provided that connects the first end of the inductor L5 to the first end of the inductor L6. Fig. 14B As with the filter H shown, this improves the attenuation characteristics in the attenuation band.

[0097] The capacitance of the capacitor C7 is preferably smaller than the capacitance of the capacitor C5 and the capacitance of the capacitor C6, and more preferably equal to or smaller than 1 / 10 of the capacitance of the capacitor C5 and 1 / 10 of the capacitance of the capacitor C6.

[0098] The acoustic wave resonator R1 or R2 may be one acoustic wave resonator, or may be provided in plural.

[0099] Third embodiment

[0100] The third embodiment is an exemplary multiplexer to which the first and second embodiments and their modified examples are applied. Fig.16 is a circuit diagram of a triplexer according to the third embodiment. Fig.16As shown, the triplexer 60 includes filters 62, 64 and 66. The filter 62 is connected between the common terminal Ant and the terminal LB, the filter 64 is connected between the common terminal Ant and the terminal MB, and the filter 66 is connected between the common terminal Ant and the terminal HB. The antenna 68 is connected to the common terminal Ant. The filter 62 is, for example, a low-pass filter that allows high-frequency signals in a low-frequency band to pass through and suppresses signals of other frequencies. The filter 64 is, for example, a band-pass filter that allows high-frequency signals in an intermediate frequency band with a frequency higher than the low-frequency band to pass through and suppresses signals of other frequencies. The filter 66 is, for example, a high-pass filter that allows high-frequency signals in a high-frequency band with a frequency higher than the intermediate frequency band to pass through and suppresses signals of other frequencies.

[0101] At least one of the filters 62, 64, 66 may be the filter according to any one of the first embodiment and the second embodiment. A triplexer is described as an example of a multiplexer, but the multiplexer may be a diplexer, a duplexer, or a quadplexer.

[0102] Although the embodiments of the present invention have been described in detail, the present invention is not limited to such specific embodiments, and it should be understood that various changes, substitutions, and alterations may be made without departing from the spirit and scope of the present invention.

Claims

1. A filter, comprising: a first signal terminal; A second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a multilayer substrate having a first surface and a second surface opposite to the first surface, the first signal terminal and the second signal terminal being located on and in contact with the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned between the first surface and the second surface of the multi-layer substrate, the line being positioned closer to the first surface than the filter circuit, a first end of the line being connected to one of the first signal terminal and the second signal terminal; as well as a ground terminal located on the first surface and in contact with the first surface and to which the second end of the line is connected, and when the multilayer substrate is viewed in a plan view, an area where the line overlaps with the ground terminal is larger than an area where the line overlaps with one of the first signal terminal and the second signal terminal, The area of ​​a region where the line overlaps with the ground terminal in a plan view is equal to or greater than 1 / 2 of the area of ​​the line in a plan view.

2. The filter according to claim 1, wherein: The line is set to be multiple, One of the lines connects the first signal terminal to the ground terminal, and when the multilayer substrate is viewed in a plan view, an area where the one of the lines overlaps with the ground terminal is larger than an area where the one of the lines overlaps with the first signal terminal, and The other of the lines connects the second signal terminal to the ground terminal, and when the multilayer substrate is viewed in a plan view, an area where the other of the lines overlaps with the ground terminal is larger than an area where the other of the lines overlaps with the second signal terminal.

3. The filter according to claim 1, wherein The filter circuit includes an acoustic wave resonator, an inductor, and a capacitor.

4. A filter, comprising: a first signal terminal; A second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a substrate having a first surface and a second surface opposite to the first surface, the first signal terminal and the second signal terminal being located on the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned in the substrate closer to the first surface than the filter circuit, a first end of the line connected to one of the first signal terminal and the second signal terminal; as well as a ground terminal located on the first surface and to which the second end of the line is connected, wherein when the substrate is viewed in a plan view, an area where the line overlaps with the ground terminal is larger than an area where the line overlaps with one of the first signal terminal and the second signal terminal, wherein the area of ​​the region where the line overlaps with the ground terminal in a plan view is equal to or greater than 1 / 2 of the area of ​​the line in a plan view, and in: The line is set to be multiple, The ground terminal is provided in plural to correspond to the wires, and each of the ground terminals is connected to a corresponding one of the wires, One of the lines is connected to the first signal terminal, and when the substrate is viewed in a plan view, an area where the one of the lines overlaps with the corresponding ground terminal is larger than an area where the one of the lines overlaps with the first signal terminal, and The other of the lines is connected to the second signal terminal, and when the substrate is viewed in a plan view, an area where the other of the lines overlaps with the corresponding ground terminal is larger than an area where the other of the lines overlaps with the second signal terminal.

5. A filter, comprising: a first signal terminal; A second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a substrate having a first surface and a second surface opposite to the first surface, the first signal terminal and the second signal terminal being located on the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned in the substrate closer to the first surface than the filter circuit, a first end of the line connected to one of the first signal terminal and the second signal terminal; as well as a ground terminal located on the first surface and to which the second end of the line is connected, wherein when the substrate is viewed in a plan view, an area where the line overlaps with the ground terminal is larger than an area where the line overlaps with one of the first signal terminal and the second signal terminal, wherein the area of ​​the region where the line overlaps with the ground terminal in a plan view is equal to or greater than 1 / 2 of the area of ​​the line in a plan view, and Wherein, the filter circuit comprises: a first element having a first terminal connected to ground, the first element being selected from the group consisting of an acoustic wave resonator, an inductor, and a capacitor, a second element connected between the first signal terminal and the second signal terminal, when the first element is an acoustic wave resonator, the second element is selected from an inductor and a capacitor, when the first element is an inductor or a capacitor, the second element is an acoustic wave resonator, a third element connected in parallel with the second element between the first signal terminal and the second signal terminal and selected from an inductor and a capacitor, wherein when an inductor or a capacitor is selected as the first element, the type of the third element is different from the type of the first element, and when an inductor or a capacitor is selected as the second element, the type of the third element is different from the type of the second element, and A fourth element, which is connected in series with the third element and in parallel with the second element between the first signal terminal and the second signal terminal, the second end of the first element is connected between the fourth element and the third element, and the type of the fourth element is the same as that of the third element.

6. A filter, comprising: a first signal terminal; A second signal terminal; a filter circuit connected between the first signal terminal and the second signal terminal; a substrate having a first surface and a second surface opposite to the first surface, the first signal terminal and the second signal terminal being located on the first surface, and at least a portion of the filter circuit being located on one side of the second surface; a line positioned in the substrate closer to the first surface than the filter circuit, a first end of the line connected to one of the first signal terminal and the second signal terminal; as well as a ground terminal located on the first surface and to which the second end of the line is connected, wherein when the substrate is viewed in a plan view, an area where the line overlaps with the ground terminal is larger than an area where the line overlaps with one of the first signal terminal and the second signal terminal, wherein the area of ​​the region where the line overlaps with the ground terminal in a plan view is equal to or greater than 1 / 2 of the area of ​​the line in a plan view, and Wherein, the filter circuit includes an acoustic wave resonator, an inductor and a capacitor, The transmission characteristic of the filter has a first attenuation pole formed by the acoustic wave resonator, a second attenuation pole formed by the filter circuit, and a third attenuation pole formed by the filter circuit and the line, The first attenuation pole, the second attenuation pole, and the third attenuation pole are formed at a frequency lower than a passband of the filter, and The second attenuation pole is formed between the third attenuation pole and the passband, and the first attenuation pole is formed between the second attenuation pole and the passband.

7. A multiplexer, the multiplexer comprising: A filter according to any one of claims 1, 4, 5 and 6.

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