Display device and method for driving a display panel

The display device enhances display quality by inserting compensation images and adjusting gate power voltage based on duty ratio and brightness, addressing motion blur and charge-in rate issues in motion images.

CN113409735BActive Publication Date: 2025-07-15SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202110280714.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-03-16
Filing Date
2021-03-16
Publication Date
2025-07-15
Estimated Expiration
2041-03-16

AI Technical Summary

Technical Problem

The display device is prone to afterimage when displaying moving images, and the charging rate is insufficient when inserting black images between frame images, resulting in a decrease in display quality.

Method used

Change the gate power voltage by compensating the compensation duty cycle of the image, enhance the display quality, including inserting the compensation image between normal images, and adjusting the level of the gate power voltage according to the compensation duty cycle and brightness weights through the power voltage generator.

Benefits of technology

Effectively prevent or reduce image drag, improve the display quality of the display panel, prevent the data voltage charging rate from decreasing, and ensure the stability and clarity of image display.

✦ Generated by Eureka AI based on patent content.

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    Figure CN113409735B_ABST
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Abstract

A display device and a method for driving a display panel are provided. The display device includes: a display panel including gate lines, data lines, and pixels electrically connected to the gate lines and the data lines, and the pixels display a normal image and a compensation image; a gate driver configured to output a gate signal to the gate lines; a data driver configured to output a data voltage to the data lines; and a power voltage generator configured to change a level of a gate power voltage based on a compensation duty ratio, where the compensation duty ratio corresponds to a ratio between a display duration of the normal image and a display duration of the compensation image.
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Description

Technical Field

[0001] Aspects of example embodiments of the present disclosure relate to a display device and a method of driving a display panel. More specifically, example embodiments of the present disclosure relate to a display device for enhancing display quality and a method of driving a display panel of the display device. Background Art

[0002] Generally, a display device includes a display panel and a display panel driver. The display panel includes a plurality of gate lines, a plurality of data lines, a plurality of emission lines, and a plurality of pixels. The display panel driver includes a gate driver, a data driver, an emission driver, and a driving controller. The gate driver outputs a gate signal to the gate lines. The data driver outputs a data voltage to the data lines. The emission driver outputs an emission signal to the emission lines. The driving controller controls the gate driver, the data driver, and the emission driver.

[0003] When the display panel displays a moving image (e.g., a movie image), an afterimage of a previous frame image may be generated, such that the image may be displayed as if it were dragged. To reduce or prevent the afterimage, a black image may be inserted between frame images. However, when a black image is inserted between frame images, the charging rate may decrease due to insufficient charging time of the frame images.

[0004] The above information disclosed in this background art section is for enhancing understanding of the background art of the present disclosure, and thus, it may include information that does not constitute the prior art. Summary of the Invention

[0005] One or more example embodiments of the present disclosure relate to a display device that changes a gate power voltage based on a compensation duty ratio of a compensation image to enhance display quality.

[0006] One or more example embodiments of the present disclosure relate to a method of driving a display panel of a display device.

[0007] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including gate lines, data lines, and pixels electrically connected to the gate lines and the data lines, and the pixels are configured to display a normal image and a compensation image; a gate driver configured to output a gate signal to the gate lines; a data driver configured to output a data voltage to the data lines; and a power voltage generator configured to change a level of a gate power voltage based on a compensation duty ratio, the compensation duty ratio corresponding to a ratio between a display duration of the normal image and a display duration of the compensation image.

[0008] In an example embodiment, the gate power voltage may be a first gate power voltage corresponding to a high level of the gate signal.

[0009] In an exemplary embodiment, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image, and the power voltage generator may be configured to increase the first gate power voltage as the compensation duty ratio increases.

[0010] In an exemplary embodiment, the gate power voltage may be a second gate power voltage corresponding to a low level of a gate signal.

[0011] In an exemplary embodiment, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image, and the power voltage generator may be configured to decrease the second gate power voltage as the compensation duty ratio increases.

[0012] In an exemplary embodiment, the normal image may be displayed based on gray-scale data of input image data, and the compensation image may be displayed regardless of the gray-scale data of the input image data.

[0013] In an exemplary embodiment, the compensation image may be a black image.

[0014] In an exemplary embodiment, the display device may further include: a driving controller configured to control operations of a gate driver and a data driver. The driving controller may include: a compensation image insertion enabling determiner configured to enable and disable compensation image insertion; and a compensation duty ratio determiner configured to determine the compensation duty ratio when the compensation image insertion is enabled and output the compensation duty ratio to the power voltage generator.

[0015] In an exemplary embodiment, the power voltage generator may be configured to change a level of the gate power voltage based on the compensation duty ratio and a brightness weight, the brightness weight being used to change a brightness of the input image data according to the compensation duty ratio.

[0016] In an exemplary embodiment, the brightness weight may be increased when the compensation duty ratio increases.

[0017] In an exemplary embodiment, the gate power voltage may be a first gate power voltage corresponding to a high level of a gate signal.

[0018] In an exemplary embodiment, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image, the power voltage generator may be configured to increase the first gate power voltage as the compensation duty ratio increases, and the power voltage generator may be configured to increase the first gate power voltage as the brightness weight increases.

[0019] In an exemplary embodiment, the gate power voltage may be a second gate power voltage corresponding to a low level of the gate signal.

[0020] In an exemplary embodiment, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image. The power voltage generator may be configured to decrease the second gate power voltage as the compensation duty ratio increases, and the power voltage generator may be configured to decrease the second gate power voltage as the luminance weight increases.

[0021] In an exemplary embodiment, the display device may further include: a driving controller configured to control operations of the gate driver and the data driver. The driving controller may include: a compensation image insertion enabling determiner configured to enable and disable compensation image insertion; a compensation duty ratio determiner configured to determine the compensation duty ratio when the compensation image insertion is enabled and output the compensation duty ratio to the power voltage generator; a luminance weight application enabling determiner configured to enable and disable application of the luminance weight; and a luminance weight determiner configured to determine the luminance weight when the application of the luminance weight is enabled and output the luminance weight to the power voltage generator.

[0022] According to one or more exemplary embodiments of the present disclosure, a method of driving a display panel includes: determining a level of a gate power voltage based on a compensation duty ratio, the compensation duty ratio corresponding to a ratio between a display duration of a normal image and a display duration of a compensation image; generating a gate signal based on the gate power voltage; outputting the gate signal to a gate line; and outputting a data voltage to a data line based on input image data.

[0023] In an exemplary embodiment, the gate power voltage may be a first gate power voltage corresponding to a high level of the gate signal, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image, and the first gate power voltage may increase as the compensation duty ratio increases.

[0024] In an exemplary embodiment, the gate power voltage may be a second gate power voltage corresponding to a low level of the gate signal, the compensation duty ratio may be a ratio of a display duration of a compensation image to a sum of a display duration of a normal image and the display duration of the compensation image, and the second gate power voltage may decrease as the compensation duty ratio increases.

[0025] In an exemplary embodiment, a normal image may be displayed based on grayscale data of input image data, and a compensation image may be displayed regardless of the grayscale data of the input image data.

[0026] In an exemplary embodiment, the level of the gate power voltage may be determined based on a compensation duty ratio and a luminance weight, which is used to change the luminance of input image data according to the compensation duty ratio.

[0027] According to one or more exemplary embodiments of the present disclosure, in a display device and in a method of driving a display panel, a compensation image may be inserted between normal images so that image dragging caused by transient afterimages, which may occur due to a moving picture response time, may be prevented or substantially prevented.

[0028] In addition, according to one or more exemplary embodiments of the present disclosure, the gate power voltage may be changed based on a compensation duty ratio of the compensation image so that when the compensation image is inserted between normal images, a decrease in the charging rate of the data voltage and display defects caused by the decrease in the charging rate may be prevented or substantially prevented. The charging rate of the data voltage may be compensated so that the display quality of the display panel may be enhanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The above and other aspects and features of the present disclosure will become more apparent to those skilled in the art from the following detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0030] Figure 1 is a block diagram showing a display device according to an exemplary embodiment of the present disclosure;

[0031] Figure 2 is shown in Figure 1 a conceptual diagram of an image frame of an image displayed on a display panel of;

[0032] Figure 3 is shown Figure 1 a block diagram of a driving controller of;

[0033] Figure 4 is shown Figure 1 a circuit diagram of an example of a pixel of a display panel of;

[0034] Figure 5 is shown in Figure 1 a conceptual diagram of a charging rate of a data voltage charged at a pixel of;

[0035] Figure 6 is shown Figure 4 a graph of a current of a switching element according to a first gate power voltage of;

[0036] Figure 7 is shown in Figure 1 a graph of a charging rate of a data voltage charged at a pixel of according to a first gate power voltage;

[0037] Figure 8is a graph showing the first gate power voltage according to the compensation duty ratio determined by Figure 3 's compensation duty ratio determiner;

[0038] Figure 9 is a graph showing the charging rate of the data voltage charged at the pixel of Figure 1 according to the compensation of the first gate power voltage in Figure 8 ;

[0039] Figure 10 is a graph showing the waveform of the gate signal applied to the pixel of Figure 1 according to the second gate power voltage;

[0040] Figure 11 is a graph showing the charging rate of the data voltage charged at the pixel of Figure 1 according to the absolute value of the second gate power voltage;

[0041] Figure 12 is a graph showing the absolute value of the second gate power voltage according to the compensation duty ratio determined by Figure 3 's compensation duty ratio determiner;

[0042] Figure 13 is a graph showing the charging rate of the data voltage charged at the pixel of Figure 1 according to the compensation of the second gate power voltage in Figure 12 ;

[0043] Figure 14 is a block diagram showing a display device according to an exemplary embodiment of the present disclosure;

[0044] Figure 15 is a block diagram showing Figure 14 's driving controller;

[0045] Figure 16 is a graph showing the gate power voltage according to the brightness weight determined by Figure 15 's brightness weight determiner;

[0046] Figure 17 is a graph showing the charging rate of the data voltage charged at the pixel according to the compensation of the gate power voltage in Figure 16 ;

[0047] Figure 18 is a graph showing the gate power voltage according to the compensation duty ratio determined by Figure 15 's compensation duty ratio determiner and the brightness weight determined by Figure 15 's brightness weight determiner; and

[0048] Figure 19 is a graph showing the charging rate of the data voltage charged at the pixel according toFigure 18 Graph of compensation for the gate power voltage in Detailed implementation

[0049] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, in which like reference numerals always denote like elements. However, the present disclosure may be implemented in various different forms and should not be construed as limited to the embodiments shown herein. Instead, these embodiments are provided by way of example so that the present disclosure will be thorough and complete, and the present disclosure will fully convey the aspects and features of the present disclosure to those skilled in the art. Therefore, processes, elements, and techniques that are not necessary for a person of ordinary skill in the art to fully understand the aspects and features of the present disclosure may not be described. Unless otherwise noted, the same reference numerals denote the same elements throughout the drawings and the written description, and thus, their description may not be repeated.

[0050] In the drawings, for clarity, the relative dimensions of elements, layers, and regions may be exaggerated and / or simplified. For ease of explanation, spatial relative terms (such as "under", "below", "lower", "underneath", "above", and "upper") may be used herein to describe the relationship of one element or feature to another element or feature or a plurality of elements or features as shown in the drawings. It will be understood that, in addition to the orientation depicted in the drawings, the spatial relative terms are intended to cover different orientations of the device during use or operation. For example, if the device in the drawings is flipped over, an element described as "under" or "below" or "lower" another element or feature will then be oriented "above" the other element or feature. Thus, the example terms "under" and "underneath" can cover both an upper and a lower orientation. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatial relative descriptors used herein should be interpreted accordingly.

[0051] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, a first element, component, region, layer, or part described below may be referred to as a second element, component, region, layer, or part without departing from the spirit and scope of the present disclosure.

[0052] It will be understood that when an element or layer is referred to as being "on", "connected to", or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or there can be one or more intervening elements or layers. Further, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can also be one or more intervening elements or layers.

[0053] The terminology used herein is for the purpose of describing particular embodiments and is not intended to limit the disclosure. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" are also intended to include the plural forms. It will be further understood that when the terms "comprises", "comprising", "has", "having", "includes", "including", and variations thereof are used in this specification, they specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of" following a list of elements modify the entire list of elements and not individual elements in the list.

[0054] As used herein, the terms "substantially", "about", and similar terms are used as terms of approximation and not of degree, and are intended to account for the inherent deviations of measured or calculated values recognized by one of ordinary skill in the art. Further, when describing embodiments of the disclosure, the use of "may" refers to "one or more embodiments of the disclosure". As used herein, the terms "use", "using", and "used" may be considered synonymous with the terms "utilize", "utilizing", and "utilized", respectively. Additionally, the term "exemplary" is intended to indicate an example or illustration.

[0055] An electronic or electrical device (e.g., a driving controller, a gamma reference voltage generator, a data driver, a BI enable determiner, a BI duty ratio determiner, a luminance weight restart determiner, and / or a luminance weight determiner, etc.) and / or any other related device or component according to an embodiment of the present disclosure described herein can be implemented using any suitable hardware, firmware (e.g., an application specific integrated circuit), software, or a combination of software, firmware, and hardware. For example, various components of these devices can be formed on an integrated circuit (IC) chip or on separate IC chips. In addition, various components of these devices can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. Further, various components of these devices can be processes or threads that run on one or more processors in one or more computing devices, execute computer program instructions, and interact with other system components for performing various functions described herein. The computer program instructions are stored in a memory, which can be applied to a computing device using a standard memory device (such as, for example, a random access memory (RAM)). The computer program instructions can also be stored in other non-transitory computer-readable media (such as, for example, a CD-ROM or a flash drive, etc.). In addition, those skilled in the art should recognize that, without departing from the spirit and scope of the exemplary embodiments of the present disclosure, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed over one or more other computing devices.

[0056] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms such as those defined in a general dictionary should be interpreted as having a meaning that is consistent with their meaning in the relevant art and / or the context of this specification, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0057] Figure 1 is a block diagram showing a display device according to an exemplary embodiment of the present disclosure.

[0058] Referring to Figure 1 , the display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller (e.g., a timing controller) 200, a gate driver (e.g., a scan driver) 300, a gamma reference voltage generator 400, and a data driver 500. The display panel driver further includes a power voltage generator 600.

[0059] In some embodiments, for example, the driving controller 200 and the data driver 500 may be integrally formed with each other. In some embodiments, for example, the driving controller 200, the gamma reference voltage generator 400, and the data driver 500 may be integrally formed with each other. A driving module including at least the driving controller 200 and the data driver 500 that may be integrally formed with each other may be referred to as a timing controller embedded data driver (TED).

[0060] The display panel 100 has a display area where an image is displayed (e.g., therein or thereon) and a peripheral area adjacent to the display area. For example, the peripheral area may at least partially surround the display area (e.g., around the periphery of the display area).

[0061] The display panel 100 includes a plurality of gate lines GL, a plurality of data lines DL, and a plurality of pixels P connected to the gate lines GL and the data lines DL. The gate lines GL extend in a first direction D1, and the data lines DL extend in a second direction D2 intersecting the first direction D1.

[0062] In the present exemplary embodiment, the display panel 100 may be an organic light emitting display panel including organic light emitting elements. However, the present disclosure is not limited thereto, and in another exemplary embodiment, the display panel 100 may be a liquid crystal display panel including liquid crystal molecules.

[0063] The driving controller 200 receives input image data IMG and an input control signal CONT from an external device. In some embodiments, the input image data IMG may include red image data, green image data, and blue image data. In some embodiments, the input image data IMG may include white image data. In some embodiments, the input image data IMG may include magenta image data, yellow image data, and cyan image data. The input control signal CONT may include a main clock signal and a data enable signal. In some embodiments, the input control signal CONT may further include a vertical synchronization signal and a horizontal synchronization signal.

[0064] The driving controller 200 generates a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, a compensation duty ratio BD, and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0065] The driving controller 200 generates a first control signal CONT1 for controlling the operation of the gate driver 300 based on the input control signal CONT, and outputs the first control signal CONT1 to the gate driver 300. The first control signal CONT1 may further include a vertical start signal and a gate clock signal.

[0066] The driving controller 200 generates a second control signal CONT2 for controlling the operation of the data driver 500 based on the input control signal CONT, and outputs the second control signal CONT2 to the data driver 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0067] The driving controller 200 generates a data signal DATA based on the input image data IMG. The driving controller 200 outputs the data signal DATA to the data driver 500.

[0068] The driving controller 200 generates a third control signal CONT3 for controlling the operation of the gamma reference voltage generator 400 based on the input control signal CONT, and outputs the third control signal CONT3 to the gamma reference voltage generator 400.

[0069] The gate driver 300 generates a gate signal for driving the gate line GL in response to the first control signal CONT1 received from the driving controller 200. The gate driver 300 outputs the gate signal to the gate line GL. For example, the gate driver 300 may sequentially output the gate signal to the gate line GL. In some embodiments, for example, the gate driver 300 may be integrated on the display panel 100. For example, the gate driver 300 may be mounted on the display panel 100.

[0070] The gamma reference voltage generator 400 generates a gamma reference voltage VGREF in response to the third control signal CONT3 received from the driving controller 200. The gamma reference voltage generator 400 provides the gamma reference voltage VGREF to the data driver 500. The gamma reference voltage VGREF may have a value corresponding to the level of the data signal DATA.

[0071] In an exemplary embodiment, the gamma reference voltage generator 400 may be provided at the driving controller 200 (e.g., provided in the driving controller 200 or provided on the driving controller 200), or provided at the data driver 500 (e.g., provided in the data driver 500 or provided on the data driver 500).

[0072] The data driver 500 receives the second control signal CONT2 and the data signal DATA from the driving controller 200, and receives the gamma reference voltage VGREF from the gamma reference voltage generator 400. The data driver 500 converts the data signal DATA into a data voltage of an analog type by using the gamma reference voltage VGREF. The data driver 500 outputs the data voltage to the data line DL.

[0073] The power voltage generator 600 may generate a power voltage for driving at least one of the display panel 100, the driving controller 200, the gate driver 300, the gamma reference voltage generator 400, and the data driver 500.

[0074] For example, the power voltage generator 600 may output a first pixel power voltage ELVDD and a second pixel power voltage ELVSS to the display panel 100, and the first pixel power voltage ELVDD and the second pixel power voltage ELVSS are applied to the pixel P of the display panel 100.

[0075] For example, the power voltage generator 600 may generate a gate power voltage for determining the level of the gate signal, and may output the gate power voltage to the gate driver 300. The power voltage generator 600 may generate a first gate power voltage VGH for determining the high level of the gate signal and a second gate power voltage VGL for determining the low level of the gate signal. The power voltage generator 600 may output the first gate power voltage VGH and the second gate power voltage VGL to the gate driver 300. As described in more detail below, in some embodiments, the power voltage generator 600 may change the level of the gate power voltage (e.g., VGH and / or VGL) based on the compensation duty ratio BD received from the driving controller 200.

[0076] Figure 2 is a conceptual diagram of an image frame showing an image displayed on the Figure 1 display panel 100.

[0077] Referring to Figure 1 and Figure 2 , the display panel 100 displays images in units of frames. The display panel 100 displays a first frame image in the first frame FRAME1 and a second frame image different from the first frame image in the second frame FRAME2.

[0078] In the present exemplary embodiment, the display panel 100 may display normal images IMAGE1 and IMAGE2 and a compensation image BLACK. The normal images IMAGE1 and IMAGE2 may be displayed based on the gray scale data of the input image data IMG. On the other hand, the compensation image BLACK may be displayed regardless of the gray scale data of the input image data IMG.

[0079] The compensation image BLACK may be inserted between the normal images IMAGE1 and IMAGE2 so that image drag caused by transient afterimages, which may occur due to the moving picture response time, can be prevented or substantially prevented. For example, the compensation image BLACK may be a low-luminance image. For example, the compensation image BLACK may be a black image.

[0080] The power voltage generator 600 can change the level of the gate power voltage (e.g., VGH and / or VGL) based on the compensation duty ratio BD, where the compensation duty ratio BD is determined based on the ratio between the display duration DU1 of the normal image IMAGE1 and the display duration DU2 of the compensation image BLACK. For example, the compensation duty ratio BD can refer to the ratio of the display duration DU2 of the compensation image BLACK to the sum of the display duration DU1 of the normal image IMAGE1 and the display duration DU2 of the compensation image BLACK (e.g., DU1 + DU2).

[0081] Figure 3 is shown in more detail Figure 1 block diagram of the driving controller 200.

[0082] Referring to Figures 1 to 3 , the driving controller 200 can include a compensation image insertion enable determiner (e.g., BI enable determiner) 220 and a compensation duty ratio determiner (e.g., BI duty ratio determiner) 240. The compensation image insertion enable determiner 220 can enable and disable the compensation image insertion. For example, when the compensation image BLACK is to be inserted (e.g., when the consecutive images to be displayed are moving images), the compensation image insertion enable determiner 220 can generate a compensation image insertion signal BI with an enable level and can provide the compensation image insertion signal BI to the compensation duty ratio determiner 240. When the compensation image insertion signal BI is enabled, the compensation duty ratio determiner 240 can determine the compensation duty ratio BD and can output the compensation duty ratio BD to the power voltage generator 600. The driving controller 200 can determine whether to insert the compensation image BLACK between the normal images IMAGE1 and IMAGE2 based on the input image data IMG. When the driving controller 200 determines that the input image data IMG causes image dragging due to transient afterimage, the driving controller 200 can determine to insert the compensation image BLACK between the normal images IMAGE1 and IMAGE2. Optionally, whether to insert the compensation image BLACK between the normal images IMAGE1 and IMAGE2 is determined by user setting.

[0083] For example, the compensation duty ratio determiner 240 can output the compensation duty ratio BD to the gate power voltage generator 620 of the power voltage generator 600.

[0084] The gate power voltage generator 620 can change the level of the gate power voltage (e.g., VGH and / or VGL) based on the compensation duty ratio BD.

[0085] Figure 4 is shown Figure 1A circuit diagram of an example of a pixel P of the display panel 100. Figure 5 is a conceptual diagram showing the Figure 1 charging rate of the data voltage VD charged at the pixel P.

[0086] Referring to Figures 1 to 5 , the pixel P includes a first pixel switching element (e.g., a first pixel switching transistor) T1, a second pixel switching element (e.g., a second pixel switching transistor) T2, a storage capacitor CS, and an organic light-emitting element (e.g., an organic light-emitting diode) OLED.

[0087] The first pixel switching element T1 can be a thin-film transistor. The first pixel switching element T1 includes a control electrode connected to the gate line GL, an input electrode connected to the data line DL, and an output electrode connected to the control electrode of the second pixel switching element T2.

[0088] The control electrode of the first pixel switching element T1 can be a gate electrode. The input electrode of the first pixel switching element T1 can be a source electrode. The output electrode of the first pixel switching element T1 can be a drain electrode.

[0089] The second pixel switching element T2 can be a thin-film transistor. The second pixel switching element T2 includes a control electrode connected to the output electrode of the first pixel switching element T1, an input electrode to which the first pixel power voltage ELVDD is applied, and an output electrode connected to the first electrode of the organic light-emitting element OLED.

[0090] The control electrode of the second pixel switching element T2 can be a gate electrode. The input electrode of the second pixel switching element T2 can be a source electrode. The output electrode of the second pixel switching element T2 can be a drain electrode.

[0091] The first end of the storage capacitor CS is connected to the input electrode of the second pixel switching element T2. The second end of the storage capacitor CS is connected to the output electrode of the first pixel switching element T1.

[0092] The first electrode of the organic light-emitting element OLED is connected to the output electrode of the second pixel switching element T2. The second pixel power voltage ELVSS is applied to the second electrode of the organic light-emitting element OLED.

[0093] The first electrode of the organic light-emitting element OLED can be an anode electrode. The second electrode of the organic light-emitting element OLED can be a cathode electrode.

[0094] The pixel P receives the gate signal GS, the data voltage VD, the first pixel power voltage ELVDD, and the second pixel power voltage ELVSS, and the organic light-emitting element OLED can emit light with a brightness corresponding to the data voltage VD to display an image.

[0095] When the charging rate of the data voltage VD is insufficient, the organic light-emitting element OLED cannot display an image with a desired brightness. For example, when a compensation image BLACK is inserted between the normal images IMAGE1 and IMAGE2 to reduce the transient afterimage caused by the moving picture response time, the charging rate of the data voltage VD will be insufficient.

[0096] As Figure 5 shown, the charging rate CHR of the data voltage VD can be determined based on the waveform of the pulse of the gate signal GS, the waveform of the pulse of the data voltage VD, the timing of the pulse of the gate signal GS, and the timing of the pulse of the data voltage VD. In Figure 5 , the charging rate CHR of the data voltage VD can be expressed as the overlapping portion of the pulse of the gate signal GS and the pulse of the data voltage VD.

[0097] Figure 6 is a graph showing the current (e.g., switch transistor current) ISW of the switching element Figure 4 according to the first gate power voltage VGH. Figure 7 is a graph showing the charging rate of the data voltage VD charged at the pixel P Figure 1 according to the first gate power voltage VGH. Figure 8 is a graph showing the first gate power voltage VGH according to the compensation duty ratio BD determined by the compensation duty ratio determiner 240 Figure 3 . Figure 9 is a graph showing the compensation of the charging rate of the data voltage VD charged at the pixel P Figure 1 according to the compensation of the first gate power voltage VGH Figure 8 in

[0098] Referring to Figures 1 to 9 , in the present exemplary embodiment, the gate power voltage generator 620 can change the first gate power voltage VGH based on the compensation duty ratio BD. For example, in some embodiments, as the compensation duty ratio BD increases, the gate power voltage generator 620 can increase the first gate power voltage VGH.

[0099] As Figure 4 , Figure 5 and Figure 6 shown, when the first gate power voltage VGH increases, the switch transistor current ISW flowing through the input electrode and the output electrode of the first pixel switch transistor T1 increases.

[0100] Therefore, as Figure 7 shown, when the first gate power voltage VGH increases, the charging rate of the data voltage VD can increase.

[0101] Generally, when the compensation duty ratio BD increases, the charging time of the data voltage VD decreases, resulting in a decrease in the charging rate of the data voltage VD (e.g., without VGH compensation). Therefore, as Figure 8 shown, when the compensation duty ratio BD increases, the gate power voltage generator 620 can increase the first gate power voltage VGH (e.g., with VGH compensation). Therefore, as Figure 9 shown, the charging rate of the data voltage VD can be compensated due to the increase in the first gate power voltage VGH (e.g., with VGH compensation).

[0102] Figure 10 is a graph showing the waveform of the gate signal GS applied to the gate of the pixel P according to the second gate power voltage VGL Figure 1 . Figure 11 is a graph showing the charging rate of the data voltage VD charged at the pixel P Figure 1 according to the absolute value |VGL| of the second gate power voltage VGL. Figure 12 is a graph showing the absolute value |VGL| of the second gate power voltage VGL according to the compensation duty ratio BD determined by the compensation duty ratio determiner 240 Figure 3 . Figure 13 is a graph showing the charging rate of the data voltage VD charged at the pixel P Figure 1 according to the compensation of the second gate power voltage VGL Figure 12 in

[0103] Referring to Figures 1 to 5 and Figures 10 to 13 , in the present exemplary embodiment, the gate power voltage generator 620 can change the second gate power voltage VGL based on the compensation duty ratio BD. For example, in some embodiments, as the compensation duty ratio BD increases, the gate power voltage generator 620 can decrease the second gate power voltage VGL. When the polarity of the second gate power voltage VGL is defined as negative, as the compensation duty ratio BD increases, the gate power voltage generator 620 can increase the absolute value |VGL| of the second gate power voltage VGL.

[0104] As Figure 10 shown, as the second gate power voltage VGL decreases, the fall time of the waveform of the gate signal GS can decrease. The second fall time of the gate signal GS when the gate signal GS decreases from the high level to the second level VGL2 can be shorter than the first fall time of the gate signal GS when the gate signal GS decreases from the high level to the first level VGL1. The third fall time of the gate signal GS when the gate signal GS decreases from the high level to the third level VGL3 can be shorter than the second fall time of the gate signal GS when the gate signal GS decreases from the high level to the second level VGL2.

[0105] When the falling time of the waveform of the gate signal GS is shorter, the gate signal GS can be reduced more quickly to a level lower than the threshold voltage VTH of the first pixel switching transistor T1, so that the switching characteristics of the first pixel switching transistor T1 can be enhanced. When the switching characteristics of the first pixel switching transistor T1 are enhanced, the charging rate of the data voltage VD can be increased.

[0106] Generally, when the compensation duty ratio BD increases, the charging time of the data voltage VD decreases, so that the charging rate of the data voltage VD will decrease (for example, without |VGL| compensation). Therefore, as Figure 12 shown, when the compensation duty ratio BD increases, the gate power voltage generator 620 can decrease the second gate power voltage VGL or can increase the absolute value |VGL| of the second gate power voltage VGL (for example, with |VGL| compensation). Therefore, as Figure 13 shown, the charging rate of the data voltage VD can be compensated due to the decrease of the second gate power voltage VGL or the increase of the absolute value |VGL| of the second gate power voltage VGL (for example, with |VGL| compensation).

[0107] As described with reference to Figures 5 to 9 In some embodiments, the power voltage generator 600 can change the level of the first gate power voltage VGH according to the compensation duty ratio BD. As described with reference to Figures 10 to 13 In some embodiments, the power voltage generator 600 can change the level of the second gate power voltage VGL according to the compensation duty ratio BD. In an exemplary embodiment, the power voltage generator 600 can change the levels of both the first gate power voltage VGH and the second gate power voltage VGL according to the compensation duty ratio BD.

[0108] According to this exemplary embodiment, a compensation image BLACK is inserted between the normal images IMAGE1 and IMAGE2, so that image dragging caused by transient afterimages, which may occur due to the motion picture response time, can be prevented or substantially prevented.

[0109] In addition, the gate power voltages (VGH and / or VGL) are changed based on the compensation duty ratio BD of the compensation image BLACK, so that when the compensation image BLACK is inserted between the normal images IMAGE1 and IMAGE2, a decrease in the charging rate of the data voltage VD and display defects caused by the decrease in the charging rate can be prevented or substantially prevented. The charging rate of the compensation data voltage VD is compensated, so that the display quality of the display panel 100 can be enhanced.

[0110] Figure 14 is a block diagram showing a display device according to an exemplary embodiment of the present disclosure. Figure 15 is showingFigure 14 Block diagram of the driving controller 200.

[0111] Except for the structures of the driving controller 200 and the power voltage generator 600 and the operations of the driving controller 200 and the power voltage generator 600, the display device and the method of driving the display panel 100 according to the present exemplary embodiment are the same as or substantially the same as the methods of the display device and the driving display panel 100 described with reference to Figures 1 to 13 The same reference numerals will be used to denote elements or components that are the same as or substantially the same as the elements or components (e.g., the same or similar elements or components) described in the embodiments of Figures 1 to 13 and redundant descriptions thereof may not be repeated.

[0112] With reference to Figure 2 and Figures 4 to 15 , the display device includes a display panel 100 and a display panel driver. The display panel driver includes a driving controller (e.g., a timing controller) 200, a gate driver (e.g., a scan driver) 300, a gamma reference voltage generator 400, and a data driver 500. The display panel driver further includes a power voltage generator 600.

[0113] In the present exemplary embodiment, the display panel 100 may display normal images IMAGE1 and IMAGE2 and a compensation image BLACK. The normal images IMAGE1 and IMAGE2 may be displayed based on the gray-scale data of the input image data IMG. On the other hand, the compensation image BLACK may be displayed regardless of the gray-scale data of the input image data IMG.

[0114] The power voltage generator 600 may change the level of the gate power voltage (e.g., VGH and / or VGL) based on a compensation duty ratio BD, where the compensation duty ratio BD is determined based on the ratio between the display duration DU1 of the normal image IMAGE1 and the display duration DU2 of the compensation image BLACK. In addition, the power voltage generator 600 may change the level of the gate power voltage (e.g., VGH and / or VGL) based on a luminance weight LW, and the luminance weight LW is used to change the luminance of the input image data IMG according to the compensation duty ratio BD. Here, the compensation duty ratio BD may refer to the ratio of the display duration DU2 of the compensation image BLACK to the sum of the display duration DUI of the normal image IMAGE1 and the display duration DU2 of the compensation image BLACK (e.g., DU1 + DU2). The luminance weight LW may be a gain that is multiplied by the input image data IMG to increase the luminance of the image. For example, when the luminance weight LW is 1.2, the luminance of the input image data IMG may be increased by 20%.

[0115] The driving controller 200 may include a compensation image insertion enabling determiner (e.g., BI enabling determiner) 220 and a compensation duty ratio determiner (e.g., BI duty ratio determiner) 240. The compensation image insertion enabling determiner 220 may enable and disable compensation image insertion. For example, when a compensation image BLACK is to be inserted (e.g., when consecutive images to be displayed are moving images), the compensation image insertion enabling determiner 220 may generate a compensation image insertion signal BI having an enabling level, and may provide the compensation image insertion signal BI to the compensation duty ratio determiner 240. When the compensation image insertion signal BI is enabled, the compensation duty ratio determiner 240 may determine a compensation duty ratio BD, and may output the compensation duty ratio BD to the power voltage generator 600 (e.g., output to the gate power voltage generator 620).

[0116] In the present exemplary embodiment, the driving controller 200 may further include a luminance weight restart enabling determiner 260 and a luminance weight determiner 280. The luminance weight restart enabling determiner 260 may enable and disable the application of the luminance weight LW. For example, when the luminance weight LW is to be applied according to the compensation duty ratio BD (e.g., when the luminance amount of an image to be displayed exceeds a threshold), the luminance weight restart enabling determiner 260 may generate a luminance weight restart enabling signal LE having an enabling level, and may provide the luminance weight restart enabling signal LE to the luminance weight determiner 280. When the luminance weight restart enabling signal LE is enabled, the luminance weight determiner 280 may determine the luminance weight LW, and may output the luminance weight LW to the power voltage generator 600 (e.g., output to the gate power voltage generator 620). The driving controller 200 may determine whether to apply the luminance weight LW based on the compensation duty ratio BD. Alternatively, whether to apply the luminance weight LW may be determined by user setting.

[0117] The compensation duty ratio determiner 240 may output the compensation duty ratio BD to the gate power voltage generator 620 of the power voltage generator 600. The luminance weight determiner 280 may output the luminance weight LW to the gate power voltage generator 620 of the power voltage generator 600.

[0118] The gate power voltage generator 620 may change the level of the gate power voltage (e.g., VGH and / or VGL) based on the compensation duty ratio BD and the luminance weight LW.

[0119] When the charging rate of the data voltage VD is insufficient, the organic light-emitting element OLED may not display an image with a desired luminance. For example, when a compensation image BLACK is inserted between normal images IMAGE1 and IMAGE2 to reduce transient afterimages caused by the motion picture response time, the charging rate of the data voltage VD will be insufficient.

[0120] When the compensation duty ratio BD increases, the luminance weight LW can increase. In order to compensate for the decrease in the charging rate of the data voltage VD caused by the compensation duty ratio BD, the driving controller 200 can use the luminance weight LW to amplify the luminance of the input image data IMG.

[0121] However, when the level of the data voltage VD increases due to the increase in the luminance weight LW, the rise time of the waveform of the data voltage VD increases due to the increase in the level of the data voltage VD. Therefore, the desired data voltage VD may not be fully charged. Therefore, when the application of the luminance weight LW is enabled, additional compensation of the gate power voltage (e.g., VGH and / or VGL) can be expected.

[0122] Figure 16 is a graph showing the gate power voltage (e.g., VGH and / or VGL) according to Figure 15 the luminance weight determined by the luminance weight determiner 280. Figure 17 is a graph showing the charging rate of the data voltage VD charged at the pixel P according to Figure 16 the compensation of the gate power voltage (e.g., VGH and / or VGL) in

[0123] Referring to Figure 2 and Figures 4 to 17 , generally, when the luminance weight LW increases, the charging load of the data voltage VD increases, making it impossible to guarantee the desired charging rate of the data voltage VD (e.g., without gate power voltage compensation). Therefore, as shown in Figure 16 , when the luminance weight LW increases, the gate power voltage generator 620 can increase the first gate power voltage VGH and / or can decrease the second gate power voltage VGL (or increase the absolute value |VGL| of the second gate power voltage VGL) (e.g., with gate power voltage compensation). Therefore, as shown in Figure 17 , the charging rate of the data voltage VD can be compensated due to the increase in the first gate power voltage VGH and / or the decrease in the second gate power voltage VGL (e.g., with gate power voltage compensation).

[0124] Figure 16 and Figure 17 The power voltage generator 600 of the present exemplary embodiment in can selectively change one of the level of the first gate power voltage VGH and the level of the second gate power voltage VGL. In other embodiments, Figure 16 and Figure 17 the power voltage generator 600 of the present exemplary embodiment in can change both the level of the first gate power voltage VGH and the level of the second gate power voltage VGL.

[0125] Figure 18 is a graph showing the gate power voltage (e.g., VGH and / or VGL) according to the compensation duty ratio BD determined by the compensation duty ratio determiner 240 of Figure 15 and the luminance weight LW determined by the luminance weight determiner 280 of Figure 15 . Figure 19 is a graph showing the charging rate of the data voltage VD charged at the pixel P according to Figure 18 the compensation of the gate power voltage (e.g., VGH and / or VGL) in

[0126] Referring to Figure 2 and Figures 4 to 19 , when the compensation duty ratio BD increases, the gate power voltage generator 620 may increase the level of the first gate power voltage VGH. When the luminance weight LW increases, the gate power voltage generator 620 may increase the level of the first gate power voltage VGH.

[0127] When the compensation duty ratio BD increases, the gate power voltage generator 620 may decrease the level of the second gate power voltage VGL (or increase the absolute value |VGL| of the level of the second gate power voltage VGL). When the luminance weight LW increases, the gate power voltage generator 620 may decrease the level of the second gate power voltage VGL (or increase the absolute value |VGL| of the level of the second gate power voltage VGL).

[0128] As Figure 18 and Figure 19 shown, when compensating the gate power voltage (e.g., VGH and / or VGL) based on the compensation duty ratio BD and the luminance weight LW, the charging rate of the data voltage VD can be further increased compared to the case of compensating the gate power voltage (e.g., VGH and / or VGL) only based on the compensation duty ratio BD.

[0129] According to this exemplary embodiment, a compensation image BLACK is inserted between the normal images IMAGE1 and IMAGE2, so that image dragging caused by transient afterimages, which may occur due to the motion picture response time, can be prevented or substantially prevented.

[0130] In addition, the gate power voltage (e.g., VGH and / or VGL) is changed based on the compensation duty ratio BD and the luminance weight LW of the compensation image BLACK, so that when the compensation image BLACK is inserted between the normal images IMAGE1 and IMAGE2, a decrease in the charging rate of the data voltage VD and display defects caused by the decrease in the charging rate can be prevented or substantially prevented. The charging rate of the compensation data voltage VD is compensated, thereby enhancing the display quality of the display panel 100.

[0131] According to one or more exemplary embodiments of the present disclosure, the display quality of the display panel can be enhanced.

[0132] Although some exemplary embodiments have been described, it will be readily understood by those skilled in the art that various modifications can be made to the exemplary embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of features or aspects within each embodiment is generally considered applicable to other similar features or aspects in other embodiments. Thus, it will be apparent to those of ordinary skill in the art that, unless otherwise specifically indicated, the features, characteristics, and / or elements described in connection with a particular embodiment can be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. In the claims, the means-plus-function clauses (if any) are intended to cover the structures described herein for performing the recited functions, and cover not only structural equivalents but also equivalent structures. Accordingly, it should be understood that the foregoing is illustrative of various exemplary embodiments and should not be construed as limited to the specific exemplary embodiments disclosed herein, and that various modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the spirit and scope of the present disclosure as defined in the appended claims and their equivalents.

Claims

1. A display device, the display device comprising: A display panel, the display panel comprising: gate lines; data lines; and pixels electrically connected to the gate lines and the data lines and configured to display a normal image and a compensation image; A gate driver configured to output a gate signal to the gate lines; A data driver configured to output a data voltage to the data lines; and A power voltage generator configured to change a level of a gate power voltage based on a compensation duty ratio corresponding to a ratio between a display duration of the normal image and a display duration of the compensation image, wherein a low level and a high level of the gate signal are determined based on the level of the gate power voltage, and wherein absolute values of the low level and the high level of the gate signal increase when the compensation duty ratio increases.

2. The display device according to claim 1, wherein, The gate power voltage is a first gate power voltage corresponding to the high level of the gate signal.

3. The display device according to claim 2, wherein, The compensation duty ratio is a ratio of the display duration of the compensation image to a sum of the display duration of the normal image and the display duration of the compensation image, and wherein the power voltage generator is configured to increase the first gate power voltage as the compensation duty ratio increases.

4. The display device according to claim 1, wherein, The gate power voltage is a second gate power voltage corresponding to the low level of the gate signal.

5. The display device according to claim 4, wherein, The compensation duty ratio is a ratio of the display duration of the compensation image to a sum of the display duration of the normal image and the display duration of the compensation image, and wherein the power voltage generator is configured to decrease the second gate power voltage as the compensation duty ratio increases.

6. The display device according to claim 1, wherein, The normal image is displayed based on gray-scale data of input image data, and wherein the compensation image is displayed regardless of the gray-scale data of the input image data.

7. The display device according to claim 6, wherein, The compensation image is a black image.

8. The display device according to any one of claims 1 to 7, wherein the display device further comprises: A driving controller configured to control operations of the gate driver and the data driver, wherein the driving controller includes: a compensation image insertion enabling determiner configured to enable and disable compensation image insertion; and a compensation duty ratio determiner configured to determine the compensation duty ratio when the compensation image insertion is enabled and output the compensation duty ratio to the power voltage generator.

9. The display device according to claim 1, wherein, The power voltage generator is configured to change the level of the gate power voltage based on the compensation duty ratio and a brightness weight for changing brightness of the input image data according to the compensation duty ratio.

10. The display device according to claim 9, wherein, The brightness weight increases when the compensation duty ratio increases.

11. The display device according to claim 9, wherein, The gate power voltage is a first gate power voltage corresponding to the high level of the gate signal.

12. The display device according to claim 11, wherein, The compensation duty ratio is a ratio of the display duration of the compensation image to a sum of the display duration of the normal image and the display duration of the compensation image, wherein the power voltage generator is configured to increase the first gate power voltage as the compensation duty ratio increases, and Wherein, the power voltage generator is configured to increase the first gate power voltage as the luminance weight increases.

13. The display device according to claim 9, wherein, The gate power voltage is a second gate power voltage corresponding to a low level of the gate signal.

14. The display device according to claim 13, wherein, The compensation duty ratio is a ratio of the display duration of the compensation image to the sum of the display duration of the normal image and the display duration of the compensation image. Wherein, the power voltage generator is configured to decrease the second gate power voltage as the compensation duty ratio increases, and Wherein, the power voltage generator is configured to decrease the second gate power voltage as the luminance weight increases.

15. The display device according to any one of claims 9 to 14, wherein the display device further comprises: A driving controller, configured to control operations of the gate driver and the data driver. Wherein, the driving controller includes: a compensation image insertion enabling determiner, configured to enable compensation image insertion and disable the compensation image insertion; a compensation duty ratio determiner, configured to determine the compensation duty ratio when the compensation image insertion is enabled, and output the compensation duty ratio to the power voltage generator; a luminance weight application enabling determiner, configured to enable application of the luminance weight and disable the application of the luminance weight; and a luminance weight determiner, configured to determine the luminance weight when the luminance weight is enabled, and output the luminance weight to the power voltage generator.

16. A method of driving a display panel, the method including: Determining a level of a gate power voltage based on a compensation duty ratio, the compensation duty ratio corresponding to a ratio between a display duration of a normal image and a display duration of a compensation image; Generating a gate signal based on the gate power voltage; Outputting the gate signal to a gate line; And Outputting a data voltage to a data line based on input image data. Wherein, a low level and a high level of the gate signal are determined based on the level of the gate power voltage, and Wherein, absolute values of the low level and the high level of the gate signal increase as the compensation duty ratio increases.

17. The method according to claim 16, wherein, The gate power voltage is a first gate power voltage corresponding to a high level of the gate signal. Wherein, the compensation duty ratio is a ratio of the display duration of the compensation image to the sum of the display duration of the normal image and the display duration of the compensation image, and Wherein, the first gate power voltage increases as the compensation duty ratio increases.

18. The method according to claim 16, wherein, The gate power voltage is a second gate power voltage corresponding to a low level of the gate signal. Wherein, the compensation duty ratio is a ratio of the display duration of the compensation image to the sum of the display duration of the normal image and the display duration of the compensation image, and Wherein, the second gate power voltage decreases as the compensation duty ratio increases.

19. The method according to claim 16, wherein Displaying the normal image based on gray-scale data of the input image data, and Wherein, the compensation image is displayed regardless of the gray-scale data of the input image data.

20. The method according to claim 16, wherein, Determine the level of the gate power voltage based on the compensation duty ratio and the luminance weight, where the luminance weight is used to change the luminance of the input image data according to the compensation duty ratio.

Citation Information

Patent Citations

  • Display device and driving method thereof

    CN1746959A

  • Flat-panel display device

    JP2006267967A