Wireless synchronization for multi-channel radio frequency heating and drying equipment

Abstract

This invention relates to wireless synchronization of multi-channel radio frequency (RF) heating and drying equipment, specifically a multi-channel RF device for heating and drying applications, comprising a first channel and a second channel. More specifically, this invention relates to synchronizing multi-channel RF devices for heating and drying applications. More specifically, this invention relates to a solid-state cooking device and synchronization of the solid-state cooking device. The multi-channel RF device according to the invention is characterized in that: the second channel is configured to wirelessly receive a first RF signal transmitted by the first channel, extract the frequency of the first RF signal from the received first RF signal, generate a second RF signal based on the extracted frequency, and transmit the second RF signal into a chamber. By wirelessly synchronizing the RF channels, no RF hardware is required between multiple channels, and frequency planning for the second channel is eliminated. Wireless synchronization can significantly reduce the cost of multi-channel RF devices whose signal sources are physically separated.

Description

Technical Field

[0001] This invention relates to a multi-channel radio frequency (RF) device for heating and drying applications. More specifically, this invention relates to the synchronization of a multi-channel RF device for heating and drying applications. More specifically, this invention relates to a solid-state cooking device, and the synchronization of the solid-state cooking device. Background Technology

[0002] Multichannel radio frequency (RF) devices configured for heating and drying applications can use electromagnetic (EM) energy to heat or dry specific items. Multichannel RF devices can be used in a variety of industrial, scientific, and medical (ISM) applications, such as defrosting, medical, cooking, and applications involving materials such as ceramics or wood. For example, if the multichannel RF device is a solid-state cooking (SSC) device, it can be used to cook food.

[0003] Typically, multichannel RF devices for heating and drying applications include: a chamber in which an article is subjected to EM energy; and multiple spaced-apart RF channels that generate EM energy and transmit it into the chamber as RF signals. Most modern multichannel RF devices use two, four, or even more RF channels to extend and direct the EM field within the chamber.

[0004] For various technical reasons, frequency synchronization of all RF channels in a multi-channel RF device is necessary during use. One reason is that unsynchronized channels can lead to intermodulation products, resulting in out-of-band emissions, due to frequency mismatch and signal leakage to any nonlinear components in the channels. Regulations typically prohibit out-of-band emissions or limit them to a maximum power. Therefore, it is necessary to avoid or minimize out-of-band emissions. This can be achieved by using one or more isolators (e.g., circulators) to limit signal leakage between channels. However, the shielding against such leakage provided by these isolators is often insufficient to meet emission regulations. Therefore, frequency synchronization between channels is preferred.

[0005] One known method for frequency synchronization of multi-channel RF devices in the prior art involves wired RF synchronization, where the RF signal is generated by a common unit that shares the generated RF signal among multiple channels, where each channel may include an amplifier. This method may be feasible in devices where their RF channels are placed very close to each other. However, a significant drawback is the need for an RF splitter and, when the RF channels are spaced apart, the requirement for physical transmission lines such as coaxial cables.

[0006] Another known method for frequency synchronization of multi-channel RF devices in the prior art involves low-frequency synchronization, where the local oscillator (LO) signal of the first channel, acting as the master channel, is shared by one or more second channels, acting as slave channels, via a wired connection. For multi-channel devices, each slave channel requires a low-frequency (LF) splitter and associated physical transmission lines. Furthermore, precise frequency planning is required for each of the second channels to minimize intermodulation products.

[0007] For both of these existing technologies, scaling up a multi-channel RF device to include a large number of channels (e.g., two or more channels) is difficult and / or costly. Summary of the Invention

[0008] The purpose of this invention is to provide a multi-channel RF device in which the above-mentioned problems are absent or almost absent.

[0009] This objective is achieved by a multi-channel RF device according to the present invention, characterized in that: a second channel is configured to wirelessly receive a first RF signal transmitted by a first channel, to extract the frequency of the first RF signal from the received first RF signal, and to generate a second RF signal based on the extracted frequency and transmit the second RF signal into a chamber.

[0010] By wirelessly synchronizing the first and second channels, no RF hardware is required between either the first or second channel, and frequency planning for the second channel is unnecessary. Wireless synchronization can significantly reduce the cost of multi-channel RF devices with physically separated signal sources.

[0011] Preferably, the first channel and the second channel are electrically isolated from each other. In the context of this invention, channels are electrically isolated when there is no wired connection between them other than, for example, a ground connection, a power connection, or a control interface connection.

[0012] The device can be configured to operate in a first mode and a second mode. The first mode can be referred to as a synchronous mode. In synchronous mode, the first channel can be configured to transmit a pilot tone as a first RF signal, and the second channel can be configured to receive the pilot tone and extract its frequency. In the second mode, the first channel can be configured to transmit a first modulated RF signal as the first RF signal, and the second channel can be configured to transmit a second modulated RF signal as the second RF signal. The first modulated RF signal can be correlated with a first carrier signal, the frequency of which is the same as the frequency of the pilot tone. The first carrier signal is modulated to obtain the first modulated RF signal. The second modulated RF signal can be correlated with a second carrier signal, the frequency of which is the same as the extracted frequency of the pilot tone. The second carrier signal is modulated to obtain the second modulated RF signal.

[0013] Depending on the application of the device, the second mode can be called heating mode or drying mode. If the multi-channel RF device is an SSC device, the second mode can also be called cooking mode.

[0014] By modulating the RF signal sent into the chamber, hot spots can be prevented from forming in the product to be heated / dried, thus making the heating / drying process more uniform.

[0015] The device can be configured to alternate between a synchronous mode and a second mode, and to repeatedly operate in synchronous mode during a single heating or drying operation. That is, the heating or drying operation may include repeated alternation between a synchronous mode and a second mode. During a heating or drying operation, the second mode typically follows the synchronous mode, and vice versa. If the device is an SSC device, the heating operation may also be referred to as a cooking operation. Hereinafter, the drying, heating, or cooking operation will be referred to as an "operation".

[0016] The synchronization mode can be executed during a first time interval, and the second mode can be executed during a second time interval. Furthermore, the sum of the second time intervals associated with the second mode during the single operation can be defined by the user. For example, the user can set the number of second time intervals required for the operation by defining the desired heating / drying time. Additionally, at least one of the first and second time intervals can be defined by the user. In some embodiments, synchronization between channels deteriorates over time. In this case, the second time interval is preferably shortened.

[0017] The first channel may include a first signal synthesizer unit and a first antenna. The first signal synthesizer unit may be configured to generate a first RF signal and transmit the first RF signal into the cavity using the first antenna. The second channel may include a second signal synthesizer unit and a second antenna. The second channel may be configured to wirelessly receive the first RF signal transmitted by the first channel using the second antenna when the device operates in a synchronization mode. The second signal synthesizer unit may be configured to: extract the frequency of the first RF signal from the received first RF signal in the synchronization mode; generate the second RF signal using the extracted frequency in the second mode; and transmit the second RF signal into the cavity using the second antenna in the second mode.

[0018] The second channel may also include a coupler electrically connected to the output of the second signal synthesizer unit, the input of the second signal synthesizer unit, and the second antenna. The coupler can be configured to: in synchronous mode, couple a first RF signal received by the second antenna to the input of the second signal synthesizer unit; and in a second mode, couple the output of the second signal synthesizer unit to the second antenna.

[0019] The second signal synthesizer unit may include a switchable first phase-locked loop (PLL). The first PLL can be configured to: in synchronous mode, generate a second RF signal by phase-locking to a signal received at the input of the second signal synthesizer unit; and in a second mode, maintain the generation of the second RF signal regardless of the signal received at the input of the second signal synthesizer unit. The first PLL can be implemented as one of the following: an analog PLL, an all-digital PLL (ADPLL), a PLL implemented using a field-programmable gate array (FPGA), a direct digital synthesizer (DDS), or a combination of a DDS and a PLL.

[0020] The second signal synthesizer unit may further include a first fractional divider connected to the input of the first PLL. The first fractional divider may be configured to output a signal to the input of the first PLL, the frequency of which is equal to the frequency of the signal received at the input of the second signal synthesizer unit divided by a factor M. The first PLL may include a first phase detector having a first input and a second input, the first phase detector being configured to output a first phase difference signal, the first phase difference signal including the phase difference between a first input signal and a second input signal received at the first and second inputs of the first phase detector, respectively. The first PLL may further include a sample-and-hold circuit configured to sample the first phase difference signal in a synchronous mode and hold the first phase difference signal in a second mode. Furthermore, the first PLL may include a first voltage-controlled oscillator (VCO) configured to: in synchronous mode, use the sampled first phase difference signal to generate a second RF signal at the output of the first PLL; and in a second mode, use the held first phase difference signal to generate the second RF signal at the output of the first PLL. Furthermore, the first PLL may include a second fractional frequency divider configured to output a signal using a second RF signal as its input, the frequency of which is equal to the frequency of the second RF signal divided by a factor M. The first input signal of the first phase detector may be the output signal of the first fractional frequency divider, and the second input signal of the first phase detector may be the output signal of the second fractional frequency divider. The first input of the first phase detector may be the same as or connected to the input of the first PLL.

[0021] The first PLL may further include a first low-pass filter disposed between the output of the first phase detector and the sample-and-hold circuitry to generate a first filtered phase difference signal using the first phase difference signal sampled or held by the sample-and-hold circuitry. This first low-pass filter can improve the loop stability of the phase-locked loop.

[0022] The second signal synthesizer unit may further include a first amplifier disposed between the output of the first PLL and the coupler. The first amplifier may be configured in a second mode to amplify the second RF signal before transmitting the second RF signal into the chamber using the second antenna. The second signal synthesizer unit may be configured in a synchronous mode to prevent or limit the second RF signal from reaching the second antenna. For example, the first amplifier may be configured to be turned off in synchronous mode.

[0023] The second signal synthesizer unit can be configured to modulate the second RF signal in a second mode. For example, the second signal synthesizer unit may further include a mixer for mixing the second RF signal with the baseband signal in the second mode. Alternatively, the second signal synthesizer unit can be configured to change the phase delay and / or amplification of the first amplifier according to the baseband signal in the second mode. The modulation of the second RF signal can have a sufficiently narrow modulation bandwidth such that the resulting intermodulation products do not cause out-of-band emissions.

[0024] The first signal synthesizer unit may include: a local oscillator (LO) configured to generate a reference signal; a second PLL configured to use the reference signal to generate a first RF signal; and a second amplifier configured to amplify the first RF signal and output the amplified first RF signal to a first antenna. The second PLL may be implemented as one of the following: an analog PLL, an all-digital PLL (ADPLL), a PLL implemented using a field-programmable gate array (FPGA), a direct digital synthesizer (DDS), or a combination of a DDS and a PLL.

[0025] The second PLL may include a second phase detector having a first input and a second input, the second phase detector being configured to output a second phase difference signal, the second phase difference signal including the phase difference between a first input signal and a second input signal received at the first and second inputs of the second phase detector, respectively. The second PLL may further include: a second low-pass filter configured to use the second phase difference signal to generate a second filtered phase difference signal; a second VCO configured to use the second filtered phase difference signal to generate a first RF signal at the output of the second PLL; and a third fractional divider configured to use the first RF signal as its input to output a signal whose frequency is equal to the frequency of the first RF signal divided by a factor N. The first input signal of the second phase detector may be a reference signal generated by an LO, and the second input signal of the second phase detector may be the output signal of the third fractional divider.

[0026] The frequency of the reference signal generated by the LO can be in the range of 1MHz to 100MHz, preferably in the range of 5MHz to 20MHz, and more preferably in the range of 8MHz to 12MHz.

[0027] Users can limit the frequency of the first RF signal by configuring the factor N of the third fractional divider.

[0028] The device may include a first semiconductor wafer on which a first integrated circuit block is implemented, the first integrated circuit block including a second signal synthesizer unit and a local oscillator connected to a first input of a first phase detector. The device may also include a second semiconductor wafer on which the same second integrated circuit block as the first integrated circuit block is implemented. To form the first signal synthesizer unit, a first fractional divider may be disabled, and the sample-and-hold circuit may be set to a sample-only mode. To form the second signal synthesizer unit, the local oscillator may be disabled. In this way, the number of different components in the device can be minimized. The first and second signal synthesizer units can be implemented using a single semiconductor wafer and / or integrated circuit block, even if the two units are not implemented simultaneously.

[0029] The first signal synthesizer unit can be configured to modulate the first RF signal in a second mode. For example, the first signal synthesizer unit may further include a mixer for mixing the first RF signal with a baseband signal in the second mode. Alternatively, the first signal synthesizer unit can be configured in the second mode to change the phase delay and / or amplification of the second amplifier according to the baseband signal. The modulation of the second RF signal can have a sufficiently narrow modulation bandwidth such that the resulting intermodulation products do not cause out-of-band emissions.

[0030] The device may include a controller for controlling a first signal synthesizer unit and a second signal synthesizer unit. For example, the controller may be configured to set the device to a synchronous mode by disabling modulation of the first and second RF signals, and to set the device to a second mode by enabling modulation of the first and second RF signals. Setting the device to synchronous mode may further include setting the sample-and-hold circuitry to a sampling mode, and setting the device to the second mode may further include setting the sample-and-hold circuitry to a hold mode. Setting the device to synchronous mode may also include controlling a second channel to prevent or limit the second RF signal from reaching the second antenna.

[0031] The first and second signal synthesizer units can be formed from the same integrated circuit blocks, preferably arranged on different semiconductor wafers. For the first channel, the sample-and-hold circuit is configured to operate only in sampling mode, and its output is not connected to the first fractional divider of the phase detector. For the second channel, the local oscillator is disabled. In this way, the number of different components in the device can be minimized.

[0032] The frequency of the first RF signal can be configured to fall within the range of the ISM radio band. For example, the frequency of the first RF signal can be configured to fall within one of the following ranges: 433.05MHz to 434.79MHz, 902MHz to 928MHz, 2.4GHz to 2.5GHz, or 5.725GHz to 5.875GHz.

[0033] The device may include multiple second channels. For example, there may be three second channels, each of which, as described above, is capable of synchronizing with the first channel. Attached Figure Description

[0034] The invention will now be described with reference to the accompanying drawings, in which:

[0035] Figure 1 This is a schematic diagram illustrating the configuration of a multi-channel RF device with wired RF synchronization known in the prior art;

[0036] Figure 2 This is a schematic diagram illustrating the configuration of a multi-channel RF device with wired low-frequency synchronization known in the prior art;

[0037] Figure 3 This is a schematic diagram illustrating the configuration of a multi-channel RF device according to some embodiments of the present invention;

[0038] Figure 4 It is a timing diagram showing segments of heating or drying operations;

[0039] Figure 5A This is a schematic diagram illustrating the configuration of a first signal synthesizer according to some embodiments of the present invention;

[0040] Figure 5B This is a schematic diagram illustrating the configuration of a second signal synthesizer according to some embodiments of the present invention; and

[0041] Figure 6 This is a schematic diagram illustrating the configuration of a general signal synthesizer unit according to an embodiment of the present invention.

[0042] The following description will refer to the accompanying drawings. It should be noted that the same reference numerals may be used to refer to the same or similar components. Detailed Implementation

[0043] Figure 1 An exemplary multichannel RF device 100 with a chamber 110 and two RF channels, known in the prior art, is shown. The multichannel RF device 100 is suitable for drying, heating, or cooking items by placing them in the chamber 110 and activating the device.

[0044] The first channel includes an LO 120, a PLL 130, an RF splitter 140, a first amplifier 150, and a first antenna 160. The second channel includes a second amplifier 170 and a second antenna 180. In the multi-channel RF device 100, the LO 120 and PLL 130 are used to generate an RF signal. The first antenna 160 and the second antenna 180 are then used to transmit the EM field into the chamber 110 to (uniformly) dry, heat, and / or cook items. For convenience, the modulation of the RF signal for guiding the EM field in the chamber 110 is omitted from the figures.

[0045] In this configuration, LO 120 is configured to generate a reference signal, for example, using a crystal oscillator or an oscillator circuit such as a resonant tank circuit. This reference signal is fed to PLL 130, which is configured to use the reference signal from LO 120 as its input to generate an RF signal. The RF signal is then split into a first RF signal and a second RF signal by RF splitter 140. Both the first and second RF signals have the same frequency as the RF signal generated by PLL 130. The first RF signal is fed to a first amplifier 150 configured to amplify the first RF signal, and then transmitted to chamber 110 using a first antenna 160. The second RF signal is fed to a second amplifier 170 via a connecting line 190 (e.g., a low-loss coaxial cable), and then transmitted to chamber 110 using a second antenna 180. Since the first and second RF signals originate from the same RF signal, i.e., the output signal of PLL 130, frequency synchronization between the first and second channels is ensured.

[0046] PLL 130 includes a phase detector 131, a low-pass filter (LPF) 132, a VCO 133, and a fractional divider 134. The phase detector 131 is configured to detect the phase difference between a first input signal and a second input signal located at a first input and a second input, respectively, to output a signal proportional to the phase difference. The first input signal of the phase detector 131 is a reference signal generated by LO 120.

[0047] The output signal of phase detector 131 is fed to LPF 132, which filters the signal. Then, VCO 133 generates an RF signal based on the output of LPF 132. This RF signal is also the output of PLL 130. Finally, fractional frequency divider 134 uses the RF signal to generate a signal whose frequency is equal to the frequency of the RF signal divided by a factor N. The output signal of fractional frequency divider 134 is then fed back to the second input of phase detector 131, thus forming a feedback network within PLL 130.

[0048] Due to the negative feedback configuration, the output signal frequency of VCO 133 is automatically adjusted based on the phase difference between the inputs of phase detector 131. When the phase difference between the inputs of phase detector 131 remains zero, VCO 133 no longer adjusts its output signal frequency and PLL 130 is "locked" to the desired frequency. When PLL 130 is successfully locked, the output signal frequency is N times the reference signal frequency. Therefore, the desired frequency can be configured by adjusting the factor N of the fractional divider 134.

[0049] RF splitter 140 splits the output RF signal of PLL 130 into a first RF signal and a second RF signal, the frequencies of which are the same as the output frequency of PLL 130. The first RF signal and the second RF signal are amplified by first amplifier 150 and second amplifier 170, respectively, and then the amplified RF signals are transmitted to the chamber using first antenna 160 and second antenna 180, respectively.

[0050] In this configuration, synchronization between channels is achieved by sharing the output signal of PLL 130 with the second channel. This synchronization method specifically requires RF splitter 140 and connector 190. Since these components need to be operable in the RF domain, their implementation can be expensive. The cost is further increased because the channels in a multi-channel RF device are spaced far apart, or when more than one second channel is used, each additional channel requires an additional RF splitter and connector.

[0051] Figure 2 Another exemplary multichannel RF device 200 with a chamber 210, a first channel 220, and a second channel 230, known in the prior art, is shown. The chamber 210 can be equivalent to... Figure 1 The chamber 110. In the multi-channel RF device 200, the first channel 220 includes an LO 221, an LF splitter 222, a PLL 223, an amplifier 224, and an antenna 225. The second channel 230 includes a PLL 231, an amplifier 232, and an antenna 233.

[0052] In the first channel 220, an LO 221, which may be the same as or similar to LO 120, is configured to generate a reference signal. The reference signal is split into a first LO signal and a second LO signal by an LF splitter 222. The first LO signal is fed to the input of PLL 223, and the second LO signal is fed to the input of PLL 231 in the second channel 230 via a connection line 240 (e.g., a low-loss coaxial cable).

[0053] PLL 223 and PLL 231 are configured to generate a first RF signal and a second RF signal, respectively, using a first LO signal and a second LO signal. The first RF signal and the second RF signal are then amplified by amplifier 224 and amplifier 232, respectively, and the amplified RF signals are transmitted to chamber 210 using antennas 225 and 233, respectively. In the multi-channel RF device 200, PLL 240 and PLL 250 are connected to… Figure 1 It is the same as or similar to the PLL 130. Therefore, its detailed description is omitted.

[0054] The difference between multi-channel RF device 100 and multi-channel RF device 200 is that in multi-channel RF device 100, an RF splitter 140 is used to separate the output of PLL 130, while in multi-channel RF device 200, an LF splitter 222 is used to split the output of LO 221 into a first LO signal and a second LO signal. Therefore, unlike multi-channel RF device 100, the second channel 230 of multi-channel RF device 200 requires PLL 231 to generate the second RF signal.

[0055] Compared to multi-channel RF device 100, multi-channel RF device 200 has the advantage that the LF splitter 222 and connector 260 only need to be operable in the LF domain, while the RF splitter 140 and connector 190 must both be operable in the RF domain. Therefore, this reduces the implementation cost of multi-channel RF device 200 compared to multi-channel RF device 100. Nevertheless, each additional channel added to either multi-channel RF device 100 or multi-channel RF device 200 requires additional hardware, namely the splitter and connector. Furthermore, even a slight difference in how PLL 223 and PLL 231 are locked to the frequency of the signal output by LO 221 can adversely affect synchronization in multi-channel RF device 200.

[0056] Figure 3 An exemplary embodiment of a multichannel RF device 300 according to the present invention is shown, the multichannel RF device having a chamber 310 that may be the same as or similar to chambers 110 and 210, and a first channel 320 and a second channel 330.

[0057] The first channel 320 includes a first signal synthesizer unit (SSU) 321 and a first antenna 323. Optionally, the first channel 320 also includes a first coupler 322, but is not limited thereto. In this configuration, the first SSU 321 generates a first RF signal and then transmits the first RF signal into the cavity 310 using the first antenna 323. If the coupler 322 is present in the first channel 320, the coupler couples the first RF signal from the first SSU 321 to the first antenna 323. The first channel 320 is configured to generate a first RF signal using the first SSU 321 and transmit the first RF signal into the cavity 210 using the first antenna 323.

[0058] The second channel 330 includes a second SSU 331, a coupler 332, and a second antenna 333. The coupler 332 is arranged such that the second antenna 333 is coupled to the input of the second SSU 331, and the output of the second SSU 331 is coupled to the second antenna 333. In other words, the coupling from the output of the second SSU 331 to the input of the second SSU 331 is limited, preferably non-existent.

[0059] The second channel 330 wirelessly receives the first RF signal using a second antenna 333 and couples the RF signal from the second antenna 333 to the input of the second SSU 331 using a coupler 332. The second SSU 331 then generates a second RF signal at its output based on the first RF signal, the second RF signal having the same frequency as the first RF signal. The second RF signal is then coupled from the output of the second SSU 331 to the second antenna 333 to transmit the second RF signal into the chamber 310.

[0060] In the above embodiments, synchronization between the first channel 320 and the second channel 330 is achieved wirelessly. Therefore, compared to the multi-channel RF devices 100 and 200, the synchronization of the multi-channel RF device 300 does not require additional hardware. This further simplifies the expansion of the number of second channels to two or more, whereas the multi-channel RF devices 100 and 200 require splitters and connecting cables for each additional second channel.

[0061] In some embodiments, the first channel 320 and the second channel 330 may be configured to transmit a first modulated RF signal and a second modulated RF signal to guide the EM field in the chamber 310. For example, the first SSU 321 and the second SSU 331 are capable of modulating the generated first RF signal and the second RF signal before outputting the RF signal.

[0062] In some embodiments, the multichannel RF device 300 is configured to operate in a first mode and a second mode. For example, in the first mode, referred to as the synchronization mode, the first channel 320 may be configured to transmit an unmodulated first RF signal (i.e., a “pilot tone”) into the chamber 310, and the second channel 330 may receive the pilot tone using a second antenna 333. A coupler 332 may couple the received first RF signal to the input of a second SSU 331, whereby the second SSU 331 extracts the frequency of the received first RF signal and generates a second RF signal with the same frequency as the received first RF signal. In the second mode (referred to as a heating, cooking, or drying mode depending on the application), the first channel 320 and the second channel 330 may transmit the first RF signal and the second RF signal into the chamber 310, respectively. The first RF signal and the second RF signal may be modulated by the first SSU 321 and the second SSU 331, respectively, but the invention is not limited thereto. In an embodiment, when the multichannel RF device 300 operates in the synchronization mode, the second RF signal is not transmitted into the chamber 310. For example, when the multi-channel RF device 300 operates in synchronous mode, the second SSU 331 can prevent or limit the output of a second RF signal. In this way, the second antenna 333 will not receive signals reflected from the second RF signal.

[0063] In the context of this invention, it is possible that after a certain period of time, for example due to a frequency-relative drift between the first RF signal generated by the first SSU 321 and the second RF signal generated by the second SSU 331, the first channel 320 and the second channel 330 may no longer be sufficiently synchronized. If the heating / drying time exceeds the stated period, the synchronization process may need to be repeated. In this case, the multi-channel RF device 300 must operate in synchronized mode again until the first channel 320 and the second channel 330 are sufficiently synchronized again. Thereafter, the multi-channel RF device 300 can operate in the second mode again. Therefore, a single operation of the multi-channel RF device 300 may include multiple time intervals of operating in synchronized mode and operating in the second mode. Hereinafter, the time frame associated with operating in synchronized mode followed immediately by operating in the second mode will be referred to as an operation segment.

[0064] In some embodiments, the multi-channel RF device 300 may further include a controller 340 configured to provide control signals to the first channel 320 and the second channel 330, for example, to the first SSU 321 and the second SSU 331, thereby controlling the operation of the multi-channel RF device 300. For example, the control signals provided by the controller 340 can control the first channel 320 and the second channel 330 to operate according to the operating mode of the multi-channel RF device 300.

[0065] The controller 340 can configure the multi-channel RF device 300 to operate in synchronous mode by controlling the first SSU 321 to generate a pilot tone and by controlling the second SSU 331 to prevent or limit the second RF signal from reaching the second antenna 333. Furthermore, the controller 340 can control the multi-channel RF device 300 to operate in a second mode by controlling the first SSU 321 and the second SSU 331 to enable modulation of the first and second RF signals.

[0066] Figure 4 A timing diagram of an operation segment of the first channel 320 and the second channel 330 according to an embodiment of the present invention is shown. Here, P1 represents the output signal power of the first channel 320, and P2 represents the output signal power of the second channel 330. The operation segment includes a synchronization mode time interval T1 and a second mode time interval T2.

[0067] In the synchronization mode indicated by "S", the first channel 320 transmits the pilot tone as the first RF signal to the chamber 310. Simultaneously, the second channel 330 does not transmit; instead, it only receives the first RF signal, extracts its frequency, and generates a second RF signal based on the extracted frequency. This can be seen in the timing diagram, where P2 is zero in synchronization mode.

[0068] In the second mode, denoted by "C", the first channel 320 and the second channel 330 transmit the first RF signal and the second RF signal to the chamber 310, respectively. Therefore, P1 and P2 are not zero throughout the duration of the second mode.

[0069] In the context of this invention, operation is defined as a combination of one or more consecutive operational segments. In other words, during operation, the multi-channel RF device 300 alternately operates in a synchronization mode S and a second mode C.

[0070] In some embodiments, the total heating / drying time can be defined by the user; that is, the user can define the sum of all second-mode segments in the operation. The heating / drying time can be set based on the time required to dry, heat, or cook the items in chamber 310. Furthermore, the synchronization mode time interval T1 and / or the second-mode time interval T2 can be defined by the user. For example, as... Figure 4 As shown, the user can limit the time interval to make T2 greater than T1. However, the invention is not limited thereto.

[0071] Figure 5A A second SSU 331 is shown according to some embodiments of the present invention.

[0072] according to Figure 5AThe second SSU 331 of the embodiment includes a first fractional frequency divider 510, a switchable first PLL 520, and a first amplifier 530. The first fractional frequency divider 510 receives a signal from a coupler 332 and is configured to generate a signal with a frequency equal to the frequency of the input signal divided by a factor M. The output signal of the first fractional frequency divider 510 is fed to the switchable first PLL 520, which generates a second RF signal based on the output signal of the first fractional frequency divider 510. The second RF signal is then amplified by the first amplifier 530, the output of which forms the output of the second SSU 331. In the context of this invention, the switchable first PLL 520 performs the function of extracting the frequency of the signal input to the second SSU 331 and generating an RF signal with the same frequency as the signal input to the second SSU 331.

[0073] The first PLL 520 includes a first phase detector 521, a sample and hold circuit 523, a first VCO 524, and a second fractional divider 525. Optionally, the switchable first PLL 520 also includes a first LPF 522.

[0074] The first PLL 520 differs from PLL 130 and PLL 223 in that the sample-and-hold circuit 523 allows the first PLL 520 to switch between sample mode and hold mode. For example, when the sample-and-hold circuit 523 operates in sample mode, the operation of the first PLL 520 is the same as or equivalent to that of PLL 130 and PLL 223. However, when the sample-and-hold circuit 523 operates in hold mode, the operation of the first PLL 520 ensures that the output signal of VCO 524 is held regardless of the input signal of the second SSU 331. In other words, the loop of the first PLL 520 is broken in hold mode, and the first VCO 524 generates the second RF signal based on the signal held at the output of the sample-and-hold circuit 523.

[0075] In some embodiments, the sample-and-hold circuit 523 may include a combination of a switch and a capacitor connected in series, the capacitor being connected between the input of the first VCO 524 and ground. When operating in sampling mode, such as when the multichannel RF device 300 operates in synchronization mode, the switch is closed, the output of the first LPF 522 is fed to the first VCO 524, and the capacitor is charged. When operating in hold mode, such as when the multichannel RF device 300 operates in a second mode, the switch is open, and the voltage received at the first VCO 524 is equal to the voltage across the capacitor. Because the current flowing through the input of the first VCO 524 is non-zero, the voltage across the capacitor will drift over time, causing the frequency of the second RF signal to slowly deviate from the frequency of the first RF signal. This problem can be mitigated by repeatedly synchronizing the first channel 320 and the second channel 330.

[0076] Furthermore, in order for the first PLL 520 to generate a second RF signal with the same frequency as the received first RF signal, the second fractional divider 525 of the first PLL 520 must divide the signal frequency of its input signal by a factor M, which is the same as the first fractional divider 510.

[0077] When the multichannel RF device 300 operates in synchronous mode, the transmission of the second RF signal should be prevented or limited. In some embodiments, this can be achieved by disconnecting the power supply to the first amplifier 530, so that the second RF signal is not amplified by the first amplifier 530. Alternatively, a switch (omitted in the figure) at the input of the first amplifier 530 can connect the input of the first amplifier 530 to the output of the first PLL 520, or, for example, to ground via a resistor.

[0078] In some embodiments, the second SSU 331 can be configured to modulate the second RF signal when the multichannel RF device 300 operates in the second mode. The second RF signal can be modulated, for example, by changing the gain and / or phase delay of the first amplifier 530. Alternatively, the second RF signal can be modulated using single-point or two-point modulation in the first PLL 520, modulation techniques known in the art. The second RF signal can also be modulated by mixing the second RF signal with a baseband signal before or after amplification using a mixer (omitted in the figures). The controller 340 can be configured to provide control signals to the second SSU 331 to enable or disable modulation of the second RF signal depending on whether the multichannel RF device 300 operates in synchronous mode or the second mode.

[0079] Figure 5B A first SSU 321 according to some embodiments of the present invention is shown.

[0080] The first SSU 321 may include LO 540, the second PLL 550, and the second amplifier 560. The operation of the first SSU 321 may be equivalent to or similar to the operation of a combination of LO 120, PLL 130, and the first amplifier 150, or equivalent to or similar to the operation of a combination of LO 221, PLL 223, and the first amplifier 224. Therefore, its detailed description is omitted.

[0081] In some embodiments, the first SSU 321 can be configured to: generate a pilot tone when the multichannel RF device 300 operates in synchronous mode; and modulate the first RF signal when the multichannel RF device 300 operates in a second mode. For example, the first RF signal can be modulated by changing the gain and / or phase delay of the second amplifier 560. Alternatively, the first RF signal can be modulated using single-point or two-point modulation in the second PLL 550, modulation techniques known in the art. The first RF signal can also be modulated by mixing the first RF signal with a baseband signal before or after amplification using a mixer (omitted in the figures). The controller 340 can be configured to provide control signals to the first SSU 321 to enable or disable modulation of the first RF signal depending on whether the multichannel RF device 300 operates in synchronous mode or the second mode.

[0082] Figure 6 A general-purpose SSU 600 (e.g., a first SSU 321 or a second SSU 331) according to another embodiment of the present invention is shown.

[0083] The general-purpose SSU 600 includes: LO 610, which may be the same as or similar to LO 540; a first fractional divider 620, which may be the same as or similar to first fractional divider 510; a switchable PLL 630, which may be the same as or similar to switchable first PLL 520; and an amplifier 640, which may be the same as or similar to first amplifier 530 or second amplifier 560.

[0084] In addition to implementing separate SSU circuit blocks for the first channel 320 and the second channel 330, for example, in Figure 5A and Figure 5B In addition to the embodiments of the first SSU 321 and the second SSU 331 described herein, a general-purpose SSU 600 circuit block can be used, which can be configured to operate with the first SSU 321 and the second SSU 331, even if not simultaneously. In this way, the number of different circuit blocks can be minimized. For example, the general-purpose SSU 600 can be fabricated on a semiconductor wafer. In this way, the same semiconductor wafer can be used for both the first SSU 321 and the second SSU 331.

[0085] To form the first SSU 321, regardless of the mode of the multichannel RF device 300, the sample-and-hold circuit 633 is set to sampling mode, and the first fractional divider 620 is disabled. The first fractional divider 620 can be disabled, for example, by disconnecting the signal path to the input of the PLL 630, for example by using a switch (omitted in the figure).

[0086] To form the second SSU 331, depending on whether the multichannel RF device 300 operates in synchronous mode or in the second mode, the sample and hold circuit 633 is set to sample mode or hold mode, and the LO 610 is disabled, for example, by using a switch to disconnect the signal path to the input of the PLL 630.

[0087] The controller 340 can provide the control signals required to control and configure the general-purpose SSU 600. For example, the controller 340 can control the general-purpose SSU 600 to form a first SSU 321 by controlling the sample-and-hold circuit 633 to be in sampling mode and disabling the first fractional divider 620. Furthermore, the controller 340 can control the general-purpose SSU 600 to form a second SSU 321 by controlling the sample-and-hold circuit 633 to be in sampling mode or holding mode and disabling LO610, depending on whether the multi-channel RF device 300 is operating in synchronous mode or a second mode.

[0088] In some embodiments, the general-purpose SSU 600 can be configured to modulate the RF signal output by the PLL 630 when the multi-channel RF device 300 operates in the second mode. For example, the RF signal can be modulated by changing the gain and / or phase delay of the amplifier 640. Alternatively, the RF signal can be modulated using single-point or two-point modulation in the second PLL 630, modulation techniques known in the art. The RF signal can also be modulated by mixing the RF signal with the baseband signal before or after amplification using a mixer (omitted in the figures). The controller 340 can be configured to provide control signals to the general-purpose SSU 600 to enable or disable modulation of the first RF signal depending on whether the multi-channel RF device 300 operates in synchronous mode or the second mode.

[0089] As described above, the invention has been illustrated using detailed embodiments. However, it should be understood that the invention is not limited to these embodiments, and various modifications can be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. A multi-channel radio frequency (RF) device (300), wherein, The multi-channel radio frequency (RF) device (300) includes: Chamber (310); A first channel (320) is configured to generate a first RF signal and transmit the first RF signal into the chamber (310); and The second channel (330) is spaced apart from and electrically isolated from the first channel (320); Its features are: The second channel (330) is configured as follows: Wirelessly receive the first RF signal transmitted by the first channel (320); Extract the frequency of the first RF signal from the received first RF signal; A second RF signal is generated based on the extracted frequency; and The second RF signal is transmitted into the chamber (310).

2. The multi-channel radio frequency (RF) device (300) according to claim 1, wherein, The multi-channel radio frequency (RF) device (300) is configured to operate in the following mode: In the synchronization mode, the first channel (320) is configured to transmit a pilot tone as the first RF signal, and the second channel (330) is configured to receive the pilot tone and extract the frequency of the pilot tone. as well as In the second mode, the first channel (320) is configured to transmit a first modulated RF signal as the first RF signal, the first modulated RF signal being related to a first carrier signal, the frequency of the first carrier signal being the same as the frequency of the pilot tone, and the first carrier signal being modulated to obtain the first modulated RF signal; the second channel (330) is configured to transmit a second modulated RF signal as the second RF signal, the second modulated RF signal being related to a second carrier signal, the frequency of the second carrier signal being the same as the extracted frequency of the pilot tone, and the second carrier signal being modulated to obtain the second modulated RF signal.

3. The multi-channel radio frequency (RF) device (300) according to claim 2, wherein, The multi-channel radio frequency (RF) device (300) is configured to alternately be in the synchronization mode and the second mode, and is configured to repeatedly be in the synchronization mode during a single operation.

4. The multi-channel radio frequency (RF) device (300) according to claim 3, wherein, The synchronization mode is executed during a first time interval, and the second mode is executed during a second time interval; and The sum of the second time intervals associated with the second mode during the single operation can be defined by the user.

5. The multi-channel radio frequency (RF) device (300) according to claim 4, wherein, At least one of the first time interval and the second time interval can be defined by the user.

6. The multi-channel radio frequency (RF) device (300) according to any one of claims 2 to 5, wherein: The first channel (320) includes a first signal synthesizer unit (321) and a first antenna (323), the first signal synthesizer unit (321) being configured to generate the first RF signal and transmit the first RF signal to the chamber (310) using the first antenna (323); The second channel (330) includes a second signal synthesizer unit (331) and a second antenna (333). The second channel (330) is configured to wirelessly receive the first RF signal transmitted by the first channel (320) using the second antenna (333) when the multi-channel RF device (300) operates in the synchronization mode; The second signal synthesizer unit (331) is configured as follows: In the synchronization mode, the frequency of the first RF signal is extracted from the received first RF signal; In the second mode, the extracted frequency is used to generate the second RF signal; and In the second mode, the second RF signal is transmitted to the chamber (310) using the second antenna (333).

7. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The second channel (330) also includes a coupler (332) electrically connected to the output of the second signal synthesizer unit (331), the input of the second signal synthesizer unit (331), and the second antenna (333). The coupler (332) is configured to: in the synchronization mode, couple a first RF signal received from the second antenna (333) to the input of the second signal synthesizer unit (331); and in the second mode, couple the output of the second signal synthesizer unit (331) to the second antenna (333).

8. The multi-channel radio frequency (RF) device (300) according to claim 7, wherein, The second signal synthesizer unit (331) includes a switchable first phase-locked loop (PLL) (520), which is configured to: In the synchronization mode, the second RF signal is generated by phase-locking to the signal received at the input of the second signal synthesizer unit (331); as well as In the second mode, the second RF signal is generated regardless of the signal received at the input of the second signal synthesizer unit (331).

9. The multi-channel radio frequency (RF) device (300) according to claim 8, wherein, The second signal synthesizer unit (331) further includes a first fractional divider (510, 620) connected to the input of the first phase-locked loop (PLL) (520), wherein the first fractional divider (510, 620) is configured to output a signal to the input of the first PLL (520), the frequency of the output signal being equal to the frequency of the signal received at the input of the second signal synthesizer unit (331) divided by a factor M; and The first phase-locked loop (PLL) (520) includes: A first phase detector (521) having a first input and a second input is configured to output a first phase difference signal, the first phase difference signal including the phase difference between a first input signal and a second input signal received at the first input and the second input of the first phase detector (521), respectively; A sample and hold circuit (523, 633) is configured to sample the first phase difference signal in the synchronization mode and hold the first phase difference signal in the second mode; A first voltage-controlled oscillator (VCO) (524) is configured to: in the synchronous mode, use a sampled first phase difference signal to generate the second RF signal at the output of the first phase-locked loop (PLL) (520); and in the second mode, use the held first phase difference signal to generate the second RF signal at the output of the first PLL (520); and A second fractional frequency divider (525, 635) is configured to output a signal using the second RF signal as input, the frequency of which is equal to the frequency of the second RF signal divided by a factor M. Wherein, the first input signal of the first phase detector (521) is the output signal of the first fractional frequency divider (510, 620), and the second input signal of the first phase detector (521) is the output signal of the second fractional frequency divider (525, 635). The first input of the first phase detector is the same as or connected to the input of the first phase-locked loop (PLL) (520).

10. The multi-channel radio frequency (RF) device (300) according to claim 9, wherein, The first phase-locked loop (PLL) (520) further includes a first low-pass filter (522) arranged between the output of the first phase detector (521) and the sample and hold circuit (523, 633) to generate a first filtered phase difference signal using the first phase difference signal sampled or held by the sample and hold circuit (523, 633).

11. The multi-channel radio frequency (RF) device (300) according to claim 9, wherein, The second signal synthesizer unit (331) further includes a first amplifier (530) disposed between the output of the first phase-locked loop (PLL) (520) and the coupler (332), wherein the first amplifier is configured to amplify the second RF signal in the second mode before transmitting the second RF signal into the chamber using the second antenna (333).

12. The multi-channel radio frequency (RF) device (300) according to claim 9, wherein, The second signal synthesizer unit (331) is configured to prevent or limit the second RF signal from reaching the second antenna (333) in the synchronization mode.

13. The multi-channel radio frequency (RF) device (300) according to claim 11, wherein, The second signal synthesizer unit (331) is configured to prevent or limit the second RF signal from reaching the second antenna (333) in the synchronization mode, wherein the first amplifier (530) is configured to be turned off in the synchronization mode.

14. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The second signal synthesizer unit (331) is configured to modulate the second RF signal in the second mode.

15. The multi-channel radio frequency (RF) device (300) according to claim 14, wherein, The second signal synthesizer unit (331) further includes a mixer for mixing the second RF signal with the baseband signal in the second mode.

16. The multi-channel radio frequency (RF) device (300) according to claim 11, wherein, The second signal synthesizer unit (331) is configured to modulate the second RF signal in the second mode, wherein the second signal synthesizer unit (331) is configured to change the phase delay and / or amplification of the first amplifier (530) according to the baseband signal in the second mode.

17. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The first signal synthesizer unit (321) includes: A first local oscillator LO (540) is configured to generate a reference signal; A second PLL (550), configured to generate the first RF signal using the reference signal; and A second amplifier (560) is configured to amplify the first RF signal and output the amplified first RF signal to the first antenna (323).

18. The multi-channel radio frequency (RF) device (300) according to claim 17, wherein, The second PLL (550) includes: A second phase detector (551) having a first input and a second input is configured to output a second phase difference signal, the second phase difference signal including the phase difference between a first input signal and a second input signal received at the first input and the second input of the second phase detector (551), respectively; A second low-pass filter (552) is configured to use the second phase difference signal to generate a second filtered phase difference signal; A second VCO (553) is configured to generate the first RF signal at the output of the second PLL (550) using the second filtered phase difference signal; and A third fractional frequency divider (554) is configured to output a signal using the first RF signal as input, the frequency of which is equal to the frequency of the first RF signal divided by a factor N. The first input signal of the second phase detector (551) is a reference signal generated by the first local oscillator LO (540), and the second input signal of the second phase detector (551) is the output signal of the third fractional frequency divider (554).

19. The multi-channel radio frequency (RF) device (300) according to claim 17, wherein, The frequency of the reference signal generated by the first local oscillator LO (540) is in the range of 1MHz to 100MHz.

20. The multi-channel radio frequency (RF) device (300) according to claim 18, wherein, The frequency of the first RF signal can be planned by configuring the factor N of the third fractional frequency divider (554).

21. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The second channel (330) further includes a coupler (332) electrically connected to the output of the second signal synthesizer unit (331), the input of the second signal synthesizer unit (331), and the second antenna (333), wherein the coupler (332) is configured to: in the synchronization mode, couple a first RF signal received from the second antenna (333) to the input of the second signal synthesizer unit (331); and in the second mode, couple the output of the second signal synthesizer unit (331) to the second antenna (333). The multi-channel radio frequency (RF) device (300) includes a first semiconductor wafer and a second semiconductor wafer, wherein each of the first semiconductor wafer and the second semiconductor wafer includes the same general-purpose signal synthesizer unit (600) circuit block; The general-purpose signal synthesizer unit (600) circuit block includes a second LO (610), a first fractional divider (510, 620), and a switchable PLL (630), wherein the second LO (610) is configured to generate a reference signal; wherein the first fractional divider (510, 620) is configured to output a signal whose frequency is equal to the frequency of the signal received at the input of the general-purpose signal synthesizer unit (600) circuit block divided by a factor N; The switchable PLL (630) includes: A phase detector (631) having a first input and a second input is configured to output a first phase difference signal, the first phase difference signal including the phase difference between a first input signal and a second input signal received at the first input and the second input of the phase detector (631), respectively. A sample and hold circuit (523, 633) is configured to sample the first phase difference signal in the synchronization mode and hold the first phase difference signal in the second mode; VCO (634), the VCO being configured to: in the synchronization mode, use the sampled first phase difference signal to generate the second RF signal at the output of the switchable PLL (630); and in the second mode, use the maintained first phase difference signal to generate the second RF signal at the output of the switchable PLL (630); and A second fractional frequency divider (525, 635) is configured to output a signal using the second RF signal as input, the frequency of which is equal to the frequency of the second RF signal divided by a factor N. Wherein, the first input signal of the phase detector (631) is the output signal of the first fractional divider (510, 620) or the first input signal of the phase detector (631) is a reference signal generated by the second LO (610), and wherein, the second input signal of the phase detector (631) is the output signal of the second fractional divider (525, 635), and the first input of the phase detector (631) is the same as or connected to the input of the switchable PLL (630); The switchable PLL (630) is configured as follows: In the synchronization mode, the second RF signal is generated by phase-locking to the signal received at the input of the general signal synthesizer unit (600) circuit block; and In the second mode, the second RF signal is maintained regardless of the signal received at the input of the general signal synthesizer unit (600) circuit block; The first signal synthesizer unit (321) is formed in the general signal synthesizer unit (600) circuit block on the first semiconductor wafer. To form the first signal synthesizer unit (321), the first fractional divider (510, 620) is disabled, and the sample-and-hold circuit (523, 633) is set to sample-only mode. The second signal synthesizer unit (331) is formed in the general signal synthesizer unit (600) circuit block on the second semiconductor wafer, wherein the second LO (610) is disabled in order to form the second signal synthesizer unit (331).

22. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The first signal synthesizer unit (321) is configured to modulate the first RF signal in the second mode.

23. The multi-channel radio frequency (RF) device (300) according to claim 22, wherein, The first signal synthesizer unit (321) further includes a mixer for mixing the first RF signal with the baseband signal in the second mode.

24. The multi-channel radio frequency (RF) device (300) according to claim 22, wherein, The first signal synthesizer unit (321) includes: A first local oscillator LO (540) is configured to generate a reference signal; A second PLL (550), configured to generate the first RF signal using the reference signal; and A second amplifier (560) is configured to amplify the first RF signal and output the amplified first RF signal to the first antenna (323). The first signal synthesizer unit (321) is configured to change the phase delay and / or amplification of the second amplifier (560) according to the baseband signal in the second mode.

25. The multi-channel radio frequency (RF) device (300) according to claim 6, wherein, The multi-channel radio frequency (RF) device (300) includes a controller for controlling the first signal synthesizer unit (321) and the second signal synthesizer unit (331).

26. The multi-channel radio frequency (RF) device (300) according to claim 22, wherein, The multi-channel radio frequency (RF) device (300) includes a controller for controlling the first signal synthesizer unit (321) and the second signal synthesizer unit (331), wherein the second signal synthesizer unit (331) is configured to modulate the second RF signal in the second mode, wherein the controller is configured to set the multi-channel RF device (300) to the synchronization mode by disabling the modulation of the first RF signal and the second RF signal, and to set the multi-channel RF device (300) to the second mode by enabling the modulation of the first RF signal and the second RF signal.

27. The multi-channel radio frequency (RF) device (300) according to claim 9, wherein, The multi-channel radio frequency (RF) device (300) includes a controller for controlling the first signal synthesizer unit (321) and the second signal synthesizer unit (331). Setting the multi-channel RF device (300) to the synchronization mode further includes setting the sample and hold circuit (523, 633) to the sampling mode. Setting the multi-channel RF device (300) to the second mode further includes setting the sample and hold circuit (523, 633) to the hold mode.

28. The multi-channel radio frequency (RF) device (300) according to any one of claims 1-5, wherein, The frequency of the first RF signal is configured to fall within the range of the ISM radio band, which is one of the following ranges: 433.05MHz to 434.79MHz, 902MHz to 928MHz, 2.4GHz to 2.5GHz, or 5.725GHz to 5.875GHz.

29. The multi-channel radio frequency (RF) device (300) according to any one of claims 1-5, wherein, The multi-channel radio frequency (RF) device (300) includes a plurality of second channels (330).

30. The multi-channel radio frequency (RF) device (300) according to claim 8, wherein, The first phase-locked loop (PLL) (520) is implemented as one of the following: an analog PLL, an all-digital phase-locked loop (ADPLL), a PLL implemented by a field-programmable gate array (FPGA), a direct digital synthesizer (DDS), and a combination of a DDS and a PLL.

31. The multi-channel radio frequency (RF) device (300) according to claim 17, wherein, The second PLL (550) is implemented as one of the following: an analog PLL, an ADPLL, an FPGA-implemented PLL, a DDS, and a combination of a DDS and a PLL.

32. The multi-channel radio frequency (RF) device (300) according to claim 24, wherein, The second PLL (550) is implemented as one of the following: an analog PLL, an ADPLL, an FPGA-implemented PLL, a DDS, and a combination of a DDS and a PLL.

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