Display device and driving method thereof

Abstract

A display device and a driving method thereof are disclosed. A display device according to an embodiment of the present application for solving the technical problem includes a display portion including a plurality of pixels connected with a data line and a sensing line, a data driving portion including a plurality of buffer amplifiers supplying a first sensing voltage to the data line during a first sensing period and a sensing portion receiving a first sensing signal from the pixels through the sensing line during the first sensing period, and a GIA amplifier providing a second sensing voltage to the data line during a second sensing period different from the first sensing period. The sensing portion receives a second sensing signal corresponding to the second sensing voltage from the pixels through the sensing line during the second sensing period and generates compensation data based on a difference between the first sensing signal and the second sensing signal.

Description

Technical Field

[0001] Embodiments of the present invention relate to a display device and a driving method thereof. Background Technology

[0002] With the development of information technology, the importance of display devices, the connection medium between users and information, is becoming increasingly prominent. In response, the use of display devices such as liquid crystal displays (LCDs) and organic light-emitting displays (OLEDs) is increasing.

[0003] The display device includes pixels, each pixel including a light-emitting element and a driving transistor that supplies driving current to the light-emitting element. Individual pixels can degrade; for example, the threshold voltage and mobility of the driving transistor may change over time, and the light-emitting element may degrade. To compensate for pixel degradation, a technique is used to sense characteristic information of the pixels (i.e., the driving transistor and the light-emitting element) through an external compensation circuit. Summary of the Invention

[0004] The external compensation circuit applies a sensed voltage to the pixel via a buffer amplifier and receives the sensed signal from the pixel, thereby enabling the determination of the threshold voltage of the driving transistor. However, due to manufacturing processes, the buffer amplifiers connected to the multiple data lines may have differences in configuration such as gain, which may cause inter-channel deviation during sensing.

[0005] When inter-channel deviation occurs, accurate compensation for the display device cannot be performed, which may result in defects such as vertical lines appearing on the screen.

[0006] The technical problem to be solved by the present invention is to provide a display device that can reduce the channel deviation of the external compensation circuit.

[0007] Another technical problem to be solved by the present invention is to provide a driving method for a display device that can reduce channel deviation of external compensation circuit.

[0008] However, the purpose of this invention is not limited to the above-described purpose, and various extensions can be made without departing from the concept and scope of this invention.

[0009] A display device according to an embodiment of the present invention for solving the aforementioned technical problem includes: a display unit including a plurality of pixels connected to a data line and a sensing line; a data driving unit including a plurality of buffer amplifiers supplying a first sensing voltage to the data line during a first sensing period and a sensing unit receiving a first sensing signal from the pixels through the sensing line during the first sensing period; and a global amplifier providing a second sensing voltage to the data line during a second sensing period different from the first sensing period.

[0010] During the second sensing period, the sensing unit receives a second sensing signal corresponding to the second sensing voltage from the pixel via the sensing line, and generates compensation data based on the difference between the first sensing signal and the second sensing signal.

[0011] Alternatively, the second induced voltage may have the same value as the first induced voltage.

[0012] It is possible that the second sensing signal has a larger value than the first sensing signal.

[0013] Alternatively, the first sensing signal may be a value obtained by subtracting the threshold voltage of the driving transistor included in each of the pixels and the voltage deviation of the buffer amplifier from the first sensing voltage, and the second sensing signal may be a value obtained by subtracting the threshold voltage of the driving transistor from the second sensing voltage.

[0014] Each of the pixels may include: a first sub-pixel connected to a first data line in the data lines; a second sub-pixel connected to a second data line in the data lines; and a third sub-pixel connected to a third data line in the data lines.

[0015] Alternatively, the first sub-pixel, the second sub-pixel, and the third sub-pixel may be connected to one of the sensing lines.

[0016] Alternatively, the output terminal of the GLAO amplifier may be connected to the first data line via a first switch, to the second data line via a second switch, and to the third data line via a third switch.

[0017] It is possible that the first switch, the second switch, and the third switch are each in an open circuit state during the first sensing period.

[0018] It is possible that during the second sensing period, when the first switch is in the closed state, the second switch and the third switch are in the open state, the first buffer amplifier connected to the first data line is in the high impedance (Hi-z) state, and the second buffer amplifier connected to the second data line and the third buffer amplifier connected to the third data line output the data voltage corresponding to the lowest gray level.

[0019] Alternatively, during the second sensing period, when the second switch is in the closed state, the first switch and the third switch are in the open state, the second buffer amplifier is in the high impedance (Hi-z) state, and the first buffer amplifier and the third buffer amplifier output the data voltage corresponding to the lowest gray level.

[0020] Alternatively, during the second sensing period, when the third switch is in the closed state, the first switch and the second switch are in the open state, the third buffer amplifier is in the high impedance (Hi-z) state, and the first buffer amplifier and the second buffer amplifier output the data voltage corresponding to the lowest gray level.

[0021] Alternatively, the display device may further include: a timing control unit, which receives first data from the outside, adds the image data and the compensation data to generate second data, and provides the second data to the data driving unit.

[0022] Alternatively, the display device may further include: an analog-to-digital converter, connected between the output terminal of the sensing unit and the timing control unit, and converting the induced voltage from analog form to digital form.

[0023] Alternatively, the display unit may further include scan lines, sensing control lines, a first power line, and a second power line. Each pixel includes: a first transistor, comprising a first electrode connected to the first power line, a gate electrode connected to a first node, and a second electrode connected to a second node; a second transistor, comprising a first electrode connected to the data line, a second electrode connected to the first node, and a gate electrode connected to the scan line; a third transistor, comprising a first electrode connected to the second node, a second electrode connected to the sensing line, and a gate electrode connected to the sensing control line; a storage capacitor connected between the first node and the second node; and a light-emitting element connected between the second node and the second power line.

[0024] It is possible that the first transistor and the third transistor are turned on during at least a portion of the first sensing period and the second sensing period.

[0025] Alternatively, the sensing unit may further include: an initialization switch connected between the initialization power supply and the sensing line; and a sensing capacitor connected between the sensing line and the reference power supply.

[0026] Alternatively, when the initialization switch is in an open-circuit state and the third transistor is turned on, the sensing capacitor can be charged using the current provided through the second node.

[0027] Alternatively, the display device may further include: a power stabilization capacitor connected to a first electrode connected to the output terminal of the Graubberg amplifier and a reference power supply.

[0028] A driving method for a display device according to an embodiment of the present invention includes, in a display device having a display section comprising a plurality of pixels connected to a data line and a sensing line: in a data driving section, supplying a first sensing voltage to the data line via a plurality of buffer amplifiers during a first sensing period; in the data driving section, receiving a first sensing signal from the pixel via the sensing line by a sensing unit during the first sensing period; in a buffer amplifier, supplying a second sensing voltage to the data line during a second sensing period different from the first sensing period; in the data driving section, receiving a second sensing signal corresponding to the second sensing voltage from the pixel via the sensing line by the sensing unit during the second sensing period; and in the data driving section, generating compensation data by the sensing unit based on the difference between the first sensing signal and the second sensing signal.

[0029] Alternatively, the second induced voltage may have the same value as the first induced voltage, and the second induced signal may have a larger value than the first induced signal.

[0030] Each of the pixels may include: a first sub-pixel connected to a first data line in the data line; a second sub-pixel connected to a second data line in the data line; and a third sub-pixel connected to a third data line in the data line. The output terminal of the GLAO amplifier is connected to the first data line via a first switch, to the second data line via a second switch, and to the third data line via a third switch.

[0031] Alternatively, the output terminal of the GLAO amplifier may be connected to the first data line via a first switch, to the second data line via a second switch, and to the third data line via a third switch.

[0032] The step of supplying the second induced voltage may include: during the second induction period, the first switch is turned on, the second switch and the third switch are turned off, the first buffer amplifier connected to the first data line is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest grayscale is output through the second buffer amplifier connected to the second data line and the third buffer amplifier connected to the third data line; during the second induction period, the second switch is turned on, the first switch and the third switch are turned off, the second buffer amplifier is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest grayscale is output through the first buffer amplifier and the third buffer amplifier; and during the second induction period, the third switch is turned on, the first switch and the second switch are turned off, the third buffer amplifier is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest grayscale is output through the first buffer amplifier and the second buffer amplifier.

[0033] (Invention Effects)

[0034] According to an embodiment of the present invention, the display device applies the same induced voltage to the pixels through a Graubberg amplifier, thereby reducing the channel deviation of the external compensation circuit.

[0035] The driving method of the display device according to an embodiment of the present invention applies the same induced voltage to the pixel by means of a Graubberg amplifier, thereby reducing the channel deviation of the external compensation circuit.

[0036] However, the effects of the present invention are not limited to those described above, and various extensions can be made without departing from the concept and scope of the present invention. Attached Figure Description

[0037] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present invention.

[0038] Figure 2 It is shown that it includes Figure 1 A circuit diagram of an example of a subpixel in a display device.

[0039] Figure 3 This diagram illustrates the operation of the pixel, data driver, and global amplifier during the sensing period.

[0040] Figure 4 This specifically illustrates an embodiment of the present invention. Figure 3 Circuit diagram of the signal output section of the data drive unit.

[0041] Figure 5 This illustrates an embodiment of the present invention. Figure 3 The circuit diagram of the sensing element.

[0042] Figure 6a It is a waveform diagram showing the voltage value of the induced signal stored in the induced capacitor during the first induced period.

[0043] Figure 6b It is a waveform diagram showing the voltage value of the induced signal stored in the induced capacitor during the second induction period.

[0044] Figure 7 This is a flowchart illustrating a driving method for a display device according to an embodiment of the present invention.

[0045] Figure 8 This is a signal diagram showing the interface signals of the timing control unit according to an embodiment of the present invention. Detailed Implementation

[0046] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and repeated descriptions of the same components are omitted.

[0047] Figure 1 This is a diagram illustrating a display device according to an embodiment of the present invention.

[0048] Reference Figure 1 The display device 10 may include a display unit 100, a scan drive unit 200, a data drive unit 300, a timing control unit 400, and a Global amplifier (GA).

[0049] The display unit 100 may include scan lines SL, sensing control lines SSL, data lines DL, sensing lines RL (or readout lines), and sub-pixels SPX.

[0050] Subpixels SPX can be located in an area defined by scan lines SL, sensor control lines SSL, data lines DL, and sensor lines RL. The display unit 100 includes multiple pixels; for example, multiple pixels can be connected to a single data line DL and sensor line RL. For the specific structure of the subpixels SPX, please refer to [reference needed]. Figure 2 To be continued later.

[0051] The timing control unit 400 generates a data control signal DDC for controlling the operating timing of the data drive unit 300 and a scan control signal GDC for controlling the operating timing of the scan drive unit 200 based on timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the data enable signal DE. The timing control unit 400 can time-separate the period for performing image display and the period for performing external compensation (or, the sensing period), and generate control signals DDC and GDC for image display and external compensation respectively.

[0052] External compensation is a technique that senses the driving characteristics of the light-emitting elements and / or driving transistors included in the sub-pixel SPX and corrects the input data (or, first data DATA1) based on their sensed values. The driving characteristics of the light-emitting elements refer to the operating point voltage of the light-emitting elements, and the driving characteristics of the driving transistors refer to the threshold voltage and electron mobility of the driving transistors.

[0053] Additionally, the timing control unit 400 rearranges the input data DATA1 provided from an external source (e.g., an image processor) to generate frame data (or, second data DATA2). According to one embodiment, the timing control unit 400 can insert a clock training signal (or a clock training mode) into the frame data to generate clock-embedded data. Here, the clock training signal is used in the data driving unit 300 to recover the clock signal; for example, the clock training signal may include values ​​corresponding to a square wave, similar to the clock signal. For example, the timing control unit 400 can insert the clock training signal between the frame data and adjacent frame data.

[0054] The timing control unit 400 can provide the second data DATA2 to the data drive unit 300.

[0055] The scan drive unit 200 and the data drive unit 300 can drive the display unit 100.

[0056] The scan drive unit 200 can receive the scan control signal GDC from the timing control unit 400, and generate a scan signal and a sensing control signal (or, a sensing scan signal) based on the scan control signal GDC. The scan drive unit 200 can provide the scan signal to the scan line SL and the sensing control signal to the sensing control line SSL.

[0057] The data driving unit 300 receives the data control signal DDC and the second data DATA2 from the timing control unit 400. The data driving unit 300 can recover the clock signal based on the clock training signal of the clock embedded data, and recover the frame data from the clock embedded data based on the clock signal.

[0058] In addition, during the display period (or frame interval) when the display unit 100 displays an image, the data driving unit 300 can generate a data signal corresponding to the second data DATA2 and provide the data signal to the data line DL.

[0059] During a first sensing period in a sensing period that senses characteristic information of the sub-pixel SPX, such as the threshold voltage and / or mobility of the driving transistor in the sub-pixel SPX, the data driving unit 300 can provide a first sensing voltage to the sub-pixel SPX through a buffer amplifier unit (not shown), and receive a first sensing signal corresponding to the first sensing voltage from at least one pixel in the sub-pixel SPX through a sensing line RL.

[0060] For example, the sensing period can be a vertical blanking interval (or a vertical edge interval) between adjacent display periods (e.g., different frame intervals). During the sensing period, the data driving unit 300 can receive sensing signals (e.g., the mobility of the driving transistor, or signals about it) from the sub-pixel SPX. As another example, the sensing period can be the interval before the display device 10 is powered off, during which the data driving unit 300 sequentially receives sensing signals (e.g., the threshold voltage of the driving transistor of each pixel) from the pixels including the sub-pixel SPX on a pixel-by-pixel basis.

[0061] The Graubber amplifier GA can be connected to the data line DL located between the display unit 100 and the data driving unit 300. According to one embodiment, the output of the Graubber amplifier GA can be connected to multiple data lines DL via a switch SW, and during a second sensing period different from the first sensing period, a second sensing voltage is provided to the sub-pixel SPX via the data line DL. In this case, the data driving unit 300 can receive a second sensing signal corresponding to the second sensing voltage from at least one pixel in the sub-pixel SPX via the sensing line RL.

[0062] On the other hand, the timing control unit 400 can receive compensation data SD provided by the data driving unit 300 according to external compensation operations. The timing control unit 400 can generate second data DATA2 by correcting the first data DATA1 based on the compensation data SD, so as to compensate for the degradation deviation of the driving transistors between pixels PXL and / or the degradation deviation of the light-emitting elements between pixels PXL. The timing control unit 400 can transmit the corrected second data DATA2 to the data driving unit 300 during the display period used for image display.

[0063] The compensation data SD can be generated based on the first sensing signal and the second sensing signal. For specific methods of calculating the first and second sensing signals, please refer to the following. Figures 3 to 6b Details will be discussed later.

[0064] Figure 2It is shown that it includes Figure 1 A circuit diagram of an example of a sub-pixel in a display device. Figure 2 The example shows the sub-pixel SPX included in the nth pixel row and the kth pixel column (where n and k are positive integers).

[0065] Reference Figure 2 Subpixel SPX can be connected to the nth scan line SLn, the kth data line DLk, the nth sensing control line SSLn, and the kth sensing line RLk.

[0066] The sub-pixel SPX may include a light-emitting element LED, a first transistor (driving transistor) T1, a second transistor (switching transistor) T2, a third transistor (sensing transistor) T3, and a storage capacitor Cst.

[0067] The anode of the LED can be connected to the second node N2 (or the second electrode of the first transistor T1), and the cathode can be connected to the second power line PL2, which is supplied with a second power supply voltage VSS. The LED can generate light of a predetermined brightness corresponding to the amount of current (or driving current) supplied from the first transistor T1. The LED can be an organic light-emitting diode, but is not limited to it, and may also include inorganic light-emitting diodes.

[0068] Additionally, the light-emitting element LED can also be a hybrid element containing both organic and inorganic materials. Furthermore, although in Figure 2 The diagram shows a sub-pixel SPX comprising a single light-emitting element LED, but in other embodiments, the sub-pixel SPX may comprise multiple light-emitting elements LED, which are connected to each other in series, parallel, or series-parallel connections.

[0069] Alternatively, the first electrode of the first transistor T1 can be connected to the first power line PL1, where a first power supply voltage VDD is applied, and the second electrode can be connected to the second node N2 (or the anode electrode of the light-emitting element LED). The gate electrode of the first transistor T1 can be connected to the first node N1. The first transistor T1 controls the amount of current flowing to the light-emitting element LED according to the voltage of the first node N1.

[0070] Alternatively, the first electrode of the second transistor T2 can be connected to the k-th data line DLk, and the second electrode can be connected to the first node N1. The gate electrode of the second transistor T2 can be connected to the n-th scan line SLn. When a scan signal S[n] is supplied to the n-th scan line SLn, the second transistor T2 can be turned on to transmit the data voltage Vdata (or data signal) from the k-th data line DLk to the first node N1. At this time, it is possible that during the first sensing period, the data voltage Vdata from the buffer amplifier BF (refer to...) is transmitted to the first node N1. Figure 3The first induced voltage is output as the data voltage Vdata, and during the second induction period, it is obtained from the GLAO amplifier GA (reference). Figure 1 The second induced voltage is output as the data voltage Vdata.

[0071] The storage capacitor Cst can be connected between the first node N1 and the anode electrode of the light-emitting element LED. The storage capacitor Cst can store the voltage of the first node N1.

[0072] The third transistor T3 can be connected between the k-th sensing line RLk and the second node N2 (or, the second electrode of the first transistor T1). The gate electrode of the third transistor T3 can be connected to the n-th sensing control line SSLn. When the sensing control signal SEN[n] is supplied to the n-th sensing control line SSLn, the third transistor T3 is turned on and the k-th sensing line RLk and the second node N2 are electrically connected.

[0073] According to one embodiment, a sensing control signal SEN[n] can be applied simultaneously with the scanning signal S[n]. During at least a portion of the first sensing period and the second sensing period, the second transistor T2 and the third transistor T3 can remain in a conducting state. The third transistor T3 can connect the second node N2 and the k-th sensing line RLk in response to the sensing control signal SEN[n]. In this case, a sensing signal can be provided to the k-th sensing line RLk. Here, the sensing signal can be set as a sensing voltage applied to the second node N2 and / or a sensing current supplied to the second node N2.

[0074] The sensing signal can be transmitted to the data drive unit 300 (reference) via the k-th sensing line RLk. Figure 1 )supply.

[0075] During the sensing period, the sub-pixel SPX (or, the light-emitting element LED) may emit light according to the gate-source voltage of the first transistor T1. Specifically, the sensing period corresponds to... Figure 1 In the case of the vertical blank area described in the text, the sub-pixel SPX may emit light at an undesirable brightness in the vertical blank area.

[0076] Therefore, display device 10 (refer to) Figure 1 By changing the second power supply voltage VSS, for example by increasing the voltage level of the second power supply voltage VSS, the emission of the sub-pixel SPX can be suppressed. However, it is not limited to this.

[0077] On the other hand, in embodiments of the present invention, the sub-pixel SPX is not limited to Figure 2 The circuit structure is shown in the diagram. As an example, although in... Figure 2The first transistor T1, the second transistor T2, and the third transistor T3 are each shown as N-type transistors, but at least one of the first transistor T1, the second transistor T2, and the third transistor T3 can be formed as a P-type transistor.

[0078] Figure 3 This diagram illustrates the operation of the pixel, data driver, and voltage regulator amplifier during the sensing period. In this case, the data driver 300 may include one or more source driver ICs (Integrated Circuit; not shown). Figure 3 For ease of explanation, we will assume that there is only one source driver IC.

[0079] Reference Figure 3 The data drive unit 300 may include a signal output unit 310 and a sensing unit 320. Here, the sensing unit 320 is a reference numeral used to refer to a plurality of sensing units SU, which will be referred to as sensing units SU below.

[0080] According to one embodiment of the present invention, the sensing unit SU can receive a first sensing signal from pixels PXL1 and PXL2 during a first sensing period, corresponding to a first sensing voltage output by the buffer amplifier BF. Additionally, the sensing unit SU can receive a second sensing signal from pixels PXL1 and PXL2 during a second sensing period, corresponding to a second sensing voltage output by the grating amplifier GA. The sensing unit SU, which receives the first and second sensing signals, can generate compensation data SD based on the difference between the first and second sensing signals. In this case, the first and second sensing periods are only used to distinguish the different sensing voltages input to pixels PXL1 and PXL2, and are not used to define the temporal order. That is, the second sensing period can precede the first sensing period.

[0081] The first pixel PXL1 may include a first sub-pixel SPX1 connected to the first data line DL1, a second sub-pixel SPX2 connected to the second data line DL2, and a third sub-pixel SPX3 connected to the third data line DL3. The second pixel PXL2 may include a first sub-pixel SPX1 connected to the fourth data line DL4, a second sub-pixel SPX2 connected to the fifth data line DL5, and a third sub-pixel SPX3 connected to the sixth data line DL6. For example, the first sub-pixel SPX1 could be a red pixel emitting red light, the second sub-pixel SPX2 a green pixel emitting green light, and the third sub-pixel SPX3 a blue pixel emitting blue light. However, the structure of pixels PXL1 and PXL2 is not limited to this. For example, pixels PXL1 and PXL2 may also include sub-pixels emitting white light.

[0082] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be connected to one of a plurality of sensing lines. According to one embodiment, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 included in the first pixel PXL1 can be connected to a single sensing line, namely the first sensing line RL1, and the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 included in the second pixel PXL2 can be connected to a second sensing line RL2. That is, the plurality of sub-pixels SPX1, SPX2, and SPX3 constituting the same pixels PXL1 and PXL2 can be independently connected to different sensing lines RL1 and RL2.

[0083] The output of the Gravure amplifier GA can be connected to the first data line DL1 via the first switch SW1, the second data line DL2 via the second switch SW2, and the third data line DL3 via the third switch SW3. Additionally, the output of the Gravure amplifier GA can be connected to the fourth data line DL4 via the first switch SW1, the fifth data line DL5 via the second switch SW2, and the sixth data line DL6 via the third switch SW3. According to one embodiment of the present invention, the first switch SW1 connected to the first sub-pixel SPX1 can simultaneously operate on and off, the second switch SW2 connected to the second sub-pixel SPX2 can simultaneously operate on and off, and the third switch SW3 connected to the third sub-pixel SPX3 can simultaneously operate on and off.

[0084] The sensing unit SU can receive the first sensing signal from pixels PXL1 and PXL2 corresponding to the first sensing voltage output by the buffer amplifier BF during the first sensing period. At this time, the first switch SW1, the second switch SW2, and the third switch SW3 can all be turned off during the first sensing period. That is, during the first sensing period, the first switch SW1, the second switch SW2, and the third switch SW3 are all in an open circuit state, so no signal is received from the GROB amplifier GA.

[0085] The sensing unit SU can receive the second sensing signal from pixels PXL1 and PXL2, corresponding to the second sensing voltage output by the GLOBAL amplifier GA during the second sensing period.

[0086] According to one embodiment of the present invention, the second sensing signal can be received sequentially in the order of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 connected in the same pixel row.

[0087] For example, during the second sensing period, the first switch SW1 is turned on (or closed), while the second switch SW2 and the third switch SW3 are turned off (or open). At this time, the first buffer amplifier BF1, connected to the first data line DL1, is in a high-impedance (Hi-z) state, and the second buffer amplifier BF, connected to the second data line DL2, and the third buffer amplifier BF, connected to the third data line DL3, can output the data voltage corresponding to the lowest grayscale (or, black data). The first buffer amplifier B1F being in a high-impedance (Hi-z) state is essentially an open circuit, therefore it can only input the second induced voltage output from the Graubberg amplifier GA via the first data line DL1.

[0088] Secondly, during the second sensing period, the second switch SW2 is turned on (or closed), while the first switch SW1 and the third switch SW3 are turned off (or open). At this time, the second buffer amplifier BF connected to the second data line DL2 is in a high-impedance (Hi-z) state, and the first buffer amplifier BF1 connected to the first data line DL1 and the third buffer amplifier BF connected to the third data line DL3 can output the data voltage corresponding to the lowest grayscale (or, black data). The second buffer amplifier BF being in a high-impedance (Hi-z) state is essentially an open-circuit state, therefore it can only input the second induced voltage output from the Gerber amplifier GA through the second data line DL2.

[0089] Subsequently, during the second sensing period, the third switch SW3 may be turned on (or closed), while the first switch SW1 and the second switch SW2 may be turned off (or open). The third buffer amplifier BF, connected to the third data line DL3, is in a high-impedance (Hi-z) state. The first buffer amplifier BF1, connected to the first data line DL1, and the second buffer amplifier BF, connected to the second data line DL2, can output the data voltage corresponding to the lowest grayscale (or, black data). The third buffer amplifier BF being in a high-impedance (Hi-z) state is essentially an open-circuit state, therefore it can only receive the second induced voltage output from the Gerber amplifier GA via the third data line DL3.

[0090] On the other hand, it may also include a power stabilizing capacitor C connected to the first electrode of the output terminal of the Graubberg amplifier GA and a reference power supply (or, ground voltage). The power stabilizing capacitor C can maintain the voltage at the output terminal of the Graubberg amplifier GA.

[0091] Figure 4 This specifically illustrates an embodiment of the present invention. Figure 3 Circuit diagram of the signal output section of the data drive unit.

[0092] Reference Figure 4 The signal output unit 310 may include a shift register unit 311, a sampling latch unit 312, a holding latch unit 313, a decoder 314, and a buffer amplifier unit BF.

[0093] The shift register unit 311 can sequentially generate m (m is a natural number greater than 0) sampled signals in response to the source start pulse SSP and the source shift clock SSC output from the timing control unit 400. Specifically, the shift register unit 311 can sequentially generate m sampled signals while shifting the source start pulse SSP in each cycle of the source shift clock SSC. The shift register unit 311 can implement m shift registers 3111 to 311m.

[0094] The sampling latch unit 312 can sequentially store the second data DATA2 in response to the sampling signals supplied sequentially from the shift register unit 311. The sampling latch unit 312 can be implemented by m sampling latches 3121 to 312m for storing m second data DATA2.

[0095] The holding latch unit 313 can store the second data DATA2 supplied from the sampling latch unit 312 in response to the source output enable (SOE) signal output from the timing control unit 400. The holding latch unit 313 can supply the second data DATA2 stored therein to the decoder 314. The holding latch unit 313 can be implemented by m holding latches 3131 to 313m.

[0096] Decoder 314 can convert the second data DATA2 output from latch unit 313 into an analog signal, and output the converted analog signal as a data signal to buffer amplifier unit BF. Decoder 314 can select multiple grayscale voltages from the minimum grayscale gamma voltage VGAL and the maximum grayscale gamma voltage VGAH based on the second data DATA2 output from latch unit 313. Decoder 314 can have m digital-analog converters 3141 to 314m. That is, decoder 314 can generate m data signals using digital-analog converters 3141 to 314m configured in each channel, and supply the generated data signals to buffer amplifier unit BF.

[0097] The buffer amplifier section BF can supply m data signals from the decoder 314 to m data lines DL1 to DLm. The buffer amplifier section BF can be implemented by m buffer amplifiers BF1 to BFm.

[0098] Figure 5 This illustrates an embodiment of the present invention. Figure 3 The circuit diagram of the sensing element. Figure 6aIt is a waveform diagram showing the voltage value of the induced signal stored in the induced capacitor during the first induced period.

[0099] Figure 6b This is a waveform diagram showing the voltage value of the induced signal stored in the induced capacitor during the second induction period. Figure 5 The data driving unit 300, which senses the characteristics of pixel PXL by being connected to pixel PXL via the k-th sensing line RLk, is briefly shown in the center.

[0100] Reference Figure 1 , Figure 2 , Figure 4 as well as Figure 5 Pixel PXL and reference Figure 2 The sub-pixel SPX used for illustration is essentially the same as that used for reference. Figure 4 The buffer amplifier section BF described herein is essentially the same, therefore repeated descriptions will not be repeated.

[0101] According to one embodiment of the present invention, during the first sensing period of the sensing period for sensing characteristic information of the sub-pixel SPX, the buffer amplifier section BF provides a first sensing voltage to the sub-pixel SPX via the data line DL, and the sensing section SU receives a first sensing signal corresponding to the first sensing voltage from at least one pixel in the sub-pixel SPX via the sensing line RL.

[0102] Alternatively, during the second sensing period, the GA amplifier provides a second sensing voltage to the sub-pixel SPX via the data line DL, and the sensing unit SU receives a second sensing signal corresponding to the second sensing voltage from at least one pixel in the sub-pixel SPX via the sensing line RL.

[0103] The data drive unit 300 may include a buffer amplifier unit BF and a sensing unit SU.

[0104] The buffer amplifier section BF can be connected to the digital-to-analog converters 3141 to 314m of the decoder 314 (see reference). Figure 4 The buffer amplifier section BF receives the data voltage corresponding to the data value (or grayscale data) included in the frame data (or, the second data DATA2). The buffer amplifier section BF can provide the data voltage to the k-th data line DLk.

[0105] The sensing unit SU may include a sensing capacitor CSEN, a first capacitor C1, a second capacitor C2, an initialization switch SW_VINIT, a sampling switch SW_SPL, a sharing switch SW_SHARE, a reset switch SW_RST, an output switch SW_CH, and a compensation data calculation unit SDG.

[0106] The initialization switch SW_VINIT can be connected between the power supply line to which the initialization voltage VINIT is applied and the k-th sensing line RLk. Here, the initialization voltage VINIT can be provided from a separate power supply and has a voltage level lower than the operating point of the light-emitting element (LED). Specifically, when the initialization switch SW_VINIT is turned on, the initialization voltage VINIT is applied to the k-th sensing line RLk; additionally, when the third transistor T3 of the sub-pixel SPX is turned on, the initialization voltage VINIT is applied to the second node N2 of the sub-pixel SPX. Since the initialization voltage VINIT has a voltage level lower than the operating point of the light-emitting element (LED), the LED may not emit light even if the first transistor T1 is turned on.

[0107] The sensing capacitor CSEN can be connected between the k-th sensing line RLk and the reference power supply. The reference power supply can have a ground voltage, but is not limited to this. When the initialization switch SW_VINIT is off and the third transistor T3 of the sub-pixel SPX is on, the sensing capacitor CSEN can be charged using the current provided through the second node N2. That is, the characteristic information of the sub-pixel SPX provided through the second node N2 can be stored in the sensing capacitor CSEN.

[0108] Reference Figure 6a During the first sensing period, the voltage Vsen1 (or the voltage of the first sensing signal) stored across the sensing capacitor CSEN can be the value obtained by subtracting the threshold voltage ΔVth of the first transistor T1 (or the driving transistor) and the voltage deviation ΔVdv of the buffer amplifier section BF from the first sensing voltage V1. Here, the voltage deviation ΔVdv of the buffer amplifier section BF can refer to the voltage deviation caused by differences in the configuration of the multiple buffer amplifiers BF1 to BFm. For example, due to manufacturing process variations, the multiple buffer amplifiers BF1 to BFm may have different gains, thus potentially increasing or decreasing the output voltage of the buffer amplifiers BF1 to BFm.

[0109] On the other hand, refer to Figure 6b During the second sensing period, the voltage Vsen2 (or the voltage of the second sensing signal) stored across the sensing capacitor CSEN can be the value obtained by subtracting the threshold voltage ΔVth of the first transistor T1 (or the driving transistor) from the second sensing voltage V2. Unlike the case where the first sensing voltage is supplied through multiple buffer amplifiers BF1 to BFm, when the second sensing voltage with the same level is supplied to multiple sub-pixels SPX via a single Graham amplifier GA, no voltage deviation is generated.

[0110] The first induced voltage V1 can have the same value as the second induced voltage V2. For example, the buffer amplifier section BF and the GLAO amplifier GA can receive voltages from... Figure 4 The same analog signal is output from the same decoder 314 shown in the figure.

[0111] When the magnitudes of the first induced voltage V1 and the second induced voltage V2 are the same, the voltage (or the voltage of the second induced signal) stored across the induced capacitor CSEN during the second induced period can be greater than the voltage (or the voltage of the first induced signal) stored across the induced capacitor CSEN during the first induced period.

[0112] The sampling switch SW_SPL can be connected between the k-th sensing line RLk and the third node N3. The first capacitor C1 can be connected between the third node N3 and the reference power supply. During the period when the sampling switch SW_SPL is turned on, the first capacitor C1 can sample the characteristic information of the sub-pixel SPX (or, the first transistor T1) stored in the sensing capacitor CSEN. That is, the data driving unit 300 can sample the sensing signal through the sampling switch SW_SPL and the first capacitor C1.

[0113] Alternatively, a shared switch SW_SHARE can be connected between the third node N3 and the fourth node N4, a reset switch SW_RST can be connected between the fourth node N4 and the reference power supply, and a second capacitor C2 can be connected between the fourth node N4 and the reference power supply. When the shared switch SW_SHARE is on, the first capacitor C1 and the second capacitor C2 share charge, and the node voltage of the fourth node N4 (and the node voltage of the third node N3) can vary. Depending on the operation of the shared switch SW_SHARE and the reset switch SW_RST, the shared switch SW_SHARE, the reset switch SW_RST, and the second capacitor C2 can function as a buffer. Here, although the gain varies depending on the capacitance ratio of the first capacitor C1 and the second capacitor C2, the buffer gain can be N (where N is an integer greater than 1). That is, the shared switch SW_SHARE, the reset switch SW_RST, and the second capacitor C2 can amplify the node voltage of the third node N3.

[0114] The compensation data calculation unit SDG can be connected between the fourth node N4 and the output switch SW_CH, and receives the voltage (or the voltage of the first sensing signal) stored across the sensing capacitor CSEN during the first sensing period, and the voltage (or the voltage of the second sensing signal) stored across the sensing capacitor CSEN during the second sensing period. The compensation data calculation unit SDG can calculate the difference between the received voltage of the first sensing signal and the voltage of the second sensing signal.

[0115] The output switch SW_CH can be connected between the output of the compensation data calculation unit SDG and the analog-to-digital converter ADC, and the output of the compensation data calculation unit SDG can be connected to the input of the analog-to-digital converter ADC. In this case, the difference between the voltage of the first induced signal and the voltage of the second induced signal can be applied to the analog-to-digital converter ADC.

[0116] Although not illustrated, it may also include a capacitor connected between the input of the analog-to-digital converter (ADC) and a reference power supply to maintain the node voltage of the fourth node N4 supplied to the ADC, as well as initialization circuitry (e.g., capacitor initialization power supply and switch connecting it to the input of the ADC) to initialize the input of the ADC (or, the capacitor).

[0117] An analog-to-digital converter (ADC) can convert the voltage supplied to the input terminal into a data value (e.g., a digital code). That is, the data drive unit 300 can convert the sampled sensing signal from analog to digital form using the ADC. The digital sensing signal (or, compensation data SD) can then be provided to the timing control unit 400.

[0118] On the other hand, although Figure 5 The diagram shows the sensor unit SU as being composed of capacitors CSEN, C1, and C2, and switches SW_VINIT, SW_SPL, SW_SHARE, SW_RST, and SW_CH, but this is merely an example and not a limitation. For example, as long as the sensor unit SU can detect the node voltage (or, corresponding to its current) of the second node N2 of the sub-pixel SPX, various circuits can be used as the sensor unit SU (e.g., a sensing circuit that uses an amplifier to convert the induced current into an induced voltage, and samples and holds the converted induced voltage).

[0119] According to an embodiment of the present invention, by using a single Graviton amplifier (GA), information related only to the threshold voltage ΔVth of the plurality of pixels PXL included in the display unit 100 can be calculated. Therefore, information related to the threshold voltage ΔVth of the plurality of pixels PXL and information related to the voltage deviation ΔVdv of the buffer amplifier BF of the data drive unit 300 can be managed separately. Thus, compensation for the threshold voltage ΔVth of the plurality of pixels PXL and compensation for the voltage deviation ΔVdv of the buffer amplifier BF of the data drive unit 300 can be performed separately. This reduces the deviation between sensing channels, thereby enabling more accurate compensation for the display device 10.

[0120] Figure 7 This is a flowchart illustrating a driving method for a display device according to an embodiment of the present invention. Figure 8A signal diagram showing the interface signals of the timing control unit according to an embodiment of the present invention is provided.

[0121] First, refer to Figure 1 as well as Figure 8 The timing control unit 400 can provide clock embedded data to the data driver unit 300. The timing control unit 400 can transmit the clock embedded data to the data driver unit 300 in the form of data packets using a serial interface (or a high-speed serial interface).

[0122] The timing control unit 400 can switch frames corresponding to the period of the vertical synchronization signal Vsync. Here, "H" signifies the start of a horizontal time period, and "HBP" signifies the end of a horizontal time period. "Pixel data" may include information about the second data DATA2 during the display period, and "frame protocol" may include information determining whether to use a buffer amplifier BF or a grid amplifier GA to perform sensing during the sensing period. The "H protocol" may include information related to whether the display device 10 is operating in display mode or sensing mode.

[0123] During the clock training period, the timing control unit 400 can insert a clock training signal (or clock training mode) into the frame data to generate clock embedded data.

[0124] The sensing period can be a vertical blanking interval (or a low-level interval of the vertical sync signal) between adjacent display periods (e.g., different frame intervals). During the sensing period, the data driving unit 300 can receive sensing signals (e.g., the mobility of the driving transistor, or signals about it) from the pixel PXL. As another example, the sensing period can be the interval before the display device 10 is powered off, during which the data driving unit 300 sequentially receives sensing signals (e.g., the threshold voltage of the driving transistor of each pixel) from the pixels including the sub-pixel SPX on a pixel-by-pixel basis.

[0125] For ease of explanation, the following references are provided. Figures 1 to 7 The description assumes that the sensing mode is performed during the vertical blank interval (or the low level interval of the vertical sync signal) between adjacent display periods (e.g., different frame intervals).

[0126] The driving method of the display device 10, which includes a display section 100 with multiple pixels PXL connected to a data line DL and a sensing line RL, firstly supplies a first sensing voltage V1 to the data line DL during a first sensing period in the data driving section 300 via multiple buffer amplifiers BF (S10).

[0127] The first pixel PXL1 may include a first sub-pixel SPX1 connected to the first data line DL1, a second sub-pixel SPX2 connected to the second data line DL2, and a third sub-pixel SPX3 connected to the third data line DL3.

[0128] The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can be connected to one of the multiple sensing lines.

[0129] The output of the GA amplifier can be connected to the first data line DL1 via the first switch SW1, to the second data line DL2 via the second switch SW2, and to the third data line DL3 via the third switch SW3.

[0130] During the first sensing period, a first sensing voltage V1 can be output from the buffer amplifier BF as the data voltage Vdata. During the first sensing period, the second transistor T2 may be turned on in response to the scan signal S[n], and the third transistor T3 may be turned on in response to the sensing control signal SEN[n]. At this time, during the first sensing period, the pixel PXL (or the light-emitting element LED) may emit light according to the gate-source voltage of the first transistor T1 of the pixel PXL. Specifically, during the sensing period corresponding to... Figure 1 In the case of the vertical blank area described in the text, pixel PXL may emit light at an undesirable brightness in the vertical blank area.

[0131] Therefore, the display device 10 can suppress the emission of pixel PXL by changing the second power supply voltage VSS during the first sensing period, for example by increasing the voltage level of the second power supply voltage VSS.

[0132] Subsequently, in the data driving unit 300, the sensing unit SU receives the first sensing signal from the pixel PXL via the sensing line RL during the first sensing period (S20).

[0133] During the first sensing period, the sensing unit SU can receive a first sensing signal from pixels PXL1 and PXL2 corresponding to the first sensing voltage V1 output by the buffer amplifier BF. At this time, the first switch SW1, the second switch SW2, and the third switch SW3 can all be turned off during the first sensing period. That is, during the first sensing period, the first switch SW1, the second switch SW2, and the third switch SW3 are all in an open-circuit state, therefore no signal is received from the GROB amplifier GA.

[0134] Secondly, the amplifier GA supplies a second induced voltage V2 to the data line DL during a second induced period that is different from the first induced period (S30).

[0135] Reference Figure 3During the second sensing period, the second sensing voltage V2 can be output from the Grubber amplifier GA as the data voltage Vdata. During the second sensing period, the second transistor T2 may be turned on in response to the scan signal S[n], and the third transistor T3 may be turned on in response to the sensing control signal SEN[n]. At this time, the display device 10 can suppress the emission of pixel PXL by changing the second power supply voltage VSS during the second sensing period, for example, by increasing the voltage level of the second power supply voltage VSS.

[0136] The step of supplying the second induced voltage V2 may include: during the second induction period, the first switch SW1 is turned on, the second switch SW2 and the third switch SW3 are turned off, the first buffer amplifier BF1 connected to the first data line DL1 is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest gray level is output through the second buffer amplifier BF2 connected to the second data line DL2 and the third buffer amplifier BF3 connected to the third data line DL3; during the second induction period, the second switch SW2 is turned on, the first switch SW1 and the third switch SW3 are turned off, the second buffer amplifier BF2 is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest gray level is output through the first buffer amplifier BF1 and the third buffer amplifier BF3; and during the second induction period, the third switch SW3 is turned on, the first switch SW1 and the second switch SW2 are turned off, the third buffer amplifier BF3 is in a high impedance (Hi-z) state, and the data voltage corresponding to the lowest gray level is output through the first buffer amplifier BF1 and the second buffer amplifier BF2.

[0137] Subsequently, in the data driving unit 300, the sensing unit SU receives a second sensing signal corresponding to the second sensing voltage V2 from the pixel PXL via the sensing line RL during the second sensing period (S40). The sensing unit SU can receive the second sensing signal from the pixels PXL1 and PXL2 during the second sensing period, corresponding to the second sensing voltage V2 output by the Graubberg amplifier GA.

[0138] At this point, the first and second sensing periods are only used to distinguish the different sensing voltages input to pixels PXL1 and PXL2, and are not used to define the order of events. That is, the second sensing period can precede the first sensing period.

[0139] Next, in the data driving unit 300, the sensing unit SU generates compensation data based on the difference between the first sensing signal and the second sensing signal (S50).

[0140] The sensing capacitor CSEN of the sensing unit SU can store the voltage of the first sensing signal corresponding to the first sensing voltage V1 during the first sensing period, and store the voltage of the second sensing signal corresponding to the second sensing voltage V2 during the second sensing period.

[0141] During the first sensing period, the voltage Vsen1 (or the voltage of the first sensing signal) stored across the sensing capacitor CSEN can be the value of the first sensing voltage V1 minus the threshold voltage ΔVth of the first transistor T1 (or the driving transistor) and the voltage deviation ΔVdv of the buffer amplifier section BF.

[0142] During the second sensing period, the voltage Vsen2 (or the voltage of the second sensing signal) stored across the sensing capacitor CSEN can be the value of the second sensing voltage V2 minus the threshold voltage ΔVth of the first transistor T1 (or the driving transistor).

[0143] At this time, the first induced voltage V1 can have the same value as the second induced voltage V2. For example, the buffer amplifier section BF and the GLAO amplifier GA can receive voltages from... Figure 4 The same analog signal is output by the same decoder 314 shown in the figure.

[0144] When the magnitudes of the first induced voltage V1 and the second induced voltage V2 are the same, the voltage (or the voltage of the second induced signal) stored across the induced capacitor CSEN during the second induced period can be greater than the voltage (or the voltage of the first induced signal) stored across the induced capacitor CSEN during the first induced period.

[0145] The compensation data calculation unit SDG can be connected between the fourth node N4 and the output switch SW_CH, and receives the voltage (or the voltage of the first sensing signal) stored across the sensing capacitor CSEN during the first sensing period, and the voltage (or the voltage of the second sensing signal) stored across the sensing capacitor CSEN during the second sensing period. The compensation data calculation unit SDG can calculate the difference between the received voltage of the first sensing signal and the voltage of the second sensing signal.

[0146] The analog-to-digital converter (ADC) can convert the voltage difference between the first and second sensed signals into a data value (e.g., a digital code). That is, the data drive unit 300 can convert the sampled sensed signal from analog to digital form using the ADC. The digital sensed signal (or, compensation data SD) can then be provided to the timing control unit 400.

[0147] The timing control unit 400 can receive compensation data SD based on external compensation operations from the data driver unit 300. The timing control unit 400 can compensate for degradation deviations in the driving transistors between pixels PXL by correcting the first data DATA1 based on the compensation data SD, or compensate for degradation deviations in the organic light-emitting diodes between pixels PXL. The timing control unit 400 can also transmit second data DATA2, which is corrected during the display period for image display, to the data driver unit 300.

[0148] According to an embodiment of the present invention, by using a single Graviton amplifier (GA), information related only to the threshold voltage ΔVth of the plurality of pixels PXL included in the display unit 100 can be calculated. Therefore, information related to the threshold voltage ΔVth of the plurality of pixels PXL and information related to the voltage deviation ΔVdv of the buffer amplifier BF of the data drive unit 300 can be managed separately. Thus, compensation for the threshold voltage ΔVth of the plurality of pixels PXL and compensation for the voltage deviation ΔVdv of the buffer amplifier BF of the data drive unit 300 can be performed separately. This reduces the deviation between sensing channels, thereby enabling more accurate compensation for the display device 10.

[0149] The invention has been described above with reference to embodiments thereof; however, those skilled in the art will understand that various modifications and alterations can be made to the invention without departing from the concept and scope of the invention as set forth in the claims.

Claims

1. A display device, wherein, include: The display section includes multiple pixels connected to data lines and sensing lines; The data driving unit includes a plurality of buffer amplifiers that supply a first sensing voltage to the data line during a first sensing period and a sensing unit that receives a first sensing signal from the pixel through the sensing line during the first sensing period. as well as A safety amplifier provides a second induced voltage to the data line during a second induced period that is different from the first induced period. During the second sensing period, the sensing unit receives a second sensing signal corresponding to the second sensing voltage from the pixel via the sensing line, and generates compensation data based on the difference between the first sensing signal and the second sensing signal corresponding to the same pixel. The first sensing signal is a value obtained by subtracting the threshold voltage of the driving transistor included in each of the pixels and the voltage deviation of the buffer amplifier from the first sensing voltage, and the second sensing signal is a value obtained by subtracting the threshold voltage of the driving transistor from the second sensing voltage.

2. The display device according to claim 1, wherein, The second induced voltage has the same value as the first induced voltage.

3. The display device according to claim 2, wherein, The second sensing signal has a larger value than the first sensing signal.

4. The display device according to claim 1, wherein, Each of the pixels includes: a first sub-pixel connected to a first data line in the data lines; a second sub-pixel connected to a second data line in the data lines; and a third sub-pixel connected to a third data line in the data lines.

5. The display device according to claim 4, wherein, The first sub-pixel, the second sub-pixel, and the third sub-pixel are connected to one of the sensing lines.

6. The display device according to claim 4, wherein, The output terminal of the GLAB amplifier is connected to the first data line via a first switch, to the second data line via a second switch, and to the third data line via a third switch.

7. The display device according to claim 6, wherein, The first switch, the second switch, and the third switch are each in an open circuit state during the first sensing period.

8. The display device according to claim 6, wherein, During the second sensing period, when the first switch is in the closed state, the second switch and the third switch are in the open state. The first buffer amplifier connected to the first data line is in a high-impedance state, and the second buffer amplifier connected to the second data line and the third buffer amplifier connected to the third data line output the data voltage corresponding to the lowest grayscale. During the second sensing period, when the second switch is in the closed state, the first switch and the third switch are in the open state, the second buffer amplifier is in a high-impedance state, and the first buffer amplifier and the third buffer amplifier output the data voltage corresponding to the lowest grayscale. During the second sensing period, when the third switch is in the closed state, the first switch and the second switch are in the open state, the third buffer amplifier is in the high impedance state, and the first buffer amplifier and the second buffer amplifier output the data voltage corresponding to the lowest gray level.

9. The display device according to claim 1, wherein, The display device further includes: The timing control unit receives first data from the outside, adds the first data and the compensation data to generate second data, and provides the second data to the data driving unit.

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