Display device

Abstract

A display device includes: a display panel including scan lines and pixels connected to the scan lines; a first scan driver disposed outside the display panel; a first scan output line including a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan lines, and intersecting the scan lines; and a first inspection line including a first receiving terminal connected to the first scan driver and a first feedback terminal connected to the first scan driver, extending from the first receiving terminal to the first feedback terminal, and intersecting the scan lines.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0120066, filed on September 17, 2020, and all rights arising therefrom, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] Embodiments of the present invention relate to display devices. Background Technology

[0004] With the development of information technology, the importance of display devices as a connection medium between users and information is being emphasized. As a result, the use of display devices such as liquid crystal displays and organic light-emitting diode displays is increasing.

[0005] As the resolution and size of display panels in display devices increase, it becomes desirable to compensate for the resistance-capacitance (“RC”) delay of the scan and data signals within the display panel. If the RC delay is measured only once during the manufacturing process, it may not reflect the variations in RC delay depending on the use of the display panel.

[0006] To solve this problem, a wire for checking RC delay can be installed on the display panel. Summary of the Invention

[0007] Typically, the lines used to check resistor-capacitor (“RC”) delay can be formed long along the periphery of the display panel. This increases the dead zone and makes it difficult to achieve narrow bezels.

[0008] The technical problem to be solved is to provide a display device in which RC delay can be compensated for changes over time and the line used to check RC delay can not constitute a dead zone.

[0009] The display device in embodiments of the present invention may include: a display panel including scan lines and pixels connected to the scan lines; a first scan driver disposed outside the display panel; a first scan output line including a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan lines, and intersecting the scan lines; and a first inspection line including a first receiving terminal connected to the first scan driver and a first feedback terminal connected to the first scan driver, extending from the first receiving terminal to the first feedback terminal, and intersecting the scan lines.

[0010] In an embodiment, the display device may further include a second inspection line, comprising a second receiving terminal connected to the first scan driver and a second feedback terminal connected to the first scan driver, extending from the second receiving terminal to the second feedback terminal, and intersecting the scan line. The second inspection line may be longer than the first inspection line.

[0011] In an embodiment, the display device may further include: a second scan driver disposed outside the display panel; and a second scan output line including a first terminal connected to the second scan driver and a second terminal connected to a corresponding scan line in the scan lines, and crossing the scan lines. The scan lines connected to the first scan output line may not be connected to the second scan output line.

[0012] In an embodiment, the second scan output line may be longer than the first scan output line.

[0013] In an embodiment, the display device may further include a third inspection line, comprising a third receiving terminal connected to the second scan driver and a third feedback terminal connected to the second scan driver, extending from the third receiving terminal to the third feedback terminal, and intersecting the scan line. The third inspection line may be longer than the first inspection line and the second inspection line.

[0014] In an embodiment, the display device may further include a fourth inspection line, comprising a fourth receiving terminal connected to the second scan driver and a fourth feedback terminal connected to the second scan driver, extending from the fourth receiving terminal to the fourth feedback terminal, and intersecting the scan line. The fourth inspection line may be longer than the first inspection line, the second inspection line, and the third inspection line.

[0015] In an embodiment, the display device may further include: a third scan driver disposed outside the display panel; and a third scan output line including a first terminal connected to the third scan driver and a second terminal connected to a corresponding scan line in the scan line, and crossing the scan line. A scan line connected to the first scan output line may be connected to the third scan output line.

[0016] In an embodiment, the display device may further include: a first circuit board on which a first scan driver is disposed; a second circuit board on which a second scan driver is disposed; a third circuit board on which a third scan driver is disposed; a first auxiliary circuit board connected to the first circuit board and the second circuit board; and a second auxiliary circuit board connected to the third circuit board.

[0017] In an embodiment, the display device may further include: a first data driver disposed outside the display panel; a data line including a first terminal connected to the first data driver and a second terminal connected to a corresponding pixel in the pixel, and intersecting with the scan line; and a delay line including a first terminal connected to the first data driver and a second terminal connected to the first scan driver.

[0018] In one embodiment, the first scan driver can output a check signal to a first receiving terminal, receive a feedback signal from the check signal at a first feedback terminal, and generate a delayed signal based on the check signal and the feedback signal. The first data driver can receive the delayed signal via a delay line.

[0019] In one embodiment, the first data driver can determine the timing at which the data voltage is applied to the data line based on a delay signal.

[0020] In an embodiment, the data lines may include a first data line connected to pixels of a first color, a second data line connected to pixels of a second color, and a third data line connected to pixels of a third color. The first color, second color, and third color are different from each other. A first scan output line may extend between the first data line and the second data line closest to the first data line.

[0021] In an embodiment, the first inspection line may further include: a first portion extending between a first data line and a second data line closest to the first data line; a second portion extending between another first data line and another second data line closest to the other first data line; and a third portion intersecting at least one of the first data lines and at least one of the second data lines, and connecting the first portion and the second portion.

[0022] In an embodiment, the first inspection line and the first scan output line may not intersect each other in the area where the pixels are arranged.

[0023] In an embodiment, a first inspection line may be arranged in a first region of the display panel, a second inspection line may be arranged in a second region of the display panel, and a first scan output line may be arranged in a third region of the display panel. The first region, the second region, and the third region may not overlap with each other, and the third region may be arranged between the first region and the second region.

[0024] In one embodiment, the data lines connected to the pixels can be arranged in a fourth region of the display panel. The fourth region may include a first region, a second region, and a third region.

[0025] The display device in embodiments of the present invention may include: a display panel including scan lines, data lines, and pixels connected to the scan lines and data lines; a first scan driver disposed outside the display panel; a first data driver disposed outside the display panel and connected to a portion of the data lines; a first scan output line including a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan lines, and intersecting the scan lines; and a first check line including a first receiving terminal connected to the first data driver and a first feedback terminal connected to the first data driver, extending from the first receiving terminal to the first feedback terminal, and intersecting the scan lines.

[0026] In an embodiment, the display device may further include: a second data driver disposed outside the display panel and connected to another portion of the data line; and a second inspection line including a second receiving terminal connected to the second data driver and a second feedback terminal connected to the second data driver, extending from the second receiving terminal to the second feedback terminal, and intersecting the scan line. The second inspection line may be longer than the first inspection line.

[0027] In an embodiment, the first data driver can output a first check signal to a first receiving terminal, receive a first feedback signal from a first feedback terminal of the first check signal, and determine the time point at which a data voltage is applied to a portion of the data lines based on the first check signal and the first feedback signal.

[0028] In an embodiment, the second data driver can output a second check signal to a second receiving terminal, receive a second feedback signal from a second feedback terminal of the second check signal, and determine the time point at which the data voltage is applied to some data lines in another part of the data lines based on the second check signal and the second feedback signal. Attached Figure Description

[0029] The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0030] Figure 1 This is a diagram used to explain an embodiment of the display device according to the present invention.

[0031] Figure 2 This is a diagram used to explain an embodiment of the display panel according to the present invention.

[0032] Figure 3 This is a diagram used to explain an embodiment of the pixels according to the present invention.

[0033] Figure 4This is a diagram used to explain an embodiment of the first circuit board according to the present invention.

[0034] Figure 5 This is a diagram illustrating an embodiment of the method for checking resistance-capacitance (“RC”) delay according to the present invention.

[0035] Figure 6 This is a diagram used to explain another embodiment of the first circuit board according to the present invention.

[0036] Figure 7 This is a diagram used to explain yet another embodiment of the first circuit board according to the present invention. Detailed Implementation

[0037] In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings, enabling those skilled in the art to readily implement the invention. Embodiments of the present invention may be implemented in various different forms and are not limited to those described herein.

[0038] For clarity in describing the invention, irrelevant parts have been omitted, and identical or similar parts are indicated by the same reference numerals throughout the specification. Therefore, the reference numerals mentioned above can be used in other figures.

[0039] Furthermore, the dimensions and thicknesses of the various components shown in the accompanying drawings are arbitrarily illustrated for ease of description, and therefore the invention is not necessarily limited to those shown in the drawings. Thicknesses may be exaggerated in the drawings to clearly represent layers and regions.

[0040] Additionally, in the description, the expression "are the same" can mean "substantially the same." That is, it can be the same in such a way that a person skilled in the art would believe they are the same. In other expressions, "substantially" can be omitted.

[0041] What will be understood is that when an element is referred to as being "on" another element, it can be directly on the other element, or an intermediary element can be between them. Conversely, when an element is referred to as being "directly" on another element, there is no intermediary element.

[0042] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another. Therefore, “first element,” “first component,” “first region,” “first layer,” or “first part” discussed below may be referred to as a second element, second component, second region, second layer, or second part without departing from the teachings of this document.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a” and “the (described)” are intended to include the plural forms containing “at least one” unless the context clearly indicates otherwise. “Or” means “and / or”. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It will be further understood that when the terms “comprising” or “including” and variations thereof are used in this specification, they specify the presence of stated features, areas, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, areas, integrals, steps, operations, elements, components, and / or combinations thereof.

[0044] Furthermore, relative terms such as “down” or “bottom” and “up” or “top” may be used herein to describe the relationship between one element and another as illustrated in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the relative terms are also intended to cover different orientations of the device. In embodiments, when a device in one of the drawings is flipped, an element described as being “down” to the other element will then be oriented “up” to the other element. Thus, depending on the specific orientation of the drawing, the exemplary term “down” can cover both “down” and “up” orientations. Similarly, when a device in one of the drawings is flipped, an element described as being “below” or “under” the other element will then be oriented “above” the other element. Thus, the exemplary term “below” or “under” can cover both “up” and “down” orientations.

[0045] Given the errors and problematic measurements associated with the measurement of a particular quantity (i.e., limitations of the measurement system), the terms “about” or “approximate” as used herein include stated values ​​and averages within an acceptable range of deviation for a particular value as determined by one of ordinary skill in the art. For example, “about” can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0046] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms such as those defined in common dictionaries shall be interpreted as having the same meaning as they have in the relevant field and in the context of this invention, and shall not be interpreted in an idealized or overly formal sense unless expressly stated otherwise.

[0047] Figure 1 This is a diagram used to explain an embodiment of the display device according to the present invention.

[0048] Reference Figure 1 The display device DD in the embodiments of the present invention may include a display panel DP, circuit boards FLM1, FLM2, FLM3 and FLM4, and auxiliary circuit boards DFPC1 and DFPC2.

[0049] However, due to insufficient space on the paper, Figure 1 Only some components of the display device DD are shown in the diagram. Figure 2 The specific map shows the display panel DP, and Figure 4 The specific map shows the first circuit board, FLM1.

[0050] The display panel DP may include scan lines SL1, SL2, SL3, SL4, SL5, SL6, SL7, SL8, SL9, SL10, SL11, and SL12, as well as pixels connected to scan lines SL1 to SL12. Although not in Figure 1 As shown, pixels can be further connected to data lines. When a scan signal with an on-level is applied to the corresponding scan line, each pixel can be selected and can receive the data voltage applied to the corresponding data line. Each pixel can emit light with a brightness corresponding to the received data voltage. Therefore, the display panel DP can use a combination of light emitted from the pixels to display an image.

[0051] Scan lines SL1 to SL12 can extend along a first direction DR1 and can be positioned along a second direction DR2. The first direction DR1 and the second direction DR2 can be orthogonal to each other. When the display panel DP has a planar shape, the first direction DR1 and the second direction DR2 can be directions defining the plane. Scan lines SL1 to SL12 can have the same length. Although... Figure 1 Not shown, but the data cable can extend in the second direction DR2 and can be positioned in the first direction DR1. On the display panel DP, the data cables can have the same length.

[0052] Each of the display panel DP and circuit boards FLM1 to FLM4 may include multiple pad electrodes. The pad electrodes of each of the circuit boards FLM1 to FLM4 may be connected to the corresponding pad electrodes of the display panel DP. The circuit boards FLM1 to FLM4 may be in the form of a flexible film (e.g., a chip-on-film (“COF”)).

[0053] The first scan driver GIC1 can be mounted on the first circuit board FLM1. That is, the first scan driver GIC1 can be mounted outside the display panel DP. Therefore, since the scan driver does not need to be mounted (e.g., installed) on the display panel DP, the dead zone of the display panel DP can be reduced.

[0054] The first scan output lines SO1, SO2, and SO3 may include a first terminal connected to the first scan driver GIC1 and a second terminal connected to the corresponding scan line, and extend to intersect the scan lines. In an embodiment, for example, the first scan output lines SO1, SO2, and SO3 may be connected to different scan lines respectively. In an embodiment, for example, the first scan output line SO1 may be connected to scan lines SL1 and SL2, the first scan output line SO2 may be connected to scan lines SL3 and SL4, and the first scan output line SO3 may be connected to scan lines SL5 and SL6. In another embodiment, a first scan output line may be connected to only one scan line.

[0055] On the display panel DP, the first scan output lines SO1, SO2, and SO3 can extend along the second direction DR2 and can also be positioned along the first direction DR1. The lengths of the first scan output lines SO1, SO2, and SO3 can be different. In an embodiment, for example, based on their positions along the first direction DR1, the lengths of the first scan output lines SO1, SO2, and SO3 can gradually increase.

[0056] The first check line IL1 may include a first receive terminal IR1 connected to the first scan driver GIC1 and a first feedback terminal IF1 connected to the first scan driver GIC1. The first receive terminal IR1 and the first feedback terminal IF1 may be connected to different pins of the first scan driver GIC1. In an embodiment, for example, the different pins may be different electrical nodes. The first check line IL1 may extend from the first receive terminal IR1 to the first feedback terminal IF1 and may extend to intersect the scan line.

[0057] The second check line IL2 may include a second receive terminal IR2 connected to the first scan driver GIC1 and a second feedback terminal IF2 connected to the first scan driver GIC1. The second receive terminal IR2 and the second feedback terminal IF2 may be connected to different pins of the first scan driver GIC1. In an embodiment, for example, the different pins may be different electrical nodes. The second check line IL2 may extend from the second receive terminal IR2 to the second feedback terminal IF2, and may extend to intersect the scan line.

[0058] In an embodiment, for example, the second inspection line IL2 may be longer than the first inspection line IL1. The relatively short first inspection line IL1 may be arranged near the relatively short first scan output line SO1. Furthermore, the relatively long second inspection line IL2 may be arranged near the relatively long first scan output line SO3. Therefore, when using the first inspection line IL1, the resistance-capacitance (“RC”) delay of the first scan output line SO1 and its adjacent first scan output lines can be easily inspected. Additionally, when using the second inspection line IL2, the RC delay of the first scan output line SO3 and its adjacent first scan output lines can be easily inspected.

[0059] In an embodiment, for example, the width, thickness, and material of inspection lines IL1 and IL2 can be configured to be the same as the width, thickness, and material of the first scan output lines SO1, SO2, and SO3. (See reference...) Figure 1 As described, the settings of check lines IL1 and IL2 can be similar to the settings of the first scan output lines SO1, SO2, and SO3. Therefore, when using check lines IL1 and IL2, the RC delay of the first scan output lines SO1, SO2, and SO3 can be easily checked.

[0060] In another embodiment, the width, thickness, and material of at least one of the inspection lines IL1 and IL2 can be configured to be the same as the width, thickness, and material of the data line. Therefore, when at least one of the inspection lines IL1 and IL2 is used, the RC delay of the data line can be easily checked.

[0061] The second scan driver GIC2 can be mounted on the second circuit board FLM2. That is, the second scan driver GIC2 can be mounted outside the display panel DP. Therefore, since the scan driver does not need to be mounted (e.g., installed) on the display panel DP, the dead zone of the display panel DP can be reduced.

[0062] The second scan output lines SO4, SO5, and SO6 may include a first terminal connected to the second scan driver GIC2 and a second terminal connected to the corresponding scan line, and may extend to intersect the scan lines. In an embodiment, for example, the second scan output lines SO4, SO5, and SO6 may be connected to different scan lines respectively. Furthermore, scan lines SL1 to SL6, which are connected to the first scan output lines SO1, SO2, and SO3, may not be connected to the second scan output lines SO4, SO5, and SO6.

[0063] In one embodiment, for example, the second scan output line SO4 can be connected to scan lines SL7 and SL8, the second scan output line SO5 can be connected to scan lines SL9 and SL10, and the second scan output line SO6 can be connected to scan lines SL11 and SL12. In another embodiment, a second scan output line can be connected to only one scan line.

[0064] On the display panel DP, the second scan output lines SO4, SO5, and SO6 can extend along the second direction DR2 and can be positioned along the first direction DR1. The lengths of the second scan output lines SO4, SO5, and SO6 can be different. In an embodiment, for example, based on their positions along the first direction DR1, the lengths of the second scan output lines SO4, SO5, and SO6 can gradually increase. On the display panel DP, the second scan output lines SO4, SO5, and SO6 can be longer than the first scan output lines SO1, SO2, and SO3.

[0065] The third check line IL3 may include a third receive terminal IR3 connected to the second scan driver GIC2 and a third feedback terminal IF3 connected to the second scan driver GIC2. The third receive terminal IR3 and the third feedback terminal IF3 may be connected to different pins of the second scan driver GIC2. In an embodiment, for example, the different pins may be different electrical nodes. The third check line IL3 may extend from the third receive terminal IR3 to the third feedback terminal IF3 and may extend to intersect the scan lines. In an embodiment, for example, on a display panel DP, the third check line IL3 may be longer than the first check line IL1 and the second check line IL2.

[0066] The fourth check line IL4 may include a fourth receive terminal IR4 connected to the second scan driver GIC2 and a fourth feedback terminal IF4 connected to the second scan driver GIC2. The fourth receive terminal IR4 and the fourth feedback terminal IF4 may be connected to different pins of the second scan driver GIC2. In embodiments, for example, the different pins may be different electrical nodes. The fourth check line IL4 may extend from the fourth receive terminal IR4 to the fourth feedback terminal IF4 and may extend to intersect with the scan lines. In embodiments, for example, on a display panel DP, the fourth check line IL4 may be longer than the first check line IL1, the second check line IL2, and the third check line IL3.

[0067] In an embodiment, for example, a relatively short third check line IL3 can be arranged near a relatively short second scan output line SO4. Furthermore, a relatively long fourth check line IL4 can be arranged near a relatively long second scan output line SO6. Therefore, when using the third check line IL3, the RC delay of the second scan output line SO4 and its adjacent second scan output lines can be easily checked. Additionally, when using the fourth check line IL4, the RC delay of the second scan output line SO6 and its adjacent second scan output lines can be easily checked.

[0068] In an embodiment, for example, the width, thickness, and material of inspection lines IL3 and IL4 can be configured to be the same as those of the second scan output lines SO4, SO5, and SO6. The placement positions of inspection lines IL3 and IL4 can be similar to those of the second scan output lines SO4, SO5, and SO6. Therefore, when using inspection lines IL3 and IL4, the RC delay of the second scan output lines SO4, SO5, and SO6 can be easily inspected.

[0069] In another embodiment, the width, thickness, and material of at least one of the inspection lines IL3 and IL4 can be configured to be the same as the width, thickness, and material of the data line. Therefore, when at least one of the inspection lines IL3 and IL4 is used, the RC delay of the data line can be easily checked.

[0070] The first auxiliary circuit board DFPC1 can be a rigid printed circuit board or a flexible printed circuit board. The first auxiliary circuit board DFPC1 can be connected to the first circuit board FLM1 and the second circuit board FLM2. In an embodiment, for example, the pad electrodes of the first auxiliary circuit board DFPC1 can be connected to the pad electrodes of the first circuit board FLM1 and the second circuit board FLM2. In an embodiment, for example, components with a desired physically large area, such as resistors and capacitors, can be arranged on the first auxiliary circuit board DFPC1.

[0071] Scan drivers GIC1 and GIC2, as well as the data driver, can be connected to a timing controller (not shown) via a first auxiliary circuit board DFPC1. The timing controller can receive grayscale and control signals of image frames from an external processor and use these signals to control scan drivers GIC1 and GIC2, as well as the data driver.

[0072] The second auxiliary circuit board DFPC2 can be connected to the third circuit board FLM3 and the fourth circuit board FLM4. The third scan driver GIC3 can be arranged on the third circuit board FLM3, and the fourth scan driver GIC4 can be arranged on the fourth circuit board FLM4. The scan drivers GIC3 and GIC4, as well as the data driver, can be connected to the timing controller described above via the second auxiliary circuit board DFPC2.

[0073] The third scan driver GIC3 can be arranged outside the display panel DP. The third scan output lines SO7, SO8, and SO9 can include a first terminal connected to the third scan driver GIC3 and a second terminal connected to the corresponding scan line, and can extend to intersect the scan lines. In this case, scan lines SL1 to SL6, which are connected to the first scan output lines SO1, SO2, and SO3, can be connected to the third scan output lines SO7, SO8, and SO9. Therefore, pixels farther from the first scan output lines SO1, SO2, and SO3 on the first direction DR1 can also quickly receive scan signals from the third scan output lines SO7, SO8, and SO9. This reduces RC delay.

[0074] The third circuit board FLM3, the third scan driver GIC3, the third scan output lines SO7, SO8 and SO9, the fifth check line IL5 extending from the fifth receive terminal IR5 to the fifth feedback terminal IF5, and the sixth check line IL6 extending from the sixth receive terminal IR6 to the sixth feedback terminal IF6 can correspond to the first circuit board FLM1, the first scan driver GIC1, the first scan output lines SO1, SO2 and SO3, the first check line IL1 and the second check line IL2 described above, and therefore repeated descriptions will be omitted.

[0075] Additionally, the fourth circuit board FLM4, the fourth scan driver GIC4, the fourth scan output lines SO10, SO11 and SO12, the seventh check line IL7 extending from the seventh receive terminal IR7 to the seventh feedback terminal IF7, and the eighth check line IL8 extending from the eighth receive terminal IR8 to the eighth feedback terminal IF8 can correspond to the second circuit board FLM2, the second scan driver GIC2, the second scan output lines SO4, SO5 and SO6, the third check line IL3 and the fourth check line IL4 described above, and therefore repeated descriptions will be omitted.

[0076] However, the number of check lines IL1 to IL8 can be smaller than the number of scan output lines SO1 to SO12. It is difficult to form every check line exactly the same as every scan output line. Therefore, it may not be necessary for the check lines to correspond one-to-one with the scan output lines. The RC delay of each scan output line can be calculated (e.g., interpolated) by measuring the check results. Therefore, the cost of configuring check lines IL1 to IL8 can be reduced.

[0077] Figure 2 This is a diagram used to explain an embodiment of the display panel according to the present invention.

[0078] Figure 2 The diagram shows... Figure 1 A magnified view of the area near the first inspection line IL1 on the display panel DP.

[0079] On the display panel DP, data lines DL1 to DL22 can extend along the second direction DR2 and can also be positioned along the first direction DR1. Data lines DL1 to DL22 can include first data lines DL1, DL2, DL7, DL8, DL13, DL14, DL19, and DL20 connected to pixels PX12, PX21, PX32, PX41, PX17, PX28, PX37, PX48, PX114, PX213, PX314, PX413, PX119, PX220, PX319, and PX420 of the first color, and connected to pixels PX13, PX24, PX33, PX44, PX110, PX29, PX310, and PX420 of the second color. 9. The second data lines DL3, DL4, DL9, DL10, DL15, DL16, DL21 and DL22 of PX115, PX216, PX315, PX416, PX122, PX221, PX322 and PX421, and the third data lines DL5, DL6, DL11, DL12, DL17 and DL18 connected to the third color pixels PX15, PX26, PX35, PX46, PX112, PX211, PX312, PX411, PX117, PX218, PX317 and PX418.

[0080] Here, color can refer to the color of light emitted by each pixel. The first color, second color, and third color can be different from each other. In an embodiment, for example, the first color can be one of red, green, and blue; the second color can be one of red, green, and blue other than the first color; and the third color can be one of red, green, and blue other than the first and second colors. Alternatively, magenta, cyan, and yellow can be used instead of red, green, and blue as the first to third colors. However, in the illustrated embodiment, for ease of explanation, it is assumed that the first color is red, the second color is blue, and the third color is green.

[0081] In an embodiment, for example, pixels PX12, PX21, PX32, and PX41 of the first color can be alternately connected to the two closest first data lines DL1 and DL2. Similarly, pixels PX13, PX24, PX33, and PX44 of the second color can be alternately connected to the two closest second data lines DL3 and DL4. Furthermore, pixels PX15, PX26, PX35, and PX46 of the third color can be alternately connected to the two closest third data lines DL5 and DL6.

[0082] First scan output lines SO1 and SO2 may extend between the first data line DL14 and the second data line DL15 closest to the first data line DL14, and between the first data line DL20 and the second data line DL21 closest to the first data line DL20, respectively. In an embodiment, for example, the first scan output line SO1 may extend between the first data line DL14 and the second data line DL15. Furthermore, the first scan output line SO2 may extend between the first data line DL20 and the second data line DL21.

[0083] The first inspection line IL1 may include a first portion extending from the first receiving terminal IR1, a second portion extending from the first feedback terminal IF1, and a third portion connecting the first portion and the second portion.

[0084] The first part can extend between a first data line DL2 and a second data line DL3 that is closest to the first data line DL2.

[0085] The second part can extend between another first data line DL8 and another second data line DL9 that is closest to the other first data line DL8.

[0086] The third part may extend to intersect with at least one of the first data lines DL7 and DL8 from DL1, DL2, DL7, DL8, DL13, DL14, DL19, and DL20, and at least one of the second data lines DL3, DL4, DL9, DL10, DL15, DL16, DL21, and DL22, connecting the first part to the second part. Furthermore, the third part may extend to intersect with at least one of the third data lines DL5 and DL6 from DL1, DL2, DL7, DL8, DL13, DL14, DL19, and DL20.

[0087] In the illustrated embodiment, the first scan output lines SO1 and SO2 can extend between adjacent data lines of the red and blue pixels. Furthermore, a first portion and a second portion of the first check line IL1 can extend between adjacent data lines of the red and blue pixels. That is, since the configuration of the first check line IL1 becomes similar to that of the first scan output lines SO1 and SO2, the RC delay of the first scan output lines SO1 and SO2 can be easily checked when the first check line IL1 is used.

[0088] In the illustrated embodiment, the first inspection line IL1 and the first scan output lines SO1 and SO2 may not intersect each other in the area where pixels PX12 to PX421 are arranged.

[0089] Since the same or similar structures can be applied to other inspection lines IL2 to IL8 and other scan output lines SO3 to SO12, repeated descriptions will be omitted.

[0090] Figure 3 This is a diagram used to explain an embodiment of the pixels according to the present invention.

[0091] Reference Figure 3 Pixel PXij may include transistor M1, storage capacitor Cst, and liquid crystal capacitor Clc. Here, i and j can be natural numbers. In the following, it is assumed that pixel PXij is a pixel of a liquid crystal display panel, but in other embodiments, the pixel may be a pixel of an organic light-emitting display panel or an inorganic light-emitting display panel, etc.

[0092] In the illustrated embodiment, transistor M1 is shown as an n-type transistor. Therefore, the on-level of the scan signal can be high. However, the invention is not limited thereto, and those skilled in the art can use p-type transistors to configure pixel circuits with the same function.

[0093] Transistor M1 may include a gate electrode connected to scan line SLi, a first electrode connected to data line DLj, and a second electrode connected to a first electrode of storage capacitor Cst and a pixel electrode of liquid crystal capacitor Clc.

[0094] The storage capacitor Cst may include a first electrode connected to the second electrode of the transistor M1 and a second electrode connected to the sustaining voltage line SUL. In an embodiment, the storage capacitor Cst may be excluded when the liquid crystal capacitor Clc has sufficient capacitance.

[0095] The liquid crystal capacitor Clc may include pixel electrodes connected to the second electrode of transistor M1 and a common electrode to which a common voltage Vcom is applied. A liquid crystal layer may be disposed between the pixel electrodes and the common electrode of the liquid crystal capacitor Clc. The common electrode may be an electrode shared by multiple pixels or all pixels of the display panel DP. That is, the same common voltage can be applied to multiple pixels or all pixels through the common electrode.

[0096] When a scan signal at the conduction level is supplied to the gate electrode of transistor M1 through scan line SLi, transistor M1 can connect data line DLj to the first electrode of storage capacitor Cst. Therefore, a voltage corresponding to the difference between the data voltage applied through data line DLj and the sustaining voltage of sustaining voltage line SUL can be stored in storage capacitor Cst. The data voltage can be maintained at the pixel electrode of liquid crystal capacitor Clc by storage capacitor Cst. Therefore, an electric field corresponding to the difference between the data voltage and the common voltage can be applied to the liquid crystal layer, and the orientation of the liquid crystal molecules in the liquid crystal layer can be determined according to this electric field. Transmittance can correspond to the orientation of the liquid crystal molecules.

[0097] According to conventional technology, the display panel DP can further include a polarizer and a color filter, etc. The color of the pixel PXij can be determined by the color of the color filter. In addition, the display device DD can further include a backlight unit.

[0098] Figure 4 This is a diagram used to explain an embodiment of the first circuit board according to the present invention.

[0099] The first data driver DIC1 and the second data driver DIC2 can be arranged on the first circuit board FLM1. That is, the first data driver DIC1 and the second data driver DIC2 can be arranged outside the display panel DP.

[0100] Data lines DL1 to DL14 and DL15 to DL20 may include a first terminal connected to the first data driver DIC1 and a second terminal connected to the corresponding pixel, and may extend to intersect scan lines on the display panel DP. Data lines DL21 to DL25 and DL26 to DL39 may include a first terminal connected to the second data driver DIC2 and a second terminal connected to the corresponding pixel, and may extend to intersect scan lines on the display panel DP.

[0101] The first delay line ODL1 may include a first terminal connected to the first data driver DIC1 and a second terminal connected to the first scan driver GIC1. The second delay line ODL2 may include a first terminal connected to the second data driver DIC2 and a second terminal connected to the first scan driver GIC1.

[0102] In this embodiment, the first inspection line IL1 can be arranged in the first region AR1 of the display panel DP. The second inspection line IL2 can be arranged in the second region AR2 of the display panel DP. Furthermore, the first scan output lines SO1, SO2, and SO3 can be arranged in the third region AR3 of the display panel DP. In this case, the first region AR1, the second region AR2, and the third region AR3 do not overlap. In this case, the third region AR3 can be arranged between the first region AR1 and the second region AR2.

[0103] Additionally, the data lines connected to the pixels can be arranged in the fourth region AR4 of the display panel DP, and the fourth region AR4 can include the first region AR1, the second region AR2 and the third region AR3.

[0104] The fourth region AR4 corresponding to the first circuit board FLM1 may be adjacent to the fourth region corresponding to the second circuit board FLM2. The fourth region AR4 corresponding to the first circuit board FLM1 may not overlap with the fourth region corresponding to the second circuit board FLM2.

[0105] The third region AR3 corresponding to the first circuit board FLM1 can be arranged in the middle of the fourth region AR4. Additionally, the third regions corresponding to each of the other circuit boards FLM2, FLM3, and FLM4 can also be arranged in the middle of each of the fourth regions. Therefore, the contact points of the scan output lines relative to the scan lines can be uniformly arranged based on the first direction DR1.

[0106] In the illustrated embodiment, the space in the fourth region AR4 that is not occupied by the third region AR3 can be used as the first region AR1 and the second region AR2. Therefore, there is an advantage that inspection lines IL1 to IL8 can be set without increasing the dead zone.

[0107] Figure 5 This is a diagram used to explain an embodiment of the method for checking RC delay according to the present invention. Further reference will be made to... Figure 4 The structure is described.

[0108] The first scan driver GIC1 can output the first check signal IR1s to the first receiving terminal IR1, and receive the first feedback signal IF1s of the first check signal IR1s from the first feedback terminal IF1.

[0109] In an embodiment, the first scan driver GIC1 may generate a first delayed signal ODL1s based on a first check signal IR1s and a first feedback signal IF1s. The first delayed signal ODL1s may include information about a first delay time DLY1. In an embodiment, for example, the first delayed signal ODL1s may include at least one pulse having a width of the first delay time DLY1.

[0110] In an embodiment, for example, the first scan driver GIC1 can generate a first delayed signal ODL1s by the difference between time point t2 when the first feedback signal IF1s reaches the second reference voltage Vref2 and time point t1 when the first check signal IR1s reaches the first reference voltage Vref1. The difference between time point t2 and time point t1 can be the same as the first delay time DLY1.

[0111] The first reference voltage Vref1 and the second reference voltage Vref2 can be the same as or different from each other. Figure 5 In one embodiment, the first delay time DLY1 is measured based on the falling transitions of signals IR1s and IF1s. However, in another embodiment, rising transitions can be used. The logic circuitry used to derive the first delay time DLY1 can be implemented using conventional techniques.

[0112] The first data driver DIC1 can receive a first delay signal ODL1s through the first delay line ODL1. The first data driver DIC1 can determine the time points when the data voltage is applied to the data lines DL1 to DL14 and DL15 to DL20 based on the first delay signal ODL1s.

[0113] Since the same method for checking RC delay can be used on the second data driver DIC2 and the second delay line ODL2, its repeated description will be omitted.

[0114] Because the method for checking RC delay in the illustrated embodiments is performed via a check line independent of the scan lines and data lines, there is no limitation on the check time. In embodiments, for example, the method can be performed before the display panel DP is displayed, after the display device DD is powered on, or even while the display panel DP is being displayed. In embodiments, for example, the method for checking RC delay can be performed during a blank period when the grayscale of a pixel is not transmitted to the first data driver DIC1 and the second data driver DIC2, or during an active period when the grayscale of a pixel is transmitted to the first data driver DIC1 and the second data driver DIC2. The blank period can include a horizontal blank period in units of pixel rows and a vertical blank period in units of frames.

[0115] Figure 6 This is a diagram used to explain another embodiment of the first circuit board according to the present invention.

[0116] and Figure 4 Compared to the first circuit board FLM1, Figure 6 The first circuit board FLM1 may further include a first additional inspection line IL1' and a second additional inspection line IL2'.

[0117] The first additional check line IL1' may include a first additional receive terminal IR1' connected to the first scan driver GIC1 and a first additional feedback terminal IF1' connected to the first scan driver GIC1. The first additional receive terminal IR1' and the first additional feedback terminal IF1' may be connected to different pins of the first scan driver GIC1. In embodiments, the different pins may be different electrical nodes. For example, the first additional check line IL1' may extend from the first additional receive terminal IR1' to the first additional feedback terminal IF1', and may extend to intersect the scan line.

[0118] The second additional check line IL2' may include a second additional receive terminal IR2' connected to the first scan driver GIC1 and a second additional feedback terminal IF2' connected to the first scan driver GIC1. The second additional receive terminal IR2' and the second additional feedback terminal IF2' may be connected to different pins of the first scan driver GIC1. In an embodiment, the different pins may be different electrical nodes. For example, the second additional check line IL2' may extend from the second additional receive terminal IR2' to the second additional feedback terminal IF2', and may extend to intersect the scan line.

[0119] In the illustrated embodiment, the first region AR1 may include two or more inspection lines IL1 and IL1'.

[0120] In an embodiment, for example, the first additional check line IL1' may have a length different from that of the first check line IL1. Therefore, the RC delay of the first scan output line with a different length can be easily checked.

[0121] In an embodiment, for example, the first additional check line IL1' can be used to check the RC delay of the data line, and the first check line IL1 can be used to check the RC delay of the first scan output line. In an embodiment, for example, the width, thickness, and material of the first additional check line IL1' can be configured to be the same as the width, thickness, and material of the data line, and the width, thickness, and material of the first check line IL1 can be configured to be the same as the width, thickness, and material of the first scan output line.

[0122] Furthermore, the second region AR2 may include two or more inspection lines IL2 and IL2'. Since the descriptions of inspection lines IL2 and IL2' can be the same as those of inspection lines IL1 and IL1', the duplicate descriptions will be omitted.

[0123] Figure 7 This is a diagram used to explain yet another embodiment of the first circuit board according to the present invention.

[0124] and Figure 4 Unlike the first circuit board FLM1, in Figure 7 In the first circuit board FLM1, the first check line IL1” can be connected to the first data driver DIC1, and the second check line IL2” can be connected to the second data driver DIC2.

[0125] The first inspection line IL1” may include a first receive terminal IR1” connected to the first data driver DIC1 and a first feedback terminal IF1 connected to the first data driver DIC1”, which can extend from the first receive terminal IR1” to the first feedback terminal IF1”, and can extend to intersect with the scan line.

[0126] The second check line IL2” may include a second receive terminal IR2” connected to the second data driver DIC2 and a second feedback terminal IF2” connected to the second data driver DIC2, and may extend from the second receive terminal IR2” to the second feedback terminal IF2”, and may extend to intersect the scan line. In an embodiment, for example, the second check line IL2” may be longer than the first check line IL1”.

[0127] Furthermore, with Figure 4 The first circuit board FLM1 is different. Figure 7 The first circuit board FLM1 may not include delay lines ODL1 and ODL2.

[0128] In an embodiment, for example, the first data driver DIC1 can output a first check signal to the first receiving terminal IR1”, receive a first feedback signal from the first feedback terminal IF1”, and determine the time point at which the data voltage is applied to a portion of the data lines DL1 to DL14 and DL15 to DL20 based on the first check signal and the first feedback signal.

[0129] In an embodiment, for example, the second data driver DIC2 can output a second check signal to the second receiving terminal IR2”, receive a second feedback signal from the second feedback terminal IF2”, and determine the time point at which the data voltage is applied to another portion of the data lines DL21 to DL25 and DL26 to DL39 based on the second check signal and the second feedback signal.

[0130] In the illustrated embodiment, since delay lines ODL1 and ODL2 are not included, there is an advantage in reducing configuration costs.

[0131] The display device according to the present invention can compensate for the change of RC delay over time, and the line used to check the RC delay can not constitute a dead zone.

[0132] The accompanying drawings and the detailed description of the invention described above are merely illustrative. It should be understood that this disclosure is for illustrative purposes only and is not intended to limit the meaning or scope of the invention as set forth in the claims. Therefore, those skilled in the art will understand that various modifications and equivalent embodiments are possible without departing from the scope of the invention. Thus, the true scope of the invention should be determined by the technical concept of the appended claims.

Claims

1. A display device, comprising: A display panel includes scan lines and pixels connected to the scan lines; The first scan driver is disposed outside the display panel; The first scan output line includes a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan line, and crosses the scan line; as well as A first inspection line includes a first receiving terminal connected to the first scan driver and a first feedback terminal connected to the first scan driver, extends from the first receiving terminal to the first feedback terminal, and intersects the scan line. At least a portion of the first inspection line extends between the pixels.

2. A display device, comprising: A display panel includes scan lines and pixels connected to the scan lines; The first scan driver is disposed outside the display panel; The first scan output line includes a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan line, and crosses the scan line; The first inspection line includes a first receiving terminal connected to the first scan driver and a first feedback terminal connected to the first scan driver, extends from the first receiving terminal to the first feedback terminal, and intersects the scan line; as well as The second inspection line includes a second receiving terminal connected to the first scan driver and a second feedback terminal connected to the first scan driver, extends from the second receiving terminal to the second feedback terminal, and intersects the scan line. The second inspection line is longer than the first inspection line.

3. The display device according to claim 2, further comprising: The second scan driver is arranged outside the display panel; as well as The second scan output line includes a first terminal connected to the second scan driver and a second terminal connected to a corresponding scan line in the scan lines, and intersects the scan lines. Wherein, the scan line connected to the first scan output line is not connected to the second scan output line, and The second scan output line is longer than the first scan output line.

4. The display device according to claim 3, further comprising: A third check line includes a third receive terminal connected to the second scan driver and a third feedback terminal connected to the second scan driver, extends from the third receive terminal to the third feedback terminal, and intersects the scan line, wherein the third check line is longer than the first check line and the second check line. The fourth check line includes a fourth receive terminal connected to the second scan driver and a fourth feedback terminal connected to the second scan driver, extends from the fourth receive terminal to the fourth feedback terminal, and intersects the scan line, wherein the fourth check line is longer than the first check line, the second check line, and the third check line.

5. The display device according to any one of claims 1 to 4, further comprising: The first data driver is arranged outside the display panel; The data line includes a first terminal connected to the first data driver and a second terminal connected to the corresponding pixel in the pixel, and crosses the scan line; as well as The delay line includes a first terminal connected to the first data driver and a second terminal connected to the first scan driver.

6. The display device of claim 5, wherein, The data lines include a first data line connected to pixels of a first color, a second data line connected to pixels of a second color, and a third data line connected to pixels of a third color. Wherein, the first color, the second color, and the third color are different from each other, and The first scan output line extends between the first data line and the second data line that is closest to the first data line.

7. The display device of claim 6, wherein, The first inspection line further includes: The first part extends between a first data line and a second data line that is closest to the first data line; The second part extends between another first data line and another second data line closest to said other first data line; and The third part intersects at least one of the first data lines and at least one of the second data lines, and connects the first part and the second part.

8. The display device according to claim 2, wherein The first inspection line is arranged in the first area of ​​the display panel. The second inspection line is arranged in the second area of ​​the display panel. The first scan output line is arranged in the third area of ​​the display panel. The first region, the second region, and the third region do not overlap with each other. The third region is located between the first region and the second region. The data lines connected to the pixels are arranged in the fourth area of ​​the display panel, and The fourth region includes the first region, the second region, and the third region.

9. A display device, comprising: A display panel includes scan lines, data lines, and pixels connected to the scan lines and the data lines; The first scan driver is disposed outside the display panel; A first data driver is disposed outside the display panel and connected to a portion of the data cable; The first scan output line includes a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan line, and crosses the scan line; as well as The first inspection line includes a first receive terminal connected to the first data driver and a first feedback terminal connected to the first data driver, extends from the first receive terminal to the first feedback terminal, and intersects the scan line. At least a portion of the first inspection line extends between the pixels.

10. A display device, comprising: A display panel includes scan lines, data lines, and pixels connected to the scan lines and the data lines; The first scan driver is disposed outside the display panel; A first data driver is disposed outside the display panel and connected to a portion of the data cable; The first scan output line includes a first terminal connected to the first scan driver and a second terminal connected to a corresponding scan line in the scan line, and crosses the scan line; The first inspection line includes a first receiving terminal connected to the first data driver and a first feedback terminal connected to the first data driver, extends from the first receiving terminal to the first feedback terminal, and intersects the scan line; The second data driver is disposed outside the display panel and connected to another part of the data cable; as well as The second inspection line includes a second receive terminal connected to the second data driver and a second feedback terminal connected to the second data driver, extends from the second receive terminal to the second feedback terminal, and intersects the scan line. Wherein, the second check line is longer than the first check line, wherein the first data driver outputs a first check signal to the first receiving terminal, receives a first feedback signal from the first feedback terminal of the first check signal, and determines, based on the first check signal and the first feedback signal, the time points at which data voltage is applied to some of the data lines in the portion of the data lines, and The second data driver outputs a second check signal to the second receiving terminal, receives a second feedback signal from the second feedback terminal of the second check signal, and determines the time point at which the data voltage is applied to some data lines in the other part of the data lines based on the second check signal and the second feedback signal.

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