A method for implementing dual-core communication based on ZYNQ7010
By using shared OCM resources and designing ring cache area and access control queue on the ZYNQ7010 board, high-speed data exchange between dual cores is achieved, solving the problem that two CPUs on the ZYNQ7010 board cannot communicate directly.
Patent Information
- Application Number
- CN202111496517.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-08
- Publication Date
- 2025-02-14
- Estimated Expiration
- 2041-12-08
AI Technical Summary
The two CPUs on the ZYNQ7010 board cannot directly perform high-speed data exchange because there is no communication mechanism between the dual cores.
By using the OCM resources shared by the two CPUs of the ZYNQ7010 board as the shared memory for dual-core communication, a ring cache area and access control queue are designed to realize data communication between dual-cores.
It realizes high-speed data exchange between dual cores, solving the problem that two CPUs on the ZYNQ7010 board cannot communicate directly.
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Figure CN114297129B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of communication technology, and in particular relates to a message-oriented dual-core communication implementation method based on ZYNQ7010. Background Art
[0002] With the development of science and technology and the progress of society, the status of embedded technology in the field of electronic products and communications is increasing. Embedded products are widely used in important fields such as communications, medical treatment, entertainment, and military affairs, and the performance requirements for embedded systems are getting higher and higher. Embedded systems are also developing in the direction of high efficiency, stability, reliability, and energy saving. ZYNQ7010 is a high-performance, low-power embedded dual-core processor launched by Xilinx, which has been widely used in automobiles, communication systems, control and instruments, image and video processing, industrial control and many other fields.
[0003] ZYNQ7010 is a fully programmable chip. It is a new architecture processor with ARM as the core and FPGA as the programmable peripheral. ZYNQ7010 includes two Cortex-A9 processors that can run executable programs independently at the same time. It is an asymmetric multi-core chip. The two processors can run different operating systems independently and perform different tasks. During operation, a large amount of data needs to be exchanged. ZYNQ7010 does not provide a set of realized dual-core communication mechanisms. In order to realize high-speed data exchange between two independent processors running different operating systems, developers need to design a dual-core communication mechanism based on the hardware structure of ZYNQ7010. Summary of the invention
[0004] The purpose of the present invention is to provide a message-oriented dual-core communication implementation method based on ZYNQ7010 to achieve high-speed data exchange between two independent processors running different operating systems.
[0005] The technical solution adopted by the present invention to achieve its purpose is:
[0006] A message-oriented dual-core communication implementation method based on ZYNQ7010, using the OCM resources shared by two CPUs of the ZYNQ7010 board as the shared memory of the dual-core communication, specifying a storage space in the OCM as a ring buffer area for the dual-core communication to store the messages to be transmitted, adding an access control queue of fixed length, each item of the queue contains two data items, namely the starting address and the length of the message, respectively saving the address and length of the message stored in the ring buffer area, the first item of the access control queue contains the starting address and the length of the message to be read, the last item contains the starting address of the message to be written, adding two pointers, the head and the tail of the access control queue, for pointing to the first item and the tail item of the access control queue, the method includes a write operation and a read operation,
[0007] The process of the write operation is as follows:
[0008] Step 1: Read the head pointer and tail pointer of the access control queue to determine whether the control message queue is full. If it is full, end the write operation. If it is not full, go to step 2.
[0009] Step 2: Read the first and last items of the access control queue according to the head pointer and tail pointer of the access control queue. The access control queue data item consists of a 4-byte message position pointer and a 4-byte message length. Determine whether the circular data buffer has enough space to write the data. If the space is insufficient, end the write operation. If the space is sufficient, proceed to step 3.
[0010] Step 3: Write the sent data to the location of the circular data buffer area specified by the message location pointer of the tail item of the access control queue;
[0011] Step 4: The message length item of the tail item of the access control queue is set to the data length written this time, and the message position pointer of the tail item plus the message length is assigned to the message position pointer of the item next to the tail pointer;
[0012] Step 5: The access control queue tail pointer points to the next item in the access control queue;
[0013] The flow of the read operation is as follows:
[0014] Step 6: Read the head pointer and tail pointer of the access control queue to determine whether the access control queue is empty. If it is empty, end the read operation. If it is not empty, proceed to step 7.
[0015] Step 7: Read the first item of the access control queue according to the access control queue head pointer;
[0016] Step 8: Read data with a length equal to the message length of the first item from the circular data buffer location specified by the message location pointer of the first item of the access control queue.
[0017] Step 9: The access control queue head points to the next item in the access control queue.
[0018] Furthermore, the criteria for determining whether the access control queue is full in step 1 are as follows:
[0019] The head pointer and tail pointer of the access control queue are initialized to 0, indicating that they point to the first item of the access control queue. The tail pointer increases by 1 for each data message written, and the head pointer increases by 1 for each message read. When the pointer value is equal to the length of the access control queue, the pointer value is set to 0. When the tail pointer plus 1 is equal to the head pointer, or when the tail pointer plus 1 is equal to the length of the access control queue and the head pointer is 0, the access control queue is determined to be full.
[0020] Furthermore, the specific process of writing and sending data in step 3 is as follows:
[0021] Determine whether the space from the write position to the end of the circular buffer is greater than the amount of data to be written this time. If so, write the sent data into the circular buffer. Otherwise, first copy part of the data to the space from the write position to the end of the circular buffer, and then copy the remaining data to be sent from the beginning of the circular buffer.
[0022] Furthermore, the criteria for determining whether the access control queue is empty in step 6 are as follows:
[0023] The value of the access control queue head pointer is equal to the value of the tail pointer, and the access control queue is determined to be empty.
[0024] Furthermore, the specific reading process in step 8 is as follows:
[0025] Determine whether the space from the read position to the end of the buffer area is greater than the length of the message to be read. If so, read the message of the specified length. Otherwise, first copy the message data from the read position to the end of the circular buffer area to the read buffer area, and then copy the remaining message from the beginning of the circular buffer area to the read buffer area.
[0026] Compared with the prior art, the present invention has the following beneficial effects:
[0027] The message-oriented dual-core communication implementation method proposed in the present invention utilizes the OCM resources shared by the two CPUs of the ZYNQ7010 board as the shared memory for dual-core communication, and simultaneously utilizes the designed circular cache, access control queue, and access control queue head and tail pointers to realize data communication between the dual cores, thereby solving the problem that the two CPUs of the ZYNQ7010 board cannot communicate directly. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is the main flow chart of the message-oriented dual-core communication implementation method based on ZYNQ7010 of the present invention.
[0029] Figure 2 This is the address mapping diagram of the ZYNQ7010 development board in the implementation of the present invention.
[0030] Figure 3 Design diagram for the use of OCM shared space. DETAILED DESCRIPTION
[0031] Combination Figure 1, a method for implementing dual-core communication based on ZYNQ7010 for message-oriented communication, using the OCM resources shared by two CPUs of the ZYNQ7010 board as the shared memory of the dual-core communication, specifying a storage space in the OCM as the circular buffer area of the dual-core communication, storing the messages to be transmitted, adding a fixed-length access control queue, each item of the queue contains two data items, the starting address and the length of the message, respectively saving the address and length of the message stored in the circular buffer area, the first item of the access control queue contains the starting address and the length of the message to be read, the tail item contains the starting address of the message to be written, adding two pointers, the head and the tail of the access control queue, for pointing to the first item and the tail item of the access control queue, the method includes a write operation and a read operation,
[0032] The process of the write operation is as follows:
[0033] Step 1: Read the head pointer and tail pointer of the access control queue to determine whether the control message queue is full. If it is full, end the write operation. If it is not full, go to step 2.
[0034] Step 2: Read the first and last items of the access control queue according to the head pointer and tail pointer of the access control queue. The access control queue data item consists of a 4-byte message position pointer and a 4-byte message length. Determine whether the circular data buffer has enough space to write the data. If the space is insufficient, end the write operation. If the space is sufficient, proceed to step 3.
[0035] Step 3: Write the sent data to the location of the circular data buffer area specified by the message location pointer of the tail item of the access control queue;
[0036] Step 4: The message length item of the tail item of the access control queue is set to the data length written this time, and the message position pointer of the tail item plus the message length is assigned to the message position pointer of the item next to the tail pointer;
[0037] Step 5: The access control queue tail pointer points to the next item in the access control queue;
[0038] The flow of the read operation is as follows:
[0039] Step 6: Read the head pointer and tail pointer of the access control queue to determine whether the access control queue is empty. If it is empty, end the read operation. If it is not empty, proceed to step 7.
[0040] Step 7: Read the first item of the access control queue according to the access control queue head pointer;
[0041] Step 8: Read data with a length equal to the message length of the first item from the circular data buffer location specified by the message location pointer of the first item of the access control queue.
[0042] Step 9: The access control queue head points to the next item in the access control queue.
[0043] Furthermore, the criteria for determining whether the access control queue is full in step 1 are as follows:
[0044] The head pointer and tail pointer of the access control queue are initialized to 0, indicating that they point to the first item of the access control queue. The tail pointer increases by 1 for each data message written, and the head pointer increases by 1 for each message read. When the pointer value is equal to the length of the access control queue, the pointer value is set to 0. When the tail pointer plus 1 is equal to the head pointer, or when the tail pointer plus 1 is equal to the length of the access control queue and the head pointer is 0, the access control queue is determined to be full.
[0045] Furthermore, the specific process of writing and sending data in step 3 is as follows:
[0046] Determine whether the space from the write position to the end of the circular buffer is greater than the amount of data to be written this time. If so, write the sent data into the circular buffer. Otherwise, first copy part of the data to the space from the write position to the end of the circular buffer, and then copy the remaining data to be sent from the beginning of the circular buffer.
[0047] Furthermore, the criteria for determining whether the access control queue is empty in step 6 are as follows:
[0048] The value of the access control queue head pointer is equal to the value of the tail pointer, and the access control queue is determined to be empty.
[0049] Furthermore, the specific reading process in step 8 is as follows:
[0050] Determine whether the space from the read position to the end of the buffer area is greater than the length of the message to be read. If so, read the message of the specified length. Otherwise, first copy the message data from the read position to the end of the circular buffer area to the read buffer area, and then copy the remaining message from the beginning of the circular buffer area to the read buffer area.
[0051] Example
[0052] Shared memory planning
[0053] Each product in the Zynq-7000 embedded processing platform series uses a dual-core ARMCortex-A9MPCore processing system with NEON and double-precision floating-point engines. The dual-core processing system shares 256KB of OCM (On Chip Memory) resources. Obviously, communication between the two cores can be achieved through this shared OCM resource. Without making other settings, the address space of ZYNQ after power-on is as follows Figure 2As shown. The shared memory OCM is 256KB in total and is divided into 4 blocks of 64KB. The first three blocks are RAM0, which occupies 192KB and is located at the beginning of the address space and shares the address space with DDR. The last block of 64KB is located at the end of the address space. ZYNQ's DDR is fixed to occupy the first 1GB bytes of the address space, so the maximum capacity of ZYNQ's DDR is only 1GB. In order to avoid OCM from Figure 2 It can be seen that the actual DDR used is only 1023MB (the first 1MB is reserved to avoid the first three blocks of OCM).
[0054] The shared memory is set at the high address of the OCM area 0xFFFF0000-0xFFFFFFFF, and the memory at this address is set to disable the cache, so that the CPU can read the changed data in the memory at this address in time. From 0xFFFF0000, there is a total of 64KB of shared storage space, and the space usage design is shown in Figure 3.
[0055] The data transmission communication between the dual-core ARM0 and ARM1 mainly includes data transmission from ARM1 to ARM0 and data transmission from ARM0 to ARM1. The two transmission processes are exactly the same. Here we take the data transmission from ARM1 to ARM0 as an example to introduce the specific implementation process.
[0056] The data transmission from ARM1 to ARM0 mainly includes a circular data buffer for storing the data to be transmitted, an access control queue for controlling the position and length of read and write data, and an access control queue head pointer and tail pointer. The address space of 0-1024*29KB is used as a circular buffer for data transmission from ARM1 to ARM0, and the buffer space is initialized to 29KB; the address space of 1024*29-1024*31 is used for the access control queue, and each item of the queue includes two data items: message position and message length. Both the message position and message length are unsigned integers, each occupying 4 bytes, and the maximum length of the queue is 256; the 1024*31 address stores a 4-byte unsigned integer queue head pointer, and the 1024*31+4 address stores a 4-byte unsigned integer queue head pointer.
[0057] Open the memory as a file, map the OCM at the starting address 0XFFFF0000 and the address space of size OX1000 in the memory to the process address space through the memory mapping function mmap, and assign the mapped address to the void*ocm variable.
[0058] ARM1 to ARM0 data transfer implementation
[0059] a) Member variable definition
[0060] The data transmission between ARM1 and ARM0 is mainly completed by two encapsulation objects, queue and ring buffer. The queue mainly stores the first address and length of the sent message data. The data structure design code of the queue element is as follows:
[0061] typedef structITEM_T {
[0062] unsignedintaddr; / / buffer data address
[0063] unsignedintlen; / / buffer data length
[0064] }ITEM;
[0065] The member variable declaration code of the queue is as follows:
[0066] unsignedintm_uQueSize; / / maximum queue space
[0067] unsignedchar* m_head; / / queue head pointer variable
[0068] unsignedchar*m_tail; / / queue tail pointer variable
[0069] ITEM*m_base; / / The first address of the queue space
[0070] unsignedcharm_elem_size; / / Size of queue element
[0071] The circular buffer is mainly used to store the message data to be transmitted. The member variable declaration code of the circular buffer is as follows:
[0072] unsignedchar*buffer; / / buffer first address
[0073] unsignedintsize; / / size
[0074] b) Transmission process implementation
[0075] The data transmission between ARM1 and ARM0 is mainly realized by initialization, sending and receiving.
[0076] Initialization mainly involves assigning the previously planned shared memory mapping address, relative address, size, etc. in the process space to the member variables of the queue and circular buffer objects. The queue initialization implementation code is as follows:
[0077] m_uQueSize = 256-1;
[0078] m_head = ocm + 1024 * 31;
[0079] m_tail=ocm+1024*31+4;
[0080] m_base=(ITEM*)ocm+1024*29;
[0081] m_elem_size = sizeof(ITEM);
[0082] *m_head=0;
[0083] *m_tail=0;
[0084] The implementation code for initializing the ring buffer is as follows:
[0085] buffer = ocm;
[0086] size=1024*29;
[0087] When sending data, the read and write positions of the circular buffer are first obtained through the access control queue, and then the remaining space is determined based on the read and write positions to see if it is greater than the amount of data to be written this time. If it is less than that, the write operation ends. Otherwise, it is further determined whether the space from the write position to the end of the buffer is greater than the amount of data to be written this time. If it is greater, the sent data is written to the circular buffer. Otherwise, part of the data is first copied to the space from the write position to the end of the circular buffer, and then the remaining data to be sent is copied from the beginning of the circular buffer. Finally, the tail data item and the tail pointer of the control queue are modified. Part of the code is implemented as follows:
[0088] / / / / @brief Send datagram
[0089] / / / / @parambuffer Send data buffer address size Send data size in ring buffer write
[0090] Address / / / / @param out ring buffer read address
[0091] / / / / @returnIf -1 indicates that the sending failed, otherwise it indicates the actual data size sent
[0092] intRing_Buffer::put_message(unsignedchar*buffer,unsignedintsize,unsignedintin,uns ignedintout)
[0093] {
[0094] assert(buffer);
[0095] if(size>6000)
[0096] return -1;
[0097] if(size>m_ring_buf.size-(in-out))
[0098] return -1;
[0099] unsignedintlen = 0;
[0100] / *firstputthedatastartingfromfifo->intobufferend* /
[0101] len=min(size,m_ring_buf.size-(in&(m_ring_buf.size-1)));
[0102] memcpy(m_ring_buf.buffer+(in&(m_ring_buf.size-1)),buffer,len);
[0103] / *thenputtherest(ifany)atthebeginningofthebuffer* /
[0104] if(size>len)
[0105] memcpy(m_ring_buf.buffer,buffer+len,size-len);
[0106] returnsize;
[0107] }
[0108] To read data, first get the queue head and queue tail pointers. If the two pointers are equal, it means that there is no data to be read in the buffer area, and the data reading fails. Otherwise, get the address and message length of the message data to be read in the buffer area through the queue head pointer, and judge whether the space from the read position to the end of the buffer area is greater than the message length to be read. If it is greater, read the message of the specified length. Otherwise, first copy the message data from the read position to the end of the circular buffer area to the read buffer area, and then copy the remaining messages from the beginning of the circular buffer area to the read buffer area, and finally modify the read pointer to point to the next element of the queue. Some code implementations are as follows:
[0109] / / / / @briefRead message data
[0110] / / / / @parambuffer read data buffer address size message length out read message location
[0111] / / / / @returnIf -1 indicates reading failed, otherwise it indicates the actual data size read
[0112] intRing_Buffer::get_message(unsignedchar*buffer,unsignedintsize,unsignedintout)
[0113] {
[0114] if(size>6000)
[0115] return -1;
[0116] assert(buffer);
[0117] unsignedintlen = 0;
[0118] / *Compare the data length from the message start address to the end of the buffer and the size to be read, and take the minimum value* /
[0119] len=min(size,m_ring_buf.size-(out&(m_ring_buf.size-1)));
[0120] memcpy(buffer,m_ring_buf.buffer+(out&(m_ring_buf.size-1)),len);
[0121] if(size>len)
[0122] {
[0123] / *Continue reading the rest of the message content from the buffer* /
[0124] memcpy(buffer+len,m_ring_buf.buffer,size-len);
[0125] }
[0126] returnsize;
[0127] }
[0128] It can be seen from this that the message-oriented dual-core communication implementation method based on ZYNQ7010 of the present invention enables two processors to achieve dual-core communication without relying on the operating system, thus solving the dual-core communication problem of ZYNQ7010.
[0129] The present invention combines the specific needs of inter-core communication and an effective dual-core communication method based on shared memory, utilizes two CPUs to communicate and share OCM resources, and enables two processors to achieve dual-core communication without relying on an operating system.
[0130] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A method for implementing dual-core communication for messages based on ZYNQ7010, characterized in that: The OCM resources shared by the two CPUs of the ZYNQ7010 board are used as the shared memory of the dual-core communication, a storage space is designated in the OCM as the circular buffer area of the dual-core communication, and the message to be transmitted is stored, and an access control queue of fixed length is added. Each item of the queue contains two data items, namely the starting address and the length of the message, which respectively store the address and length of the message stored in the circular buffer area. The first item of the access control queue contains the first address and the length of the message to be read, and the last item contains the first address of the message to be written. Two pointers, the head and the tail of the access control queue, are added to point to the first item and the tail item of the access control queue. The method includes a write operation and a read operation. The process of the write operation is as follows: Step 1: Read the head pointer and tail pointer of the access control queue to determine whether the control message queue is full. If it is full, end the write operation. If it is not full, go to step 2. Step 2: Read the first and last items of the access control queue according to the head pointer and tail pointer of the access control queue. The access control queue data item consists of a 4-byte message position pointer and a 4-byte message length. Determine whether the circular data buffer has enough space to write the data. If the space is insufficient, end the write operation. If the space is sufficient, proceed to step 3. Step 3: Write the sent data to the location of the circular data buffer area specified by the message location pointer of the tail item of the access control queue; Step 4: The message length item of the tail item of the access control queue is set to the data length written this time, and the message position pointer of the tail item plus the message length is assigned to the message position pointer of the item next to the tail pointer; Step 5: The access control queue tail pointer points to the next item in the access control queue; The flow of the read operation is as follows: Step 6: Read the head pointer and tail pointer of the access control queue to determine whether the access control queue is empty. If it is empty, end the read operation. If it is not empty, proceed to step 7. Step 7: Read the first item of the access control queue according to the access control queue head pointer; Step 8: Read data with a length equal to the message length of the first item from the circular data buffer location specified by the message location pointer of the first item of the access control queue. Step 9: The access control queue head points to the next item in the access control queue.
2. The method for implementing message-oriented dual-core communication based on ZYNQ7010 according to claim 1 is characterized in that: The criteria for determining whether the access control queue is full in step 1 are as follows: The head pointer and tail pointer of the access control queue are initialized to 0, indicating that they point to the first item of the access control queue; the tail pointer increases by 1 each time a data message is written, and the head pointer increases by 1 each time a message is read. When the value of the pointer is equal to the length of the access control queue, the value of the pointer is set to 0; when the tail pointer plus 1 is equal to the head pointer, or when the tail pointer plus 1 is equal to the length of the access control queue and the head pointer is 0, the access control queue is determined to be full.
3. The method for implementing message-oriented dual-core communication based on ZYNQ7010 according to claim 1, characterized in that: The specific process of writing and sending data in step 3 is as follows: Determine whether the space from the write position to the end of the circular buffer is greater than the amount of data to be written this time. If so, write the sent data into the circular buffer. Otherwise, first copy part of the data to the space from the write position to the end of the circular buffer, and then copy the remaining data to be sent from the beginning of the circular buffer.
4. The method for implementing message-oriented dual-core communication based on ZYNQ7010 according to claim 1 is characterized in that: The criteria for judging whether the access control queue is empty in step 6 are as follows: The value of the access control queue head pointer is equal to the value of the tail pointer, and the access control queue is determined to be empty.
5. The method for implementing message-oriented dual-core communication based on ZYNQ7010 according to claim 1, characterized in that: The specific reading process in step 8 is as follows: Determine whether the space from the read position to the end of the buffer area is greater than the length of the message to be read. If so, read the message of the specified length. Otherwise, first copy the message data from the read position to the end of the circular buffer area to the read buffer area, and then copy the remaining message from the beginning of the circular buffer area to the read buffer area.
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