Master-slave device authentication method and authentication device based on single bus

Abstract

The present invention provides a master-slave device authentication method and authentication device based on a single bus. The method includes a master device sending an authentication request signal to a slave device, and the master device and the slave device communicating via the single bus; and after the slave device disconnects the power module, the data acquisition module, and the driver module, only the second authentication module of the slave device communicates with the first authentication module of the master device; the first authentication module sends a first current signal to the second authentication module, and the second authentication module calculates a first value of the first current signal; the first authentication module sends a second current signal to the second authentication module, and the second authentication module calculates a second value of the second current signal; the second authentication module sends the first value and the second value to the first authentication module, and the first authentication module calculates whether the first value and the second value satisfy a preset relationship. If so, confirming that the slave device has passed authentication. The present invention can reduce the complexity of master-slave device authentication and improve authentication efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of hardware authentication of master and slave devices, in particular to a master and slave device authentication method based on a single bus, and also to an authentication device for implementing the method. Background Art

[0002] Electronic imaging equipment, as common office equipment, provides great convenience for modern office. Common electronic imaging equipment includes printers, copiers, etc. Existing printers are divided into inkjet printers and laser printers. Inkjet printers use ink cartridges containing ink as ink cartridges to spray ink onto paper to form the text or pattern to be printed on the paper; laser printers use toner cartridges containing toner as ink cartridges to form the text or pattern to be printed on the medium.

[0003] Conventional inkjet printers have a housing housing the inkjet printer's movement and a slide bar. A print carriage, driven by a motor, reciprocates along the slide bar. Multiple ink cartridges are removably mounted on the carriage, each containing different colors of ink. Each ink cartridge has a housing that encloses an ink cavity. An ink outlet is located at the lower end of the cavity, through which the ink in the cavity flows and supplies the ink supply needle of the print carriage.

[0004] A chip is mounted on the outer wall of the ink cartridge body. The chip has a substrate with multiple connection terminals on one side for electrical connection to the contact pins on the print carriage. A memory is located on the other side of the substrate, storing information related to the ink cartridge, such as the remaining ink level, print duration, and number of pages printed. After the ink cartridge is installed in the inkjet printer's print carriage, the printer powers on the chip and reads the data stored in the chip's memory to determine whether the cartridge model is appropriate and whether there is sufficient ink remaining.

[0005] Typically, inkjet printers require communication with ink cartridge chips. For example, both the inkjet printer and the ink cartridge chip are equipped with a single-wire bus interface, and the inkjet printer and the ink cartridge chip communicate via the single-wire bus. Because the single-wire bus uses a very small number of pins, it can reduce the production cost of the inkjet printer and the chip.

[0006] For example, an inkjet printer acts as a master device and an ink cartridge chip acts as a slave device. When the inkjet printer communicates with the chip, the inkjet printer outputs a signal to the single bus. After the chip, acting as a slave device, receives the signal transmitted by the single bus, it separates the power supply and data signal from the signal, uses the power supply as the power supply for each module of the chip, and receives the corresponding data signal from each module of the slave device, and returns the response data to the single bus. After receiving the returned data, the inkjet printer can obtain information such as the working status of the chip.

[0007] To ensure the authenticity of ink cartridges, inkjet printers need to authenticate the chip. However, existing authentication methods are mostly software-based and do not address hardware authentication under single-bus communication, resulting in high authentication costs. Summary of the Invention

[0008] The first object of the present invention is to provide a master-slave device authentication method based on a single bus with low authentication cost.

[0009] A second object of the present invention is to provide an authentication device for implementing the above-mentioned master-slave device authentication method based on a single bus.

[0010] To achieve the first objective of the present invention, the present invention provides a master-slave device authentication method based on a single bus, comprising: a master device sending an authentication request signal to a slave device, the master device and the slave device communicating via the single bus; and, after the slave device disconnects from a power supply module, a data acquisition module, and a driver module, only a second authentication module of the slave device communicates with a first authentication module of the master device; the first authentication module sends a first current signal to a second authentication module, and the second authentication module calculates a first value of the first current signal; after the second authentication module calculates the first value, the slave device disconnects from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet a preset requirement, the slave device is determined to have failed authentication; the first authentication module sends a second current signal to the second authentication module, and the second authentication module calculates a second value of the second current signal; after the second authentication module calculates the second value, the slave device disconnects from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet a preset requirement, the slave device is determined to have failed authentication; the second authentication module sends the first value and the second value to the first authentication module, and the first authentication module calculates whether the first value and the second value satisfy a preset relationship, and if so, the slave device is determined to have passed authentication.

[0011] It can be seen from the above scheme that the slave devices calculate the values ​​corresponding to the two current values, and after sending the first value and the second value to the master device, the master device calculates whether the relationship between the two values ​​meets the preset conditions. The entire authentication process does not require complex calculations, especially does not require the use of complex encryption and decryption calculations, which can greatly reduce the difficulty of master-slave device authentication, especially reduce the difficulty of software development for master and slave devices, reduce the cost of authentication, and improve authentication efficiency.

[0012] Moreover, after the second authentication module calculates the first value and the second value, the master device monitors the current output by the slave device. In fact, these two steps are authenticated by analog signals, that is, authentication can be performed by pure hardware, making the authentication operation very simple.

[0013] A preferred solution is that the current value of the second current signal is a preset multiple of the current value of the first current signal, and the preset multiple is a multiple randomly set by the first authentication module; wherein the first authentication module calculates whether the first value and the second value satisfy a preset relationship, including: calculating whether the ratio of the second value to the first value is within a preset range.

[0014] It can be seen that by setting the preset multiple of the first current signal and the second current signal, the relationship between the first value and the second value can be conveniently calculated, which is conducive to the first authentication module to quickly authenticate the slave device.

[0015] A further solution is that after the second authentication module receives the first current signal, it calculates the first value by a binary approximation method; and / or after the second authentication module receives the second current signal, it calculates the second value by a binary approximation method.

[0016] It can be seen that the first value and the second value can be simply and quickly calculated through the bisection approximation method, which makes the hardware circuit design of the second authentication module very simple and can also improve the authentication efficiency.

[0017] A further solution is that the second authentication module includes a voltage comparator, a first input end of the voltage comparator receives a voltage signal obtained from the current signal output by the first authentication module, and a second input end of the voltage comparator receives a comparison reference voltage; the output end of the voltage comparator outputs a comparison result signal to the control logic module.

[0018] It can be seen that the voltage comparator compares the voltage formed after the current signal sent by the main device passes through the reference resistor with the comparison reference voltage, and can obtain the value corresponding to the current signal through multiple comparisons.

[0019] A further solution is that the comparison reference voltage is output by a comparison reference voltage circuit, which includes two or more current sources, and the current value output by each current source is different from the current value output by another current source; the control logic module selects one of the multiple current sources each time.

[0020] It can be seen that the control logic module controls the output current of different current sources each time and receives the output result of the voltage comparator. Since the current values ​​output by each current source are different, the unused current sources can be selected to continuously approach the current value of the current signal output by the main device, and then calculate the corresponding value of the current signal.

[0021] A further solution is that each current source is connected in series with a switch device, and the control logic module controls the on and off of the switch device.

[0022] It can be seen that the control logic module realizes the gating of different current sources by controlling the on and off of each switching device, making the gating of each current source very convenient.

[0023] A further solution is that the first input terminal of the voltage comparator is connected to a first reference resistor, the second input terminal of the voltage comparator is connected to a second reference resistor, and the resistance value of the first reference resistor is equal to the resistance value of the second reference resistor.

[0024] It can be seen that by setting resistors of the same resistance at both ends of the voltage comparator, it can be ensured that when the input currents of the two input ends are the same, the voltage values ​​formed are equal, thereby accurately calculating the value corresponding to the current signal output by the main device.

[0025] To achieve the aforementioned second objective, the present invention provides a master-slave device authentication apparatus based on a single bus, comprising: a first authentication module disposed in a master device and a second authentication module disposed in a slave device, the master device and the slave device communicating via the single bus; the first authentication module being configured to send a first current signal to the second authentication module, and the second authentication module being configured to calculate a first value of the first current signal; after the second authentication module calculates the first value, the slave device disconnects from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet preset requirements, the slave device is determined to have failed authentication; the first authentication module is further configured to send a second current signal to the second authentication module, and the second authentication module is further configured to calculate a second value of the second current signal; after the second authentication module calculates the second value, the slave device disconnects from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet preset requirements, the slave device is determined to have failed authentication; the second authentication module is configured to send the first and second values ​​to the first authentication module, and the first authentication module is configured to calculate whether the first and second values ​​satisfy a preset relationship, and if so, the slave device is determined to have passed authentication.

[0026] It can be seen that the present invention can simplify the difficulty of master-slave device authentication by authenticating through analog signals, so that the entire authentication process does not require complex calculations, especially does not require the use of complex encryption and decryption calculations, which can greatly reduce the difficulty of master-slave device authentication. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 The figure is a schematic diagram showing the connection between a master device and a slave device according to an embodiment of the master-slave device authentication apparatus based on a single bus of the present invention.

[0028] Figure 2 It is a structural block diagram of an embodiment of a master-slave device authentication apparatus based on a single bus of the present invention.

[0029] Figure 3It is a structural block diagram of the power supply module of an embodiment of the master-slave device authentication device based on a single bus of the present invention.

[0030] Figure 4 It is a connection diagram of an embodiment of a master-slave device authentication apparatus based on a single bus during the authentication process of the present invention.

[0031] Figure 5 It is a schematic diagram of calculating the first value by the second authentication module of the master-slave device authentication apparatus based on a single bus according to an embodiment of the present invention.

[0032] Figure 6 It is a schematic diagram of an embodiment of a master-slave device authentication apparatus based on a single bus according to the present invention, in which a first authentication module calculates whether a current signal sent by a second authentication module meets preset requirements.

[0033] Figure 7 This is the first part of the flowchart of an embodiment of a master-slave device authentication method based on a single bus of the present invention.

[0034] Figure 8 This is the second part of the flowchart of an embodiment of a master-slave device authentication method based on a single bus of the present invention.

[0035] Figure 9 This is the third part of the flowchart of an embodiment of a master-slave device authentication method based on a single bus of the present invention.

[0036] The present invention will be further described below with reference to the accompanying drawings and embodiments. DETAILED DESCRIPTION

[0037] The present invention's single-bus-based master-slave device authentication method is applicable to authentication between a master and a slave device. For example, the master device can be a printer, and the slave device can be a chip mounted on a consumable container, which can be detachably mounted on the printer. The present invention implements authentication in a simple manner, particularly through hardware circuitry, which can reduce authentication costs and improve authentication efficiency.

[0038] See also Figure 1 The master device 10 can be a printer, and the slave device 20 can be a consumable chip on a consumable container. The master device 10 and the slave device 30 communicate through a single bus 20. The master device 10 provides power and communication data to the slave device 30 through the single bus 20. Therefore, the slave device 30 needs to extract the power signal and communication data from the signal transmitted by the single bus 20.

[0039] See also Figure 2The master device 10 is equipped with a first authentication module 11 and a field-effect transistor Q1 as a driver. The gate of the field-effect transistor Q1 receives a control signal, the drain is connected to the single-wire bus 20, and the source is grounded. Furthermore, the single-wire bus 20 is connected to a DC power supply VCC via a resistor R8. When the field-effect transistor Q1 is off, the single-wire bus 20 can transmit a high-level signal. When the field-effect transistor Q1 is on, the single-wire bus 20 transmits a low-level signal to the slave device 30. Therefore, by controlling the on / off state of the field-effect transistor Q1, the signal transmitted by the single-wire bus 20 can be controlled.

[0040] The master device 10 still includes the first authentication module 11 , which is used to authenticate the slave device 30 . The internal results of the first authentication module 11 and the authentication process of the slave device 30 will be described in detail below.

[0041] The slave device 30 is provided with a power supply module 31, a data acquisition module 32, a control module 33, and a second authentication module 40. The power supply module 31 can be a diode, for example, with the anode end of the diode connected to the single bus 20 and the cathode end connected to the DC power supply VCC. It can be considered that the slave device 30 obtains the DC power supply VCC from the single bus 20 through the diode. In addition, the slave device 20 also has a capacitor C1 as an energy storage device. When the power supply module 31 obtains power from the single bus 20, the capacitor C1 can store energy. When the power supply module 31 is disconnected from the single bus 20, the capacitor C1 can supply power to the components in the slave device 30 that need to work, such as the second authentication module 40.

[0042] The data acquisition module 32 of the slave device 30 is used to acquire data from the single bus 20, that is, to acquire data sent by the master device 10. The data acquisition module 32 can be implemented using a commonly used data acquisition module and will not be described in detail. The control module 33 can control the operation of the power acquisition module 31 and the data acquisition module 32, and also control the operation of the field effect transistor Q2 as a driving module. The gate of the field effect transistor Q2 receives the control signal output by the control module 33, the drain is connected to the single bus 20, and the source is grounded. When the field effect transistor Q2 is turned on, the single bus 20 is grounded. At this time, the master device 10 will receive a level signal indicating that the single bus 20 is grounded.

[0043] Preferably, see Figure 3The power-taking module 31 also includes multiple field-effect transistors, a power-taking logic switch 39, and a resistor R10. The single bus is connected to the multiple field-effect transistors through a diode D1, wherein the multiple field-effect transistors include two PMOS transistors Q11 and Q12 and an NMOS transistor Q13. The power-taking logic switch 39 is set between the multiple field-effect transistors and the capacitor C1. In the initial state, the capacitor C1 is not charged. When the single bus outputs a high level to the NMOS transistor Q13 through D1, the NMOS transistor Q13 is turned on through the resistor R10, and the capacitor C1 begins to charge. When the capacitor C1 is charged, the two PMOS transistors Q11 and Q12 are turned on. At this time, the voltage of the capacitor C1 is equal to the output voltage of the diode D1. When the power-taking module 31 needs to be turned off, the power-taking switch logic pulls down the voltage at point A, that is, sets the gate of the NMOS transistor Q13 to a low level, and pulls up the voltage at point B. The two PMOS transistors Q11, Q12 and the NMOS transistor Q13 are all turned off, thereby disconnecting from the single bus.

[0044] The following combination Figure 5 and Figure 6 , and combined with Figures 6 to 9 The following describes the process of the master-slave device authentication method of the present invention. When the master device 10 authenticates the slave device 30, it first sends an authentication signal to the slave device 30, executing step S1. For example, the master device 10 sends an authentication command to the single-wire bus 20. After receiving the authentication command via the single-wire bus 20, the slave device 30 confirms the need to perform the authentication operation. The master device 10 then disconnects the single-wire bus 20, for example by disconnecting resistor R8 from the single-wire bus 20 and turning off the field-effect transistor Q1. Only the first authentication module 11 is connected to the single-wire bus 20. At this point, the single-wire bus 20 is in a tri-state state.

[0045] After receiving the authentication signal from the device 30, step S2 is executed to disconnect the power supply module 31, the data acquisition module 32 and the driving module from the single bus 20. For example, the transistor between the diode of the power supply module 31 and the single bus 20 is disconnected, and the field effect transistor Q2 is turned off. At the same time, the data acquisition module 32 is disconnected from the single bus 20. In this way, only the second authentication module 40 is connected to the single bus 20. At this time, the modules connected to the single bus 20 are only the first authentication module 11 and the second authentication module 40. The other modules are disconnected from the single bus 20, which can ensure that the current signal output by the first authentication module 11 will not be affected by other modules. The current signals received by the second authentication module 40 are all current signals emitted by the first authentication module 11, thereby ensuring the accuracy of the authentication result. Since the power supply module 31 is disconnected, the capacitor C1 needs to supply power to the second authentication module 40 to ensure the power demand of the second authentication module 40 during the authentication process. Times, the connection relationship between the master device 10 and the slave device 30 is as follows Figure 4 shown.

[0046] Next, the master device 10 will enter the authentication process. Specifically, step S3 is executed, and the master device 10 sends a first current signal Iref1 to the slave device 30 via the single bus 20. The current value of the first current signal Iref1 is a preset current value. Since the master device 10 has disconnected the resistor R8 and the field-effect transistor Q1, the first current signal Iref1 will be transmitted to the slave device 30 along the single bus 20. Since the slave device 30 has also disconnected the single bus 20 from the power module 31, the data module 32, and the field-effect transistor Q2, the first current signal Iref1 will be received by the second authentication module 40, and the magnitude of the current signal received by the second authentication module 40 is the same as the magnitude of the current signal sent by the first authentication module 11.

[0047] Then, the slave device executes step S4 to calculate the first value corresponding to the first current signal. Specifically, the second authentication module 40 calculates the first value corresponding to the first current signal using a binary approximation method through a voltage comparator.

[0048] See also Figure 5 The first authentication module 11 is provided with a current source that outputs a first current signal Iref1 to the single bus 20. The second authentication module 40 is provided with a voltage comparator U1 and a comparison reference voltage circuit. The comparison reference voltage circuit includes multiple current sources, such as current sources Iref11…Iref15. Each current source outputs a current value that is different from the current value output by another current source. For example, the current value output by current source Iref11 is 0.1 mA, the current value output by current source Iref12 is 0.2 mA, the current value output by current source Iref15 is 1.0 mA, and so on. In addition, the comparison reference voltage circuit is provided with multiple switching devices, each of which is connected in series with a current source. For example, switch device K1 is connected in series with current source Iref11, and switch device K5 is connected in series with current source Iref15. The comparison reference voltage circuit is also provided with a control logic module 15. The output of voltage comparator U1 is connected to the control logic module 15, and the comparison result signal is output to the control logic module 15. The control logic module 15 can control the on and off of multiple switching devices, and only controls the switching device corresponding to one current source to be conductive at any given moment, that is, only one current source is enabled at a time. In this embodiment, the switching device is a soft switching device, such as a transistor or a field-effect transistor. The control logic module 25 switches the current source by controlling the transistor or field-effect transistor to be in the on or off state.

[0049] The first input terminal of the voltage comparator U1 is connected to the comparison reference voltage circuit, which also includes a first reference resistor R1. Specifically, the first input terminal of the voltage comparator U1 is connected to the first reference resistor R1, and the current signal output by the current source forms a voltage signal at the first input terminal of the voltage comparator U1 after passing through the first reference resistor R1.

[0050] The second input terminal of the voltage comparator U1 receives a voltage signal formed by the current signal output by the first authentication module 11. Specifically, the second input terminal of the voltage comparator U1 is connected to the one-way line 20. The second input terminal of the voltage comparator U1 is also connected to a second reference resistor R2. The voltage signal formed by the first current signal passing through the second reference resistor R2 is input to the second input terminal of the voltage comparator U1.

[0051] In addition, the resistance value of the first reference resistor R1 is equal to the resistance value of the second reference resistor R2. Thus, the voltage comparator U1 can compare the magnitude of the voltage signal formed by the first current signal with the voltage signal output by the comparison reference voltage circuit. For example, the control logic module 35 selects one current source at a time and receives the output result signal of the voltage comparator U1 to determine the magnitude relationship between the voltage signal output by the current comparison reference voltage circuit and the voltage signal formed by the first current signal. If the voltage signal output by the comparison reference voltage circuit is larger, the current source with the smaller output current is selected and the comparison is repeated. If the voltage signal output by the comparison reference voltage circuit is smaller, the current source with the larger output current is selected and the comparison is repeated.

[0052] Preferably, this embodiment uses a binary approximation method to perform continuous approximation calculations, and can calculate that the voltage signal formed by the first current signal is between the voltage signals formed by two current sources with adjacent output current values. In this embodiment, two current sources with adjacent output current values ​​will correspond to a single value. For example, if it is determined that the current value of the first current is between current source Iref11 and current source Iref12, the values ​​corresponding to current source Iref11 and current source Iref12 are used as the first value M1, thereby achieving the calculation of the first value M1.

[0053] Then, step S5 is executed to determine whether the calculation of the first value has been completed. If not, the calculation operation continues. If the calculation of the first value has been completed, step S6 is executed, and the slave device 30 is disconnected from the single-wire bus 20. At this point, the single-wire bus 20 is connected only to the current source of the first authentication module 11, and the voltage is raised to VCC. Of course, if the master device 10 does not receive the signal that the voltage of the single-wire bus 20 has been raised to VCC within the preset time, it indicates that the slave device 30 has not completed the calculation of the first value M1 within the preset time, and it can be considered that the slave device 30 has failed authentication.

[0054] After determining that the slave device 30 has completed calculating the first value M1, the master device 10 executes step S7 to monitor the current output by the slave device 30. Specifically, after calculating the first value M1, the slave device 30 outputs a current signal to the single-wire bus 20. This current signal should be substantially equal to the current value of the first current signal Iref1. For example, the current source corresponding to the first value M1 calculated and determined in step S4 outputs current to the single-wire bus 20.

[0055] Then, the master device 10 executes step S8 to determine whether the current signal output by the slave device meets the preset requirements. Figure 6 The first authentication module 11 is provided with a voltage comparator U2 and a voltage comparator U3. The first input of the voltage comparator U2 is connected to a current source that outputs a current value that is 1.1 times the first current signal Iref1 and is also connected to a third reference resistor R3. The second input of the voltage comparator U2 is connected to the single bus 20 to receive the current signal output from the device 30, and the second input is also connected to a fifth reference resistor R5. The first input of the voltage comparator U3 is connected to a current source that outputs a current value that is 0.9 times the first current signal Iref1 and is also connected to a fourth reference resistor R4. The second input of the voltage comparator U3 is connected to the single bus 20 to receive the current signal output from the device 30. In this embodiment, the resistance values ​​of the third reference resistor R3, the fourth reference resistor R4, and the fifth reference resistor R5 are all equal.

[0056] The outputs of voltage comparator U2 and voltage comparator U3 are both connected to current comparison module 16, which receives the outputs of voltage comparator U2 and voltage comparator U3. As can be seen, current comparison module 16 can determine whether the current signal output from device 30 is within a preset range of first current signal Iref1, i.e., between 0.9 and 1.1 times, based on the outputs of the two voltage comparators U2 and U3. Of course, the preset range can be adjusted based on actual needs, and the current value of the output current signal of the current source connected to the two voltage comparators U2 and U3 needs to be adjusted accordingly.

[0057] If the master device 10 determines that the current output by the slave device 30 does not meet the requirements, step S9 is executed to confirm that the slave device 30 fails the authentication. If the master device 10 determines that the current output by the slave device 30 meets the requirements, the slave device 30 is confirmed to pass the authentication and the next round of authentication is executed.

[0058] Specifically, the master device 10 executes step S10 and again sends the second current signal Iref2 to the slave device 30 through the single bus 20. In this embodiment, the current value of the second current signal Iref2 is a preset multiple of the first current signal Iref1, which can be 5 or 8 times. Preferably, the multiple is an integer to facilitate subsequent calculations.

[0059] Then, the slave device 30 executes step S11 to calculate the second value M2 corresponding to the second current signal. The method for calculating the second value M2 corresponding to the second current signal from the slave device 30 is the same as the method for calculating the first value M1 corresponding to the first current signal, and is also calculated using the binary approximation method, which will not be repeated here.

[0060] Next, the slave device executes step S12 to determine whether the second value has been calculated. If not, the calculation continues. If the calculation is completed, step S13 is executed, and the slave device 30 is disconnected from the single bus 20. At this time, the single bus 20 is only connected to the current source of the first authentication module 11, and the voltage is pulled up to VCC.

[0061] Then, the master device 10 executes step S14 to monitor the current signal output by the slave device 30, and executes step S15 to determine whether the current signal output by the slave device 30 meets the requirements. For example, it determines whether the current signal output by the slave device 30 is within a preset range of the second current signal Iref2, such as between 0.9 times and 1.1 times. If not, step S16 is executed to confirm that the slave device 30 has failed authentication. The specific steps for the master device 10 to determine whether the current signal output by the slave device 30 meets the requirements are the same as the determination process in step S8 and are not repeated here.

[0062] If the current signal output by the slave device 30 meets the requirements, step S17 is executed, and the master device 10 resumes communication with the slave device 30. For example, the power extraction module 31, data acquisition module 32, and driver module of the slave device 30 are all reconnected to the single bus 20. Then, the slave device 30 executes step S18 to send the first value M1 and the second value M2 to the master device 10 via the single bus 20. After the master device 10 receives the first value M1 and the second value M2, step S19 is executed to calculate the ratio between the second value M2 and the first value M1. Since the first value M1 corresponds to the current value of the first current signal Iref1, and the second value M2 corresponds to the current value of the second current signal Iref2, in theory, the ratio of the second value M2 to the first value M1 is a pre-set integer.

[0063] Next, the master device 10 executes step S20 to determine whether the ratio is within a preset range. For example, if the theoretical value of the ratio of the second value M2 to the first value M1 is 5, the preset range is within a range of 10%, i.e., 4.5 to 5.5. If the ratio is within the preset range, the master device 10 executes step S22 to confirm that the slave device 30 has passed authentication. Otherwise, the master device 10 executes step S21 to confirm that the slave device 30 has failed authentication.

[0064] It can be seen that by applying the method of the present invention, authentication between the master device and the slave device can be achieved in a simple way, mainly using hardware devices for authentication, requiring less software, which can reduce the difficulty of developing authentication software for the master device and the slave device, and the authentication process does not require complex encryption and decryption calculations, which can improve authentication efficiency.

[0065] Finally, it should be emphasized that the present invention is not limited to the above-mentioned embodiments. For example, changes in the number of times the master device sends current signals to the slave device, or changes in the ratio between the current value of the first current signal and the current value of the second current signal, etc., should also be included in the scope of protection of the claims of the present invention.

Claims

1. A master-slave device authentication method based on a single bus, comprising: The master device sends an authentication request signal to the slave device, and the master device and the slave device communicate via a single bus; Its characteristics are: After the slave device disconnects the power module, the data acquisition module, and the drive module, only the second authentication module of the slave device communicates with the first authentication module of the master device; The first authentication module sends a first current signal to the second authentication module, and the second authentication module calculates a first value of the first current signal. After the second authentication module calculates the first value, the slave device is disconnected from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet a preset requirement, the master device determines that the slave device has failed authentication. If the current output by the slave device meets the preset requirements, the first authentication module sends a second current signal to the second authentication module, and the second authentication module calculates a second value of the second current signal. After the second authentication module calculates the second value, the slave device is disconnected from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet the preset requirements, the master device determines that the slave device has failed authentication. If the current output by the slave device meets the preset requirements, the second authentication module sends the first value and the second value to the first authentication module, and the first authentication module calculates whether the first value and the second value meet the preset relationship. If so, it confirms that the slave device has passed the authentication.

2. The master-slave device authentication method based on a single bus according to claim 1, characterized in that: The current value of the second current signal is a preset multiple of the current value of the first current signal, and the preset multiple is a multiple randomly set by the first authentication module; The first authentication module calculating whether the first value and the second value satisfy a preset relationship includes: calculating whether a ratio of the second value to the first value is within a preset range.

3. The master-slave device authentication method based on a single bus according to claim 1 or 2, characterized in that: After receiving the first current signal, the second authentication module calculates the first value by using a binary approximation method; and / or After receiving the second current signal, the second authentication module calculates the second value by using a binary approximation method.

4. The master-slave device authentication method based on a single bus according to claim 1 or 2, characterized in that: The second authentication module includes a voltage comparator, a first input terminal of the voltage comparator receives a voltage signal obtained from the current signal output by the first authentication module, and a second input terminal of the voltage comparator receives a comparison reference voltage; The output terminal of the voltage comparator outputs a comparison result signal to the control logic module.

5. The master-slave device authentication method based on a single bus according to claim 4, characterized in that: The comparison reference voltage is output by a comparison reference voltage circuit. The comparison reference voltage circuit includes two or more current sources. The current value output by each current source is different from the current value output by another current source.

6. The master-slave device authentication method based on a single bus according to claim 5, characterized in that: Each of the current sources is connected in series with a switch device, and the control logic module controls the on and off of the switch device.

7. The master-slave device authentication method based on a single bus according to claim 4, characterized in that: The first input terminal of the voltage comparator is connected to a first reference resistor, and the second input terminal of the voltage comparator is connected to a second reference resistor. The resistance value of the first reference resistor is equal to the resistance value of the second reference resistor.

8. A master-slave device authentication device based on a single bus, characterized in that: include: A first authentication module provided in a master device and a second authentication module provided in a slave device, wherein the master device and the slave device communicate via a single bus; The first authentication module is configured to send a first current signal to the second authentication module, and the second authentication module is configured to calculate a first value of the first current signal; after the second authentication module calculates the first value, the slave device is disconnected from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet a preset requirement, the master device is determined to have failed authentication; If the current output by the slave device meets the preset requirements, the first authentication module is further configured to send a second current signal to the second authentication module, and the second authentication module is further configured to calculate a second value of the second current signal; after the second authentication module calculates the second value, the slave device is disconnected from the single bus, and the master device monitors the current output by the slave device. If the current output by the slave device does not meet the preset requirements, the master device is determined to have failed authentication; If the current output by the slave device meets the preset requirements, the second authentication module is used to send the first value and the second value to the first authentication module, and the first authentication module is used to calculate whether the first value and the second value meet the preset relationship. If so, confirm that the slave device has passed the authentication.

9. The master-slave device authentication device based on a single bus according to claim 8, characterized in that: The second authentication module includes a voltage comparator, a first input terminal of the voltage comparator receives a voltage signal obtained from the current signal output by the first authentication module, and a second input terminal of the voltage comparator receives a comparison reference voltage; The output terminal of the voltage comparator outputs a comparison result signal to the control logic module.

10. The master-slave device authentication device based on a single bus according to claim 9, characterized in that: The comparison reference voltage is output by a comparison reference voltage circuit, and the comparison reference voltage circuit includes two or more current sources, and the current value output by each current source is different from the current value output by another current source; The control logic module switches on one of the plurality of current sources at a time.

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