Display panel and display device

Abstract

The present disclosure provides a display panel and a display device, belonging to the field of display technology, which can solve the problem that the black state image quality display effect of the existing display panel is reduced, affecting the user experience. The display panel of the present disclosure includes: a base substrate, and a driving circuit layer located on the base substrate; the driving circuit layer includes: a pixel driving circuit; the pixel driving circuit includes at least: a threshold compensation transistor, a driving transistor and a data writing transistor; the driving circuit layer also includes: a first electrode plate located on the side of the threshold compensation transistor close to the base substrate; the threshold compensation transistor is located on the side of the data writing transistor away from the base substrate; a connecting line is located on the side of the threshold compensation transistor away from the base substrate; the positive projection of at least one of the connecting line, the source of the threshold compensation transistor and the first electrode plate on the base substrate at least partially overlaps with the positive projection of the second scanning signal line on the base substrate.

Description

Technical Field

[0001] The present disclosure belongs to the field of display technology, and particularly relates to a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) is a light-emitting device that uses organic solid-state semiconductors as light-emitting materials. It has broad application prospects due to its advantages such as simple preparation process, low cost, low power consumption, high luminous brightness, and wide operating temperature adaptability.

[0003] In current display panels, a pixel driving circuit composed of a low-temperature polysilicon (LTPS) thin-film transistor can be used to drive the light-emitting devices therein to achieve the display function. However, due to the large leakage current in the LTPS pixel driving circuit, a pixel driving circuit composed of a low-temperature polycrystalline silicon oxide (LTPO) thin-film transistor has emerged, which can solve the current problem of large leakage current. At the same time, in order to improve the black-state image quality display effect of the display panel, a maintenance capacitor is often formed in the pixel driving circuit to increase the data voltage of the gate of the driving transistor. However, since the turn-on voltages of the low-temperature polysilicon thin-film transistor and the oxide thin-film transistor in the pixel driving circuit are different, the maintenance capacitor formed by the two affects each other, resulting in the data voltage of the gate of the driving transistor failing to achieve the expected effect, resulting in a reduction in the black-state image quality display effect of the display panel, affecting the user experience. Summary of the Invention

[0004] The present disclosure aims to solve at least one of the technical problems existing in the prior art and provide a display panel and a display device.

[0005] In a first aspect, an embodiment of the present disclosure provides a display panel, comprising: a base substrate, and a driving circuit layer located on the base substrate; the driving circuit layer comprising: a pixel driving circuit; the pixel driving circuit comprising at least: a threshold compensation transistor, a driving transistor, and a data writing transistor; wherein the threshold compensation transistor is an oxide thin film transistor, and the data writing transistor is a low-temperature polysilicon thin film transistor; the driving circuit layer further comprising: a first electrode plate located on a side of the threshold compensation transistor close to the base substrate;

[0006] The gate of the threshold compensation transistor is connected to the first scan signal line, the gate of the driving transistor is connected to the source of the threshold compensation transistor through the connecting line, and the gate of the data writing transistor is connected to the second scan signal line; the first electrode plate is connected to the connecting line;

[0007] The threshold compensation transistor is located on a side of the data writing transistor away from the substrate; the connection line is located on a side of the threshold compensation transistor away from the substrate;

[0008] The orthographic projection of the connecting line on the substrate at least partially overlaps with the orthographic projection of the first scanning signal line on the substrate;

[0009] An orthographic projection of at least one of the connecting trace, the source of the threshold compensation transistor, and the first electrode plate on the base substrate at least partially overlaps with an orthographic projection of the second scan signal line on the base substrate.

[0010] Optionally, the overlapping area between the orthographic projection of at least one of the connecting trace, the source of the threshold compensation transistor and the first electrode plate on the substrate and the orthographic projection of the second scanning signal line on the substrate is greater than the overlapping area between the orthographic projection of the connecting trace on the substrate and the orthographic projection of the first scanning signal line on the substrate.

[0011] Optionally, the driving circuit layer further includes: a second electrode plate provided on the same layer as the first electrode plate;

[0012] An orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the gate of the driving transistor on the base substrate.

[0013] Optionally, the driving circuit layer further includes: a storage capacitor;

[0014] The gate electrode of the driving transistor serves as the first electrode plate of the storage capacitor; and the second electrode plate serves as the second electrode plate of the storage capacitor.

[0015] Optionally, the driving circuit layer includes: a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer and a fourth conductive layer arranged in sequence along a direction away from the base substrate;

[0016] The first semiconductor layer includes: an active layer, a source electrode, and a drain electrode of the driving transistor and an active layer, a source electrode, and a drain electrode of the data writing transistor;

[0017] The first conductive layer includes: a gate of the driving transistor, a gate of the data writing transistor and the second scanning signal line;

[0018] The second conductive layer includes: the first electrode plate and the second electrode plate;

[0019] The second semiconductor layer includes: an active layer, a source electrode and a drain electrode of the threshold compensation transistor;

[0020] The third conductive layer includes: the gate of the threshold compensation transistor and the first scanning signal line;

[0021] The fourth conductive layer includes: the connecting wires.

[0022] Optionally, the threshold compensation transistor includes an N-type transistor; and the data writing transistor includes a P-type transistor.

[0023] Optionally, the display panel further comprises: a light emitting device layer located on a side of the driving circuit layer away from the base substrate;

[0024] The light emitting device layer includes: a plurality of light emitting devices; the light emitting devices include: a red light emitting device, a green light emitting device and a blue light emitting device.

[0025] Optionally, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between the orthographic projection of the connecting trace on the substrate and the orthographic projection of the second scanning signal line on the substrate are respectively a first overlapping area, a second overlapping area, and a third overlapping area;

[0026] The first overlapping area is larger than the third overlapping area, and the second overlapping area is larger than the third overlapping area.

[0027] Optionally, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between an orthographic projection of the source of the threshold compensation transistor on the base substrate and an orthographic projection of the second scan signal line on the base substrate are a fourth overlapping area, a fifth overlapping area, and a sixth overlapping area, respectively;

[0028] The fourth overlapping area is larger than the sixth overlapping area, and the fifth overlapping area is larger than the sixth overlapping area.

[0029] Optionally, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between the orthographic projection of the first electrode plate on the base substrate and the orthographic projection of the second scanning signal line on the base substrate are respectively the seventh overlapping area, the eighth overlapping area, and the ninth overlapping area;

[0030] The seventh overlapping area is larger than the ninth overlapping area, and the eighth overlapping area is larger than the ninth overlapping area.

[0031] In a second aspect, an embodiment of the present disclosure provides a display device, which includes the display panel provided above. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a schematic structural diagram of an exemplary pixel driving circuit;

[0033] Figure 2 is a schematic structural diagram of an exemplary display panel;

[0034] Figure 3 is a schematic structural diagram of another exemplary display panel;

[0035] Figure 4 A schematic structural diagram of a display panel provided in an embodiment of the present disclosure;

[0036] Figure 5 A schematic structural diagram of another display panel provided in an embodiment of the present disclosure;

[0037] Figure 6 A schematic structural diagram of another display panel provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the present disclosure is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0039] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by people with ordinary skills in the field to which this disclosure belongs. The words "first", "second" and similar words used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one", "an" or "the" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0040] Figure 1 is a schematic structural diagram of an exemplary pixel driving circuit, such as Figure 1 As shown, the pixel driving circuit includes: a reset transistor T1, a threshold compensation transistor T2, a driving transistor T3, a data writing transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, an initialization transistor T7, a storage capacitor Cst, a first maintenance capacitor C1, and a second maintenance capacitor C2. The reset transistor T1 can reset the voltage of a first node N1 using a reset signal from a reset signal line Reset. The first node N1 is a connection node between the reset transistor T1, the threshold compensation transistor T2, the driving transistor T3, the storage capacitor Cst, the first maintenance capacitor C1, and the second maintenance capacitor C2. The threshold compensation transistor T2 can compensate for the threshold voltage of the driving transistor T3 using the data voltage at the first node N1. The driving transistor T3 can convert a voltage signal from the first power supply voltage terminal VDD into a current signal to drive the light-emitting device D to emit light. The data writing transistor T4 can write a data signal from the data signal line Vdata to the first node N1. The first and second light-emitting control transistors T5 and T6 can control the light-emitting device D to emit light using a light-emission control signal. Initialization transistor T7 can initialize the anode voltage of light-emitting device D using the initialization signal of initialization signal line Vinit. Storage capacitor Cst can store the data signal at first node N1. First maintenance capacitor C1 and second maintenance capacitor C2 can maintain the voltage of the data signal at first node N1. The anode of light-emitting device D is connected to the drains of second emission control transistor T6 and initialization transistor T7, and the cathode is connected to the second power supply voltage terminal VSS.

[0041] Specifically, the gate of the reset transistor T1 is connected to the reset signal line Reset, the source is connected to the initialization signal line Vinit, and the drain is connected to the first node N1. The first node N1 is the connection node between the reset transistor T1, the threshold compensation transistor T2, the driving transistor T3, the storage capacitor Cst, the first maintenance capacitor C1, and the second maintenance capacitor C2. The gate of the threshold compensation transistor T2 is connected to the scan signal line Gate, the source is connected to the first node N1, and the drain is connected to the drain of the driving transistor T3. The gate of the driving transistor T3 is connected to the first node N1, the source is connected to the drain of the first emission control transistor T5, and the drain is connected to the source of the second emission control transistor T6. The gate of the data write transistor T4 is connected to the scan signal line Gate, the source is connected to the data signal line Vdata, and the drain is connected to the source of the driving transistor T3. The gate of the first emission control transistor T5 is connected to the emission control signal line EM, the source is connected to the first power supply voltage terminal VDD, and the drain is connected to the source of the driving transistor T3. The gate of the second light-emitting control transistor T6 is connected to the light-emitting control signal line EM, the source is connected to the drain of the drive transistor T3, and the drain is connected to the anode of the light-emitting device D. The gate of the initialization transistor T7 is connected to the scan signal line Gate, the source is connected to the initialization signal line Vinit, and the drain is connected to the anode of the light-emitting device D. One end of the storage capacitor Cst is connected to the first node N1, and the other end is connected to the first power supply voltage terminal VDD. A first end of the first maintenance capacitor C1 is connected to the gate of the threshold compensation transistor T2, and the other end is connected to the first node N1. One end of the second maintenance capacitor C2 is connected to the gate of the data write transistor T4, and the other end is connected to the first node N1.

[0042] Figure 2 is a schematic structural diagram of an exemplary display panel, such as Figure 2 As shown, the display panel includes: a base substrate 101, and a driving circuit layer 102 located on the base substrate; the driving circuit layer includes: a pixel driving circuit; the pixel driving circuit includes at least: a threshold compensation transistor T2, a driving transistor T3 and a data writing transistor (not shown in the figure), and each transistor can be connected through a connecting line 1021. The specific circuit connection structure can be as follows Figure 1As shown. Among them, each transistor is a low-temperature polysilicon thin-film transistor, and all are P-type transistors. Only one scan signal line 1022 is required in the entire pixel driving circuit to provide a scan signal to control the opening and closing of the corresponding transistor. Since the types of each transistor are the same, the same components in each transistor can be set on the same layer. The connecting line 1021 can overlap with the scan signal line 1022, and a first maintenance capacitor C1 and a second maintenance capacitor C2 can be formed between the two. After the data write transistor T4 writes the data signal and is turned off, the voltage on the scan signal line is set high to pull up the voltage of the first node N1, thereby reducing the voltage of the data signal during black state display, thereby improving the black state display effect.

[0043] However, the situation is different in a pixel driving circuit composed of a low-temperature polysilicon thin film transistor and an oxide thin film transistor. Figure 3 is a schematic structural diagram of another exemplary display panel, such as Figure 3 As shown, the display panel includes: a base substrate 101, and a driving circuit layer 102 located on the base substrate; the driving circuit layer includes: a pixel driving circuit; the pixel driving circuit includes at least: a threshold compensation transistor T2, a driving transistor T3 and a data writing transistor (not shown in the figure), and each transistor can be connected through a connecting line 1021. The specific circuit connection structure can be as follows Figure 1 shown. Figure 3 The structure of the pixel driving circuit in the display panel shown can also be as shown in FIG. Figure 1 shown. Figure 3 The pixel driving circuit in the display panel shown is Figure 2 The difference between the pixel driving circuit in the display panel shown is that Figure 3 In the pixel drive circuit of the illustrated display panel, at least the threshold compensation transistor T2 is an N-type oxide thin-film transistor, and the data write transistor T4 is a P-type low-temperature polysilicon thin-film transistor. Because the pixel drive circuit contains two different types of transistors, two scan signal lines are required to provide scan signals: a first scan signal line 1022A and a second scan signal line 1022B. The drive transistor T3 and the threshold compensation transistor T2 are electrically connected via a connecting line 1021, forming a first node N1. The threshold compensation transistor T2 is located on the side of the data write transistor T4 facing away from the substrate 101; the connecting line 1021 is located on the side of the oxide thin-film transistor facing away from the substrate 101. A first maintenance capacitor C1 is formed by the intersection of the connecting line 1021 and the first scan signal line 1022A, while a second maintenance capacitor C2 is formed by the intersection of the connecting line 1021 and the second scan signal line 1022B.

[0044] When writing data signals, both threshold compensation transistor T2 and data write transistor T4 are turned on. However, the gate signals of threshold compensation transistor T2 and data write transistor T4 are high and low, respectively, which have the opposite effect on first node N1 as the first and second hold capacitors C1 and C2 formed by connection line 1021. Structurally, there are also differences. Because the active layer channel of threshold compensation transistor T2 and the active layer channel of data write transistor T4 are not on the same layer, and first node N1 is connected via connection line 1021, the distance between connection line 1021 and first scan signal line 1022A and second scan signal line 1022B varies, resulting in different sizes of first hold capacitor C1 and second hold capacitor C2. In particular, as the distance from second scan signal line 1022B increases, the capacitance of second hold capacitor C2 decreases. As a result, the display panel cannot achieve the desired black state image quality, affecting the user experience.

[0045] In order to solve at least one of the above technical problems, the embodiments of the present disclosure provide a display panel and a display device. The display panel and the display device provided by the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0046] The present disclosure provides a display panel. Figure 4 A schematic diagram of the structure of a display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 4 As shown, the display panel includes: a base substrate 101 and a driving circuit layer 102 located on the base substrate; the driving circuit layer includes: a pixel driving circuit; the pixel driving circuit includes at least: a threshold compensation transistor T2, a driving transistor T3, and a data writing transistor (not shown in the figure). The threshold compensation transistor T2 is an oxide thin film transistor, and the data writing transistor is a low-temperature polysilicon thin film transistor. Figure 4 The structure of the pixel driving circuit in the display panel shown is similar to Figure 1The pixel driving circuit structure is basically the same. The gate electrode T20 of the threshold compensation transistor T2 is connected to the first scanning signal line 1022A, the gate electrode T30 of the driving transistor T3 is connected to the source electrode T21 of the threshold compensation transistor T2 via the connecting line 1021, and the gate electrode of the data writing transistor (not shown in the figure) is connected to the second scanning signal line 1022B. The threshold compensation transistor T2 is located on the side of the data writing transistor T4 facing away from the substrate 101. The connecting line 1021 is located on the side of the threshold compensation transistor T2 facing away from the substrate 101. The orthographic projection of the connecting line 1021 on the substrate 101 at least partially overlaps with the orthographic projection of the first scanning signal line 1022A on the substrate 101. The orthographic projection of the connecting line 1021 on the substrate 101 at least partially overlaps with the orthographic projection of the second scanning signal line 1022B on the substrate 101. Figure 5 A schematic diagram of the structure of another display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 5 As shown, the orthographic projection of the source T21 of the threshold compensation transistor T2 in the display panel on the base substrate 101 at least partially overlaps with the orthographic projection of the second scan signal line 1022B on the base substrate 101 . Figure 6 A structural diagram of another display panel provided in an embodiment of the present disclosure is shown in FIG. Figure 6 As shown, the display panel further includes: a first electrode plate 1023 located on the side of the threshold compensation transistor T2 close to the base substrate 101; the orthographic projection of the first electrode plate 1023 on the base substrate 101 at least partially overlaps with the orthographic projection of the second scanning signal line 1022B on the base substrate 101.

[0047] Figure 4 The display panel shown in Figure 3 The display panels shown differ in that Figure 4 In the display panel shown, the orthographic projection of the connecting trace 1021 on the base substrate 101 at least partially overlaps with the orthographic projection of the second scanning signal line 1022B on the base substrate 101. The overlapping area between the connecting trace 1021 and the second scanning signal line 1022B can be set to be relatively large by increasing the line width of the second scanning signal line 1022B, so as to increase the capacitance value of the second maintenance capacitor C2.

[0048] Figure 5 The display panel shown in Figure 3 The display panel in the Figure 5In the display panel shown, the source T20 of the threshold compensation transistor T2 extends toward the gate of the data writing transistor T4, and the orthographic projection of the source T20 of the threshold compensation transistor T2 on the substrate 101 at least partially overlaps with the orthographic projection of the second scanning signal line 1022B on the substrate 101. Because the source T20 of the threshold compensation transistor T2 is connected to the connecting line 1021, the voltage of the connecting line 1021 can be transmitted to the source T20 of the threshold compensation transistor T2. In this way, the source T20 of the threshold compensation transistor T2 overlaps with the second scanning signal line 1022B to form a second holding capacitor C2, which is relatively large. Figure 3 The display panel shown, Figure 5 The distance between the source electrode T20 of the threshold compensation transistor T2 in the display panel shown and the second scanning signal line 1022B is significantly smaller than Figure 3 The distance between the connecting line 1021 and the scanning signal line 1022 in the display panel shown is such that the capacitance of the second holding capacitor C2 can be increased.

[0049] Figure 6 The display panel shown is Figure 3 The display panels shown differ in that Figure 6 In the display panel shown, the first electrode plate 1023 is located on the side of the threshold compensation transistor T2 close to the base substrate 101, and the first electrode plate 1023 is electrically connected to the connecting wire 1021, and the voltage of the connecting wire 1021 can be transmitted to the first electrode plate 1023. In this way, the distance between the first electrode plate 1023 and the second scanning signal line 1022B is significantly smaller than Figure 3 The distance between the connecting line 1021 and the second scan signal line 1022B in the display panel shown can increase the capacitance of the second holding capacitor C2.

[0050] When the data signal is written, the threshold compensation transistor T2 and the data writing transistor T4 are both turned on. Although the gate signals of the threshold compensation transistor T2 and the data writing transistor T4 are respectively high-level signals and low-level signals, the first maintenance capacitor C1 and the second maintenance capacitor C2 formed have exactly opposite effects on the first node N1. However, since the overlapping area between the two plates of the second maintenance capacitor C2 is significantly increased or the distance between the two is significantly reduced, the capacitance value of the second maintenance capacitor C2 is significantly increased. The voltage-raising effect of the second maintenance capacitor C2 on the first node N1 can completely offset the voltage-lowering effect of the first maintenance capacitor C1 on the first node N1. The second maintenance capacitor C2 with a larger capacitance value can ensure that the voltage of the first node N1 is effectively pulled up, thereby ensuring the black state image quality effect of the display panel, thereby improving the user experience.

[0051] In some embodiments, as Figures 4 to 6 As shown, the overlapping area between the orthographic projection of at least one of the connecting trace 1021, the source T20 of the threshold compensation transistor T2 and the first electrode plate 1023 on the base substrate 101 and the orthographic projection of the second scanning signal line 1022B on the base substrate 101 is greater than the overlapping area between the orthographic projection of the connecting trace 1021 on the base substrate 101 and the orthographic projection of the first scanning signal line 1022A on the base substrate 101.

[0052] A first maintenance capacitor C1 can be formed between the connecting line 1021 and the first scanning signal line 1022A. The connecting line 1021, the source T20 of the threshold compensation transistor T2 and at least one of the first electrode plate 1023 can form a second maintenance capacitor C2 with the second scanning signal line 1022B. By reducing the distance between the two plates of the second maintenance capacitor C2, the capacitance value of the second maintenance capacitor C2 can be significantly increased. In order to further ensure that the capacitance value of the second maintenance capacitor C2 is greater than the capacitance value of the first maintenance capacitor C1, it is necessary to set the overlapping area between the two plates of the second maintenance capacitor C2 to be greater than the overlapping area between the two plates of the first maintenance capacitor C1, so that the second maintenance capacitor C2 with a larger capacitance value can ensure that the voltage of the first node N1 is effectively pulled up, thereby ensuring the black state image quality effect of the display panel, thereby improving the user experience.

[0053] In some embodiments, as Figure 4 As shown, the driving circuit layer 102 further includes: a second electrode plate 1024 provided on the same layer as the first electrode plate 1023 ; the orthographic projection of the second electrode plate 1024 on the base substrate 101 at least partially overlaps with the orthographic projection of the gate T30 of the driving transistor T3 on the base substrate 101 .

[0054] The orthographic projection of the second electrode plate 1024 on the base substrate 101 and the orthographic projection of the gate T30 of the driving transistor T3 on the base substrate 101 at least partially overlap to form a capacitor structure, which is used as Figure 1 In the pixel driving circuit shown, the gate electrode T30 of the driving transistor T3 serves as the first plate of the storage capacitor Cst, while the second electrode plate 1024 serves as the second plate of the storage capacitor Cst. The first electrode plate 1023 and the second electrode plate 1024 can be made of the same material and fabricated using the same process. This eliminates the need for an additional mask plate to form a second holding capacitor C2 with a larger capacitance, thereby reducing fabrication steps and costs.

[0055] In some embodiments, as Figure 4As shown, the driving circuit layer 102 includes: a first semiconductor layer Active1, a first conductive layer Gate1, a second conductive layer Gate2, a second semiconductor layer Active2, a third conductive layer Gate3 and a fourth conductive layer SD1 arranged in sequence along a direction away from the base substrate 101; the first semiconductor layer Active1 includes: an active layer T33, a source T31 and a drain T32 of a driving transistor T3 and an active layer, a source and a drain of a data writing transistor (not shown in the figure); the first conductive layer Gate1 includes: a driving transistor T33, a source T31 and a drain T32 of a driving transistor T3 and a data writing transistor T33, a source T31 and a drain T32 of a data writing transistor (not shown in the figure); the first conductive layer Gate1 includes: a driving transistor T33, a source T31 and a drain T32 of a driving transistor T3 and a data writing transistor T33, a source T31 and a drain T32 of a driving transistor T3 and a data writing transistor T33, a source T31 and a drain T32 of a driving transistor T3 and a data writing transistor T33; the first conductive layer Gate1 includes: a driving ... The gate T30 of the active transistor T3, the gate of the data writing transistor (not shown in the figure) and the second scanning signal line 1022B; the second conductive layer Gate2 includes: a first electrode plate 1023 and a second electrode plate 1024; the second semiconductor layer Active2 includes: an active layer T23, a source T21 and a drain T22 of the threshold compensation transistor T2; the third conductive layer Gate3 includes: a gate T20 of the threshold compensation transistor T2 and the first scanning signal line 1022A; the fourth conductive layer SD1 includes: a connecting trace 1021.

[0056] In practical applications, the active layer, source, and drain of each low-temperature polysilicon transistor (e.g., data write transistor T4) can be made of the same material and formed by the same manufacturing process to save manufacturing costs. The active layer can be made of a semiconductor material, and the two ends of the active layer can be made conductive by ion implantation or heavy doping, so that the two ends of the active layer are conductive to form the source and drain of the low-temperature polysilicon thin film transistor. The gates of each oxide thin film transistor (e.g., threshold compensation transistor T2) can be made of the same material and formed by the same manufacturing process to save manufacturing costs. Furthermore, the first scanning signal line 1022A can be set on the same layer as the gates of each oxide thin film transistor (e.g., threshold compensation transistor T2), and the second scanning signal line 1022B can be set on the same layer as the gates of each low-temperature polysilicon thin film transistor (e.g., data write transistor T4). Similarly, the first electrode plate 1023 and the second electrode plate 1024 can be formed using the same material and the same preparation process; the active layer, source and drain of each oxide thin film transistor can be formed using the same material and the same preparation process; and each connecting line 1021 in the pixel driving circuit can be formed using the same material and the same preparation process to save preparation costs.

[0057] In some embodiments, as Figure 3 and Figure 4 As shown, the display panel further includes: a light emitting device layer 103 located on the side of the driving circuit layer 102 away from the base substrate 101; the light emitting device layer 103 includes: a plurality of light emitting devices 1031; the light emitting devices include: a red light emitting device, a green light emitting device and a blue light emitting device.

[0058] A plurality of light-emitting devices 1031 are provided in the light-emitting device layer 103, and each light-emitting device 1031 is connected to a corresponding pixel driving circuit. The pixel driving circuit can provide a data signal to each light-emitting device 1031 so that each red light-emitting device, green light-emitting device and blue light-emitting device emits red light, green light and blue light respectively, thereby realizing a colorful display function.

[0059] In some embodiments, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, the overlapping areas between the orthographic projection of the connecting trace 1021 on the base substrate 101 and the orthographic projection of the second scanning signal line 1022B on the base substrate 101 are respectively the first overlapping area S1, the second overlapping area S2, and the third overlapping area S3; wherein the first overlapping area S1 is greater than the third overlapping area S3, and the second overlapping area S2 is greater than the third overlapping area S3.

[0060] The red, green, and blue light-emitting devices in the display panel have different turn-on voltages, wherein the turn-on voltage of the red light-emitting device is substantially the same as the turn-on voltage of the green light-emitting device and is greater than the turn-on voltage of the blue light-emitting device. In practical applications, the relationship between the first overlapping area S1, the second overlapping area S2, and the third overlapping area S3 corresponding to the red, green, and blue light-emitting devices, respectively, can be set to S1>S2>S3, or S2>S1>S3. This ensures that the second maintenance capacitors C2 corresponding to the red, green, and blue light-emitting devices, respectively, are different, ensuring that the voltage of the first node N1 can be pulled up to a preset value to meet the lighting requirements of the different light-emitting devices in the display panel, thereby improving the display effect.

[0061] In some embodiments, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, the overlapping areas between the orthographic projection of the source T20 of the threshold compensation transistor T2 on the base substrate 101 and the orthographic projection of the second scanning signal line 1022B on the base substrate 101 are respectively the fourth overlapping area S4, the fifth overlapping area S5, and the sixth overlapping area S6; wherein the fourth overlapping area S4 is greater than the sixth overlapping area S6, and the fifth overlapping area S5 is greater than the sixth overlapping area S6.

[0062] The red, green, and blue light-emitting devices in the display panel have different turn-on voltages, wherein the turn-on voltage of the red light-emitting device is substantially the same as the turn-on voltage of the green light-emitting device and is greater than the turn-on voltage of the blue light-emitting device. In practical applications, the relationship between the fourth overlapping area S4, the fifth overlapping area S5, and the sixth overlapping area S6 corresponding to the red, green, and blue light-emitting devices, respectively, can be set to S4>S5>S6, or S5>S4>S6. This ensures that the second maintenance capacitors C2 corresponding to the red, green, and blue light-emitting devices, respectively, are different, ensuring that the voltage of the first node N1 can be pulled up to a preset value to meet the lighting requirements of the different light-emitting devices in the display panel, thereby improving the display effect.

[0063] In some embodiments, in the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, the overlapping areas between the orthographic projection of the first electrode plate 1023 on the base substrate 101 and the orthographic projection of the second scanning signal line 1022B on the base substrate 101 are respectively the seventh overlapping area S7, the eighth overlapping area S8, and the ninth overlapping area S9; wherein the seventh overlapping area S7 is greater than the ninth overlapping area S9, and the eighth overlapping area S8 is greater than the ninth overlapping area S9.

[0064] The red, green, and blue light-emitting devices in the display panel have different turn-on voltages. The turn-on voltage of the red light-emitting device is substantially the same as the turn-on voltage of the green light-emitting device and is greater than the turn-on voltage of the blue light-emitting device. In practical applications, the relationship between the seventh overlapping area S7, the eighth overlapping area S8, and the ninth overlapping area S9 corresponding to the red, green, and blue light-emitting devices, respectively, can be set to S7>S8>S9, or S8>S7>S9. This ensures that the second maintenance capacitors C2 corresponding to the red, green, and blue light-emitting devices, respectively, are different, ensuring that the voltage of the first node N1 can be pulled up to a preset value to meet the lighting requirements of the different light-emitting devices in the display panel, thereby improving the display effect.

[0065] It should be noted here that if Figures 4 to 6As shown, a buffer layer, an interlayer insulating layer, a planarization layer, and other film layers are further provided between the connecting line 1021 and the second scanning signal line 1022B. Each film layer can be made using processes and materials in related technologies and will not be described in detail here. The embodiment of the present disclosure can also reduce the distance between the connecting line 1021 and the second scanning signal line 1022B by reducing the thickness of each film layer between the connecting line 1021 and the second scanning signal line 1022B, thereby significantly increasing the capacitance value of the second maintenance capacitor C2. The voltage-raising effect of the second maintenance capacitor C2 on the first node N1 can completely offset the voltage-lowering effect of the first maintenance capacitor C1 on the first node N1. The second maintenance capacitor C2 with a larger capacitance value can ensure that the voltage of the first node N1 is effectively raised, thereby ensuring the black state image quality effect of the display panel, thereby improving the user experience.

[0066] An embodiment of the present disclosure also provides a display device, which includes a display panel as provided in any of the above embodiments. The display device can be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function. Its implementation principle and beneficial effects are the same as those of the above-mentioned display panel, and will not be repeated here.

[0067] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: The display panel includes: a base substrate, and a driving circuit layer located on the base substrate; the driving circuit layer includes: a pixel driving circuit; the pixel driving circuit includes at least: a threshold compensation transistor, a driving transistor, and a data writing transistor; wherein the threshold compensation transistor is an oxide thin film transistor, and the data writing transistor is a low-temperature polysilicon thin film transistor; the driving circuit layer also includes: a first electrode plate located on a side of the threshold compensation transistor close to the base substrate; The gate of the threshold compensation transistor is connected to the first scan signal line, the gate of the driving transistor is connected to the source of the threshold compensation transistor via a connecting line, and the gate of the data writing transistor is connected to the second scan signal line; the first electrode plate is connected to the connecting line; The threshold compensation transistor is located on a side of the data writing transistor away from the substrate; the connection line is located on a side of the threshold compensation transistor away from the substrate; The orthographic projection of the connecting line on the substrate at least partially overlaps with the orthographic projection of the first scanning signal line on the substrate; An orthographic projection of at least one of the connecting wiring, the source of the threshold compensation transistor, and the first electrode plate on the base substrate at least partially overlaps with an orthographic projection of the second scanning signal line on the base substrate; The overlapping area between the orthographic projection of at least one of the connecting trace, the source of the threshold compensation transistor and the first electrode plate on the substrate and the orthographic projection of the second scanning signal line on the substrate is greater than the overlapping area between the orthographic projection of the connecting trace on the substrate and the orthographic projection of the first scanning signal line on the substrate.

2. The display panel according to claim 1, wherein: The driving circuit layer further includes: a second electrode plate provided on the same layer as the first electrode plate; An orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the gate of the driving transistor on the base substrate.

3. The display panel according to claim 2, wherein: The driving circuit layer further includes: a storage capacitor; The gate electrode of the driving transistor serves as the first electrode plate of the storage capacitor; and the second electrode plate serves as the second electrode plate of the storage capacitor.

4. The display panel according to claim 2, wherein: The driving circuit layer includes: a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer and a fourth conductive layer arranged in sequence along a direction away from the base substrate; The first semiconductor layer includes: an active layer, a source electrode, and a drain electrode of the driving transistor and an active layer, a source electrode, and a drain electrode of the data writing transistor; The first conductive layer includes: a gate of the driving transistor, a gate of the data writing transistor and the second scanning signal line; The second conductive layer includes: the first electrode plate and the second electrode plate; The second semiconductor layer includes: an active layer, a source electrode and a drain electrode of the threshold compensation transistor; The third conductive layer includes: the gate of the threshold compensation transistor and the first scanning signal line; The fourth conductive layer includes: the connecting wires.

5. The display panel according to claim 1, wherein: The threshold compensation transistor includes an N-type transistor; the data writing transistor includes a P-type transistor.

6. The display panel according to claim 1, wherein: The display panel further comprises: a light emitting device layer located on a side of the driving circuit layer away from the base substrate; The light emitting device layer includes: a plurality of light emitting devices; the light emitting devices include: a red light emitting device, a green light emitting device and a blue light emitting device.

7. The display panel according to claim 6, wherein: In the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between the orthographic projection of the connecting wire on the substrate and the orthographic projection of the second scanning signal line on the substrate are respectively a first overlapping area, a second overlapping area, and a third overlapping area; The first overlapping area is larger than the third overlapping area, and the second overlapping area is larger than the third overlapping area.

8. The display panel according to claim 6, wherein: In the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between the orthographic projection of the source of the threshold compensation transistor on the substrate and the orthographic projection of the second scan signal line on the substrate are a fourth overlapping area, a fifth overlapping area, and a sixth overlapping area, respectively; The fourth overlapping area is larger than the sixth overlapping area, and the fifth overlapping area is larger than the sixth overlapping area.

9. The display panel according to claim 6, wherein: In the pixel driving circuits corresponding to the red light-emitting device, the green light-emitting device, and the blue light-emitting device, overlapping areas between the orthographic projection of the first electrode plate on the base substrate and the orthographic projection of the second scanning signal line on the base substrate are respectively the seventh overlapping area, the eighth overlapping area, and the ninth overlapping area; The seventh overlapping area is larger than the ninth overlapping area, and the eighth overlapping area is larger than the ninth overlapping area.

10. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 9.

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