Display device and method of inspecting display device

Abstract

In the display device (1), the metal layer (CDL1) has a plurality of opening portions (KA), and the island-shaped electrode pads (PAD1, PAD2) overlap with one or more of the plurality of opening portions (KA) at least via an insulating film including the planarization film (21).

Description

Technical Field

[0001] The present invention relates to a display device and a method for inspecting the display device. Background Art

[0002] In recent years, various display devices equipped with light-emitting elements have been developed. In particular, display devices equipped with OLED (Organic Light Emitting Diode) and display devices equipped with inorganic light-emitting diodes or QLED (Quantum dot Light Emitting Diode) have attracted much attention due to their ability to achieve low power consumption, thinness, and high image quality.

[0003] In the field of these display devices, electrode pads for analysis or inspection are previously produced in the display device during the manufacturing process of the display device and are used for various characteristic evaluations as needed.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Publication No. 2002-350802 (published on December 4, 2002) Summary of the Invention

[0007] Technical problems to be solved by the present invention

[0008] Figure 15 1 is a diagram schematically showing a structure of a conventional display device 100 in which a metal layer CDL is formed in a frame shape in a frame area NDA.

[0009] Figure 15 The display device 100 shown includes a display area DA, a frame area NDA surrounding the display area DA, a terminal portion TER provided at one end of the frame area NDA, an ELVDD voltage line as a first power voltage line, and an ELVSS voltage line as a second power voltage line.

[0010] The ELVDD voltage line includes: a trunk wiring ELVDDM, formed parallel to the terminal portion TER; a plurality of branch wirings (not shown), electrically connected to the trunk wiring ELVDDM and formed in the display area DA and the frame area NDA; and two lead wirings ELVDDH, extending from the terminal TP2 and the terminal TPn-1 of the terminal portion TER, respectively, and electrically connected to the trunk wiring ELVDDM.

[0011] On the other hand, the ELVSS voltage line includes a trunk wiring ELVSSM which is arranged in a frame shape in the frame area NDA and Figure 15 two lead wiring ELVSSH, respectively extending from the terminal TP1 and the terminal TPn of the terminal portion TER and electrically connected to the trunk wiring ELVSSM, so that the ELVSS voltage line surrounds the end portion of the display area DA except for a portion of the lower side of the display area DA in the figure.

[0012] Although not shown in the figure, the display area DA of the display device 100 includes a plurality of light-emitting elements, a plurality of thin film transistors, and a plurality of capacitor elements. These plurality of light-emitting elements are driven by a pixel circuit, which includes a thin film transistor and a capacitor element formed in a lower layer of the plurality of light-emitting elements. The plurality of light-emitting elements respectively include a common electrode as an upper layer and a reflective electrode as a lower layer. The above-mentioned common electrode needs to be electrically connected to the dry wiring ELVSSM of the ELVSS voltage line. Therefore, the above-mentioned common electrode forms the entire display area DA and a part of the frame area NDA, and in the frame area NDA, it is in direct contact with the metal layer CDL formed by the same layer and the same material as the above-mentioned reflective electrode, and the above-mentioned common electrode is electrically connected to the metal layer CDL. In addition, the metal layer CDL is also in direct contact with the dry wiring ELVSSM of the ELVSS voltage line, and the common electrode is electrically connected to the dry wiring ELVSSM of the ELVSS voltage line via the metal layer CDL.

[0013] In the display device 100 of such a structure, there are Figure 15 As shown in FIG. , the electrode pads PADR for analysis or inspection are prefabricated. The electrode pads PADR for analysis or inspection are formed from the same layer and material as the electrodes and wiring of the thin-film transistors and capacitors formed below the plurality of light-emitting elements. Therefore, the electrode pads PADR for analysis or inspection are covered by the metal layer CDL, which is formed from the same layer and material as the reflective electrodes.

[0014] Therefore, in order to analyze or inspect the electrode pad PADR provided by the display device 100, it is necessary to be able to confirm the position of the electrode pad PADR provided in a layer lower than the metal layer CDL through the metal layer CDL, wherein the metal layer CDL is in the same layer as the above-mentioned reflective electrode and is formed of the same material.

[0015] However, when a metal layer CDL formed of the same layer and material as the reflective electrode is formed on the electrode pad PADR, it is difficult to confirm the position of the underlying electrode pad PADR due to reflection from the metal layer CDL.

[0016] One aspect of the present disclosure has been made in view of the above-mentioned problems, and an object of the present disclosure is to provide a display device and a method for inspecting the display device that can easily confirm the position of an electrode pad for analysis or inspection.

[0017] Technical solutions to technical problems

[0018] In order to solve the above-mentioned problems, the display device of the present invention is a display device comprising: a display area; a frame area surrounding the display area; and a plurality of light-emitting elements arranged in the display area, wherein the display area and the frame area have a planarization film, and each of the plurality of light-emitting elements arranged on the planarization film has a first electrode, a light-emitting layer and a second electrode in sequence from the planarization film side, the display area has a first spacer between the plurality of light-emitting elements, and the frame area has: a second spacer; and a metal layer, which is electrically connected to the second electrode and is formed on the same layer as the first electrode from the same material as the first electrode, the metal layer has a plurality of openings, and the frame area has an island-shaped electrode pad, and the electrode pad overlaps with one or more of the plurality of openings via an insulating film that at least includes the planarization film.

[0019] In order to solve the above-mentioned problems, the inspection method of the display device of the present invention comprises: a display area; a frame area surrounding the display area; and a plurality of light-emitting elements arranged in the display area, the display area and the frame area having a planarization film, each of the plurality of light-emitting elements arranged on the planarization film having a first electrode, a light-emitting layer and a second electrode in sequence from the planarization film side, the frame area having a metal layer, which is electrically connected to the second electrode and is formed on the same layer as the first electrode from the same material as the first electrode, the metal layer having a plurality of openings, the frame area having an island-shaped electrode pad, the electrode pad overlapping with one or more of the plurality of openings via an insulating film including at least the planarization film, and the inspection method comprising a first step of confirming the position of the electrode pad from the opening.

[0020] Beneficial effects

[0021] According to one aspect of the present disclosure, a display device and a method for inspecting the display device can be provided, which can easily confirm the position of an electrode pad for analysis or inspection. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a diagram showing a schematic configuration of a display device according to Embodiment 1.

[0023] Figure 2 This is a diagram showing an example of the circuit configuration of the display device according to Embodiment 1.

[0024] Figure 3 It shows Figure 1 FIG. 1 is a diagram showing an example configuration of a pixel circuit of a display device according to Embodiment 1. FIG.

[0025] Figure 4 This is a plan view showing a portion of the display area of ​​the display device according to Embodiment 1.

[0026] Figure 5 yes Figure 4 A cross-sectional view taken along line WW' of the display device according to Embodiment 1 is shown.

[0027] Figure 6 yes Figure 1 A cross-sectional view of a display device according to Embodiment 1 is shown.

[0028] Figure 7 This is a plan view showing a metal layer included in the display device according to Embodiment 1.

[0029] Figure 8 (a) is Figure 7 The YY' cross-sectional view of the metal layer of the display device of the embodiment 1 shown in FIG. Figure 7 A cross-sectional view taken along line ZZ′ of a metal layer included in the display device according to Embodiment 1 is shown.

[0030] Figure 9 (a) and (b) are diagrams for explaining a step of removing an interlayer insulating film through an opening in a metal layer included in the display device of Embodiment 1 to expose an electrode pad. Figure 10 This is a diagram showing an example of points where routing wiring electrically connected to electrode pads is provided in a portion of pixel circuits of the display device according to Embodiment 1.

[0031] Figure 11 (a) and (b) are diagrams for explaining a step of removing the second spacer and the interlayer insulating film through the opening in the metal layer included in the display device of Embodiment 2 to expose the electrode pad.

[0032] Figure 12 This is a diagram showing a schematic configuration of a display device according to a third embodiment.

[0033] Figure 13 yes Figure 12 FIG. 1 is a partial enlarged view of the R5 ′ region of the display device according to the third embodiment.

[0034] Figure 14 It shows Figure 12 FIG. 1 is a diagram showing an example of a scanning-side driving circuit of a display device according to a third embodiment.

[0035] Figure 15 This is a diagram schematically showing the configuration of a conventional display device in which a metal layer is formed in a frame shape in a frame region. DETAILED DESCRIPTION

[0036] based on Figures 1 to 14 Hereinafter, for the sake of convenience, the same reference numerals may be used to designate a configuration having the same function as a configuration described in a specific embodiment, and the description thereof may be omitted.

[0037] [Implementation Method 1]

[0038] Figure 1 This is a diagram showing a schematic configuration of a display device 1 according to the first embodiment.

[0039] Figure 1 The display device 1 shown includes a display area DA, a frame area NDA surrounding the display area DA, a terminal portion TER provided at one end of the frame area NDA, an ELVDD voltage line as a first power supply voltage line, and an ELVSS voltage line as a second power supply voltage line.

[0040] The ELVDD voltage line includes: a trunk wiring ELVDDM, formed parallel to the terminal portion TER; a plurality of branch wirings (not shown), electrically connected to the trunk wiring ELVDDM and formed in the display area DA and the frame area NDA; and two lead wirings ELVDDH, extending from the terminal TP2 and the terminal TPn-1 of the terminal portion TER, respectively, and electrically connected to the trunk wiring ELVDDM.

[0041] On the other hand, the ELVSS voltage line includes: a trunk wiring ELVSSM, which is arranged in a frame shape in the border area NDA; two lead wirings ELVSSH, which extend from the terminal TP1 and the terminal TPn of the terminal portion TER respectively and are electrically connected to the trunk wiring ELVSSM, so that the ELVSS voltage line surrounds the end of the display area DA except for a part of the lower side of the display area DA in the figure.

[0042] Figure 1 It is a cross-sectional view showing a schematic configuration of the display area DA of the display device 1 .

[0043] like Figure 5 As shown, in the display area DA of the display device 1, on the base substrate 10, there are, in sequence, an adhesive layer 11, a resin layer 12, a barrier layer 3, a thin film transistor layer (TFT layer) 4, a light-emitting element X (a light-emitting element XR that emits red, a light-emitting element XG that emits green, a light-emitting element XB that emits blue) and a sealing layer 6.

[0044] Examples of the material of the base substrate 10 include polyethylene terephthalate (PET), but the material is not limited thereto.

[0045] Examples of the adhesive layer 11 include OCA (Optical Clear Adhesive) and OCR (Optical Clear Resin), but the adhesive layer 11 is not limited thereto.

[0046] Examples of the material of the resin layer 12 include polyimide resin, epoxy resin, and polyamide resin, but are not limited thereto.

[0047] The barrier layer 3 is a layer that prevents moisture and impurities from reaching various transistors, such as the second initialization transistor T7, and the light-emitting element X (the red light-emitting element XR, the green light-emitting element XG, and the blue light-emitting element XB). For example, it can be composed of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a stacked film thereof formed by CVD. Furthermore, in this embodiment, the display device 1 is described as having a circuit configuration including the second initialization transistor T7. However, the present invention is not limited to this embodiment, and the display device 1 may also have a circuit configuration that does not include the second initialization transistor T7.

[0048] Transistors such as the second initialization transistor T7 and capacitor elements are provided on the upper layer of the resin layer 12 and the barrier layer 3. The thin film transistor layer 4 including the transistors such as the second initialization transistor T7 and capacitor elements includes: a semiconductor film 15; an inorganic insulating film (gate insulating film) 16 which is a layer above the semiconductor film 15; a gate electrode GE which is a layer above the inorganic insulating film 16; an inorganic insulating film (first inorganic insulating film) 18 which is a layer above the gate electrode GE; an opposing electrode CE of the capacitor element which is a layer above the inorganic insulating film 18; an inorganic insulating film (second inorganic insulating film) 20 which is a layer above the opposing electrode CE of the capacitor element; a layer SH which is a layer above the inorganic insulating film 20 which forms a source electrode, a drain electrode, and their wiring; and an interlayer insulating film (planarization film) 21 which is a layer above the layer SH which forms the source electrode, the drain electrode, and their wiring.

[0049] In addition, the capacitor element is composed of an opposing electrode CE, an inorganic insulating film 18, and a capacitor electrode, wherein the opposing electrode CE of the capacitor element is formed directly above the inorganic insulating film 18, and the capacitor electrode is formed directly below the inorganic insulating film 18, and is the same layer as the layer forming the gate electrode GE, and is formed in a manner overlapping with the opposing electrode CE of the capacitor element.

[0050] Transistors such as the second initialization transistor T7 are configured to include the semiconductor film 15 , the inorganic insulating film 16 , the gate electrode GE, the inorganic insulating film 18 , the inorganic insulating film 20 , a source electrode, and a drain electrode.

[0051] The semiconductor film 15 is composed of, for example, low-temperature polysilicon (LTPS) or an oxide semiconductor.

[0052] The gate electrode GE, the counter electrode CE of the capacitor element, the layer SH forming the source electrode and the drain electrode and their wiring are composed of, for example, a metal single-layer film or a stacked film including at least one of aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), copper (Cu) and silver (Ag).

[0053] The inorganic insulating films 16, 18, and 20 can be made of, for example, silicon oxide (SiO x ) film, silicon nitride (SiN x ) film, silicon oxynitride film or a stacked film thereof.

[0054] The interlayer insulating film (planarization film) 21 can be made of a coatable photosensitive organic material such as polyimide resin or acrylic resin.

[0055] The red light-emitting element XR includes a first electrode 22 located above the interlayer insulating film 21, a functional layer 24R including a red light-emitting layer located above the first electrode 22, and a second electrode 25 located above the functional layer 24R. The green light-emitting element XG includes a first electrode 22 located above the interlayer insulating film 21, a functional layer 24G including a green light-emitting layer located above the first electrode 22, and a second electrode 25 located above the functional layer 24G. The blue light-emitting element XB includes a first electrode 22 located above the interlayer insulating film 21, a functional layer 24B including a blue light-emitting layer located above the first electrode 22, and a second electrode 25 located above the functional layer 24B.

[0056] An edge cover 23 is formed on the interlayer insulating film 21 to cover the edge of the first electrode 22 .

[0057] The sub-pixel SP displaying red includes the light-emitting element XR, and therefore has a functional layer 24R including a red light-emitting layer. The sub-pixel SP displaying green includes the light-emitting element XG, and therefore has a functional layer 24G including a green light-emitting layer. The sub-pixel SP displaying blue includes the light-emitting element XB, and therefore has a functional layer 24B including a blue light-emitting layer.

[0058] The display device 1 includes an island-shaped first electrode 22, functional layers 24R, 24G, and 24B including light-emitting layers of respective colors, and a second electrode 25 for each subpixel SP. The edge cover 23 can be made of a coatable photosensitive organic material such as polyimide resin or acrylic resin.

[0059] The functional layers 24R, 24G, 24B are configured, for example, to sequentially stack a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer from the lower layer side. The light emitting layer is formed in an island shape for each sub-pixel SP by a vapor deposition method or an inkjet method, but the other layers can also be common layers in an entire surface shape. Further, it is also configured not to form one or more of the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer.

[0060] The light emitting elements XR, XG, XB can be, for example, OLEDs (Organic Light Emitting Diodes) including an organic layer as a light emitting layer, or QLEDs (Quantum Dot Light Emitting Diodes) including a quantum dot layer as a light emitting layer.

[0061] The first electrode 22 is configured, for example, by a layer stack of ITO (Indium Tin Oxide) and an Ag-containing alloy, but is not particularly limited as long as conductivity and light reflectivity can be ensured. Further, the second electrode 25 can be configured by a light-transmissive conductive material such as ITO (Indium Tin Oxide), IZO (Indium / Zinc Oxide), or the like, but is not particularly limited as long as conductivity and light transmissivity can be ensured.

[0062] The first electrode 22 is provided for each sub-pixel SP and is electrically connected to the drain electrode of the second initialization transistor T7. Further, the second electrode 25 is a common electrode provided commonly to all of the sub-pixels SP. Further, each sub-pixel SP is driven by the second initialization transistor T7. Further, the second electrode 25, which is the common electrode provided commonly to all of the sub-pixels SP, is electrically connected to the common line ELVSSM of the ELVSS voltage line via the metal layer CDL1. Figure 1 The metal layer CDL1 is electrically connected to the ELVSS voltage line.

[0063] The sealing layer 6 has light transmissivity and includes a first inorganic sealing film 26 covering the second electrode 25, an organic sealing film 27 formed on the upper side of the first inorganic sealing film 26, and a second inorganic sealing film 28 covering the organic sealing film 27. The sealing layer 6 covering the light emitting elements XR, XG, XB prevents penetration of foreign matter such as water and oxygen into the light emitting elements XR, XG, XB.

[0064] The first inorganic sealing film 26 and the second inorganic sealing film 28 can each be configured, for example, by a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a layer stack of these, formed by CVD. The organic sealing film 27 is a light-transmissive organic film thicker than the first inorganic sealing film 26 and the second inorganic sealing film 28, and can be configured by a photosensitive organic material such as a polyimide resin or an acrylic resin that can be applied.

[0065] In this embodiment, a sealing layer 6 composed of one organic film and two inorganic films and having an organic sealing film 27 between a first inorganic sealing film 26 and a second inorganic sealing film 28 is taken as an example for explanation, but the present invention is not limited to this. The sealing layer 6 can be formed by only one or more inorganic films or one or more organic films, or can be formed by two or more inorganic films and two or more organic films.

[0066] In this embodiment, the display device 1 is described as a flexible display device, in which a base substrate 10, which is a flexible substrate, is attached to a resin layer 12 via an adhesive layer 11. However, the present invention is not limited to this embodiment. For example, the step of attaching the base substrate 10, which is a flexible substrate, via the adhesive layer 11 can be omitted, and the resin layer 12 can be used directly as the flexible substrate. Alternatively, the display device 1 can be a non-flexible display device. In this case, for example, the base substrate 10, adhesive layer 11, and resin layer 12 can be omitted, and the barrier layer 3 can be formed directly on a glass substrate, which is a non-flexible substrate.

[0067] like Figure 5 As shown, in the display area DA of the display device 1, there are a plurality of light-emitting elements XR, XG, XB, a plurality of transistors such as a second initialization transistor T7, and a plurality of capacitor elements. The plurality of light-emitting elements XR, XG, and XB are formed by a plurality of transistors such as the second initialization transistor T7 and a pixel circuit PK including a capacitor element formed in a layer lower than the plurality of light-emitting elements XR, XG, and XB (see Figure 3 )drive.

[0068] As described above, each of the plurality of light emitting elements XR, XG, and XB includes the second electrode 25 as an upper layer and the first electrode 22 as a lower layer. Figure 1 The dry wiring ELVSSM of the ELVSS voltage line shown is electrically connected, so the second electrode 25 is formed to the entire display area DA and a part of the frame area NDA. In the frame area NDA, the first electrode 25 is in direct contact with the metal layer CDL1, and the second electrode 25 is electrically connected to the metal layer CDL1. The metal layer CDL1 is formed of the same layer and the same material as the first electrode 22. In addition, the metal layer CDL1 is also in direct contact with the dry wiring ELVSSM of the ELVSS voltage line, and the second electrode 25 as a common electrode is electrically connected to the dry wiring ELVSSM of the ELVSS voltage line via the metal layer CDL1. In addition, as Figure 1 As shown in the enlarged portion of the metal layer CDL1 indicated by the dotted line R, the metal layer CDL1 has a plurality of openings K. The plurality of openings KA may be provided in the entire metal layer CDL1 or in a portion of the metal layer CDL1.

[0069] Figure 2 This is a diagram showing a circuit configuration example of the display device 1 according to the first embodiment.

[0070] like Figure 2 As shown in the figure, as a driving circuit for driving the light-emitting elements X (the light-emitting element XR that emits red light, the light-emitting element XG that emits green light, and the light-emitting element XB that emits blue light) in the display area DA, the display device 1 includes a display control circuit 30, a data signal line driving circuit 31, a scanning side driving circuit 32 (including a scanning signal line driving circuit and a light-emitting control circuit), and a power supply circuit 33.

[0071] The ELVDD voltage line includes a trunk wiring ELVDDM, a plurality of branch wirings ELVDDE1 to ELVDDEn electrically connected to the trunk wiring ELVDDM, and a terminal TP2 and a terminal TPn-1 (at the terminal portion TER) respectively. Figure 1 The two lead wirings ELVDDH (in the figure) extend and are electrically connected to the trunk wiring ELVDDM Figure 1 (see figure).

[0072] In addition, in this embodiment, an example of providing two routing wirings ELVDDH and two routing wirings ELVSSH is described, but the present invention is not limited thereto. The number of routing wirings ELVDDH and ELVSSH may be one, or three or more.

[0073] In the display control circuit 30, various signals Sin including image signals are supplied from the outside, a signal Scd for controlling the data signal lines D1 to Dm is supplied from the display control circuit 30 to the data signal line driving circuit 31, a clock signal Scs and the like are supplied from the display control circuit 30 to the scanning side driving circuit 32, the scanning signal line driving circuit supplies scanning signals to the scanning signal lines G0 to Gn, and the light-emitting control circuit supplies light-emitting signals to the light-emitting control lines E1 to En.

[0074] The power supply circuit 33 is connected to the Figure 1 The terminal TP2 and the terminal TPn-1 of the terminal portion TER shown in FIG. 1 and the lead wiring ELVDDH extending from the terminal TP2 and the terminal TPn-1 of the terminal portion TER, respectively, supply the ELVDD voltage to the trunk wiring ELVDDM. Furthermore, the ELVDD voltage is supplied to the plurality of branch wirings ELVDDE1 to ELVDDEn via the trunk wiring ELVDDM. Figure 1 The terminal TP1 and the terminal TPn of the terminal portion TER shown in FIG. 1 and the lead wiring ELVSSH extending from the terminal TP1 and the terminal TPn of the terminal portion TER, respectively, to the trunk wiring ELVSSM (at Figure 1Furthermore, the power supply circuit 33 also supplies the ELVSS voltage to the second initialization power supply line Ini (see FIG. Figure 3 ) supplies initialization voltage.

[0075] like Figure 2 As shown, the display area DA includes N×M light-emitting elements X, each forming a light-emitting unit Pix. This embodiment illustrates a case where the number of data signal lines D1 to Dm, the number of branch lines ELVDDE1 to ELVDDEn, and the number M of columns of light-emitting elements X forming a light-emitting unit Pix are identical, but the present invention is not limited to this embodiment. This embodiment illustrates a case where the number of emission control lines E1 to En is identical to the number N of rows of light-emitting elements X forming a light-emitting unit Pix, and the number of scanning signal lines G0 to Gn is one more than the number of emission control lines E1 to En and the number N of rows of light-emitting elements X forming a light-emitting unit Pix, but the present invention is not limited to this embodiment.

[0076] In the display device 1 , the data signal line drive circuit 31 is external, and each terminal of the data signal line drive circuit 31 is electrically connected to terminals other than the terminals TP1 , TP2 , TPn- 1 , and TPn of the terminal portion TER.

[0077] In addition, in the display device 1, the scanning side driving circuit 32 is monolithically formed in the frame area NDA, but is not limited to this. The scanning side driving circuit 32 can be monolithically formed in the display area DA or dispersed in the frame area NDA and the display area DA to form a single piece.

[0078] Figure 3 Yes Figure 1 A circuit diagram of an example of a pixel circuit PK of the display device 1 shown.

[0079] Figure 1 In the display area DA shown in FIG. 1 , a light-emitting element X and a pixel circuit PK are provided for each sub-pixel serving as a light-emitting unit. Figure 3 The pixel circuits PK shown indicate the pixel circuits PK in the n-th row and m-th column, but also include a portion of the pixel circuits PK in the n-1-th row and m-th column.

[0080] Figure 3The pixel circuit PK shown includes: a capacitor element C; a first initialization transistor T1, which is connected between the ELVDD voltage line ELVDD (specifically, the branch line ELVDDEn) and the control terminal of the driving transistor T4, and the gate terminal is connected to the scanning signal line Gn-1 of the previous stage (n-1 stage); a threshold control transistor T2, which is connected between the second conduction terminal CT2 of the driving transistor T4 and the control terminal, and the gate terminal is connected to the scanning signal line Gn of the current stage (n stage); a write control transistor T3, which is connected between the data signal line Dm and the first conduction terminal CT1 of the driving transistor T4, and the gate terminal is connected to the scanning signal line Gn of the current stage (n stage). n connection; a driving transistor T4, which controls the current of the light-emitting element X; and a power control transistor T5, which is connected between the ELVDD voltage line ELVDD (specifically, the branch line ELVDDEn) and the second conduction terminal CT2 of the driving transistor T4, and the gate terminal is connected to the light-emitting control line En; a light-emitting control transistor T6, which is connected between the first conduction terminal CT1 of the driving transistor T4 and the first electrode of the light-emitting element X, and the gate terminal is connected to the light-emitting control line En; and a second initialization transistor T7, which is connected between the second initialization power line Ini and the first electrode of the light-emitting element X, and the gate terminal is connected to the scanning signal line Gn of this level (n level).

[0081] In addition, in this embodiment, the case where the ELVDD voltage line ELVDD (specifically, the branch line ELVDDEn) also serves as the first initialization power line is cited as an example for explanation, but the present invention is not limited thereto and may also be provided separately from the ELVDD voltage line ELVDD (specifically, the branch line ELVDDEn).

[0082] In this embodiment, the same voltage as the ELVSS voltage line ELVSS is input to the second initialization power line Ini, but the present invention is not limited thereto. A different voltage, ie, a voltage that turns off the light emitting element X, may be input.

[0083] The capacitor C is connected to the control terminal of the driving transistor T4 and holds the data signal on the data signal line Dm. In addition, the second initialization transistor T7 may also be connected to the scanning signal line Gn-1 of the previous stage (n-1 stage).

[0084] Figure 4 This is a plan view showing a portion of the display area DA of the display device 1 according to the first embodiment.

[0085] like Figure 4As shown, the display area DA of the display device 1 includes first spacers PSI between the plurality of light-emitting elements XR, XG, and XB, each including functional layers 24R, 24G, and 24B. The number and placement of the first spacers PSI are not particularly limited, as long as they are disposed between the light-emitting elements XR, XG, and XB.

[0086] In addition, the first spacer PSI may be formed using the same material as the above-mentioned edge cover 23 , and may be formed of a coatable photosensitive organic material such as polyimide resin or acrylic resin, for example.

[0087] In addition, when the first spacer PSI and the edge mask 23 are formed using the same material, the first spacer PSI and the edge mask 23 may be simultaneously formed in a single exposure / development process.

[0088] Figure 6 yes Figure 1 FIG. 1 is a cross-sectional view of a portion of the display device 1 according to the first embodiment.

[0089] like Figure 6 As shown, the data signal line Dm of the display area DA, the trunk wiring ELVDDM of the frame area NDA, and the trunk wiring ELVSSM of the frame area NDA are all formed by the layer SH forming the source electrode, drain electrode and wiring of the second initialization transistor T7.

[0090] Furthermore, the second electrode 25, serving as a common electrode, is formed outside the trench CT provided in the frame area NDA. Thus, the second electrode 25 provided in the frame area NDA, that is, in the area between the trench CT and the display area DA, and within the trench CT, has its extension electrically connected to the metal layer CDL1, which is formed from the same layer and material as the first electrode 22. Then, inside the second bank SB, which is formed further away from the display area DA than the first bank FB, the second electrode 25, serving as a common electrode, is electrically connected to the main wiring line ELVSSM of the ELVSS voltage line via the metal layer CDL1.

[0091] The material of the second electrode 25 and the extension of the second electrode 25 is not particularly limited as long as conductivity and light transmittance are ensured. For example, silver, silver alloy (AgMg, etc.), or aluminum formed with a film thickness that can ensure light transmittance can be used.

[0092] The trench CT is a groove formed so as to surround the display area DA in a frame shape, and the first bank FB and the second bank SB are protrusions formed so as to surround the display area DA in a frame shape.

[0093] like Figure 6As shown, in the case of the display device 1, an example is given in which the metal layer CDL1 extends from the area between the groove CT and the display area DA in the frame area NDA to the area overlapping with the second bank SB, but it is not limited to this. The metal layer CDL1 only needs to be formed in the frame area NDA. In addition, in this embodiment, the following cases are cited as examples for explanation: an unillustrated electrode pad disposed between the groove CT and the display area DA overlaps with the opening KA of the metal layer CDL1 disposed between the groove CT and the display area DA, and an unillustrated electrode pad disposed between the groove CT and the bank (the first bank FB or the second bank SB) overlaps with the opening KA of the metal layer CDL1 disposed between the groove CT and the bank (the first bank FB or the second bank SB), but it is not limited to this.

[0094] like Figure 6 As shown, the second electrode 25 is provided on the metal layer CDL1 and the opening KA of the metal layer CDL1 between the display area DA and the trench CT. An electrode pad (not shown) provided between the display area DA and the trench CT overlaps with the opening KA provided between the display area DA and the trench CT and with the extension of the second electrode 25 provided between the display area DA and the trench CT. However, as described above, since the extension of the second electrode 25 is light-transmissive, the position of the electrode pad can be easily confirmed when analyzing or inspecting the display device 1.

[0095] In addition, if Figure 6 As shown, between the trunk wiring ELVDDM and the trunk wiring ELVSSM, there exists a control circuit formation region GDMC where various transistors including the control transistor T8 and the control transistor T9 are monolithically formed.

[0096] Furthermore, the control transistor T8 and the control transistor T9 are electrically connected to each other via the connection wiring CH, forming a scanning side drive circuit 32 ( Figure 2 (shown in the figure). The control transistors T8 and T9 are examples, and each is composed of a plurality of control transistors. In this embodiment, the scanning signal line drive circuit is provided on the display area DA side of the trench CT, that is, on the control transistor T8 side, and the light emission control circuit is provided on the opposite side, that is, on the control transistor T9 side. However, this is not limiting.

[0097] In addition, if Figure 6As shown, the capacitor element C included in the pixel circuit of the display area DA is composed of an opposing electrode CE, an inorganic insulating film 18, and a capacitor electrode CE', wherein the opposing electrode CE is formed directly above the inorganic insulating film 18, and the capacitor electrode CE' is formed directly below the inorganic insulating film 18, in the same layer as the layer forming the gate electrode GE, and is formed in a manner overlapping with the opposing electrode CE of the capacitor element.

[0098] Furthermore, a second spacer PSO is provided in the frame area NDA, overlapping with the opening KA of the metal layer CDL1. Like the first spacer PSI, the second spacer PSO can also be formed of the same material as the edge cover 23, such as a photosensitive organic material that can be coated, such as polyimide resin or acrylic resin.

[0099] Furthermore, when the first spacer PSI, the second spacer PSO, and the edge mask 23 are formed using the same material, the first spacer PSI, the second spacer PSO, and the edge mask 23 may be simultaneously formed in a single exposure / development step.

[0100] Furthermore, the first spacer PSI and the second spacer PSO support a vapor deposition mask used, for example, when vapor depositing light-emitting layers of various colors included in the functional layers 24R, 24G, and 24B.

[0101] Figure 7 This is a plan view showing the metal layer CDL1 included in the display device according to Embodiment 1.

[0102] In addition, Figure 7 In the figure, the metal layer CDL1, the second spacer PSO and the interlayer insulating film 21 are not shown. Figure 5 and Figure 6 The sealing layer 6 is composed of a first inorganic sealing film 26 , an organic sealing film 27 , and a second inorganic sealing film 28 .

[0103] like Figure 7 As shown, the metal layer CDL1 has a plurality of openings KA. In the display device 1 having such a structure, for example, electrode pads PAD1 to PAD7 for analysis or inspection are prepared in advance.

[0104] The island-shaped electrode pads PAD1 to PAD7 provided in the frame area NDA are respectively provided so as to overlap with the plurality of openings KA of the metal layer CDL1. In this embodiment, the case where the island-shaped electrode pads PAD1 to PAD7 are respectively formed smaller than the plurality of openings KA of the metal layer CDL1 and one of the island-shaped electrode pads PAD1 to PAD7 corresponds to one of the openings KA of the metal layer CDL1 is cited as an example for explanation, but the present invention is not limited thereto. The island-shaped electrode pads PAD1 to PAD7 may be respectively formed larger than the plurality of openings KA of the metal layer CDL1, and one of the island-shaped electrode pads PAD1 to PAD7 may overlap with two or more of the plurality of openings KA of the metal layer CDL1.

[0105] In addition, if Figure 7 As shown, second spacers PSO are provided in the openings KA of the metal layer CDL1 that do not overlap with the island-shaped electrode pads PAD1 to PAD7. On the other hand, second spacers PSO are not provided in the openings KA of the metal layer CDL1 that overlap with the island-shaped electrode pads PAD1 to PAD7. In other words, the openings KA that overlap with the electrode pads PAD1 to PAD7 do not overlap with the second spacers PSO.

[0106] Figure 8 (a) is Figure 7 A cross-sectional view of the metal layer CDL1 taken along line YY' of the display device according to the first embodiment is shown. Figure 8 (b) is Figure 7 FIG. 1 is a cross-sectional view taken along line ZZ′ of a metal layer CDL1 included in the display device according to Embodiment 1. FIG.

[0107] In addition, Figure 8 (a) and Figure 8 In (b), the metal layer CDL1, the second spacer PSO and the interlayer insulating film 21 are not shown. Figure 5 and Figure 6 The sealing layer 6 is composed of a first inorganic sealing film 26 , an organic sealing film 27 , and a second inorganic sealing film 28 .

[0108] like Figure 8 As shown in (a), the second spacer PSO is provided in the opening KA of the metal layer CDL1 that does not overlap with the island-shaped electrode pads PAD1 to PAD7. Figure 8As shown in FIG. 1( b ), among the plurality of openings KA of the metal layer CDL1 , for example, the openings KA overlapping the island-shaped electrode pads PAD1 and PAD2 , no second spacer PSO is provided. That is, the openings KA overlapping the electrode pads PAD1 and PAD2 do not overlap with the second spacer PSO.

[0109] in addition, Figure 8 (a) and Figure 8 The electrode and wiring forming layer CE in (b) is formed directly above the inorganic insulating film 18 and the counter electrode CE (see Figure 5 as well as Figure 6 ) is formed of the same layer and the same material, and the layer GE' forming the electrode and the wiring is the same as the gate electrode GE formed just above the inorganic insulating film 16 (see Figure 5 ))The same layer and the layers formed with the same material.

[0110] Figure 8 (a) and Figure 8 The electrode and wiring forming layer CE″ and the electrode and wiring forming layer GE′ shown in (b) are control circuits and wirings formed monolithically in the frame area NDA of the display device 1 .

[0111] Figure 9 (a) and Figure 9 (b) is a diagram for illustrating an inspection method of the display device 1, which includes: a first process of confirming the positions of the electrode pads PAD1 and PAD2 through the opening portion KA of the metal layer CDL1 possessed by the display device 1 of embodiment 1, and a second process of removing the interlayer insulating film 21 through the opening portion KA of the metal layer CDL1 to expose the electrode pads PAD1 and PAD2.

[0112] in addition, Figure 9 (a) and Figure 9The configuration position of the electrode pads PAD1 and PAD2 shown in (b) can be set on the display area DA side of the groove in the frame area NDA, or can be set on the side opposite to the display area DA side of the groove in the frame area NDA. For example, in the case where the electrode pads PAD1 and PAD2 are set on the display area DA side of the groove, as described above, in the present embodiment, a scanning signal line driving circuit is formed on the display area DA side of the groove, so the node of the scanning signal line driving circuit can be directly measured using the electrode pads PAD1 and PAD2 set on the display area DA side of the groove. On the other hand, for example, in the case where the electrode pads PAD1 and PAD2 are set on the side opposite to the display area DA side of the groove, as described above, in the present embodiment, a light emitting control circuit is formed on the side opposite to the display area DA side of the groove, so the node of the light emitting control circuit can be directly measured using the electrode pads PAD1 and PAD2 set on the side opposite to the display area DA side of the groove. However, on the display area DA side of the groove, as described above Figure 6 As shown, an extension of second electrode 25 is formed. Therefore, in order to perform measurements using electrode pads PAD1 and PAD2 located on the display area DA side of the trench, second electrode 25 must be removed. Therefore, electrode pads PAD1 and PAD2 are preferably located in an area where the extension of second electrode 25 is not formed, i.e., on the side of the trench opposite the display area DA. Thus, when electrode pads PAD1 and PAD2 are located on the side of the trench opposite the display area DA, nodes to be measured in pixel circuit PK, scanning signal line driver circuitry, and the like can be connected to electrode pads PAD1 and PAD2 located on the side of the trench opposite the display area DA via routing wiring, thereby enabling measurement of the potential of the corresponding node. Furthermore, since the light emission control circuit is located on the side of the trench opposite the display area DA, nodes of the light emission control circuit can be measured directly by connecting them to electrode pads PAD1 and PAD2 without routing wiring. In addition, in this embodiment, the case where the scanning signal line driving circuit is on the display area DA side of the groove is described as an example, but it is not limited to this. The scanning signal line driving circuit can also be set on the side of the groove opposite to the display area DA side. In this case, the nodes of the scanning signal line driving circuit can also be set as electrode pads PAD1 and PAD2 without routing wiring, so that the measurement can be performed directly.

[0113] In addition, Figure 9 (a) and Figure 9 In (b), the metal layer CDL1, the second spacer PSO and the interlayer insulating film 21 are not shown. Figure 5 and Figure 6The sealing layer 6 is composed of a first inorganic sealing film 26 , an organic sealing film 27 , and a second inorganic sealing film 28 .

[0114] like Figure 9 (a) and Figure 9 As shown in (b), among the plurality of openings KA of the metal layer CDL1, for example, the openings KA overlapping with the island-shaped electrode pads PAD1 and PAD2, the second spacer PSO is not provided. That is, the openings KA overlapping with the electrode pads PAD1 and PAD2 do not overlap with the second spacer PSO. By irradiating the openings KA overlapping with the island-shaped electrode pads PAD1 and PAD2 with a laser, for example, the interlayer insulating film 21 and the sealing layer 6 ( Figure 5 Figure), it is possible to form an interlayer insulating film 21 and a sealing layer 6 ( Figure 5 (as shown in the figure) forms openings PAD1KA and PAD2KA.

[0115] As mentioned above, Figure 9 (a) and Figure 9 The inspection method of the display device 1 shown in (b) includes: inspecting the electrode pads PAD1, PAD2, the interlayer insulating film 21, the opening KA of the metal layer CDL1 and the sealing layer 6 ( Figure 5 The interlayer insulating film 21 is removed through the opening KA of the metal layer CDL1 in the overlapping portion (shown in the figure) to expose the electrode pads PAD1 and PAD2.

[0116] In this embodiment, the sealing layer 6 ( Figure 5 The case of using laser when removing the sealing layer 6 (shown in the figure) and the interlayer insulating film 21 is described as an example, but it is not limited to this. For example, a needle can be used to gradually remove the sealing layer 6 ( Figure 5 (shown) and an interlayer insulating film 21.

[0117] As described above, in the display device 1 of embodiment 1, the electrode pads PAD1 and PAD2 overlap with the opening KA of the metal layer CDL1 via the interlayer insulating film 21. Since there is no second spacer PSO, the positions of the electrode pads PAD1 and PAD2 can be easily confirmed, and there is no need to remove the metal layer CDL1 when analyzing or inspecting the display device 1.

[0118] In addition, by Figure 5 and Figure 6 The sealing layer 6 composed of the first inorganic sealing film 26 , the organic sealing film 27 , and the second inorganic sealing film 28 transmits light from the light emitting elements XR, XG, and XB, and therefore does not adversely affect the position confirmation of the electrode pads PAD1 and PAD2 .

[0119] The inspection method of the display device 1 according to the first embodiment includes: inspecting the electrode pads PAD1, PAD2, the interlayer insulating film 21, the opening KA of the metal layer CDL1 and the sealing layer 6 ( Figure 5 The first step of confirming the positions of the electrode pads PAD1 and PAD2 through the opening KA of the metal layer CDL1 at the overlapping portion (shown in the figure), thereby easily confirming the positions of the electrode pads PAD1 and PAD2. In addition, the inspection method of the display device 1 of embodiment 1 also includes a second step of removing the interlayer insulating film 21 through the opening KA of the metal layer CDL1 to expose the electrode pads PAD1 and PAD2. Therefore, when analyzing or inspecting the display device 1, it is not necessary to remove the metal layer CDL1. In addition, the electrode pads PAD1 and PAD2 are exposed so that a probe of an analysis device or an inspection device can contact the exposed electrode pads PAD1 and PAD2.

[0120] In this embodiment, the electrode pads PAD1 to PAD7 are formed by Figure 5 and Figure 6 In the case where the drain electrodes of the second initialization transistor T7 and other transistors and their wiring are formed on the layer SH, since the interlayer insulating film (planarization film) 21 is a layer directly above the layer SH on which the drain electrodes of the second initialization transistor T7 and other transistors and their wiring are formed, if the sealing layer 6 ( Figure 5 The electrode pads PAD1 to PAD7 are exposed when the interlayer insulating film (shown in the figure) and the interlayer insulating film (planarizing film) 21 are removed. However, the electrode pads PAD1 to PAD7 may also be exposed when the interlayer insulating film (shown in the figure) and the interlayer insulating film (planarizing film) 21 are removed. Figure 5 as well as Figure 6 The counter electrode CE formed directly below the inorganic insulating film (second inorganic insulating film) 20 shown in FIG. 1 is formed of the same layer and the same material. In this case, if the sealing layer 6 ( Figure 5 The electrode pads PAD1 to PAD7 are exposed by forming an interlayer insulating film (planarizing film) 21 and an inorganic insulating film (second inorganic insulating film) 20. However, the present invention is not limited thereto. For example, the electrode pads PAD1 to PAD7 may be formed with the interlayer insulating film (planarizing film) 21 and the inorganic insulating film (second inorganic insulating film) 20. Figure 5 The gate electrode GE formed directly below the inorganic insulating film (first inorganic insulating film) 18 is formed in the same layer and made of the same material. In this case, if the sealing layer 6 ( Figure 5 ), the interlayer insulating film (planarizing film) 21, the inorganic insulating film (second inorganic insulating film) 20, and the inorganic insulating film (first inorganic insulating film) 18, the electrode pads PAD1 to PAD7 are exposed.

[0121] In addition, in this embodiment, Figure 5The case where the sealing layer 6 is also removed to expose the electrode pads PAD1 to PAD7 is described as an example, but is not limited to this. For example, before the process of forming the sealing layer 6, that is, before the display device 1 becomes a finished product, an inspection is required. In the case of exposing the electrode pads PAD1 to PAD7, the sealing layer 6 does not need to be removed.

[0122] Figure 10 This is a diagram showing an example of nodes that can be electrically connected to the electrode pads PAD11 to PAD26 via the routing wirings HM11 to HM26 in the pixel circuit PK of the display device 1 according to the first embodiment.

[0123] like Figure 10 As shown, by forming routing wiring HM11 to HM26 from a portion of nodes in the pixel circuit PK of the display device 1, the wiring of the portion of the pixel circuit PK of the display device 1 can be extended to the location where the electrode pads PAD11 to PAD26 are located. Therefore, the electrode pads PAD11 to PAD26 can be used to measure the nodes of the portion of the pixel circuit PK of the display device 1. The device may also include an electrode pad PAD11 electrically connected to the scanning signal line Gn-1 included in the pixel circuit PK of the display device 1, and an electrode pad PAD12 electrically connected to the scanning signal line Gn included in the pixel circuit PK of the display device 1. In addition, it may also include: an electrode pad PAD13 electrically connected to the light-emitting control line En included in the pixel circuit PK of the display device 1, an electrode pad PAD14 electrically connected to the second initialization power line Ini included in the pixel circuit PK of the display device 1, an electrode pad PAD15 electrically connected to the ELVDD voltage line ELVDD (specifically, the branch line ELVDDEn) included in the pixel circuit PK of the display device 1, an electrode pad PAD16 electrically connected to the data signal line Dm included in the pixel circuit PK of the display device 1, and an electrode pad PAD17 electrically connected to the ELVSS voltage line ELVSS included in the pixel circuit PK of the display device 1.

[0124] Furthermore, electrode pads PAD18 to PAD26 electrically connected to nodes of various transistors T1 to T7 , the capacitor C, and the light-emitting element X included in the pixel circuit PK of the display device 1 may be included.

[0125] in addition, Figure 10 This diagram shows an example of nodes electrically connectable via each of the electrode pads PAD11 to PAD26 and each of the routing wirings HM11 to HM26 in the pixel circuit PK of the display device 1 , and the nodes electrically connectable via the electrode pads and the routing wirings are not limited to this.

[0126] also, Figure 10The electrode pads PAD11 to PAD26 shown in the figure may be arranged on the display area DA side of the groove in the frame area NDA, or may be arranged on the side opposite to the display area DA side of the groove in the frame area NDA.

[0127] For example, if the electrode pad PAD11 electrically connected to the scan signal line Gn-1 and the electrode pad PAD12 electrically connected to the scan signal line Gn are located on the display area DA side of the groove, as described above, the scan signal line driver circuit is formed on the display area DA side of the groove. Therefore, the nodes of the scan signal line driver circuit can be directly measured using the electrode pads PAD11 and PAD12 located on the display area DA side of the groove. Furthermore, if the electrode pad PAD13 electrically connected to the emission control line En is located on the side of the groove opposite to the display area DA side, as described above, the emission control circuit is formed on the side of the groove opposite to the display area DA side. Therefore, the nodes of the emission control circuit can be directly measured using the electrode pad PAD13 located on the side of the groove opposite to the display area DA side.

[0128] As described above, the display device 1 may include, for example, Figure 2 The electrode pads shown are electrically connected to a node of the scanning-side drive circuit (drive circuit) 32. For example, the electrode pads may be connected to a first output line (not shown) within the scanning-side drive circuit (drive circuit) 32, the first output line being electrically connected to any one of the scanning signal lines G0 to Gn of the pixel circuit PK included in the display area DA. Furthermore, the electrode pads may be connected to a second output line (not shown) within the scanning-side drive circuit (drive circuit) 32, the second output line being electrically connected to any one of the emission control lines E1 to En of the pixel circuit PK included in the display area DA.

[0129] Therefore, when electrode pads electrically connected to a plurality of locations of the pixel circuits PK and the scanning-side driving circuit (driving circuit) 32 included in the display device 1 are provided, analysis or inspection of the display device 1 becomes easier.

[0130] In addition, in this embodiment, a plurality of electrode pads are dispersedly provided in the frame area NDA of the display device 1. Figure 1 The cases of the R1 region, the R2 region, and the R3 region are described as examples, but the plurality of electrode pads only need to be provided in the frame area NDA of the display device 1 and the area is not particularly limited.

[0131] Furthermore, it is not necessary to measure all pixel circuits PK included in the display device 1 , and wiring may be drawn from some pixel circuits PK or from dummy pixel circuits for evaluation having the same structure as the pixel circuits PK and connected to the electrode pads.

[0132] [Implementation Method 2]

[0133] Next, based on Figure 11 (a) and Figure 11 (b) describes Embodiment 2 of the present invention. In the display device 1' of this embodiment, a second spacer PSO is also provided in the opening KA overlapping with the island-shaped electrode pad PAD1 among the multiple openings KA of the metal layer CDL1. This differs from Embodiment 1 in that the other details have been described in Embodiment 1. For ease of description, components having the same functions as those shown in the drawings of Embodiment 1 are denoted by the same reference numerals, and their descriptions are omitted.

[0134] Figure 11 (a) and Figure 11 (b) is a diagram for explaining a step of removing the second spacer PSO and the interlayer insulating film (planarization film) through the opening KA of the metal layer CDL1 included in the display device 1 ′ of the second embodiment to expose the electrode pad PAD1 .

[0135] In addition, Figure 11 (a) and Figure 11 In (b), the metal layer CDL1, the second spacer PSO and the interlayer insulating film 21 are not shown. Figure 5 and Figure 6 The sealing layer 6 is composed of a first inorganic sealing film 26 , an organic sealing film 27 , and a second inorganic sealing film 28 .

[0136] like Figure 11 (a) and Figure 11 As shown in (b), in the display device 1', second spacers PSO are also provided in the plurality of openings KA of the metal layer CDL1, for example, in the opening KA overlapping with the island-shaped electrode pad PAD1. Thus, by providing second spacers PSO in the plurality of openings KA of the metal layer CDL1, for example, in the opening KA overlapping with the electrode pad PAD1, the first spacers PSI and the second spacers PSO can more stably support the deposition mask used when depositing the light-emitting layers of the respective colors included in the functional layers 24R, 24G, and 24B.

[0137] like Figure 11 As shown in (a), the sealing layer 6 ( Figure 5 Figure), the second spacer PSO provided on the opening portion KA overlapping with the electrode pad PAD1 among the plurality of opening portions KA of the metal layer CDL1 and the interlayer insulating film 21 on the electrode pad PAD1 are irradiated with a laser, for example, to remove the sealing layer 6 ( Figure 5), the second spacer PSO and the interlayer insulating film 21, so that the sealing layer 6 ( Figure 5 (shown in the figure) and an opening PAD1KA is formed in the interlayer insulating film 21.

[0138] As mentioned above, Figure 11 (a) and Figure 11 The inspection method of the display device 1' shown in (b) includes: Figure 5 As shown in the figure), and a process of removing the second spacer PSO provided on the opening KA overlapping with the electrode pad PAD1, and including a process of removing the interlayer insulating film 21 through the opening KA of the metal layer CDL1 in the overlapping portion of the electrode pad PAD1, to expose the electrode pad PAD1.

[0139] In this embodiment, the sealing layer 6 ( Figure 5 The case where a laser is used in removing the second spacer PSO and the interlayer insulating film 21 is described as an example, but it is not limited to this. For example, the sealing layer 6 ( Figure 5 As shown in the figure), a second spacer PSO and an interlayer insulating film 21.

[0140] As described above, in the display device 1' according to the second embodiment, the electrode pad PAD1 overlaps with the opening KA of the metal layer CDL1 via the interlayer insulating film 21. The sealing layer 6 and the second spacer PSO made of an organic material are formed therein, making it easy to confirm the position of the electrode pad PAD1. Furthermore, when analyzing or inspecting the display device 1', there is no need to remove the metal layer CDL1.

[0141] In addition, the inspection method of the display device 1' according to the second embodiment includes: Figure 5 The present invention also includes a process of removing the interlayer insulating film 21 through the opening KA of the metal layer CDL1 at a portion where the electrode pad PAD1, the interlayer insulating film 21, and the opening KA of the metal layer CDL1 overlap to expose the electrode pad PAD1. This allows for easy confirmation of the position of the electrode pad PAD1, and does not require removal of the metal layer CDL1 when analyzing or inspecting the display device 1'.

[0142] In addition, in this embodiment, Figure 5The sealing layer 6 shown is also removed to expose the electrode pad PAD1 as an example, but is not limited thereto, and for example, in the case where the sealing layer 6 needs to be removed before the process of forming the sealing layer 6, i.e., before the display device 1 becomes a finished product, and the like, the sealing layer 6 does not need to be removed in the case where the electrode pad PAD1 is exposed.

[0143] Embodiment 3

[0144] Next, based on Figures 12 to 14 Embodiment 3 of the present application will be described. In the display device 1" of the present embodiment, unlike Embodiments 1 and 2, the point that a part of the electrode pads PAD8 to PAD10 is provided in a part of the portions where the data signal lines Dm-2, Dm-1, Dm of the pixel circuit PK extend to the frame area NDA, and the point that the scan side drive circuit 32' includes the third output lines DG1, DE1 which are not electrically connected to the pixel circuit PK provided in the display area DA, and is provided with the electrode pads electrically connected to the third output lines, and the other contents have been described in Embodiments 1 and 2. For the convenience of explanation, the same reference numerals are attached to the members having the same function as those described in Embodiments 1 and 2, and the description thereof is omitted.

[0145] Figure 12 is a diagram showing the schematic configuration of the display device 1" of Embodiment 3.

[0146] As Figure 12 shown, in the display device 1", the scan side drive circuit 32' is provided in the frame area NDA, i.e., the GDML area on the left side of the display area DA and the GDMR area on the right side of the display area DA.

[0147] Further, in the present embodiment, the case where a plurality of electrode pads (not shown) are provided in the frame area NDA of the display device 1" Figure 12 The case in the illustrated R1' area, R2' area, R3' area, R4' area, and R5' area is described as an example, but the plurality of electrode pads can be provided in the frame area NDA of the display device 1" as long as they are provided in the frame area NDA of the display device 1", and the area thereof is not particularly limited.

[0148] Figure 13 is Figure 12 is a partial enlarged view of the R5' area of the display device of Embodiment 1" shown.

[0149] As Figure 12 and Figure 13 shown, it is preferable that the electrode pads PAD8 to PAD10 electrically connected to the data signal lines Dm-2, Dm-1, Dm of the pixel circuit PK are provided between the display area DA and the terminal portion TER.

[0150] In addition, if Figure 13 As shown, in the R5' region of the display device 1", a plurality of data signal lines Dm extend to Figure 12 The terminal portion TER shown. And, in the middle, for example, the electrode pad PAD8 in the data signal line Dm-2, the electrode pad PAD9 in the data signal line Dm-1, and the electrode pad PAD10 in the data signal line Dm are respectively formed in the same layer and with the same material as the data signal line. That is, the electrode pads PAD8~PAD10 are the wide parts of the data signal lines Dm-2~Dm. In addition, the extended parts of the data signal lines Dm-2~Dm of the pixel circuit PK in the frame area NDA do not cross with other electrode pads PAD1~PAD7, so the extended parts of the data signal lines Dm-2~Dm of the pixel circuit PK can be Figure 5 as well as Figure 6 The drain electrodes of multiple transistors, such as the second initialization transistor T7, and their wiring are formed on a layer SH, which is formed from the same layer and material as the data signal lines Dm-2 to Dm of the pixel circuit PK. Furthermore, the extended portions of the data signal lines Dm-2 to Dm of the pixel circuit PK are preferably wider in the portions corresponding to the electrode pads PAD8 to PAD10 than in the remaining portions.

[0151] On the other hand, although not shown, when the extended portion of the data signal line of the pixel circuit PK intersects with other electrode pads, a layer that does not intersect with other electrode pads may be used.

[0152] In addition, in the display device 1", the electrode pads PAD8 to PAD10 electrically connected to the data signal lines Dm-2, Dm-1, and Dm of the pixel circuit PK may be provided not only between the display area DA and the terminal portion TER but also between the display area DA and the terminal portion TER. Figure 12 The R5' region (first region) shown in FIG can also be set in the R1' region (second region), Figure 12 The R5' region (first region) and the R1' region (second region) shown in FIG. 2 sandwich the display area DA.

[0153] Figure 14 It shows Figure 12 FIG. 1 is a diagram showing an example of a scanning side driving circuit 32 ′ of a display device 1 ″ shown in FIG.

[0154] like Figure 14As shown, the scanning-side driving circuit 32' includes: first output lines (not shown) electrically connected to the scanning signal lines G0-Gn of the pixel circuits PK included in the display area DA; second output lines (not shown) electrically connected to the emission control lines E1-En of the pixel circuits PK included in the display area DA; and third output lines DG1 and DE1 electrically disconnected from the pixel circuits PK included in the display area DA. Alternatively, if the third output lines DG1 and DE1 are not electrically connected to the pixel circuits PK included in the display area DA, they can be formed from the scanning-side driving circuit 32' into the display area DA.

[0155] The display device 1″ includes electrode pads electrically connected to third output lines DG1 and DE1, that is, dummy wiring for analysis or inspection. In this way, by providing electrode pads electrically connected to the third output lines DG1 and DE1, the impact on the display quality of the display device caused by providing electrode pads for analysis or inspection can be eliminated. The third output lines DG1 and DE1 are not electrically connected to the pixel circuit PK included in the display area DA.

[0156] In addition, the third output lines DG1 and DE1, that is, the virtual wiring for analysis or inspection, are usually provided. Figure 12 The upper end or lower end of the display area DA shown in FIG. Figure 12 Like the illustrated R2 ′ region or R4 ′ region, the frame area NDA is provided at any one of the four corner regions corresponding to the four corners of the display area DA.

[0157] In addition, in this embodiment, Figure 5 The case where the sealing layer 6 is also removed to expose the electrode pads PAD8 to PAD10 is described as an example, but is not limited to this. For example, before the process of forming the sealing layer 6, that is, before the display device 1 becomes a finished product, an inspection is required. In the case of exposing the electrode pads PAD8 to PAD10, the sealing layer 6 does not need to be removed.

[0158] [Summarize]

[0159] [Aspect 1] A display device comprises: a display area; a frame area surrounding the display area; and a plurality of light-emitting elements arranged in the display area, the display area and the frame area having a planarization film, each of the plurality of light-emitting elements arranged on the planarization film having a first electrode, a light-emitting layer and a second electrode in sequence from the planarization film side, the display area having a first spacer between the plurality of light-emitting elements, the frame area having: a second spacer; and a metal layer electrically connected to the second electrode and formed on the same layer as the first electrode from the same material as the first electrode, the metal layer having a plurality of openings, the frame area having an island-shaped electrode pad, the electrode pad overlapping with one or more of the plurality of openings via an insulating film including at least the planarization film.

[0160] [Aspect 2] According to the display device of aspect 1, the second spacer is made of an organic material, and the opening portion overlapping the electrode pad among the plurality of opening portions overlaps with the second spacer.

[0161] [Aspect 3] According to the display device of aspect 1, the opening portion overlapping with the electrode pad among the plurality of opening portions does not overlap with the second spacer.

[0162] [Aspect 4] According to the display device described in any one of Aspects 1 to 3, in the planarizing film, on the side opposite to the side on which the multiple light-emitting elements are provided, a semiconductor film, a gate insulating film, a first wiring layer, a first inorganic insulating film, a second wiring layer, a second inorganic insulating film and a third wiring layer are provided in order from near to far from the planarizing film, the electrode pad is included in the third wiring layer, and the electrode pad overlaps with one or more of the multiple openings via the planarizing film.

[0163] [Aspect 5] According to the display device described in any one of Aspects 1 to 3, in the planarizing film, on the side opposite to the side where the multiple light-emitting elements are provided, a semiconductor film, a gate insulating film, a first wiring layer, a first inorganic insulating film, a second wiring layer, a second inorganic insulating film and a third wiring layer are provided in order from near to far from the planarizing film, the electrode pad is included in the second wiring layer, and the electrode pad overlaps with one or more of the multiple openings via the planarizing film and the second inorganic insulating film.

[0164] [Aspect 6] According to the display device described in any one of Aspects 1 to 3, in the planarizing film, on the side opposite to the side where the multiple light-emitting elements are provided, a semiconductor film, a gate insulating film, a first wiring layer, a first inorganic insulating film, a second wiring layer, a second inorganic insulating film and a third wiring layer are provided in order from near to far from the planarizing film, and the electrode pad is included in the first wiring layer, and the electrode pad overlaps with one or more of the multiple openings via the planarizing film, the second inorganic insulating film and the first inorganic insulating film.

[0165] [Aspect 7] According to the display device according to any one of aspects 1 to 6, the electrode pad is electrically connected to a node in a circuit provided in the display region or the frame region.

[0166] [Aspect 8] According to the display device according to aspect 7, the circuit provided in the display area is a pixel circuit, and the electrode pad is electrically connected to one node of the pixel circuit.

[0167] [Aspect 9] In the display device according to aspect 8, the pixel circuit includes a data signal line, a scanning signal line, and a light emitting control line, and the electrode pad is electrically connected to the data signal line.

[0168] [Aspect 10] The display device according to Aspect 9 further includes a terminal portion at the end of at least one side of the frame area, and an electrode pad electrically connected to the data signal line is provided in the frame area between the display area and the terminal portion.

[0169] [Aspect 11] The display device according to Aspect 9 further includes a terminal portion at the end of at least one side of the frame area, and the electrode pad electrically connected to the data signal line is arranged in a first area and a second area, the first area is between the display area and the terminal portion, and the second area and the first area sandwich the display area and are arranged facing each other.

[0170] [Aspect 12] According to the display device described in any one of Aspects 9 to 11, the electrode pad electrically connected to the data signal line is a portion of the portion of the data signal line of the pixel circuit extending to the frame area.

[0171] [Aspect 13] According to the display device described in Aspect 12, a portion of the data signal line of the pixel circuit extending to the frame area overlaps with one or more of the multiple openings of the metal layer.

[0172] [Aspect 14] According to the display device described in aspect 12 or 13, the part of the data signal line of the pixel circuit extending to the frame area is formed so that the line width of the part corresponding to the electrode pad is wider than the line width of other parts.

[0173] [Aspect 15] In the display device according to Aspect 8, the pixel circuit includes a data signal line, a scanning signal line, and a light emitting control line, and the electrode pad is electrically connected to the scanning signal line.

[0174] [Aspect 16] In the display device according to Aspect 8, the pixel circuit includes a data signal line, a scanning signal line, and a light-emitting control line, and the electrode pad is electrically connected to the light-emitting control line.

[0175] [Aspect 17] According to the display device according to aspect 7, the circuit provided in the frame region is a driving circuit, and the electrode pad is electrically connected to a node of the driving circuit.

[0176] [Aspect 18] According to the display device described in Aspect 17, the driving circuit includes: a first output line, which is electrically connected to the scanning signal line of the pixel circuit possessed by the display area; and a second output line, which is electrically connected to the light-emitting control line of the pixel circuit possessed by the display area, and the electrode pad is electrically connected to the first output line.

[0177] [Aspect 19] According to the display device described in Aspect 17, the driving circuit includes: a first output line, which is electrically connected to the scanning signal line of the pixel circuit possessed by the display area; and a second output line, which is electrically connected to the light-emitting control line of the pixel circuit possessed by the display area, and the electrode pad is electrically connected to the second output line.

[0178] [Aspect 20] According to the display device described in Aspect 17, the driving circuit includes: a first output line, which is electrically connected to the scanning signal line of the pixel circuit possessed by the display area; a second output line, which is electrically connected to the light-emitting control line of the pixel circuit possessed by the display area; and a third output line, which is not electrically connected to the pixel circuit possessed by the display area, and the electrode pad is electrically connected to the third output line.

[0179] [Aspect 21] According to the display device of aspect 20, the electrode pad electrically connected to the third output line is provided on any one of four corner regions corresponding to the four corners of the display region in the frame region.

[0180] [Aspect 22] In the display device according to any one of Aspects 1 to 21, the frame area includes: a groove formed in the planarization film and surrounding the display area in a frame shape; and a dam surrounding the groove in a frame shape, and the metal layer is arranged at least between the groove and the dam.

[0181] [Aspect 23] In the display device according to Aspect 22, the second electrode is electrically connected to the metal layer on at least one of the groove and the area between the groove and the display area, and the electrode pad overlaps with the opening portion provided between the groove and the embankment.

[0182] [Aspect 24] According to the display device described in Aspect 22, the second electrode is light-transmitting, and on at least one of the groove and the area between the groove and the display area, the second electrode is electrically connected to the metal layer, and the electrode pad overlaps with the opening portion provided between the display area and the groove and the extension portion of the second electrode provided between the display area and the groove.

[0183] [Aspect 25] A method for inspecting a display device, the display device comprising: a display area; a frame area surrounding the display area; and a plurality of light-emitting elements arranged in the display area, the display area and the frame area comprising a planarization film, each of the plurality of light-emitting elements arranged on the planarization film comprising a first electrode, a light-emitting layer, and a second electrode in sequence from the planarization film side, the frame area comprising a metal layer electrically connected to the second electrode and formed on the same layer as the first electrode from the same material as the first electrode, the metal layer comprising a plurality of openings, the frame area comprising an island-shaped electrode pad, the electrode pad overlapping with one or more of the plurality of openings via an insulating film comprising at least the planarization film, the inspection method comprising a first step of confirming the position of the electrode pad from the opening.

[0184] [Aspect 26] The method for inspecting a display device according to Aspect 25 further includes a second step of removing the insulating film through the opening in the overlapping portion of the electrode pad, the insulating film, and the opening to expose the electrode pad.

[0185] 〔appendix〕

[0186] The present invention is not limited to the above-described embodiments. Various modifications can be made within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present invention. Furthermore, new technical features can be formed by combining the technical means disclosed in the various embodiments.

[0187] Industrial applicability

[0188] The present invention can be applied to a display device or a method for inspecting a display device.

[0189] Description of Reference Numerals

[0190] 1, 1', 1" display

[0191] 15 Semiconductor films

[0192] 16 Inorganic insulating film (gate insulating film)

[0193] GE: Gate electrode forming layer (first wiring layer)

[0194] 18. Inorganic insulating film (first inorganic insulating film)

[0195] CE: A layer forming a counter electrode of a capacitor element (second wiring layer)

[0196] 20 Inorganic insulating film (second inorganic insulating film)

[0197] 21 Interlayer insulating film (planarization film)

[0198] SH Layer for forming source electrode, drain electrode and their wiring (third wiring layer)

[0199] 22 first electrode

[0200] 24R, 24G, 24B Functional layers including light-emitting layer

[0201] 25 Second electrode

[0202] 31 Data signal line driver circuit

[0203] 32, 32' Scanning side drive circuit (drive circuit)

[0204] 33 Power supply circuit

[0205] DA display area

[0206] NDA border area

[0207] TER terminal part

[0208] KA opening

[0209] CDL1 metal layer

[0210] X, XR, XG, XB light emitting elements

[0211] PK pixel circuit

[0212] Gl~Gn scanning signal lines

[0213] E1~En light control line

[0214] D1~Dm data signal line

[0215] PSI first spacer

[0216] PSO Second Spacer

[0217] T1~T9 transistors

[0218] C Capacitor element

[0219] CT Grooves

[0220] PAD1~PAD26 electrode pads

[0221] DE1, DG1 third output line

[0222] FB First Dike (Dike)

[0223] SB First Embankment (Embankment)

Claims

1. A method for inspecting a display device, the display device comprising: a display area; a frame area surrounding the display area; and a plurality of light-emitting elements disposed in the display area, wherein: The display area and the frame area are provided with a planarization film. Each of the plurality of light-emitting elements provided on the planarization film includes a first electrode, a light-emitting layer, and a second electrode in order from the planarization film side. The frame region includes a metal layer, which is electrically connected to the second electrode and is formed on the same layer as the first electrode and made of the same material as the first electrode. The metal layer has a plurality of openings, The frame area has an island-shaped electrode pad. The electrode pad overlaps with one or more of the plurality of openings via an insulating film including at least the planarizing film. The inspection method includes a first step of confirming the position of the electrode pad from the opening.

2. The method for inspecting a display device according to claim 1, wherein: The second step is further included, which is a step of removing the insulating film through the opening at a portion where the electrode pad, the insulating film, and the opening overlap to expose the electrode pad.

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