Amplifier module and system having ground terminals adjacent to power amplifier die

Abstract

An amplifier module includes a module substrate having a mounting surface, a signal conduction layer, a ground layer, and a ground pad located on the mounting surface. A heat dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the heat dissipation structure. An encapsulation material covers the mounting surface of the module substrate and the power transistor die, and the surface of the encapsulation material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulation material. The ground terminal has a proximal end coupled to the ground pad and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground pad, the ground layer of the module substrate, and the heat dissipation structure.

Description

Technical Field

[0001] The embodiments of the subject matter described herein generally relate to amplifier modules, and more specifically, to amplifier modules including power transistor dies. Background Technology

[0002] Wireless communication systems employ power amplifier modules to increase the power of radio frequency (RF) signals. A power amplifier module includes a module substrate and an amplifier circuit system coupled to a mounting surface of the module substrate. A typical module substrate may also include input and output (I / O) terminals on the bottom surface of the module (i.e., the surface opposite the module mounting surface), and conductive signal routing structures extending through and across the module substrate between the I / O terminals and bonding pads at the mounting surface. One or more additional grounding / heat dissipation structures may extend through the module substrate between the mounting surface and the bottom surface.

[0003] Amplifier circuit systems typically include power transistor dies, which include at least one integrated power transistor with a bottom-side conductive ground layer. The bottom-side conductive ground layer of the power transistor die is directly connected to the surface of a ground / heat dissipation structure exposed at the mounting surface of the module substrate. In addition to removing heat from the power transistor die, the ground / heat dissipation structure can also be used to provide a ground reference for the power transistor die.

[0004] To transmit RF signals between the module substrate and the power transistor die, electrical connections are made between bonding pads on the mounting surface of the module substrate and the I / O bonding pads of the power transistor die. When the integrated power transistor is a field-effect transistor (FET), the die's input bonding pad is connected to the gate terminal of the FET, and the die's output bonding pad is connected to the drain terminal of the FET. As described above, the source terminal of the FET is coupled to a bottom conductive ground layer through the die, which in turn is connected to the ground / heat dissipation structure of the module substrate.

[0005] To integrate the aforementioned power amplifier module into a communication system, the module is typically coupled to the mounting surface of a system printed circuit board (PCB). More specifically, the bottom surface of the module substrate is connected to the top surface of the system PCB, such that the bottom-side module signal I / O terminals are aligned with corresponding signal I / O pads on the PCB mounting surface. Additionally, the module substrate is connected to the system PCB such that the module grounding / heat dissipation structure contacts and extends through the PCB heatsink of the system PCB. Therefore, the combination of the module grounding / heat dissipation structure and the system PCB heatsink performs the dual function of providing a thermal path to remove heat generated by the power transistor die and providing a ground reference for the power transistor die.

[0006] During operation, the power transistor amplifies the input RF signal received through the transistor die input pad and transmits the amplified RF signal to the transistor die output pad. Traditionally, heat generated by the power transistor die has been dissipated through a grounding / heat dissipation structure embedded in the module substrate and through a system PCB heatsink, which also provides a ground reference.

[0007] The above configuration is suitable for a variety of applications. However, other applications may require different configurations where the thermal path of the heat generated by the power transistor die extends away from the system PCB rather than through it. However, such different configurations introduce new challenges, including those associated with providing a proper ground reference for the power transistor die. Summary of the Invention

[0008] According to a first aspect of the present invention, an amplifier module is provided, comprising:

[0009] A module substrate having a mounting surface, a signal transmission layer, a ground layer, and a first grounding pad located on the mounting surface;

[0010] A heat dissipation structure extending through the module substrate, wherein the heat dissipation structure has a first surface and a second surface, wherein the first surface is exposed at the mounting surface of the module substrate;

[0011] A power transistor die having a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure;

[0012] An encapsulating material covering the mounting surface of the module substrate and the power transistor die, wherein the surface of the encapsulating material defines the contact surface of the amplifier module; and

[0013] A first ground terminal is embedded within the encapsulation material, wherein the first ground terminal has a proximal end coupled to the first ground terminal pad and a distal end exposed at the contact surface, and wherein the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground terminal pad, the ground layer of the module substrate, and the heat dissipation structure.

[0014] In one or more embodiments, the heat dissipation structure includes a conductive structure selected from metal coins and a set of heat-perforated holes.

[0015] In one or more embodiments, the ground layer of the module substrate contacts the heat dissipation structure.

[0016] In one or more embodiments, the first grounding terminal includes a conductive post.

[0017] In one or more embodiments, the first grounding terminal includes:

[0018] The interposer end includes a dielectric body having a top surface and a bottom surface, and a conductive via extending between the top surface and the bottom surface of the dielectric body.

[0019] In one or more embodiments, the first grounding terminal further includes:

[0020] A first conductive pad, located on the top surface of the dielectric body and connected to a first end of the conductive via, wherein the first conductive pad corresponds to the distal end of the first ground terminal; and

[0021] A second conductive pad is located on the bottom surface of the dielectric body and connected to the second end of the conductive via, wherein the second conductive pad corresponds to the proximal end of the first ground terminal.

[0022] In one or more embodiments, the distance between the power transistor die and the first ground terminal is less than the width of the power transistor die.

[0023] In one or more embodiments, the electrical length of the conductive path from the grounding contact through the heat dissipation structure, the grounding layer, the first grounding pad, and the first grounding terminal is less than λ / 5.

[0024] In one or more embodiments, the module substrate further includes a signal terminal pad, a second ground terminal pad, and a third ground terminal pad located on the mounting surface, wherein the signal terminal pad is electrically connected to one of the input and output of the power transistor die through the signal conduction layer, and the second ground terminal pad and the third ground terminal pad are adjacent to the signal terminal pad; and

[0025] The amplifier module further includes:

[0026] A signal terminal, embedded within the encapsulation material, wherein the signal terminal has a proximal end coupled to the signal terminal pad and a distal end exposed at the contact surface.

[0027] A second grounding terminal, embedded within the encapsulation material, wherein the second grounding terminal has a proximal end coupled to the second grounding pad and a distal end exposed at the contact surface, and

[0028] A third grounding terminal is embedded within the encapsulation material, wherein the third grounding terminal has a proximal end coupled to the third grounding pad and a distal end exposed at the contact surface, and wherein the signal terminal, the second grounding terminal, and the third grounding terminal form a ground-signal-grounding terminal structure.

[0029] According to a second aspect of the present invention, an amplifier system is provided, comprising:

[0030] A system substrate having a first mounting surface, a first signal conducting layer, a first ground layer, and a grounding pad located on the first mounting surface, wherein the grounding pad is electrically coupled to the first ground layer; and

[0031] An amplifier module having a contact surface and a heat sink attachment surface, wherein the amplifier module is coupled to the system substrate with the mounting surface of the system substrate facing the contact surface of the amplifier module, and wherein the amplifier module further includes:

[0032] The module substrate has a second mounting surface, a second signal transmission layer, a second ground layer, and a first grounding pad located on the second mounting surface.

[0033] A heat dissipation structure extending through the module substrate, wherein the heat dissipation structure has a first surface and a second surface, wherein the first surface is exposed at the second mounting surface of the module substrate.

[0034] A power transistor die having a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure.

[0035] An encapsulating material covering the second mounting surface of the module substrate and the power transistor die, wherein the surface of the encapsulating material defines the contact surface of the amplifier module, and

[0036] A first ground terminal is embedded within the encapsulation material, wherein the first ground terminal has a proximal end coupled to the first ground terminal pad and a distal end exposed at the contact surface, and wherein the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground terminal pad, the second ground layer of the module substrate and the heat dissipation structure.

[0037] In one or more embodiments, the distal end of the first ground terminal is coupled to the ground pad of the system substrate.

[0038] In one or more embodiments, the electrical length of the conductive path from the ground contact through the heat dissipation structure, the second ground layer of the amplifier module, the first ground pad, the first ground terminal, the ground pad of the system substrate, to the first ground layer of the system substrate is less than λ / 5.

[0039] In one or more embodiments, the module substrate further includes a signal terminal pad, a second ground terminal pad, and a third ground terminal pad located on the second mounting surface, wherein the signal terminal pad is electrically connected to one of the input and output of the power transistor die through the second signal conduction layer, and the second ground terminal pad and the third ground terminal pad are adjacent to the signal terminal pad; and

[0040] The amplifier module further includes:

[0041] A signal terminal, embedded within the encapsulation material, wherein the signal terminal has a proximal end coupled to the signal terminal pad and a distal end exposed at the contact surface and electrically coupled to the first signal conductive layer of the system substrate.

[0042] A second ground terminal, embedded within the encapsulation material, wherein the second ground terminal has a proximal end coupled to the second ground terminal pad, and a distal end exposed at the contact surface and electrically coupled to the first ground layer of the system substrate, and

[0043] A third ground terminal is embedded within the encapsulation material, wherein the third ground terminal has a proximal end coupled to the third ground terminal pad and a distal end exposed at the contact surface and electrically coupled to the first ground layer of the system substrate, and wherein the signal terminal, the second ground terminal and the third ground terminal form a ground-signal-ground terminal structure.

[0044] In one or more embodiments, the amplifier system further includes:

[0045] A heat sink coupled to the surface of the heat sink attachment.

[0046] According to a third aspect of the present invention, a method for manufacturing a power amplifier is provided, the method comprising:

[0047] The power transistor die is coupled to a heat dissipation structure that extends through the module substrate, wherein...

[0048] The module substrate has a first mounting surface, a first signal conduction layer, a first ground layer, and a first grounding pad located on the first mounting surface.

[0049] The first surface of the heat dissipation structure is exposed at the first mounting surface of the module substrate, and

[0050] The power transistor die has a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure;

[0051] Couple the proximal end of the first ground terminal to the first ground terminal pad of the module substrate; and

[0052] An amplifier module is formed by covering the first mounting surface of the module substrate and the power transistor die with an encapsulating material, wherein the surface of the encapsulating material defines a contact surface of the amplifier module, the distal end of the first ground terminal is exposed at the contact surface, and the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground pad, the ground layer of the module substrate and the heat dissipation structure.

[0053] In one or more embodiments, the method further includes:

[0054] The amplifier module is coupled to the system substrate with the second mounting surface of the system substrate facing the contact surface of the amplifier module. The system substrate further includes a second signal conduction layer, a second ground layer, and a ground pad located on the second mounting surface. The ground pad is electrically coupled to the second ground layer, and the distal end of the first ground terminal is coupled to the ground pad.

[0055] In one or more embodiments, the amplifier module has a heat sink attachment surface opposite the contact surface, and the method further includes:

[0056] The heat sink is coupled to the heat sink attachment surface of the amplifier module.

[0057] In one or more embodiments, the module substrate further includes a signal terminal pad, a second ground terminal pad, and a third ground terminal pad located at the first mounting surface, and wherein the method further includes:

[0058] Couple the proximal end of the signal terminal to the signal terminal pad;

[0059] Couple the proximal end of the second grounding terminal to the second grounding terminal pad; and

[0060] The proximal end of the third ground terminal is coupled to the third end pad, wherein the signal terminal, the second ground terminal and the third ground terminal form a ground-signal-ground terminal structure, and wherein the distal ends of the signal terminal, the second ground terminal and the third ground terminal are exposed at the contact surface of the module substrate.

[0061] In one or more embodiments, the method further includes:

[0062] The amplifier module is coupled to the system substrate with its second mounting surface facing the contact surface of the amplifier module. The system substrate further includes a second signal conduction layer, a second ground layer, and a first ground pad, a second ground pad, and a third ground pad located on the second mounting surface.

[0063] The first grounding pad, the second grounding pad, and the third grounding pad are electrically coupled to the second grounding layer.

[0064] The distal end of the first grounding terminal is coupled to the first grounding pad.

[0065] The distal end of the second grounding terminal is coupled to the second grounding pad.

[0066] The distal end of the third grounding terminal is coupled to the third grounding pad, and

[0067] The distal end of the signal terminal is coupled to the second signal conduction layer.

[0068] These and other aspects of the invention will become apparent from the embodiments described below, and will be illustrated with reference to these embodiments. Attached Figure Description

[0069] A more complete understanding of the subject matter can be derived by considering the following figures, with reference to the detailed embodiments and claims, wherein similar reference numerals throughout the figures refer to similar elements.

[0070] Figure 1 This is a schematic description of the Doherty power amplifier in the power amplifier module;

[0071] Figure 2 This is based on the embodiment of the example. Figure 1 A top view of the power amplifier module of the Doherty power amplifier;

[0072] Figure 3 yes Figure 2 The power amplifier module is shown in a cross-sectional side view along line 3-3;

[0073] Figure 4A and 4B yes Figure 2 The power amplifier module is shown in cross-sectional side views of two different example embodiments along line 4-4;

[0074] Figure 5A , 5B And 5C is Figure 2 The power amplifier module is shown in cross-sectional side views along line 5-5 for three different example embodiments;

[0075] Figure 6 It includes, according to the example embodiments Figure 2 A cross-sectional side view of the amplifier system, showing the power amplifier module coupled to the system substrate and heat sink; and

[0076] Figure 7This is a flowchart of a method for manufacturing a power amplifier module and an amplifier system according to an example embodiment. Detailed Implementation

[0077] Embodiments of the subject matter of this invention described herein include an amplifier system having a system substrate (e.g., a printed circuit board (PCB)) and a power amplifier module coupled to said system substrate. The power amplifier module includes a module substrate with an embedded heatsink structure and a power amplifier die connected to the embedded heatsink structure. Compared to conventional systems where the embedded heatsink structure is coupled to a heatsink in the system substrate, the power amplifier module is mounted to the system substrate in a "flip orientation" where the embedded heatsink structure faces away from the system substrate. Therefore, in this embodiment, the heatsink can be directly connected to the exposed surface of the embedded heatsink structure of the power amplifier module.

[0078] In such systems, proper grounding of the power amplifier die to the system board is crucial for achieving good performance. It is well known that current (DC or RF) must travel in a closed loop. "Return current" is defined as the current flowing through the ground plane back to its source. Current always follows a path with the lowest "bar." For example, for pure DC current, the bar is a resistor. In contrast, RF current tends to follow a path with minimal inductance. At higher frequencies, optimization of the RF return current path plays a significant role in power amplifier performance. More specifically, the return current path for the power amplifier die should be relatively short (in electrical length) to avoid a significant reduction in efficiency, gain, or other performance metrics. Various embodiments of power amplifier modules disclosed herein, having a grounding structure that provides a proper ground / return current path for the power amplifier die of the power amplifier module, are mounted to the system PCB in a flip-oriented configuration as described above, will be described in detail below.

[0079] The power amplifier module embodiments described herein can be used to implement any of a variety of different types of power amplifiers. To provide specific examples that will help convey the details of the subject matter of the invention, examples of the Dougherty power amplifier module are used herein. However, those skilled in the art will understand based on the description herein that the subject matter of the invention can also be used in power amplifier modules implementing other types of amplifiers. Therefore, the use of the Dougherty power amplifier in the exemplary embodiments below is not intended to limit the application of the subject matter of the invention to the Dougherty power amplifier module, as the subject matter of the invention can also be used in other types of power amplifier modules.

[0080] Before describing the various physical implementations of the power amplifier module, refer to Figure 1This is a schematic description of a Dougherty power amplifier 110 implemented in a power amplifier module 100. The power amplifier module 100 mainly includes components implemented on a module substrate (e.g., Figure 2 The Dougherty amplifier 110 is located on the module substrate 210. In an embodiment, the Dougherty amplifier 110 includes an RF input node 112, an RF output node 114, a power splitter 120, and a dies having one or more carrier amplifiers (e.g., Figure 2 The carrier amplifier path 130 of the die 233, 234) has one or more peaking amplifiers (e.g., Figure 2 The power amplifier module 100 includes a peaking amplifier path 150, a phase delay and impedance inversion element 170, and a combination node 172 for the power amplifier dies 253 and 254. Additionally, according to various embodiments, as will be discussed in more detail below, the power amplifier module 100 also includes one or more ground terminals 141 and 145 configured to provide an external ground reference for the power amplifier dies of the carrier amplifier path 130 and the peaking amplifier path 150. As will be described in more detail below, according to various embodiments, the ground terminals 141 and 145 are positioned very close to the power amplifier dies to optimize the ground return loop for the dies.

[0081] When incorporated into a larger RF system, RF input node 112 is coupled to an RF signal source, and RF output node 114 is coupled to a load 190 (e.g., an antenna or other load). The RF signal source provides an input RF signal, which is an analog signal comprising spectral energy typically centered around one or more carrier frequencies. Essentially, the Dougherty amplifier 110 is configured to amplify the input RF signal and produce the amplified RF signal at RF output node 114.

[0082] In one embodiment, power splitter 120 has one input 122 and two outputs 124, 126. Power splitter input 122 is coupled to RF input node 112 to receive an input RF signal. Power splitter 120 is configured to split the RF input signal received at input 122 into a first RF signal and a second RF signal (or a carrier signal and a peaking signal), which are provided to carrier amplifier path 130 and peaking amplifier path 150 via outputs 124, 126. According to one embodiment, power splitter 120 includes a first phase shift element configured to apply a first phase shift (e.g., approximately 90 degrees) to the peaking signal, which is then provided to output 126. Therefore, at outputs 124 and 126, the carrier signal and the peaking signal may be approximately 90 degrees out of phase with each other.

[0083] When the Dougherty amplifier 110 has a symmetrical configuration (i.e., a configuration where the carrier amplifier power transistor and the peaking amplifier power transistor are substantially the same size), the power splitter 120 can divide or separate the input RF signal received at input 122 into two signals, which in some embodiments are very similar and have equal power. Conversely, when the Dougherty amplifier 110 has an asymmetrical configuration (i.e., a configuration where one of the amplifier power transistors (typically the peaking amplifier transistor) is significantly larger), the power splitter 120 can output signals with unequal power.

[0084] Outputs 124 and 126 of power divider 120 are connected to carrier amplifier path 130 and peaking amplifier path 150, respectively. Carrier amplifier path 130 is configured to amplify the carrier signal from power divider 120 and provide the amplified carrier signal to power combining node 172. Similarly, peaking amplifier path 150 is configured to amplify the peaked signal from power divider 120 and provide the amplified peaked signal to power combining node 172, wherein paths 130 and 150 are designed such that the amplified carrier signal and the peaked signal arrive at power combining node 172 in phase.

[0085] According to an embodiment, the carrier amplifier path 130 includes an input circuit 131 (e.g., including an impedance matching circuit) and uses one or more carrier amplifier dies (e.g., Figure 2 The carrier amplifier 132 implemented by the chips 233, 234, and the phase shift and impedance inversion element 170.

[0086] In various embodiments, the carrier amplifier 132 includes an RF input 134, an RF output 138, and one or more amplification stages coupled between the input 134 and the output 138. The RF input 134 is coupled to a first output 124 of the power divider 120 via an input circuit 131, and therefore receives the carrier signal generated by the power divider 120.

[0087] Each amplification stage of the carrier amplifier 132 includes a power transistor. In a single-stage carrier amplifier 132, a single power transistor may be implemented on a single power amplifier die. In a two-stage carrier amplifier 132, two power transistors may be implemented on a single power amplifier die, or each power amplifier may be implemented on a separate die (e.g., Figure 2 On the dies 233 and 234, such as... Figure 2 An example is shown in the power amplifier module described in the text.

[0088] In either case, each power transistor includes a control terminal (e.g., a gate terminal) and a first current-carrying terminal and a second current-carrying terminal (e.g., a drain terminal and a source terminal). In a single-stage device comprising a single power transistor, the control terminal is electrically connected to the RF input 134, one of the current-carrying terminals (e.g., the drain terminal) is electrically connected to the RF output 138, and the other current-carrying terminal (e.g., the source terminal) is electrically connected to a ground reference (or another voltage reference). Conversely, a two-stage amplifier will comprise two series-coupled power transistors, where the first transistor acts as a driver amplifier transistor with relatively low gain, and the second transistor acts as a final-stage amplifier transistor with relatively high gain. In such embodiments, the control terminal of the driver amplifier transistor is electrically connected to the RF input 134, one of the current-carrying terminals of the driver amplifier transistor (e.g., the drain terminal) may be electrically connected to the control terminal of the final-stage amplifier transistor, and the other current-carrying terminal of the driver amplifier transistor (e.g., the source terminal) is electrically connected to a ground reference (or another voltage reference) via an embodiment of a specialized ground terminal 141. Additionally, one of the current-carrying terminals of the final-stage amplifier transistor (e.g., the drain terminal) is electrically connected to the RF output terminal 138, and the other current-carrying terminal of the final-stage amplifier transistor (e.g., the source terminal) can be electrically connected to a ground reference (or another voltage reference) via an embodiment of a dedicated ground terminal 141. (As will be combined...) Figure 2 -4 To explain in more detail, a specialized ground terminal positioned close to the carrier amplifier transistor can be used to make electrical connections from the carrier amplifier driver and / or the final stage amplifier transistor to the ground reference, thereby providing a relatively short ground return path for the carrier amplifier.

[0089] In addition to one or more power transistors, the input and output impedance matching networks and bias circuitry are part of the system. Figure 1 (Not shown in the diagram) may also be included within and / or electrically coupled to the carrier amplifier 132. Additionally, in embodiments where the carrier amplifier 132 is a two-stage device, an inter-stage matching network (in...) Figure 1 (Not shown in the diagram) It may also be included within the carrier amplifier 132 between the driver and the final stage amplifier transistor.

[0090] In one embodiment, the RF output 138 of the carrier amplifier 132 is coupled to the power combining node 172 via a phase shifter and an impedance inversion element 170. According to this embodiment, the impedance inversion element is a lambda / 4 (λ / 4) transmit line phase shifter (e.g., a microstrip line) that applies approximately a 90-degree relative phase shift to the carrier signal after it has been amplified by the carrier amplifier 132. A first end of the impedance inversion element 170 is coupled to the RF output 138 of the carrier amplifier 132, and a second end of the phase shifter 170 is coupled to the power combining node 172.

[0091] Referring now to peaking amplifier path 150, in an embodiment, peaking amplifier path 150 includes peaking amplifier 152 and input circuitry 151 (e.g., including impedance matching circuitry). In various embodiments, peaking amplifier 152 includes an RF input 154, an RF output 158, and one or more amplification stages coupled between input 154 and output 158. RF input 154 is coupled to a second output 126 of power divider 120, and therefore receives the peaked signal generated by power divider 120.

[0092] Similar to carrier amplifier 132, each amplification stage of peaking amplifier 152 includes a power transistor having a control terminal and a first current-carrying terminal and a second current-carrying terminal. One or more power transistors of peaking amplifier 152 may be electrically coupled between RF input 154 and RF output 158 ​​in a manner similar to that described above in conjunction with carrier amplifier 132. Additional details discussed in the description of carrier amplifier 132 also apply to peaking amplifier 152, and for the sake of brevity, those additional details are not repeated herein. However, an important aspect that needs to be reiterated is that the current-carrying terminal of each peaking amplifier transistor (e.g., the source terminal of the driver and / or final-stage amplifier transistor) may be electrically connected to a ground reference (or another reference voltage) via an embodiment of a dedicated ground terminal 145, as described above in conjunction with carrier amplifier 132. Figure 2 -4 To explain in more detail, a specialized ground terminal positioned close to the peaking amplifier transistor can be used to make electrical connections from the peaking amplifier driver and / or the final stage amplifier transistor to the ground reference, thereby providing a relatively short ground return path for the peaking amplifier.

[0093] The RF output 158 ​​of the peaking amplifier 152 is coupled to the power combining node 172. According to an embodiment, the RF output 158 ​​of the peaking amplifier 152 and the combining node 172 are implemented as a common element. More specifically, in an embodiment, the RF output 158 ​​of the peaking amplifier 152 is configured to act as both the combining node 172 and the output 158 ​​of the peaking amplifier 152. To facilitate the combination of the amplified carrier signal and the peaked signal, and as mentioned above, the RF output 158 ​​(and therefore the combining node 172) is connected to the second end of the phase shift and impedance inversion element 170. In other embodiments, the combining node 172 may be a separate element from the RF output 158.

[0094] In either case, the amplified carrier signal and the peaked RF signal are combined in phase at the combining node 172. The combining node 172 is electrically coupled to the RF output node 114 to provide the amplified and combined RF output signal to the RF output node 114. In an embodiment, an output impedance matching network 174 between the combining node 172 and the RF output node 114 is used to present an appropriate load impedance to each of the carrier amplifier 132 and the peaked amplifier 152. The resulting amplified RF output signal is generated at the RF output node 114, which is connected to an output load 190 (e.g., an antenna).

[0095] Amplifier 110 is configured such that carrier amplifier path 130 provides amplification of a relatively low-level input signal, and the two amplification paths 130 and 150 operate in combination to provide amplification of a relatively high-level input signal. This can be achieved, for example, by biasing carrier amplifier 132 to operate in Class AB mode and biasing peaking amplifier 152 to operate in Class C mode.

[0096] exist Figure 1 In the embodiments shown and described above, the first phase-shifting element in splitter 120 applies a phase shift of approximately 90 degrees to the pre-amplified peaked signal, and the phase-shifting and impedance inversion element 170 applies a phase shift of approximately 90 degrees to the amplified carrier signal in a similar manner, such that the amplified carrier signal and the peaked signal can be combined in phase at combination node 172. This type of architecture is referred to as a non-inverting Dougherty amplifier architecture. In an alternative embodiment, the first phase-shifting element in splitter 120 may apply a phase shift of approximately 90 degrees to the pre-amplified carrier signal instead of the peaked signal, and the phase-shifting and impedance inversion element 170 may alternatively be included at the output of the peaking amplifier. This alternative architecture is referred to as an inverting Dougherty amplifier architecture. In yet another alternative embodiment, other combinations of phase shifting elements may be implemented in carrier path 130 and / or peaking path 150 prior to amplification to achieve a phase difference of approximately 90 degrees between the carrier signal and the peaked signal prior to amplification, and the phase shifts applied to the amplified carrier signal and peaked signal may be selected accordingly to ensure that the signals are combined in phase at combination node 172.

[0097] Figure 2 This is based on the embodiment of the example. Figure 1 A top view of the power amplifier module 200 of the Doherty power amplifier circuit system. For better understanding, Figure 2 Should be with Figure 3 View simultaneously. Figure 3 yes Figure 2The module 200 is shown in a cross-sectional side view along line 3-3. Essentially, the power amplifier module 200 includes a Dougherty power amplifier (e.g., implemented on a multilayer module substrate 210 and multiple power transistor dies 233, 234, 253, 254, and other electrical components). Figure 1 The power amplifier 110). Various components of the power amplifier module 200 and... Figure 1 The components described herein correspond to those in the document, and it should be noted that... Figure 1 and Figure 2-3 The last two numbers of corresponding components are the same (for example, components 120 and 220 are corresponding components).

[0098] The power amplifier module 200 includes a module substrate 210 in the form of a multilayer printed circuit board (PCB) or other suitable substrate. The module substrate 210 has a top surface 209 (also referred to as a “mounting surface”) and a bottom surface 211 (also referred to as a “heat sink attachment surface”). As will be described in more detail below, a plurality of components and terminals 212, 214, 241-248, 261, 262, 265, 266 are coupled to the mounting surface 209 of the module substrate 210, and a non-conductive encapsulating material 380 (e.g., a plastic encapsulation) is disposed on the mounting surface 209 and over the components and terminals 212, 214, 241-248, 261, 262, 265, 266 to define the top surface 382 of the module 200 (also referred to as a “contact surface”). Figure 3 As shown, the thickness 384 of the encapsulation material 380 is greater than the maximum height of the components covered by the encapsulation material 380 (e.g., the splitter 220 and the power transistor dies 233, 234, 253, 254).

[0099] As will be described in more detail below, the lower or proximal surfaces of terminals 212, 214, 241-248, 261, 262, 265, and 266 are coupled to conductive features on the mounting surface 209 of the module substrate 210, and the upper or distal surfaces of terminals 212, 214, 241-248, 261, 262, 265, and 266 are exposed at the contact surface 382 of the encapsulation material 380. Conductive attachment material 383 (e.g., solder balls, solder paste, or conductive adhesive) is disposed on the exposed distal surfaces of terminals 212, 214, 241-248, 261, 262, 265, and 266 to facilitate the connection of module 200 to the system substrate (e.g., Figure 6 The electrical and mechanical attachments of the system substrate 610 will be described in more detail later. The various features and embodiments of terminals 212, 214, 241-248, 261, 262, 265, and 266 will be discussed in more detail later.

[0100] like Figure 3As depicted, the module substrate 210 includes a plurality of dielectric layers 305, 306, and 307 (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with a plurality of conductive layers 301, 302, 303, and 304. The top surface 209 of the module substrate 210 is defined by a patterned conductive layer 301, and the bottom surface 211 of the module substrate 210 is defined by a conductive layer 304. It should be noted that although the module substrate 210 is shown as including three dielectric layers 305-307 and four conductive layers 301-304, other embodiments of the module substrate may include more or fewer dielectric and / or conductive layers.

[0101] Each of the conductive layers 301-304 may have a primary purpose and may also include conductive features that facilitate signal and / or voltage / ground routing between other layers. While the following description indicates the primary purpose for each of the conductive layers 301-304, it should be understood that a layer (or its functionality) may differ from others. Figure 3 The arrangement is best illustrated in the text and discussed below.

[0102] For example, in an embodiment, a patterned conductive layer 301 at the mounting surface 209 of the module substrate 210 may primarily serve as a signal conduction layer. More specifically, layer 301 includes a plurality of conductive features (e.g., conductive pads and traces) that act as attachment points for dies 233, 234, 253, 254 and other discrete components, and provide electrical connectivity between dies 233, 234, 253, 254 and other discrete components. Additionally, as will be discussed below, layer 301 may include a plurality of conductive pads (e.g., signal pad 312 and ground pads 342, 344, 366) specifically designated for attaching conductive signals and / or ground terminals 212, 214, 241-248, 261, 262, 265, 266, as will be described in more detail in conjunction with Figures 4 and 5.

[0103] The second patterned conductive layer 302 serves as an RF ground layer. The RF ground layer 302 also includes multiple conductive features (e.g., conductive traces) electrically coupled to the conductive features of the signal conduction layer 301 and electrically coupled to the system ground layer 304 (described below) via conductive vias 311, 313, and 315 extending through dielectric layers 305-307. For example, conductive ground pads 342, 344, and 366 are electrically coupled to the RF ground layer 302 via via 311, and the RF ground layer 302 is in turn electrically coupled to the system ground layer 304 via vias 313 and 315 (and routing features of the conductive layer 303).

[0104] The third patterned conductive layer 303 is used to transmit bias voltage to the power transistors 236, 237, 256, and 257 within the dies 233, 234, 253, and 254, and can also serve as a routing layer, as mentioned above. Finally, the fourth conductive layer 304 acts as a system ground layer and also serves as a heatsink attachment layer, such as when combined with... Figure 6 To explain in more detail.

[0105] According to an embodiment, the module substrate 210 further includes one or more heat dissipation structures 316 extending between the top surface 209 and the bottom surface 211 of the module substrate 210. Dies 233, 234, 253, and 254 are physically and electrically coupled to the surface 317 of the heat dissipation structure 316 exposed at the top surface 209 of the module substrate 210. The bottom surface 318 of the heat dissipation structure 316 may be exposed at the bottom surface 211 of the module substrate 210, or the bottom surface 318 of the heat dissipation structure 316 may be covered with a bottom conductive layer 304, such as... Figure 3 As shown in the diagram. Regardless of the method, the heat dissipation structure 316 is configured to provide a thermal path between the dies 233, 234, 253, 254 and the bottom surface 318 of the heat dissipation structure 316 (and therefore the bottom surface 211 of the module substrate 210). In various embodiments, the heat dissipation structure 316 may include a conductive metal coin press-fitted and / or attached to a through-hole extending between the surfaces 209, 211 of the module substrate 210. In alternative embodiments, each heat dissipation structure in the heat dissipation structure 316 may include a plurality (or a set) of conductive thermal vias (e.g., circular or strip-shaped vias) extending between the surfaces 209, 211 of the module substrate 210. As will be combined Figure 6 In more detail, when module 200 is integrated into a larger electrical system, the surfaces 318 of the heat dissipation structure 316 (or the portions of the conductive layer 304 above those surfaces 318) are physically and thermally coupled to the heat sink (e.g., Figure 6 Heatsink 616).

[0106] The power amplifier module 200 further includes an RF signal input terminal 212 (e.g., Figure 1 RF input node 112), power splitter 220 (e.g., Figure 1 The power splitter 120), and the two-stage carrier amplifier 232 (e.g., Figure 1 Amplifier 132), two-stage peaking amplifier 252 (e.g., Figure 1 Amplifier 152), various phase shift and impedance matching elements, combination node 272 (e.g., Figure 1 Combined node 172), output impedance matching network 274 (e.g., Figure 1 Network 174), and RF signal output terminal 214 (e.g., network ..., and RF signal output terminal 214, Figure 1 (RF output node 114).

[0107] Terminal 212 serves as an RF signal input for module 200 and is coupled to RF signal input pad 312 on the top surface 209 of module substrate 210. RF signal input pad 312 is electrically coupled to input terminal 222 of power splitter 220 via one or more conductive structures (e.g., vias, traces, and / or bonding wires as shown).

[0108] The power splitter 220 is coupled to the mounting surface 209 of the module substrate 210 and may include one or more discrete dies and / or components, however... Figure 2 The term "power splitter" is represented as a single element. The power splitter 220 includes an input terminal 222 and two output terminals (unnumbered, but corresponding to...). Figure 1 Outputs 124, 126). Input 222 is electrically coupled to RF signal input pad 312 and RF signal input 212 via one or more conductive structures (e.g., vias, traces, and / or bonding wires as shown), and is therefore configured to receive input RF signals. The output of power splitter 220 is connected to input circuits 231, 251 (e.g., vias, traces, and / or bonding wires) via one or more conductive structures (e.g., vias, traces, and / or bonding wires) and input circuits 231, 251 (e.g., ...). Figure 1 The input circuits 131 and 151 are electrically coupled to the input terminal 235 of the carrier amplifier 232 and the input terminal 255 of the peaking amplifier 252.

[0109] Power splitter 220 is configured to separate the power of an input RF signal received through RF input 212 into a first RF signal and a second RF signal generated at the output of power splitter 220. Additionally, power splitter 220 may include one or more phase-shifting elements configured to apply an approximately 90-degree phase difference between the RF signals provided at the splitter output. As previously described, the first RF signal and the second RF signal generated at the output of power splitter 220 may have equal or unequal power.

[0110] The first output of the power splitter is electrically coupled to the carrier amplifier path (i.e., electrically coupled to carrier amplifier 232), and the second output of the power splitter is electrically coupled to the peaking amplifier path (i.e., electrically coupled to peaking amplifier 252). The RF signal generated at the output of the second power splitter is delayed by approximately 90 degrees compared to the RF signal generated at the output of the first power splitter. In other words, the RF signal supplied to the peaking amplifier path is delayed by approximately 90 degrees compared to the RF signal supplied to the carrier amplifier path. In any case, the first RF signal generated by the power splitter 220 is amplified by carrier amplifier 232, and the second RF signal generated by the power splitter 220 is amplified by peaking amplifier 252.

[0111] exist Figure 2In specific embodiments, each amplifier path in the carrier amplifier path and the peaking amplifier path includes two-stage power amplifiers 232, 252, wherein driver amplifier transistors 236, 256 are implemented on driver amplifier dies 233, 253, and final-stage amplifier transistors 237, 257 are implemented on separate final-stage amplifier dies 234, 254. For example, each of transistors 236, 237, 256, 257 may be a field-effect transistor (FET), such as a laterally diffused metal-oxide-semiconductor (LDMOS) FET or a high electron mobility transistor (HEMT). The specification and claims may refer to each transistor including a control terminal and two current-conducting terminals. For example, using the terminology associated with FETs, "control terminal" refers to the gate terminal of the transistor, and the first and second current-conducting terminals refer to the drain and source terminals of the transistor (and vice versa). Although the following description may use terminology commonly used in conjunction with FET devices, the various embodiments are not limited to implementations using FET devices and, rather, are applicable to implementations using bipolar junction transistor (BJT) devices or other suitable types of transistors.

[0112] According to an example embodiment, carrier amplifier 232 more specifically includes a silicon driver stage die 233 and a gallium nitride (GaN) final stage die 234, and peaking amplifier 252 also includes a silicon driver stage die 253 and a GaN final stage die 254. In other embodiments, each of the carrier amplifier 232 and peaking amplifier 252 may include a two-stage power amplifier implemented on a single die, or each of the carrier amplifier 232 and peaking amplifier 252 may include a single-stage power amplifier implemented on a single die. In yet another embodiment, each of the carrier amplifier and the peaking amplifier may include a two-stage power amplifier implemented on separate driver stage dies and final stage dies, but the driver stage die and / or final stage die may be formed using the same semiconductor technology (e.g., both the driver stage die and the final stage die may be silicon dies or GaN dies), or the driver stage die and / or final stage die may be formed using semiconductor technologies different from those described above (e.g., the driver stage die and / or final stage die may be formed from silicon germanium (SiGe) and / or gallium arsenide (GaAs) dies).

[0113] The carrier amplifier path includes the aforementioned driver stage die 233, final stage die 234, and phase shift and impedance inversion element 270 (e.g., Figure 1 (Component 170). The driver stage die 233 and the final stage die 234 of the carrier amplifier 232 are electrically coupled together in a cascaded arrangement between the input terminal 235 of the driver stage die 233 (corresponding to the carrier amplifier input) and the output terminal 238 of the final stage die 234 (corresponding to the carrier amplifier output).

[0114] The driver-stage die 233 includes multiple integrated circuits. In an embodiment, the integrated circuit system of die 233 includes an input terminal 235 (e.g., Figure 1 The integrated portion of the input terminal 135, the input impedance matching circuit (unnumbered), the silicon power transistor 236, the interstage impedance matching circuit (unnumbered), and the output terminal (unnumbered) are arranged in series coupling. More specifically, the gate of transistor 236 is electrically coupled to input terminal 235 through the input impedance matching circuit, and the drain of transistor 236 is electrically coupled to the output terminal of die 233 through the output impedance matching circuit. The source of transistor 236 is electrically coupled to a conductive layer (or source terminal, e.g., on the bottom surface of die 233). Figure 4A , 4B The source contact 434), and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface 317 of the heat dissipation structure 316.

[0115] The output of the driver stage die 233 is electrically coupled to the input of the final stage die 234 via a junction line array (unnumbered) or another type of electrical connection. The final stage die 234 also includes multiple integrated circuits. In an embodiment, the integrated circuit system of die 234 includes an input (unnumbered), a GaN power transistor 237, and an output 238 (e.g., ...). Figure 1 The output terminal 238 of the transistor is arranged in series coupling. More specifically, the gate of the transistor 237 is electrically coupled to the input terminal of the die 234, and the drain of the transistor 237 is electrically coupled to the output terminal 238 of the die 234. The source of the transistor 237 is electrically coupled to a conductive layer on the bottom surface of the die 234, and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface 317 of the heat dissipation structure 316.

[0116] The peaking amplifier path includes the driver stage die 253 and the final stage die 254 mentioned above. The driver stage die 253 and the final stage die 254 of the peaking amplifier 252 are electrically coupled together in a cascaded arrangement between the input terminal 255 of the driver stage die 253 (corresponding to the peaking amplifier input) and the output terminal 258 of the final stage die 254 (corresponding to the peaking amplifier output).

[0117] The driver-stage die 253 includes multiple integrated circuits. In an embodiment, the integrated circuit system of die 253 includes an input terminal 255 (e.g., Figure 1The silicon power transistor 256 is an integrated portion of an input terminal 155, an input impedance matching circuit (unnumbered), an interstage impedance matching circuit (unnumbered), and an output terminal (unnumbered) arranged in series. More specifically, the gate of transistor 256 is electrically coupled to input terminal 255 via the input impedance matching circuit, and the drain of transistor 256 is electrically coupled to the output terminal of die 253 via the output impedance matching circuit. The source of transistor 256 is electrically coupled to a conductive layer on the bottom surface of die 253, and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface of a heat dissipation structure (e.g., similar to or identical to heat dissipation structure 316).

[0118] The output of the driver stage die 253 is electrically coupled to the input of the final stage die 254 via a junction line array (unnumbered) or another type of electrical connection. The final stage die 254 also includes multiple integrated circuits. In an embodiment, the integrated circuit system of die 254 includes an input (unnumbered), a GaN power transistor 257, and an output 258 (e.g., ...). Figure 1 The output terminal 258 of the transistor is arranged in series coupling. More specifically, the gate of the transistor 257 is electrically coupled to the input terminal of the die 254, and the drain of the transistor 257 is electrically coupled to the output terminal 258 of the die 254. The source of the transistor 257 is electrically coupled to a conductive layer on the bottom surface of the die 254, and the bottom conductive layer is physically, electrically, and thermally coupled to the exposed top surface of the heat dissipation structure.

[0119] An amplified carrier signal is generated at the output terminal 238 of the final stage die 234, and an amplified peaking signal is generated at the output terminal 258 of the final stage die 254. The output terminal 258 also serves as a combination node 272 for the amplifier (e.g., ...). Figure 1 (Node 172). According to an embodiment, the output terminal 238 of the carrier terminal die 234 (e.g., via a bonding line (unnumbered) or another type of electrical connection) is electrically coupled to the first end of the phase shift and impedance inversion element 270, and the output terminal 258 of the peaking terminal die 254 (e.g., via a bonding line (unnumbered) or another type of electrical connection) is electrically coupled to the second end of the phase shift and impedance inversion element 270.

[0120] According to an embodiment, the phase shift and impedance inversion element 270 may be implemented by a quarter-wavelength or lambda / 4 (λ / 4) or shorter emitter line (e.g., a microstrip emitter line with an electrical length of up to about 90 degrees) formed from a portion of the conductive layer 301. As used herein, λ is the wavelength of the RF signal at the fundamental frequency of amplifier operation (e.g., a frequency in the range of about 600 MHz to about 10 GHz or higher). The combination of the phase shift and impedance inversion element 270 with wire junctions (or other) to the outputs 238, 258 of dies 234, 254 can apply a relative phase shift of about 90 degrees to the signal as the amplified carrier signal travels from output 238 to output 258 / combination node 272. When the various phase shifts applied individually to the carrier and peaked RF signals via the carrier and peaked paths, respectively, are substantially equal, the amplified carrier and peaked RF signals are combined substantially in phase at output 258 / combination node 272.

[0121] Output 258 / combination node 272 is connected to output impedance matching network 274 (e.g., Figure 1 Network 174) is electrically coupled (e.g., via a wire joint or another type of electrical connection) to RF output 214 (e.g., Figure 1 (Node 114). The output impedance matching network 274 is used to present the appropriate load impedance to each of the carrier final stage die 234 and the peaking final stage die 254. Although in Figure 2 The diagram is shown in a very simplified form, but the output impedance matching network 274 may include various conductive traces and additional discrete components (e.g., capacitors, inductors, and / or resistors) between the output terminal 258 / combination node 272 and the RF output terminal 214 to provide the desired impedance matching.

[0122] As previously discussed, multiple terminals 212, 214, 241-248, 261, 262, 265, and 266 are coupled to the mounting surface 209 of the module substrate 210, and a non-conductive encapsulating material 380 is disposed on the mounting surface 209 and around the terminals 212, 214, 241-248, 261, 262, 265, and 266 to define the contact surface 382 of the module 200. Some of the terminals 212, 214 correspond to signal I / O terminals, and the other terminals 241-248, 261, 262, 265, and 266 correspond to ground terminals in this embodiment. Although... Figure 2 Not shown, but additional terminals for providing bias voltages (e.g., gate and / or drain bias voltages) to transistors 236, 237, 246, 247 may also be coupled to mounting surface 209.

[0123] exist Figure 3 , 4AThe first embodiment, with terminals 212, 214, 241-248, 261, 262, 265, and 266, is described in detail in 5A. (Same as above) Figure 3 Same, Figure 4A and 5A They are Figure 2 The power amplifier module 200 is shown in a cross-sectional side view along lines 4-4 and 5-5.

[0124] More specifically, Figure 3 , 4A The cross-section of 5A is cut through ends 212, 214, 242-244, 265, and 266, where ends 212 and 214 are signal ends, and ends 242-244, 265, and 266 are ground ends. Regardless of their type, each end 212, 214, 241-248, 261, 262, 265, and 266 is connected to end pads (e.g., end pads 312, 314, 342, 343, 344, 365, and 366) at the mounting surface 209 of the module substrate 210, and each end pad is formed from a portion of the patterned conductive layer 301. Signal ends 212 and 214 are configured to transmit RF signals, and correspondingly, signal ends 212 and 214 and their associated signal end pads 312 and 314 are electrically coupled to conductive traces formed from portions of the signal conductive layer 301. In contrast, ground terminals 241-248, 261, 262, 265, and 266 are configured to connect to an external ground at RF ground plane 302 (e.g., Figure 6 A connection is provided between the system substrate 610 and the ground layer 602, and correspondingly, those ground terminals and their associated ground terminal pads (e.g., pads 342, 343, 344, 365, 366) are electrically coupled to the RF ground layer 302 through conductive vias (e.g., vias 442, 443, 444, 465, 466). Figure 4A As best shown, the RF ground layer 302 is electrically coupled to a heat dissipation structure (e.g., structure 316) connected to the dies 233, 234, 253, 254. Therefore, the combination of the heat dissipation structure 316, the RF ground layer 302, the vias 442, 443, 444, 465, 466, the ground pads 342, 343, 344, 365, 366, and the ground terminals 241-248, 261, 262, 265, 266 provides a conductive path between the power transistor dies 233, 234, 253, 254 of module 200 and the contact surface 382.

[0125] According to a specific embodiment, such as Figure 3 and 4AAs best described herein, at least some of the ground terminals 241-248 are positioned adjacent to and "extremely close" to one or more sides of power transistor dies 233, 234, 253, 254. As used herein, the term "extremely close" in the above context means a side of the power transistor die (e.g., die 234) (e.g., ...). Figure 4A The physical distance between the side portion 334 and the side portion of the grounding terminal (e.g., grounding terminal 244) (e.g., Figure 4A The distance 485) is less than the width of the die adjacent to the ground terminal (e.g., width 486, which is the die dimension parallel to the distance 485). Alternatively, the term "extremely close" in the above context means that the electrical length of the conductive path (e.g., dashed path 487) passing through the height of the heat dissipation structure (e.g., structure 316), RF ground layer (e.g., layer 302), any interlayer via (e.g., via 444), ground terminal pad (e.g., pad 344), and ground terminal (e.g., terminal 244) between the ground contacts for the die (e.g., bottom-side source contact 434) is less than about lambda / 5 (λ / 5) in some embodiments, or less than about lambda / 16 (λ / 16) in other embodiments. Although Figure 2 The diagram shows the specific orientation of ground terminals 241-248 on the mounting surface 209 of module substrate 210, but ground terminals 241-248 may also be positioned at additional and / or different orientations. More specifically, it is desirable that the ground terminals are positioned such that their ultimate effect is to minimize or substantially eliminate the RF return current distributed across module substrate 210, which could otherwise have a peak current region similar to a standing wave.

[0126] If combined Figure 6 To explain in more detail, once module 200 is installed on the system baseboard (e.g., Figure 6 The system substrate 610 is configured to allow ground terminals 241-248 to be positioned very close to power transistor dies 233, 234, 253, and 254, which facilitates relatively short return current loops for dies 233, 234, 253, and 254. This configuration avoids potential performance problems that might occur in systems where relatively long return current loops are implemented.

[0127] According to another specific embodiment, such as Figure 3 and 5AAs best depicted herein, at least some other ground terminals 261, 262, 265, 266 are located on both sides of and "extremely close" to signal terminals 212, 214 to provide ground-signal-ground (GSG) terminal structures 260, 264 for the RF input and RF output of module 200. As used herein, the term "extremely close" in the above context means the physical distance between the side of a ground terminal (e.g., ground terminal 265 or 266) and the nearest side of a signal terminal (e.g., signal terminal 214) (e.g., ...). Figure 5A The distance (585) is less than twice the width of signal terminals 212 and 214. By implementing a GSG terminal structure for the RF input and RF output of module 200, the length of the return current loop associated with the terminal structure can be very short. Furthermore, radiated electromagnetic energy from signal terminals 212 and 214 can be grounded via adjacent ground terminals 261, 262, 265, and 266, avoiding potential performance problems that would otherwise occur if radiated electromagnetic energy were allowed to reach other parts of the module.

[0128] exist Figure 3 , 4A In the embodiment shown in 5A, each signal terminal and ground terminal 214, 216, 241-248, 261, 262, 264, 265 includes a rigid conductive post or rod, wherein the proximal end is directly connected to the corresponding end pad (e.g., end pads 312, 314, 342, 343, 344, 365, 366), and the distal end is exposed at the contact surface 382 of module 200. According to the embodiment, the posts for the signal terminals and ground terminals 214, 216, 241-248, 261, 262, 264, 265 are formed of a highly conductive material, such as copper or another suitable conductive metal. The posts may be pre-formed and attached to the signal and ground terminals 214, 216, 241-248, 261, 262, 264, 265 using solder, conductive adhesive, sintering, brazing, or other suitable materials and methods. In other embodiments, the posts may be formed in situ on the signal and ground terminals 214, 216, 241-248, 261, 262, 264, 265.

[0129] like Figure 2As shown, in some embodiments, each of the end posts may have a square or rectangular cross-section, but in other embodiments, the end posts may alternatively have a circular or rod-shaped cross-section. For example, when the end post has a square or circular cross-section, the end post may have a width 386 (or diameter) in the range of about 300 micrometers to about 800 micrometers (e.g., about 500 micrometers), although the width 386 may also be smaller or larger. For example, the height 385 of the end post may be in the range of about 500 micrometers to about 1500 micrometers (e.g., about 1000 micrometers), although the end post may also be shorter or taller. According to an embodiment, the height 385 of the end post may be approximately equal to the thickness 384 of the encapsulation material 380, such that the distal end of the end post may be substantially coplanar with the contact surface 382 of the module 200. In other embodiments, the distal ends of the signal and ground end posts may be recessed below or extend above the contact surface 382 of the module 200. In either case, the distal ends of the signal and ground terminals are exposed at contact surface 382, ​​and the conductive attachment material 383 on the distal ends enables module 200 to be physically and electrically connected to the system substrate (e.g., Figure 6 (System substrate 610).

[0130] Figure 3 , 4A 5A describes signal terminals and ground terminals 214, 216, 241-248, 261, 262, 264, 265 including conductive posts embedded in the encapsulation material of module 200. In alternative embodiments, such as Figure 4B , 5B As shown in 5C, the signal and ground terminals 214, 216, 241-248, 261, 262, 264, 265 may alternatively be implemented in the form of a small interpolator structure attached to the signal and ground terminal pads (e.g., terminal pads 312, 314, 342, 343, 344, 365, 366) before the module substrate 210 and components are overmolded with encapsulation material 380.

[0131] For example, Figure 4B According to another example embodiment Figure 2 The power amplifier module 200, as shown in the modified cross-sectional side view along line 4-4, includes interposer ground terminals 243' and 244' positioned on either side of the power transistor die 234. Similarly, Figure 5B According to another example embodiment Figure 2 The power amplifier module 200 is shown in a modified cross-sectional side view along line 5-5, which includes interpolation ground terminals 265' and 266' located on both sides of the interpolation signal terminal 214'.

[0132] exist Figure 4BOn the right, two cross-sectional views of the "universal" interposer end 491 are shown (i.e., the interposer end that can be used for any and all signal and ground terminals of module 200). As shown in the side cross-sectional view ( Figure 4B As shown in the top view on the right, the inserter end 491 includes a dielectric body 492 (e.g., formed of FR-4, ceramic, or other suitable dielectric material) having a top surface 493 and a bottom surface 494, and a conductive via 495 extending through the dielectric body 492 between the top surface 493 and the bottom surface 494. Additionally, conductive pads 496 and 497 are deposited on the top surface 493 and the bottom surface 494, respectively contacting the first and second ends of the conductive via 495. (Top-down cross-sectional view) Figure 4B (The bottom view on the right) shows that the conductive via 495 may have a circular cross-sectional shape. However, in other embodiments, the conductive via 495 may alternatively have a square, rectangular, or rod-shaped shape. In either case, the inserter end 491 provides a conductive path through the via 495 between the pads 496 and 497.

[0133] When the via 495 has a square or circular cross-section, the via 495 may have a width 486 (or diameter) in the range of about 300 micrometers to about 800 micrometers (e.g., about 500 micrometers), although the width 486 may also be smaller or larger. For example, the height 485 of the interposer end 491 may be in the range of about 500 micrometers to about 1500 micrometers (e.g., about 1000 micrometers), although the interposer end may also be shorter or taller. According to an embodiment, the height 485 of the interposer end 491 may be approximately equal to the thickness 384 of the encapsulation material 380, such that the top conductive pad 496 of each interposer end may be substantially coplanar with the contact surface 382 of the module 200'. In other embodiments, the top conductive pad 496 of each interposer end may be recessed below the contact surface 382 of the module 200' or extend above the contact surface 382 of the module 200'. Regardless of the method, the top conductive pad 496 of each interposer end is exposed at the contact surface 382, ​​and the conductive attachment material 383 on the top conductive pad enables the module 200' to be physically connected and electrically connected to the system substrate (e.g., Figure 6 (System substrate 610).

[0134] Figure 2 and 3 Each of the signal and ground terminals 214, 216, 241-248, 261, 262, 264, and 265 can be replaced with an interpolator terminal, such as interpolator terminal 491 depicted in Figure 4. For example, as mentioned above, Figure 4BA modified module 200' is shown according to an example embodiment, having interposer ground terminals 243', 244' positioned on both sides of a power transistor die 234. Same Figure 4A As in the embodiments shown, the interposer ground terminals 243' and 244' (each having a structure with a general interposer terminal 491) are positioned close to the die 234 such that the electrical length of the conductive path (e.g., dashed path 487') passing through the height of the heat dissipation structure (e.g., structure 316), the RF ground layer (e.g., layer 302), any interlayer via (e.g., via 444), the ground terminal pad (e.g., pad 344), and the interposer ground terminal (e.g., terminal 244') is less than approximately lambda / 5 (λ / 5) in some embodiments, or less than approximately lambda / 16 (λ / 16) in other embodiments.

[0135] As mentioned above, Figure 5B The modified module 200'' is shown, in which interpolation ground terminals 265' and 266' located on both sides of the interpolation signal terminal 214' provide a ground-signal-ground (GSG) terminal structure 264' for the RF output of module 200''. A similar structure can be implemented for the RF input of module 200''.

[0136] Figure 5C Another embodiment is shown, which is Figure 2 The power amplifier module 200 is shown in a cross-sectional side view along line 5-5 of another modified version 200''', again depicting a GSG terminal 264'' with interpolation ground terminals 265'', 266'' located on both sides of the interpolation signal terminal 214'' according to another example embodiment. Figure 5B and 5C The main differences between the embodiments are Figure 5B The multiple interpolator ends 265', 266', and 214' of the generation GSG end structure 264' in Figure 5CThe intermediate layer is replaced by a single multi-terminal inserter 591. More specifically, the multi-terminal inserter 591 includes a dielectric body 592 (e.g., formed of FR-4, ceramic, or other suitable dielectric material) having a top surface 593 and a bottom surface 594, and a plurality of conductive vias 595-1, 595-2, 595-3 extending through the dielectric body 592 between the top surface 593 and the bottom surface 594. Additionally, conductive pads 596-1, 596-2, 596-3, 597-1, 597-2, 597-3 are deposited on the top surface 593 and the bottom surface 594, respectively contacting a first end and a second end of each of the plurality of conductive vias 595-1, 595-2, 595-3. Similarly, each of the conductive vias 595-1, 595-2, 595-3 may have a circular, square, rectangular, or strip-shaped cross-section. In either case, the combination of pad 596-1, through-hole 595-1, and pad 597-1 corresponds to the first grounding interposer terminal 265'', the combination of pad 596-2, through-hole 595-2, and pad 597-2 corresponds to the signal terminal 214'', and the combination of pad 596-3, through-hole 595-3, and pad 597-3 corresponds to the second grounding interposer terminal 266''. The first grounding interposer terminal 265'', the second grounding interposer terminal 266'', and the signal terminal 214'' form another embodiment of the GSG terminal structure 264''.

[0137] As previously indicated, for embodiments of the power amplifier module 200 to be incorporated into a larger electrical system (e.g., a final-stage amplifier in a cellular base station), one surface of the power amplifier module 200 is physically coupled and electrically coupled to a system substrate, and a heat sink is attached to the opposite surface of the power amplifier module 200. To illustrate the integration of the power amplifier module 200 into such systems, reference is now made to... Figure 6 It includes, according to the example embodiment Figure 2 A cross-sectional side view of an amplifier system 600 in which a power amplifier module 200 is coupled to a system substrate 610 and a heat sink 616.

[0138] The RF system 600 generally includes a system substrate 610, a power amplifier module 200 (or modules 200', 200'', 200'''), and a heat sink 616. According to an embodiment, the system substrate 610 includes a multilayer printed circuit board (PCB) or other suitable substrate. The system substrate 610 has a top surface 609 (also referred to as a "mounting surface") and an opposing bottom surface 611. Figure 6As depicted, the system substrate 610 includes a plurality of dielectric layers 605, 606, 607 (e.g., formed of FR-4, ceramic, or other PCB dielectric materials) arranged alternately with a plurality of conductive layers 601, 602, 603, wherein the top surface 609 of the system substrate 610 is defined by a patterned conductive layer 601. It should be noted that although the system substrate 610 is shown as including three dielectric layers 605-607 and three conductive layers 601-603, other embodiments of the system substrate may include more or fewer dielectric layers and / or conductive layers.

[0139] Each of the various conductive layers 601-603 may have a primary purpose and may also include conductive features that facilitate signal and / or voltage / ground routing between other layers. While the following description indicates the primary purpose for each of the conductive layers 601-603, it should be understood that a layer (or its functionality) may differ from others. Figure 6 The arrangement is best illustrated in the text and discussed below.

[0140] For example, in an embodiment, a patterned conductive layer 601 at the mounting surface 609 of the system substrate 610 can primarily serve as a signal conduction layer. More specifically, layer 601 includes a plurality of conductive features (e.g., conductive pads and traces) that act as attachment points for module 200, input RF connector 691, and output RF connector 692. Each of the RF connectors 691 and 692 can be, for example, a coaxial connector having a central signal conductor 693 and an external ground shield 694. According to an embodiment, the signal conductor 693 of the RF input connector 691 is electrically coupled to a first conductive trace 612 of layer 601, which in turn is coupled to the input terminal 212 of module 200, as described in more detail below. Additionally, the signal conductor 693 of the RF output connector 692 is electrically coupled to a second conductive trace 614 of layer 601, which in turn is coupled to the output terminal of module 200 (e.g., ...). Figure 2 (End 214). The ground shield 694 of connectors 691 and 692 is electrically coupled to an additional trace (unnumbered), which in turn is electrically coupled to the system ground layer 602 of the system substrate 610 through a conductive via 695 extending between layers 601 and 602.

[0141] As indicated, conductive layer 602 serves as the system ground layer. In addition to the ground shield 694 electrically coupled to connectors 691, 692, system ground layer 602 is also electrically coupled to an additional ground pad 641 on mounting surface 609 via an additional conductive via 696. As will be described in more detail below, the additional ground pad 641 is physically coupled and electrically coupled to the respective ground terminals of module 200 (e.g., terminals 241-248, 261, 262, 265, 266).

[0142] Module 200 (or any one of modules 200', 200'', and 200''') is from Figure 3 The directional inversion (or "flip") depicted in section -5 is directionally coupled to the mounting surface 609 of the system substrate 610. More specifically, the module 200 is coupled to the system substrate 610 such that the contact surface 382 of the module 200 and the mounting surface 609 of the system substrate 610 face each other. To connect the module 200 to the system substrate 610, the ends of the module 200 (e.g., Figure 2 Each of the ends 212, 214, 241-248, 261, 262, 265, 266 of the module is aligned and in contact with a corresponding pad (e.g., pads 612, 614, 641) on the mounting surface 609 of the system substrate 610. In embodiments where the conductive attachment material 383 is disposed on the exposed end of the module end, the conductive attachment material 383 is reflowed or otherwise cured to physically attach the module end to its corresponding pad on the mounting surface 609 of the system substrate 610. In other embodiments, alternatively, the conductive attachment material may be disposed on the conductive pads (e.g., pads 612, 614, 641) of the system substrate 610, and a suitable reflow or curing process may be performed to attach the module 200 to the system substrate 610.

[0143] According to an embodiment, the heat sink 616 is physically and thermally coupled to the heat sink attachment surface 211 of the power amplifier module 200, and more specifically, physically and thermally coupled to the conductive layer 304 and / or surface 318 of the embedded heat dissipation structure 316 of the module 200. The heat sink 616 is formed of a thermally conductive material, which may also be electrically conductive. For example, the heat sink 616 may be formed of copper or another bulk conductive material. To couple the heat sink 616 to the power amplifier module 200, a thermally conductive material 698 (e.g., thermal grease) may be applied to the heat sink attachment surface 211 of the module 200 (and / or the surface 318 of the heat dissipation structure 316) and / or the heat sink 616, and the heat sink 616 may contact the heat sink attachment surface 211. The heat sink 616 can then be clamped, screwed, or otherwise secured in place.

[0144] During operation of the RF system 600, an input RF signal is provided to the RF input terminal 212 at the contact surface 382 of the power amplifier module 200 via the RF input connector 691 and the trace / pad 612. Through terminal 212 and additional components (e.g., Figure 2 The power splitter 220 transmits the input RF signal to power transistor dies 233, 234, 253, and 254, which amplify the input RF signal as previously discussed. At the output terminal 214 ( Figure 2 , 5A An amplified output RF signal is generated at 5B, 5C, and the output terminal 214 is electrically coupled to the trace / pad 614 and to the RF output connector 692.

[0145] According to an embodiment, a grounding path is provided between each of the power transistor dies 233, 234, 253, and 254 and the system ground plane 602. For example, for Figure 6 The shown dies 233 and 234 include a first conductive grounding path for each die 233 and 234 (e.g., Figure 4A , 4B The grounding paths 487 and 487'), the first conductive grounding path starts from the grounding contact of the die (e.g., Figure 4A , 4B The bottom-side source contact 434 extends through a portion of the heat dissipation structure 316, the RF ground layer 302 of module 200, and any interlayer vias (e.g., Figure 3 , 4A 4B through holes 442, 444), grounding pad (e.g., Figure 3 , 4A 4B pads 342, 344) and one or more grounding terminals (e.g., Figure 2 , 3 Terminals 241-244 of 4A and 4B. (e.g., ...) Figure 6 As shown by the dashed path 687, the grounding path continues through one or more ground pads 641 and one or more ground vias 696 on the mounting surface 609 of the system substrate 610 to the system ground layer 602.

[0146] As discussed in detail previously, the ground terminals 241-244 of module 200 are very close to power transistor dies 233, 234, 253, 254, which creates a relatively short ground return path for module 200. Desiredly, the total electrical length of the ground path between the ground contact of each die 233, 234, 253, 254 and the system ground plane 602 is less than approximately lambda / 5 (λ / 5) in some embodiments, or less than approximately lambda / 16 (λ / 16) in other embodiments.

[0147] During operation, the power transistors within power transistor dies 233, 234, 253, and 254 generate a significant amount of heat. As indicated by arrow 699, the heat generated by the power transistors is transferred through the heat dissipation structure 316 to the heat sink 616, which efficiently dissipates the heat to the surrounding atmosphere. Therefore, the heat dissipation structure 316 provides two functions: 1) transferring the heat generated by the power transistor dies 233, 234, 253, and 254 to the heat sink 616; and 2) electrically coupling the grounding contacts of dies 233, 234, 253, and 254 to the system ground.

[0148] Figure 7 This refers to the manufacture of a power amplifier module according to an example embodiment (e.g., Figure 2 The power amplifier module 200) and the power amplifier module are assembled into an RF system (e.g., Figure 6 The flowchart shows a method in an RF system 600. The method may begin at block 702, i.e., fabricating a multilayer module substrate using known techniques (e.g., ...). Figure 2 , 3 The module substrate 210). As previously discussed, the multiple pads and traces are formed by a patterned conductive layer (e.g., ...) on the mounting surface of the module substrate. Figure 3 The portion of layer 301 is formed. In frame 704, the respective ends (e.g., Figure 2 Terminals 212, 214, 241-248, 262, 263, 265, 266), power transistor dies (e.g., Figure 2 The dies 233, 234, 253, 254) and other components (e.g., Figure 2 The power splitter 220 is connected to the mounting surface of the module substrate and provides additional connections (e.g., wire bonding) between the power transistor die and the assembly. In block 706, encapsulation (e.g., using...) Figure 3 Encapsulation material 380) module substrate, end, die and other components to define contact surface 382 where the distal end of said end is exposed.

[0149] In box 708, module 200 is inverted, and the module end is aligned with the system substrate (e.g., Figure 6 The corresponding pads on the mounting surface of the system substrate 610 (e.g., Figure 6 The pads 612, 614, and 641 are aligned and contacted. The conductive attachment material (e.g., material 383, such as solder or conductive adhesive) is reflowed, cured, or otherwise treated to create mechanical and electrical connections between the module end and the system substrate pads. This establishes signal and ground paths between the module and the system substrate.

[0150] Finally, in box 710, the heat sink (e.g., Figure 6The heat sink 616 is attached to the heat sink attachment surface of the module substrate (e.g., Figure 3 , 6 (Surface 211). For example, a thermally conductive material (e.g., material 698, such as thermal grease), clamps, screws, and / or other attachment components can be used to attach the heat sink to the module substrate. The method then ends.

[0151] An embodiment of the amplifier module includes a module substrate having a mounting surface, a signal conduction layer, a ground layer, and a first ground pad located on the mounting surface. A heat dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to the first surface of the heat dissipation structure. An encapsulation material covers the mounting surface of the module substrate and the power transistor die, and the surface of the encapsulation material defines a contact surface of the amplifier module. A first ground terminal is embedded within the encapsulation material. The first ground terminal has a proximal end coupled to the first ground pad and a distal end exposed at the contact surface. The first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground pad, the ground layer of the module substrate, and the heat dissipation structure.

[0152] An embodiment of the amplifier system includes a system substrate and an amplifier module. The system substrate has a first mounting surface, a first signal conducting layer, a first ground layer, and a ground pad located at the first mounting surface, wherein the ground pad is electrically coupled to the first ground layer. The amplifier module has a contact surface and a heat sink attachment surface. The amplifier module is coupled to the system substrate such that the mounting surface of the system substrate faces the contact surface of the amplifier module. The amplifier module further includes a module substrate having a second mounting surface, a second signal conducting layer, a second ground layer, and a first ground terminal pad located at the second mounting surface. Additionally, the amplifier module includes a heat dissipation structure extending through the module substrate. The heat dissipation structure has a first surface and a second surface, wherein the first surface is exposed at the second mounting surface of the module substrate. Furthermore, the amplifier module includes a power transistor die with a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure. An encapsulating material covers the second mounting surface of the module substrate and the power transistor die, wherein the surface of the encapsulating material defines the contact surface of the amplifier module. The amplifier module further includes a ground terminal embedded within the encapsulation material, wherein the ground terminal has a proximal end coupled to the first ground pad and a distal end exposed at the contact surface, and wherein the ground terminal is electrically coupled to the ground contact of the power transistor die through the ground pad, the second ground layer of the module substrate and the heat dissipation structure.

[0153] An embodiment of a method for manufacturing a power amplifier includes coupling a power transistor die to a heat dissipation structure extending through a module substrate, wherein the module substrate has a first mounting surface, a first signal conducting layer, a first ground layer, and a first ground pad located at the first mounting surface. A first surface of the heat dissipation structure is exposed at the first mounting surface of the module substrate. The power transistor die has a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure. The method further includes coupling a proximal end of a first ground terminal to the first ground pad of the module substrate; and covering the first mounting surface of the module substrate and the power transistor die with an encapsulating material to form an amplifier module. The surface of the encapsulating material defines a contact surface of the amplifier module, a distal end of the first ground terminal is exposed at the contact surface, and the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground pad, the ground layer of the module substrate, and the heat dissipation structure.

[0154] The preceding detailed description is illustrative in nature only and is not intended to limit the embodiments of the subject matter or the application and use of such embodiments. As used herein, the word "exemplary" means "serving as an example, illustration, or representation." Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. Furthermore, one is not to be bound by any expressed or implied theories presented in the foregoing technical field, background art, or detailed description.

[0155] The connecting lines shown in the figures included herein are intended to represent exemplary functional relationships and / or physical couplings between various elements. It should be noted that many alternative or additional functional relationships or physical connections may exist in the embodiments of the subject matter. Furthermore, certain terms may be used herein for reference only and therefore are not intended to be limiting, and unless the context clearly indicates otherwise, the terms “first,” “second,” and other such numerical terms referring to a reference structure do not imply a sequence or order.

[0156] As used herein, a “node” means any internal or external reference point, connection point, junction, signal line, conductive element, etc., where a given signal, logic level, voltage, data pattern, current, or quantity exists. Furthermore, two or more nodes can be implemented with a single physical element (and although received or output at a common node, two or more signals can still be multiplexed, modulated, or otherwise distinguished).

[0157] The above description refers to elements, nodes, or features being "connected" or "coupled" together. As used herein, unless otherwise explicitly stated, "connected" means that one element is directly engaged to (or directly communicates with) another element, and not necessarily mechanically engaged. Similarly, unless otherwise explicitly stated, "coupled" means that one element is directly or indirectly engaged to (or directly or indirectly communicates with) another element electrically or otherwise, and not necessarily mechanically engaged. Therefore, although the schematic diagrams shown depict an exemplary arrangement of elements, additional intervening elements, means, features, or components may be present in embodiments of the depicted subject matter.

[0158] While at least one exemplary embodiment has been presented in the detailed description above, it should be understood that numerous variations exist. It should also be understood that the one or more exemplary embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. In fact, the detailed description above will provide a convenient guide for those skilled in the art to implement the described embodiments(s). It should be understood that various changes can be made to the function and arrangement of the elements without departing from the scope defined by the claims, which includes known and foreseeable equivalents at the time of filing of this patent application.

Claims

1. An amplifier module, characterized in that, include: A module substrate having a mounting surface, a signal transmission layer, a ground layer, and a first grounding pad located on the mounting surface; A heat dissipation structure extending through the module substrate, wherein the heat dissipation structure has a first surface and a second surface, wherein the first surface is exposed at the mounting surface of the module substrate; A power transistor die having a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure; An encapsulating material covering the mounting surface of the module substrate and the power transistor die, wherein the surface of the encapsulating material defines the contact surface of the amplifier module; as well as A first ground terminal is embedded within the encapsulation material, wherein the first ground terminal has a proximal end coupled to the first ground terminal pad and a distal end exposed at the contact surface, and wherein the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground terminal pad, the ground layer of the module substrate, and the heat dissipation structure.

2. The amplifier module according to claim 1, characterized in that, The heat dissipation structure includes a conductive structure selected from metal coins and a set of heat-perforating holes.

3. The amplifier module according to claim 1, characterized in that, The ground layer of the module substrate contacts the heat dissipation structure.

4. The amplifier module according to claim 1, characterized in that, The first grounding terminal includes a conductive post.

5. The amplifier module according to claim 1, characterized in that, The first grounding terminal includes: The interposer end includes a dielectric body having a top surface and a bottom surface, and a conductive via extending between the top surface and the bottom surface of the dielectric body.

6. The amplifier module according to claim 1, characterized in that: The module substrate further includes a signal terminal pad, a second ground terminal pad, and a third ground terminal pad located on the mounting surface, wherein the signal terminal pad is electrically connected to one of the input and output of the power transistor die through the signal conduction layer, and the second ground terminal pad and the third ground terminal pad are adjacent to the signal terminal pad; and The amplifier module further includes: A signal terminal, embedded within the encapsulation material, wherein the signal terminal has a proximal end coupled to the signal terminal pad and a distal end exposed at the contact surface. A second grounding terminal, embedded within the encapsulation material, wherein the second grounding terminal has a proximal end coupled to the second grounding pad and a distal end exposed at the contact surface, and A third grounding terminal is embedded within the encapsulation material, wherein the third grounding terminal has a proximal end coupled to the third grounding pad and a distal end exposed at the contact surface, and wherein the signal terminal, the second grounding terminal, and the third grounding terminal form a ground-signal-grounding terminal structure.

7. An amplifier system, characterized in that, include: A system substrate having a first mounting surface, a first signal conduction layer, a first ground layer, and a grounding pad located on the first mounting surface, wherein the grounding pad is electrically coupled to the first ground layer; as well as An amplifier module having a contact surface and a heat sink attachment surface, wherein the amplifier module is coupled to the system substrate with the mounting surface of the system substrate facing the contact surface of the amplifier module, and wherein the amplifier module further includes: The module substrate has a second mounting surface, a second signal transmission layer, a second ground layer, and a first grounding pad located on the second mounting surface. A heat dissipation structure extending through the module substrate, wherein the heat dissipation structure has a first surface and a second surface, wherein the first surface is exposed at the second mounting surface of the module substrate. A power transistor die having a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure. An encapsulating material covering the second mounting surface of the module substrate and the power transistor die, wherein the surface of the encapsulating material defines the contact surface of the amplifier module, and A first ground terminal is embedded within the encapsulation material, wherein the first ground terminal has a proximal end coupled to the first ground terminal pad and a distal end exposed at the contact surface, and wherein the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground terminal pad, the second ground layer of the module substrate and the heat dissipation structure.

8. A method for manufacturing a power amplifier, characterized in that, The method includes: The power transistor die is coupled to a heat dissipation structure that extends through the module substrate, wherein... The module substrate has a first mounting surface, a first signal conduction layer, a first ground layer, and a first grounding pad located on the first mounting surface. The first surface of the heat dissipation structure is exposed at the first mounting surface of the module substrate, and The power transistor die has a ground contact, wherein the ground contact is coupled to the first surface of the heat dissipation structure; Couple the proximal end of the first ground terminal to the first ground terminal pad of the module substrate; and An amplifier module is formed by covering the first mounting surface of the module substrate and the power transistor die with an encapsulating material, wherein the surface of the encapsulating material defines a contact surface of the amplifier module, the distal end of the first ground terminal is exposed at the contact surface, and the first ground terminal is electrically coupled to the ground contact of the power transistor die through the first ground pad, the ground layer of the module substrate and the heat dissipation structure.

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